MAX40100 Datasheet

MAX40100 Datasheet
MAX40100
General Description
The MAX40100 is a low-power, zero-drift operational
amplifier available in a space-saving, 6-bump, wafer-level
package (WLP).
Designed for use in portable consumer, medical, and
industrial applications, the MAX40100 features rail-to-rail
CMOS inputs and outputs, a 1.5MHz GBW at just 66μA
supply current, and 10μV (max) “zero-drift” input voltage
offset over time and temperature.
The zero-drift feature of the MAX40100 reduces the high 1/f
noise typically found in CMOS input operational amplifiers,
making it useful for a wide variety of low-frequency
measurement applications.
The MAX40100 is available in a space-saving, 1.1 x
0.76mm, 6-bump WLP, with 0.35mm bump pitch.
The MAX40100 is specified over the -40°C to +125°C
extended automotive operating temperature range.
Applications
●●
●●
●●
●●
●●
Cell Phones
Sensor Interfaces
Loop-Powered Systems
Portable Medical Devices
Battery-Powered Devices
19-8539; Rev 1; 6/17
Precision, Low-Power and
Low-Noise Op Amp with RRIO
Benefits and Features
●● Low 66μA Quiescent Current
●● Low Input Noise:
• 42nV√Hz at 1kHz
• 0.42μVPP from 0.1Hz to 10Hz
●● Rail-to-Rail Inputs and Outputs (RRIO)
●● 1.5MHz GBW
●● Ultra-Low 10pA Input Bias Current
●● Single 1.6V to 5.5V Supply Voltage Range
●● Unity Gain Stable
●● Power-Saving Shutdown Mode
●● Tiny 1.1mm x 0.76mm 6-bump WLP
Ordering Information appears at end of data sheet.
MAX40100
Precision, Low-Power and
Low-Noise Op Amp with RRIO
Absolute Maximum Ratings
Supply Voltage, SHDN (VDD to GND) ....................-0.3V to +6V
IN+, IN-, OUT................................(GND - 0.3V) to (VDD + 0.3V)
Short-Circuit Duration to Either Supply Rail,
OUT, OUTA, OUTB ........................................................... 10s
Continuous Input Current (Any Pins) ...............................±20mA
Continuous Power Dissipation (TA = +70°C)
6-Bump WLP (Derate 10.19mW/°C above +70°C) .........816mW
Package Thermal Characteristics (multilayer board)
Junction-to-Ambient Thermal Resistance (θJA)......98.06°C/W
Operating Temperature Range ......................... -40°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range..............................-65ºC to +150°C
Lead Temperature (soldering 10s) .................................. +300°C
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(VDD = +3.3V, GND = 0, AV = 1V/V, VOUT = VDD/2, CL = 20pF, RL = 100kΩ to VDD/2, VSHDN = VDD, TA = -40°C to +125°C unless
otherwise noted. Typical values are at +25°C) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER SUPPLY
Supply Voltage Range
VDD
Quiescent Supply Current
IDD
Power-Supply Rejection Ratio
PSRR
Guaranteed by PSRR, 0°C ≤ TA ≤ +70°C
1.6
5.5
Guaranteed by PSRR, -40°C ≤ TA ≤ +125°C
1.8
5.5
TA =+25°C
66
-40°C ≤ TA ≤ +125°C
VDD = 1.8V to
5.5V
tON
Shutdown Supply Current
ISHDN
Turn-On Time from Shutdown
tOSD
124
TA =+25°C
116
-40°C ≤ TA ≤ +125°C
107
0°C ≤ TA ≤ +70°C, VDD = 1.6V to 5.5V
Power-Up Time
92
V
μA
135
dB
107
VDD = 0 to 3V step, AV = 1V/V
20
μs
300
VDD = 3.3V, VSHDN = 0 to 3.3V step in < 1μs
50
TA = +25°C
0.8
nA
μs
DC SPECIFICATIONS
Input Offset Voltage
Input Offset Voltage Drift
VOS
-40°C ≤ TA ≤ +125°C
25
∆VOS
5
TA = +25°C
Input Bias Current (Note 3)
Input Offset Current
Input Common-Mode Range
www.maximintegrated.com
IB
μV
nV/°C
±0.031
±0.160
-40°C ≤ TA ≤ +85°C
±4.6
-40°C ≤ TA ≤ +125°C
±28
IOS
VCM
10
nA
±0.005
Guaranteed by
CMRR test
TA = +25°C
-0.1
VDD +
0.1
-40°C ≤ TA ≤ +125°C
-0.1
VDD +
0.05
V
Maxim Integrated │ 2
MAX40100
Precision, Low-Power and
Low-Noise Op Amp with RRIO
Electrical Characteristics (continued)
(VDD = +3.3V, GND = 0, AV = 1V/V, VOUT = VDD/2, CL = 20pF, RL = 100kΩ to VDD/2, VSHDN = VDD, TA = -40°C to +125°C unless
otherwise noted. Typical values are at +25°C) (Note 2)
PARAMETER
SYMBOL
Common-Mode Rejection Ratio
CMRR
Open-Loop Gain
Input Resistance
AVOL
RIN
VOH
CONDITIONS
MIN
TYP
-0.1 ≤ VCM ≤ VDD + 0.1, TA = +25°C
122
135
-0.1 ≤ VCM ≤ VDD + 0.05,
-40°C ≤ TA ≤ +125°C
116
20mV ≤ VOUT ≤ VDD - 20mV,
RL = 100kΩ to VDD/2
120
138
150mV ≤ VOUT ≤ VDD - 150mV,
RL = 5kΩ to VDD/2
123
160
50
Common-mode
200
VOL
VOUT
MΩ
12
RL = 50kΩ to VDD/2
22
50
mV
RL =100kΩ to VDD/2
11
RL =50kΩ to VDD/2
18
RL =600Ω to VDD/2
Short-Circuit Current
dB
RL = 100kΩ to VDD/2
RL = 600Ω to VDD/2
Output Voltage Swing
UNITS
dB
Differential
VDD - VOUT
MAX
50
ISC
50
mA
GBWP
1.5
MHz
AC SPECIFICATIONS
Gain-Bandwidth Product
Slew Rate
SR
0 ≤ VOUT ≤ 2V
0.7
V/µs
Input Voltage Noise Density
En
fSW = 1kHz
42
nV/√Hz
Input Voltage Noise
0.1Hz ≤ fSW ≤ 10Hz
0.42
μVPP
Input Current Noise Density
fSW = 1kHz
100
fA/√Hz
Phase Margin
CL = 20pF
60
°
No sustained oscillation, AV = 1V/V
400
pF
Capacitive Loading
CL
LOGIC INPUT
Shutdown Input Low
VIL
Shutdown Input High
VIH
Shutdown Input Leakage
Current
IIL/IIH
0.5
1.3
V
V
100
nA
Note 2: Specifications are 100% tested at TA = +25°C (exceptions noted). All temperature limits are guaranteed by design.
Note 3: Guaranteed by design.
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Maxim Integrated │ 3
MAX40100
Precision, Low-Power and
Low-Noise Op Amp with RRIO
Typical Operating Characteristics
(VDD = +3.3V, GND = 0, AV = 1V/V, VOUT = VDD/2, CL = 20pF, RL = 100kΩ to VDD/2, VSHDN = VDD, TA = -40°C to +125°C unless
otherwise noted. Typical values are at +25°C)
INPUT OFFSET VOLTAGE HISTOGRAM
20
15
10
5
0
0.0
1.0
2.0
3.0
INPUT OFFSET VOLTAGE (µV)
toc03
QUIESCENT SUPPLY CURRENT (μ A)
QUIESCENT SUPPLY CURRENT (μ A)
TA = 125°C
80
70
60
TA = 25°C
50
40
30
TA = -40°C
20
15
10
5
-0.02
-0.01 0.00 0.01 0.02 0.03
INPUT OFFSET VOLTAGE (µV)
QUIESCENT SUPPLY CURRENT
vs. TEMPERATURE
100
100
90
20
0
-0.03
4.0
QUIESCENT SUPPLY CURRENT
vs. SUPPLY VOLTAGE
toc2
25
NUMBER OF OCCURRENCES
NUMBER OF OCCURRENCES
INPUT OFFSET VOLTAGE HISTOGRAM
toc1
25
0.04
toc04
90
80
70
60
VDD = 3.3V
50
10
0
40
1.5
2.5
3.5
4.5
-50
5.5
0
SUPPLY VOLTAGE (V)
INPUT OFFSET VOLTAGE
vs. INPUT COMMON MODE VOLTAGE
toc05
8
INPUT OFFSET VOLTAGE (μ V)
INPUT OFFSET VOTLAGE (μ V)
7.5
TA = 125°C
6.5
6
5.5
5
TA = -40°C
TA = 25°C
4.5
1
2
3
INPUT COMMON MODE VOLTAGE (V)
www.maximintegrated.com
4
toc06
5
4
3
2
VDD = 3.3V
VCM = VDD/2
0
0
150
6
1
4
-1
100
INPUT OFFSET VOLTAGE
vs. TEMPERATURE
7
VDD = 3.3V
7
50
TEMPERATURE (°C)
-50
0
50
100
150
TEMPERATURE (°C)
Maxim Integrated │ 4
MAX40100
Precision, Low-Power and
Low-Noise Op Amp with RRIO
Typical Operating Characteristics (continued)
(VDD = +3.3V, GND = 0, AV = 1V/V, VOUT = VDD/2, CL = 20pF, RL = 100kΩ to VDD/2, VSHDN = VDD, TA = -40°C to +125°C unless
otherwise noted. Typical values are at +25°C)
INPUT BIAS CURRENT
vs. INPUT COMMON MODE VOLTAGE
140
VDD = 3.3V
-5
-15
100
IBIAS+
-20
-25
-30
80
60
-35
40
-40
IBIAS-
-45
20
0
-50
-1
0
1
2
3
0.01
4
0.1
1
INPUT COMMON MODE VOLTAGE (V)
DC CMRR vs. TEMPERATURE
170
10
100
1000
10000
INPUT FREQUENCY (kHz)
toc09
AC PSRR vs. FREQUENCY
140
toc10
VDD = 3.3V
160
120
150
VDD = 5.5V
100
140
AC PSRR (dB)
DC CMRR (dB)
toc8
VIN_CM = 1Vp-p
120
-10
AC CMRR (dB)
INPUT BIAS CURRENTS (pA)
AC CMRR vs. FREQUENCY
toc07
0
130
120
110
VDD = 1.8V
80
60
40
100
20
90
0
0.0001 0.001 0.01
80
-50
0
50
100
150
TEMPERATURE (°C)
1
10
100 1000 10000
OUTPUT VOLTAGE SWING HIGH
vs. TEMPERATURE
DC PSRR vs. TEMPERATURE
toc11
140
0.1
INPUT FREQUENCY (kHz)
0.4
toc12
VDD = 1.8V TO 5.5V
135
0.35
125
VOH (mV)
DC PSRR (dB)
130
120
115
0.3
0.25
0.2
110
0.15
105
100
0.1
-50
0
50
100
TEMPERATURE (°C)
www.maximintegrated.com
150
-50
0
50
100
150
TEMPERATURE (°C)
Maxim Integrated │ 5
MAX40100
Precision, Low-Power and
Low-Noise Op Amp with RRIO
Typical Operating Characteristics (continued)
(VDD = +3.3V, GND = 0, AV = 1V/V, VOUT = VDD/2, CL = 20pF, RL = 100kΩ to VDD/2, VSHDN = VDD, TA = -40°C to +125°C unless
otherwise noted. Typical values are at +25°C)
OUTPUT VOLTAGE SWING LOW
vs. TEMPERATURE
0.45
OPEN-LOOP GAIN vs. FREQUENCY
toc13
140
OPEN-LOOP GAIN (dB)
0.4
0.35
VOL (mV)
toc14
160
0.3
0.25
120
100
80
60
40
20
0.2
0
-20
0.001
0.15
-50
0
50
100
150
0.1
TEMPERATURE (°C)
INPUT VOLTAGE NOISE DENSITY
vs. FREQUENCY
toc15
10000
100000 10000000
toc16
0.3
1000
100
0.2
0.1
0
-0.1
-0.2
-0.3
10
-0.4
10
100
1000
10000
100000
0
20
40
60
4 SECONDS/DIV
FREQUENCY (Hz)
INPUT CURRENT NOISE DENSITY
vs. FREQUENCY
SMALL SIGNAL GAIN & PHASE
vs. FREQUENCY
toc17
100000
5
GAIN
120
GAIN (dB)
-5
90
-10
60
30
-15
-20
0
PHASE
-30
-25
-60
-90
-30
-120
-35
-40
10
1
10
100
1000
FREQUENCY (Hz)
www.maximintegrated.com
10000
100000
180
150
0
1000
toc18
PHASE (°)
1
INPUT CURRENT NOISE DENSITY (fA/√Hz)
1000
0.1 to 10Hz INTEGRATED NOISE
0.4
INPUT VOLTAGE NOISE (µVpk-pk)
INPUT VOLTAGE NOISE DENSITY (nV/√Hz)
10
INPUT FREQUENCY (Hz)
-150
VIN = 100mVP-P
0.01
0.1
1
10
100
1000
-180
10000
FREQUENCY (kHz)
Maxim Integrated │ 6
MAX40100
Precision, Low-Power and
Low-Noise Op Amp with RRIO
Typical Operating Characteristics (continued)
(VDD = +3.3V, GND = 0, AV = 1V/V, VOUT = VDD/2, CL = 20pF, RL = 100kΩ to VDD/2, VSHDN = VDD, TA = -40°C to +125°C unless
otherwise noted. Typical values are at +25°C)
SMALL SIGNAL STEP RESPONSE vs. TIME
LARGE SIGNAL GAIN vs. FREQUENCY
toc19
10
GAIN (dB)
0
-10
AC
COUPLED
VOUT
-20
50mV/div
-30
-40
VIN = 2VP-P
-50
0.01
0.1
1
10
100μ s/div
FREQUENCY (kHz)
LARGE SIGNAL STEP RESPONSE vs. TIME
STABILITY vs.
CAPACITIVE AND RESISTIVE LOAD
toc22
1000
AC
COUPLED
VOUT
500mV/div
ISOLATION RESISTANCE (Ω )
VIN = 100mVp-p
AV = 1V/V
STABLE
100
UNSTABLE
10
100
100μ s/div
1000
10000
100000
CAPACITIVE LOAD (pF)
SHUTDOWN ENABLE RESPONSE
POWER-UP TIME
VSHDN
2V/div
VDD =VSHDN
2V/div
VOUT
NO LOAD
200mV/div
VOUT
NO LOAD
500mV/div
20μ s/div
www.maximintegrated.com
40μ s/div
Maxim Integrated │ 7
MAX40100
Precision, Low-Power and
Low-Noise Op Amp with RRIO
Bump Configuration
TOP VIEW
MAX40100
3
2
A
VSS
VDD
SHDN
B
IN+
IN-
OUT
+
1
WLP
Bump Descriptions
PIN
NAME
FUNCTION
A1
VSS
Negative Supply Voltage
A2
VDD
Positive Supply Voltage. Bypass to GND with a 0.1µF capacitor.
A3
SHDN
B1
IN+
Positive Input
B2
IN-
Negative Input
B3
OUT
Shutdown. Pull to VSS to activate shutdown mode.
Output
Detailed Description
The MAX40100 is a precision, low-power op-amps ideal
for signal processing applications. This device use an
innovative auto-zero technique that allows precision and
low-noise with a minimum amount of power. The low input
offset voltage, CMOS inputs, and the absence of 1/f noise
allows for optimization of active-filter designs.
The MAX40100 achieves rail-to-rail performance at the
input through the use of a low-noise charge pump. This
ensures a glitch-free common-mode input voltage range
extending from the negative supply rail up to the positive
supply rail, eliminating cross over distortion common to
traditional N-channel/P-channel CMOS pair inputs, reducing
harmonic distortion at the output.
The device features a shutdown mode that greatly reduces
quiescent current while the device is not operational.
Auto-Zero
The MAX40100 features an auto-zero circuit that allows
the device to achieve less than 10µV of input offset
voltage and eliminates the 1/f noise.
www.maximintegrated.com
Internal Charge Pump
An internal charge pump provides an internal supply typically
1V beyond the upper rail. This internal rail allows the
MAX40100 to achieve true rail-to-rail inputs and outputs,
while providing excellent common-mode rejection, powersupply rejection ratios, and gain linearity.
The charge pump requires no external components, and
in most applications is entirely transparent to the user.
The operating frequency is well beyond the unity-gain
frequency of the amplifier, avoiding aliasing or other
signal integrity issues in sensitive applications.
Shutdown Operation
The device features an active-low shutdown mode that
lowers the quiescent current to less than 1µA. In shutdown
mode the inputs and output are high impedance. This
allows multiple devices to be multiplexed onto a single
line without the use of external buffers. Pull SHDN high for
normal operation.
The shutdown high (VIH) and low (VIL) threshold voltages
are designed for ease of integration with digital controls like
microcontroller outputs. These thresholds are independent
of supply, eliminating the need for external pulldown circuitry.
Maxim Integrated │ 8
MAX40100
Precision, Low-Power and
Low-Noise Op Amp with RRIO
Applications Information
Power Supplies and Layout
The MAX40100 low-power, low-noise and precision
operational amplifiers designed for applications in the
portable medical, such as ECG and Pulse Oximetry,
portable consumer and industrial markets.
The MAX40100 is also ideal for loop-powered systems
that interface with pressure sensors or strain-gauges.
Capacitive Load Stability
Driving large capacitive loads can cause instability in
many op-amps. MAX40100 is stable with capacitive loads
up to 400pF. Stability with higher capacitive loads can be
improved by adding an isolation resistor in series with the
op-amp output. This resistor improves the circuit’s phase
margin by isolating the load capacitor from the amplifier’s
output. The graph in the Typical Operating Characteristics
gives the stable operation region for capacitive load
versus isolation resistors.
The MAX40100 operate either with a single supply
from +1.6V to +5.5V with respect to ground or with dual
supplies from ±0.8V to ±2.75V. When used with dual
supplies, bypass both supplies with their own 0.1μF
capacitor to ground. When used with a single supply,
bypass VDD with a 0.1μF capacitor to ground.
Careful layout technique helps optimize performance by
decreasing the amount of stray capacitance at the op
amp’s inputs and outputs. To decrease stray capacitance,
minimize trace lengths by placing external components
close to the op amp’s pins.
Typical Application Circuit
VCC = 1.8V TO 5.5V
VIN-
MAX40100
VIN+
MAX40100
VOUT
R1
R2
R3
R4
HIGH INPUT IMPEDANCE 2-OP AMP INSTRUMENTATION AMPLIFIER
IF R1 = R4, R2 = R3, VOUT = (VIN+ - VIN-) X (1 + R4/R3)
R1, R2, R3, R4 ARE LOWER TOLERANCE (0.01%) FOR BETTER CMRR PERFORMANCE
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Maxim Integrated │ 9
MAX40100
Precision, Low-Power and
Low-Noise Op Amp with RRIO
Ordering Information
Package Information
PART
TEMP RANGE
PIN-PACKAGE
MAX40100ANT+
-40°C to +125°C
6 WLP
+Denotes lead(Pb)-free/RoHS compliant package.
Chip Information
PROCESS: BiCMOS
www.maximintegrated.com
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
6 WLP
N60D1+1
21-100086
Refer to
Application
Note 1891
Maxim Integrated │ 10
MAX40100
Precision, Low-Power and
Low-Noise Op Amp with RRIO
Revision History
REVISION
NUMBER
REVISION
DATE
DESCRIPTION
0
5/16
Initial release
1
6/17
Updated units in Electrical Characteristics table
PAGES
CHANGED
—
2, 3
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2017 Maxim Integrated Products, Inc. │ 11
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