Fujitsu MB3887 User's Manual
FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-27709-3E
ASSP For Power Supply Applications (Secondary battery)
DC/DC Converter IC
for Charging Li-ion battery
MB3887
■ DESCRIPTION
The MB3887 is a DC/DC converter IC suitable for down-conversion, using pulse-width (PWM) charging and
enabling output voltage to be set to any desired level from one cell to four cells.
These ICs can dynamically control the secondary battery’s charge current by detecting a voltage drop in an AC
adapter in order to keep its power constant (dynamically-controlled charging) .
The charging method enables quick charging, for example, with the AC adapter during operation of a notebook PC.
The MB3887 provides a broad power supply voltage range and low standby current as well as high efficiency,
making it ideal for use as a built-in charging device in products such as notebook PC.
This product is covered by US Patent Number 6,147,477.
■ FEATURES
• Detecting a voltage drop in the AC adapter and dynamically controlling the charge current
(Dynamically-controlled charging)
(Continued)
■ PACKAGE
24-pin plastic SSOP
(FPT-24P-M03)
MB3887
(Continued)
• Output voltage setting using external resistor
: 1 cell to 4 cells
• High efficiency
: 96% (VIN = 19 V, Vo = 16.8 V)
• Wide range of operating supply voltages
: 8 V to 25 V
• Output voltage setting accuracy
: 4.2 V ± 0.74% (Ta = −10 °C to +85 °C , per cell)
• Charging current accuracy
: ±5%
• Built-in frequency setting capacitor enables frequency setting using external resistor only
• Oscillation frequency range
: 100 kHz to 500 kHz
• Built-in current detection amplifier with wide in-phase input voltage range : 0 V to VCC
• In standby mode, leave output voltage setting resistor open to prevent inefficient current loss
• Built-in standby current function
: 0 µA (standard)
• Built-in soft-start function independent of loads
• Built-in totem-pole output stage supporting P-channel MOS FET devices
2
MB3887
■ PIN ASSIGNMENT
(TOP VIEW)
24 : +INC2
−INC2 : 1
23 : GND
OUTC2 : 2
+INE2 : 3
22 : CS
−INE2 : 4
21 : VCC (O)
20 : OUT
FB2 : 5
19 : VH
VREF : 6
18 : VCC
FB1 : 7
−INE1 : 8
17 : RT
+INE1 : 9
16 : −INE3
OUTC1 : 10
15 : FB3
OUTD : 11
14 : CTL
−INC1 : 12
13 : +INC1
(FPT-24P-M03)
3
MB3887
■ PIN DESCRIPTION
4
Pin No.
Symbol
I/O
Descriptions
1
−INC2
I
Current detection amplifier (Current Amp2) input terminal.
2
OUTC2
O
Current detection amplifier (Current Amp2) output terminal.
3
+INE2
I
Error amplifier (Error Amp2) non-inverted input terminal.
4
−INE2
I
Error amplifier (Error Amp2) inverted input terminal.
5
FB2
O
Error amplifier (Error Amp2) output terminal.
6
VREF
O
Reference voltage output terminal.
7
FB1
O
Error amplifier (Error Amp1) output terminal.
8
−INE1
I
Error amplifier (Error Amp1) inverted input terminal
9
+INE1
I
Error amplifier (Error Amp1) non-inverted input terminal.
10
OUTC1
O
Current detection amplifier (Current Amp1) output terminal.
11
OUTD
O
With IC in standby mode, this terminal is set to “Hi-Z” to prevent loss
of current through output voltage setting resistance.
Set CTL terminal to “H” level to output “L” level.
12
−INC1
I
Current detection amplifier (Current Amp1) input terminal.
13
+INC1
I
Current detection amplifier (Current Amp1) input terminal.
14
CTL
I
Power supply control terminal.
Setting the CTL terminal at “L” level places the IC in the standby
mode.
15
FB3
O
Error amplifier (Error Amp3) output terminal.
16
−INE3
I
Error amplifier (Error Amp3) inverted input terminal.
17
RT

Triangular-wave oscillation frequency setting resistor connection
terminal.
18
VCC

Power supply terminal for reference power supply and control circuit.
19
VH
O
Power supply terminal for FET drive circuit (VH = VCC − 6 V) .
20
OUT
O
External FET gate drive terminal.
21
VCC (O)

Output circuit power supply terminal.
22
CS

Soft-start capacitor connection terminal.
23
GND

Ground terminal.
24
+INC2
I
Current detection amplifier (Current Amp2) input terminal.
MB3887
■ BLOCK DIAGRAM
−INE1 8
OUTC1 10
<Current Amp1>
+
× 20
−
−INC1 12
+INC1 13
<Error Amp1>
VREF
−
+
21 VCC (O)
+INE1 9
<PWM Comp.>
<OUT>
+
+
+
Drive
−
FB1 7
−INE2 4
OUTC2 2
<Current Amp2>
+
+INC2 24
× 20
−
−INC2 1
+INE2 3
<Error Amp2>
VREF
VCC
−
VCC
(VCC UVLO) 215 kΩ
+
−
+
+
−
4.2 V
FB3 15
(VCC − 6 V)
2.5 V
1.5 V
<UVLO>
<Error Amp3>
VREF
OUTD 11
19 VH
Bias
Voltage
<VH>
+
FB2 5
−INE3 16
20 OUT
35 kΩ
0.91 V
(0.77 V)
VREF
UVLO
<SOFT>
VREF
10
µA
VCC
4.2 V
CS 22
<OSC>
<REF>
45 pF
bias
17
RT
18 VCC
<CTL>
14 CTL
VREF
5.0 V
6
VREF
23
GND
5
MB3887
■ ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Conditions
Power supply voltage
VCC
Output current
IOUT
Peak output current
IOUT
Power dissipation
PD
Storage temperature
TSTG
Rating
Unit
Min
Max
VCC, VCC (O) terminal

28
V


60
mA
Duty ≤ 5 %
(t = 1 / fOSC × Duty)

700
mA
Ta ≤ +25 °C

740*
mW
−55
+125
°C

* : The package is mounted on the dual-sided epoxy board (10 cm × 10 cm) .
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
6
MB3887
■ RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Conditions
VCC, VCC (O) terminal
Value
Unit
Min
Typ
Max
8

25
V
Power supply voltage
VCC
Reference voltage output
current
IREF

−1

0
mA
VH terminal output current
IVH

0

30
mA
VINE
−INE1 to −INE3, +INE1,
+INE2 terminal
0

VCC − 1.8
V
VINC
+INC1, +INC2, −INC1,
−INC2 terminal
0

VCC
V
Input voltage
OUTD terminal
output voltage
VOUTD

0

17
V
OUTD terminal
output current
IOUTD

0

2
mA
CTL terminal input voltage
VCTL

0

25
V
Output current
IOUT

−45

+45
mA
Peak output current
IOUT
−600

+600
mA
Oscillation frequency
fOSC

100
290
500
kHz
Timing resistor
RT

27
47
130
kΩ
Soft-start capacitor
CS


0.022
1.0
µF
VH terminal capacitor
CVH


0.1
1.0
µF
Reference voltage output
capacitor
CREF


0.1
1.0
µF
Ta

−30
+25
+85
°C
Operating ambient
temperature
Duty ≤ 5 %
(t = 1 / fosc × Duty)
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
7
MB3887
■ ELECTRICAL CHARACTERISTICS
(Ta = +25 °C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA)
Symbol
Pin
No.
VREF1
6
VREF2
Input stability
Load stability
Parameter
Output voltage
1.
Reference
voltage block
[REF]
Short-circuit output
current
Threshold voltage
2.
Under voltage
lockout protecHysteresis width
tion circuit
block
Threshold voltage
[UVLO]
Hysteresis width
3.
Soft-start block Charge current
[SOFT]
4.
Triangular
waveform oscillator circuit
block
[OSC]
Oscillation
frequency
Frequency
temperature
stability
Input offset voltage
Input bias current
In-phase input
voltage range
5-1.
Error amplifier Voltage gain
block
Frequency
[Error Amp1,
bandwidth
Error Amp2]
Output voltage
Output source
current
Output sink current
Conditions
Value
Unit
Min
Typ
Max
Ta = +25 °C
4.967
5.000
5.041
V
6
Ta = −10 °C to +85 °C
4.95
5.00
5.05
V
Line
6
VCC = 8 V to 25 V

3
10
mV
Load
6
VREF = 0 mA to −1 mA

1
10
mV
Ios
6
VREF = 1 V
−50
−25
−12
mA
VTLH
18
VCC = VCC (O) ,
VCC =
6.2
6.4
6.6
V
VTHL
18
VCC = VCC (O) ,
VCC =
5.2
5.4
5.6
V
VH
18
VCC = VCC (O)

1.0*

V
VTLH
6
VREF =
2.6
2.8
3.0
V
VTHL
6
VREF =
2.4
2.6
2.8
V
VH
6


0.2

V
ICS
22

−14
−10
−6
µA
fOSC
20
RT = 47 kΩ
260
290
320
kHz
∆f/fdt
20
Ta = −30 °C to +85 °C

1*

%

1
5
mV
VIO
3, 4,
FB1 = FB2 = 2 V
8, 9
IB
3, 4,
8, 9

−100
−30

nA
VCM
3, 4,
8, 9

0

VCC − 1.8
V
AV
5, 7 DC

100*

dB
BW
5, 7 AV = 0 dB

2*

MHz
VFBH
5, 7

4.7
4.9

V
VFBL
5, 7


20
200
mV

−2
−1
mA
150
300

µA
ISOURCE 5, 7 FB1 = FB2 = 2 V
ISINK
5, 7 FB1 = FB2 = 2 V
* : Standard design value.
(Continued)
8
MB3887
(Ta = +25 °C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA)
Symbol
Pin
No.
Conditions
VTH1
16
VTH2
Input current
Parameter
Value
Unit
Min
Typ
Max
FB3 = 2 V, Ta = +25 °C
4.183
4.200
4.225
V
16
FB3 = 2 V,
Ta = −10 °C to +85 °C
4.169
4.200
4.231
V
IINE3
16
−INE3 = 0 V
−100
−30

nA
Voltage gain
AV
15
DC

100*

dB
Frequency
bandwidth
BW
15
AV = 0 dB

2*

MHz
VFBH
15

4.7
4.9

V
VFBL
15


20
200
mV
ISOURCE
15
FB3 = 2 V

−2
−1
mA
Output sink current
ISINK
15
FB3 = 2 V
150
300

µA
OUTD terminal
output leak current
ILEAK
11
OUTD = 17 V

0
1
µA
OUTD terminal
output ON resistor
RON
11
OUTD = 1 mA

35
50
Ω
VIO
1,
12,
13,
24
+INC1 = +INC2 = −INC1
= −INC2 = 3 V to VCC
−3

+3
mV
I+INCH
13,
24
+INC1 = +INC2 =
3 V to VCC,
∆VIN = −100 mV

20
30
µA
+INC1 = +INC2 =
1, 12 3 V to VCC,
∆Vin = −100 mV

0.1
0.2
µA
Threshold voltage
5-2.
Error amplifier
Output voltage
block
[Error Amp3]
Output source
current
Input offset voltage
6.
Current detection amplifier
block
[Current
Amp1, Current Input current
Amp2]
I−INCH
I+INCL
13,
24
+INC1 = +INC2 = 0 V,
∆Vin = −100 mV
−180
−120

µA
I−INCL
1, 12
+INC1 = +INC2 = 0 V,
∆Vin = −100 mV
−195
−130

µA
* : Standard design value
(Continued)
9
MB3887
(Ta = +25 °C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA)
Parameter
Current detection
voltage
6.
Current
detection
In-phase input
amplifier block voltage range
[Current Amp1,
Current Amp2]
Pin
No.
Conditions
Value
Unit
Min
Typ
Max
+INC1 = +INC2 =
VOUTC1 2, 10 3 V to VCC,
∆Vin = −100 mV
1.9
2.0
2.1
V
+INC1 = +INC2 =
VOUTC2 2, 10 3 V to VCC,
∆Vin = −20 mV
0.34
0.40
0.46
V
+INC1 = +INC2 =
VOUTC3 2, 10 0 V to 3 V,
∆Vin = −100 mV
1.8
2.0
2.2
V
+INC1 = +INC2 =
VOUTC4 2, 10 0 V to 3 V,
∆Vin = −20 mV
0.2
0.4
0.6
V
0

VCC
V
VCM
1,
12,
13,
24

Voltage gain
AV
+INC1 = +INC2 =
2, 10 3 V to VCC,
∆Vin = −100 mV
19
20
21
V/V
Frequency
bandwidth
BW
2, 10 AV = 0 dB

2*

MHz
Output voltage
Output source
current
Output sink current
7.
PWM
comparator
block
[PWM Comp.]
Symbol
VOUTCH 2, 10

4.7
4.9

V
VOUTCL 2, 10


20
200
mV

−2
−1
mA
ISOURCE 2, 10 OUTC1 = OUTC2 = 2 V
ISINK
2, 10 OUTC1 = OUTC2 = 2 V
150
300

µA
VTL
5, 7,
Duty cycle = 0 %
15
1.4
1.5

V
VTH
5, 7,
Duty cycle = 100 %
15

2.5
2.6
V
Threshold voltage
* : Standard design value
(Continued)
10
MB3887
(Continued)
(Ta = +25 °C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA)
Symbol
Pin
No.
Conditions
ISOURCE
20
ISINK
Output ON
resistor
Parameter
Typ
Max
OUT = 13 V, Duty ≤ 5 %
(t = 1 / fOSC × Duty)

−400*

mA
20
OUT = 19 V, Duty ≤ 5 %
(t = 1 / fOSC × Duty)

400*

mA
ROH
20
OUT = −45 mA

6.5
9.8
Ω
ROL
20
OUT = 45 mA

5.0
7.5
Ω
Rise time
tr1
20
OUT = 3300 pF
(Si4435 × 1)

50*

ns
Fall time
tf1
20
OUT = 3300 pF
(Si4435 × 1)

50*

ns
VON
14
IC Active mode
2

25
V
VOFF
14
IC Standby mode
0

0.8
V
ICTLH
14
CTL = 5 V

100
150
µA
ICTLL
14
CTL = 0 V

0
1
µA
Output voltage
VH
19
VCC = VCC (O)
= 8 V to 25 V,
VH = 0 to 30 mA
Standby current
ICCS
18
VCC = VCC (O) ,
CTL = 0 V

0
10
µA
Power supply current
ICC
18
VCC = VCC (O) ,
CTL = 5 V

8
12
mA
Output sink
current
9.
Control block
[CTL]
10.
Bias voltage
block
[VH]
11.
General
Unit
Min
Output source
current
8.
Output block
[OUT]
Value
CTL input voltage
Input current
VCC − 6.5 VCC − 6.0 VCC − 5.5
V
* : Standard design value
11
MB3887
■ TYPICAL CHARACTERISTICS
Reference voltage vs. Power supply voltage
6
6
Ta = +25 °C
CTL = 5 V
5
Reference voltage VREF (V)
Power supply current ICC (mA)
Power supply current vs. Power supply voltage
4
3
2
1
0
0
5
10
15
20
5
4
3
2
0
25
Ta = +25 °C
CTL = 5 V
VREF = 0 mA
1
0
Power supply voltage VCC (V)
Reference voltage VREF (V)
Reference voltage VREF (V)
5.08
4
3
2
1
5
10
15
20
25
20
25
30
IREF load current IREF (mA)
VCC = 19 V
CTL = 5 V
5.06
5.04
5.02
5.00
4.98
4.96
4.94
4.92
−40
0
0
15
Reference voltage vs. Ambient temperature
Ta = +25 °C
VCC = 19 V
CTL = 5 V
5
10
Power supply voltage VCC (V)
Reference voltage vs. IREF load current
6
5
−20
0
20
40
60
80
100
Ambient temperature Ta ( °C)
1000
10
Ta = +25 °C
VCC = 19 V
900
800
9
8
700
7
600
6
VREF
500
5
ICTL
400
4
300
3
200
2
100
1
0
Reference voltage VREF (V)
CTL terminal current ICTL (µA)
CTL terminal current, Reference voltage
vs. CTL terminal voltage
0
0
5
10
15
20
25
CTL terminal voltage VCTL (V)
(Continued)
12
MB3887
Triangular wave oscillation frequency
vs. Timing resistor
340
Ta = +25 °C
VCC = 19 V
CTL = 5 V
Triangular wave oscillation
frequency fOSC (kHz)
Triangular wave oscillation
frequency fOSC (Hz)
1M
Triangular wave oscillation frequency
vs. Power supply voltage
100 k
10 k
Ta = +25 °C
CTL = 5 V
RT = 47 kΩ
330
320
310
300
290
280
270
260
10
100
0
1000
Timing resistor RT (kΩ)
0
20
40
60
20
25
80
Ambient temperature Ta ( °C)
Error amplifier threshold voltage
vs. Ambient temperature
VCC = 19 V
CTL = 5 V
2.24
Error amplifier threshold
voltage VTH (V)
Triangular wave oscillation
frequency fOSC (kHz)
15
4.25
VCC = 19 V
CTL = 5 V
RT = 47 kΩ
−20
10
Power supply voltage VCC (V)
Triangular wave oscillation frequency
vs. Ambient temperature
320
315
310
305
300
295
290
285
280
275
270
265
260
−40
5
100
4.23
2.22
4.21
4.20
4.19
4.18
4.17
4.16
4.15
−40
−20
0
20
40
60
80
100
Ambient temperature Ta ( °C)
(Continued)
13
MB3887
Error amplifier gain and phase vs. Frequency
Ta = +25 °C
40
VCC = 19 V
180
AV
φ
90
0
Phase φ (deg)
20
Gain AV (dB)
4.2 V
0
−20
−90
10 kΩ
1 µF
+
8
(4)
2.4 kΩ
IN
−
7
(5)
+
9
(3)
10 kΩ
−40
240 kΩ
10 kΩ
OUT
Error Amp1
(Error Amp2)
10 kΩ
−180
1k
10 k
100 k
1M
10 M
Frequency f (Hz)
Error amplifier gain and phase vs. Frequency
Ta = +25 °C
40
VCC = 19 V
4.2 V
180
20
90
0
0
−90
−20
240 kΩ
10 kΩ
10 kΩ
Phase φ (deg)
Gain AV (dB)
AV
φ
1 µF
+
2.4 kΩ
IN
16
−
22
+
15
+
10 kΩ
10 kΩ
OUT
Error Amp3
4.2 V
−180
−40
1k
10 k
100 k
1M
10 M
Frequency f (Hz)
Current detection amplifier gain and phase vs. Frequency
Ta = +25 °C
20
VCC = 19 V
180
AV
90
φ
0
0
Phase φ (deg)
Gain AV (dB)
40
−20
−90
−40
−180
1k
10 k
100 k
1M
13 +
(24) ×20
10
(2)
12 −
(1)
Current Amp1
(Current Amp2)
12.6 V
OUT
12.55 V
10 M
Frequency f (Hz)
(Continued)
14
MB3887
(Continued)
Power dissipation PD (mW)
Power dissipation vs. Ambient temperature
800
740
700
600
500
400
300
200
100
0
−40
−20
0
20
40
60
80
100
Ambient temperature Ta ( °C)
15
MB3887
■ FUNCTIONAL DESCRIPTION
1. DC/DC Converter Unit
(1) Reference voltage block (Ref)
The reference voltage generator uses the voltage supplied from the VCC terminal (pin 18) to generate a temperature-compensated, stable voltage (5.0 V Typ) used as the reference supply voltage for the IC’s internal
circuitry.
This terminal can also be used to obtain a load current to a maximum of 1mA from the reference voltage VREF
terminal (pin 6) .
(2) Triangular wave oscillator block (OSC)
The triangular wave oscillator builds the capacitor for frequency setting into, and generates the triangular wave
oscillation waveform by connecting the frequency setting resistor with the RT terminal (pin 17) .
The triangular wave is input to the PWM comparator on the IC.
(3) Error amplifier block (Error Amp1)
This amplifier detects the output signal from the current detection amplifier (Current amp1) , compares this to
the +INE1 terminal (pin 9) , and outputs a PWM control signal to be used in controlling the charging current.
In addition, an arbitrary loop gain can be set up by connecting a feedback resistor and capacitor between the
FB1 terminal (pin 7) and -INE1 terminal (pin 8) , providing stable phase compensation to the system.
(4) Error amplifier block (Error Amp2)
This amplifier (Error Amp2) detects voltage drop of the AC adapter and outputs a PWM control signal.
In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the FB2
terminal (pin 5) to the −INE2 terminal (pin 4) of the error amplifier, enabling stable phase compensation to the
system.
(5) Error amplifier block (Error Amp3)
This error amplifier (Error Amp3) detects the output voltage from the DC/DC converter and outputs the PWM
control signal. External output voltage setting resistors can be connected to the error amplifier inverted input
terminal to set the desired level of output voltage from 1 cell to 4 cells.
In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the FB3
terminal (pin 15) to the −INE3 terminal (pin 16) of the error amplifier, enabling stable phase compensation to
the system.
Connecting a soft-start capacitor to the CS terminal (pin 22) prevents rush currents when the IC is turned on.
Using an error amplifier for soft-start detection makes the soft-start time constant, independent of the output load.
(6) Current detection amplifier block (Current Amp1)
The current detection amplifier (Current Amp1) detects a voltage drop which occurs between both ends of the
output sense resistor (RS) due to the flow of the charge current, using the +INC1 terminal (pin 13) and −INC1
terminal (pin 12) . Then it outputs the signal amplified by 20 times to the error amplifier (Error Amp1) at the next
stage.
16
MB3887
(7) PWM comparator block (PWM Comp.)
The PWM comparator circuit is a voltage-pulse width converter for controlling the output duty of the error
amplifiers (Error Amp1 to Error Amp3) depending on their output voltage.
The PWM comparator circuit compares the triangular wave generated by the triangular wave oscillator to the
error amplifier output voltage and turns on the external output transistor during the interval in which the triangular
wave voltage is lower than the error amplifier output voltage.
(8) Output block (OUT)
The output circuit uses a totem-pole configuration capable of driving an external P-channel MOS FET.
The output “L” level sets the output amplitude to 6 V (Typ) using the voltage generated by the bias voltage block
(VH) .
This results in increasing conversion efficiency and suppressing the withstand voltage of the connected external
transistor in a wide range of input voltages.
(9) Control block (CTL)
Setting the CTL terminal (pin 14) low places the IC in the standby mode. (The supply current is 10 µA at maximum
in the standby mode.)
CTL function table
CTL
Power
OUTD
L
OFF (Standby)
Hi-Z
H
ON (Active)
L
(10) Bias voltage block (VH)
The bias voltage circuit outputs VCC −6 V (Typ) as the minimum potential of the output circuit. In the standby
mode, this circuit outputs the potential equal to VCC.
2. Protection Functions
Under voltage lockout protection circuit (UVLO)
The transient state or a momentary decrease in supply voltage or internal reference voltage (VREF) , which
occurs when the power supply (VCC) is turned on, may cause malfunctions in the control IC, resulting in
breakdown or degradation of the system.
To prevent such malfunction, the under voltage lockout protection circuit detects a supply voltage or internal
reference voltage drop and fixes the OUT terminal (pin 20) to the “H” level. The system restores voltage supply
when the supply voltage or internal reference voltage reaches the threshold voltage of the under voltage lockout
protection circuit.
Protection circuit (UVLO) operation function table
When UVLO is operating (VCC or VREF voltage is lower than UVLO threshold voltage.)
OUTD
OUT
CS
Hi-Z
H
L
17
MB3887
3. Soft-Start Function
Soft-start block (SOFT)
Connecting a capacitor to the CS terminal (pin 22) prevents rush currents when the IC is turned on. Using an
error amplifier for soft-start detection makes the soft-start time constant, being independent of the output load
of the DC/DC converter.
■ SETTING THE CHARGING VOLTAGE
The charging voltage (DC/DC output voltage) can be set by connecting external voltage setting resistors (R3,
R4) to the −INE3 terminal (pin 16) . Be sure to select a resistor value that allows you to ignore the on-resistor
(35 Ω, 1mA) of the internal FET connected to the OUTD terminal (pin 11) . In standby mode, the charging
voltage is applied to OUTD termial. Therefore, output voltage must be adjusted so that voltage applied to OUTD
terminal is 17 V or less.
Battery charging voltage : VO
VO (V) = (R3 + R4) / R4 × 4.2 (V)
B VO
R3
<Error Amp3>
−INE3
16
R4
11
OUTD
−
+
+
4.2 V
22
CS
■ METHOD OF SETTING THE CHARGING CURRENT
The charge current (output limit current) value can be set with the voltage at the +INE1 terminal (pin 9) .
If a current exceeding the set value attempts to flow, the charge voltage drops according to the set current value.
Battery charge current setting voltage : +INE1
+INE1 (V) = 20 × I1 (A) × RS (Ω)
■ METHOD OF SETTING THE TRIANGULAR WAVE OSCILLATION FREQUENCY
The triangular wave oscillation frequency can be set by the timing resistor (RT) connected the RT terminal (pin 17) .
Triangular wave oscillation frequency : fOSC
fOSC (kHz) =: 13630 / RT (kΩ)
18
MB3887
■ METHOD OF SETTING THE SOFT-START TIME
For preventing rush current upon activation of IC, the IC allows soft-start using the capacitor (Cs) connected to
the CS terminal (pin 22) .
When CTL terminal (pin 14) is placed under “H” level and IC is activated (VCC ≥ UVLO threshold voltage) , Q2
is turned off and the external soft-start capacitor (Cs) connected to the CS terminal is charged at 10 µA.
Error Amp output (FB3 terminal (pin 15) ) is determined by comparison between the lower voltage of the two
non-reverse input terminals (4.2 V and CS terminal voltage) and reverse input terminal voltage (−INE3 terminal
(pin 16) voltage) . Within the soft-start period (CS terminal voltage < 4.2 V) , FB3 is determined by comparison
between −INE3 terminal voltage and CS terminal voltage, and DC/DC converter output voltage goes up proportionately with the increase of CS terminal voltage caused by charging on the soft-start capacitor.Soft-start time
is found by the following formula :
Soft-start time : ts (time to output 100 %)
tS (s) =: 0.42 × CS (µF)
= 4.9 V
CS terminal voltage
= 4.2 V
Comparison with Error Amp block − INE3
voltage.
=0V
Soft-start time: ts
VREF
10 µA
FB3
10 µA
15
−
+
+
−INE3 16
CS
22
Error
Amp3
4.2 V
CS
Q2
UVLO
Soft-start circuit
19
MB3887
■ AC ADAPTOR VOLTAGE DETECTION
• With an external resistor connected to the +INE2 terminal (pin 3) , the IC enters the dynamically-controlled
charging mode to reduce the charge current to keep AC adapter power constant when the partial potential
point A of the AC adapter voltage (VCC) becomes lower than the voltage at the −INE2 terminal.
AC adapter detection voltage setting : Vth
Vth (V) = (R1 + R2) / R2 × −INE2
<Error Amp2>
−INE2
4
−
3
+
A
VCC
R1
+INE2
R2
■ OPERATION TIMING DIAGRAM
Error Amp2 FB2
Error Amp1 FB1
2.5 V
Error Amp2 FB3
1.5 V
OUT
Constant voltage control
20
Constant current control
AC adapter dynamicallycontrolled charging
MB3887
■ PROCESSING WITHOUT USING THE CURRENT AMP
When Current Amp is not used, connect the +INC1 terminal (pin 13) , +INC2 terminal (pin 24) , −INC1 terminal
(pin 12) , and −INC2 terminal (pin 1) to VREF, and then leave OUTC1 terminal (pin 10) and OUTC2 terminal
(pin 2) open.
“Open”
12
−INC1
+INC1 13
1
−INC2
+INC2 24
10
OUTC1
2
OUTC2
6
VREF
Connection when Current Amp is not used
21
MB3887
■ PROCESSING WITHOUT USING OF THE ERROR AMP
When Error Amp is not used, leave FB1 terminal (pin 7) , FB2 terminal (pin 5) open and connect the −INE1
terminal (pin 8) and −INE2 terminal (pin 4) to GND and connect +INE1 terminal (pin 9) , and +INE2 terminal (pin
3) , to VREF.
“Open”
9
+INE1
3
+INE2
8
−INE1
4
−INE2
7
FB1
5
FB2
6
VREF
GND
23
Connection when Error Amp is not used
22
MB3887
■ PROCESSING WITHOUT USING OF THE CS TERMINAL
When soft-start function is not used, leave the CS terminal (pin 22) open.
“Open”
CS 22
Connection when soft-start time is not specified
■ NOTE ON AN EXTERNAL REVERSE-CURRENT PREVENTIVE DIODE
• Insert a reverse-current preventive diode at one of the three locations marked * to prevent reverse current from
the battery.
• When selecting the reverse current prevention diode, be sure to consider the reverse voltage (VR) and reverse
current (IR) of the diode.
21
VCC(O)
VIN
∗
A
20
B
OUT
∗
I1
RS
BATT
∗
VH
19
Battery
23
24
SW
Q2
R11
30 kΩ
R10
30 kΩ
R16
R15
200 kΩ 120 Ω
R14
1 kΩ
R3
330 kΩ
C6
1500 pF
C4
0.022 µF
4
16
5
15
CS 22
FB3
11
OUTD
−INE3
FB2
<SOFT>
VREF
10
µA
OUTC2 2
<Current Amp2>
+INC2
+
24
× 20
−
1
−INC2
3
+INE2
R17
100 kΩ
R19
100 kΩ
R18
200 kΩ
R5
330 kΩ
R6
68 kΩ
C8
10000 pF
R7
R4 22 kΩ
82 kΩ
−INE2
R8
100 kΩ −INE1
8
OUTC1 10
C10
<Current Amp1>
5600 pF
+INC1
A
+
13
R9
× 20
−INC1
10 kΩ
−
B
12
R12
30 kΩ
+INE1 9
R13
20 kΩ
FB1
7
4.2 V
−
+
+
RT
R2
47 kΩ
45 pF
17
VCC
(VCC − 6 V)
6
VREF
bias
VREF
UVLO
<CTL>
VCC
C9
0.1 µF
23
GND
VREF
5.0 V
<REF>
4.2 V
35 kΩ
0.91 V
(0.77 V)
−
(VCC UVLO) 215 kΩ
+
2.5 V
1.5 V
<UVLO>
Bias
Voltage
<VH>
VCC
<PWM Comp.>
<OUT>
+
+
+
Drive
−
<OSC>
<Error Amp3>
VREF
+
−
<Error Amp2>
VREF
+
−
<Error Amp1>
VREF
OUT
VCC
14 CTL
18
VH
19
20
VCC (O)
21
C5
0.1 µF
C3
100 µF
+
R1
B
0.033 Ω
Battery
I1
A
C7
0.1 µF
Note:
Set output voltage so
that voltage applied to
OUTD terminal is 17 V or
less.
VO
AC Adaptor
Output voltage (Battery
voltage) is adjustable
+
C1
22 µF
C2
100 µF
D1
22 µH
Q1
L1
+
IIN
VIN = 13.93 V to 25 V
(at 3 cell)
VIN = 17.65 V to 25 V
(at 4 cell)
MB3887
■ APPLICATION EXAMPLE
MB3887
■ PARTS LIST
COMPONENT
ITEM
SPECIFICATION
Q1
Q2
P-ch FET
N-ch FET
D1
Diode
L1
Inductor
22 µH
C1
C2, C3
C4
C5
C6
C7
C8
C9
C10
OS-CONTM
Electrolytic Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10 to R12
R13
R14
R15
R16, R18
R17, R19
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
VENDOR
PARTS No.
VDS = −30 V, ID = ±8 A (Max)
VISHAY SILICONIX
VDS = 60 V, ID = 0.115 A
VISHAY SILICONIX
(Max)
Si4435DY
2N7002E
VF = 0.42 V (Max) , IF = 3 A
ROHM
RB053L-30
3.5 A, 31.6
mΩ
TDK
SLF12565T220M3R5
22 µF
100 µF
0.022 µF
0.1 µF
1500 pF
0.1 µF
10000 pF
0.1 µF
5600 pF
25 V (10 %)
25 V (10 %)
50 V
16 V
10 V
25 V
10 V
16 V
10 V
SANYO
SANYO
TDK
KYOCERA
MURATA
MURATA
MURATA
KYOCERA
MURATA
25SL22M
25CV100AX
C1608JB1H223K
CM21W5R104K16
GRM39B152K10
GRM39F104KZ25
GRM39B103K10
CM21W5R104K16
GRM39B562K10
0.033 Ω
47 kΩ
330 kΩ
82 kΩ
330 kΩ
68 kΩ
22 kΩ
100 kΩ
10 kΩ
30 kΩ
20 kΩ
1 kΩ
120 Ω
200 kΩ
100 kΩ
1.0 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
1.0 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
SEIDEN TECHNO
KOA
KOA
KOA
KOA
KOA
KOA
KOA
KYOCERA
KOA
KOA
KOA
ssm
KOA
KOA
RK73Z1J-0D
RK73G1J-473D
RK73G1J-334D
RK73G1J-823D
RK73G1J-334D
RK73G1J-683D
RK73G1J-223D
RK73G1J-104D
CR21-103-F
RK73G1J-303D
RK73G1J-203D
RK73G1J-102D
RR0816P121D
RK73G1J-204D
RK73G1J-104D
Note : VISHAY SILICONIX : VISHAY Intertechnology, Inc.
ROHM : ROHM CO., LTD.
TDK : TDK Corporation
SANYO : SANYO Electric Co., Ltd.
KYOCERA : Kyocera Corporation
MURATA : Murata Manufacturing Co., Ltd.
SEIDEN TECHNO : SEIDEN TECHNO CO., LTD.
KOA : KOA Corporation
ssm : SUSUMU Co., Ltd.
OS-CON is a trademark of SANYO Electric Co., Ltd.
25
MB3887
■ REFERENCE DATA
Conversion efficiency vs. Charge current
(Constant voltage mode)
98
96
94
92
90
88
100
Ta = +25 °C
VIN = 19 V
BATT charge voltage =
set at 12.6 V
SW = ON
Efficiency η (%) =
(VBATT × IBATT)
/ (VIN × IIN) × 100
Conversion efficiency η (%)
Conversion efficiency η (%)
100
Conversion efficiency vs. Charge current
(Constant current mode)
86
84
82
80
10 m
Ta = +25 °C
VIN = 19 V
BATT charge voltage =
set at 12.6 V
SW = ON
Efficiency η (%) =
(VBATT × IBATT)
/ (VIN × IIN)
× 100
98
96
94
92
90
88
86
84
82
80
100 m
1
10
0
2
BATT charge current IBATT (A)
8
10
12
14
16
Conversion efficiency vs. Charge current
(Constant current mode)
100
100
Conversion efficiency η (%)
Conversion efficiency η (%)
6
BATT charge voltage VBATT (V)
Conversion efficiency vs. Charge current
(Constant voltage mode)
98
96
94
92
Ta = +25 °C
VIN = 19 V
BATT charge voltage =
set at 16.8 V
SW = ON
Efficiency η (%) =
(VBATT × IBATT)
/ (VIN × IIN) × 100
90
88
86
84
82
80
10 m
4
100 m
1
BATT charge current IBATT (A)
98
96
94
92
88
86
84
82
80
10
Ta = +25 °C
VIN = 19 V
BATT charge voltage =
set at 16.8 V
SW = ON
Efficiency η (%) =
(VBATT × IBATT)
/ (VIN × IIN) × 100
90
0
2
4
6
8
10
12
14
16
18
20
BATT charge voltage VBATT (V)
(Continued)
26
MB3887
Conversion efficiency vs. Charge current
(Constant current mode)
Conversion efficiency vs. Charge current
(Constant voltage mode)
100
Conversion efficiency η (%)
Conversion efficiency η (%)
100
98
96
94
92
Ta = +25 °C
VIN = 19 V
BATT charge voltage =
set at 16.8 V
SW = ON
Efficiency η (%) =
(VBATT × IBATT)
/ (VIN × IIN) × 100
90
88
86
84
82
80
10 m
100 m
1
98
96
94
92
Ta = +25 °C
VIN = 19 V
BATT charge voltage =
set at 16.8 V
SW = ON
Efficiency η (%) =
(VBATT × IBATT)
/ (VIN × IIN) × 100
90
88
86
84
82
80
10
0
2
4
BATT charge current IBATT (A)
14
12
10
Dead Battery MODE
DCC MODE
8
6
4
2
DCC : Dynamically-Controlled
0
0
0.5
1
1.5
2
2.5
3
3.5
10
12
14
16
18
20
4
BATT charge current IBATT (A)
4.5
BATT : Electronic load,
(Product of KIKUSUI PLZ-150W)
Ta = +25 °C
VIN = 19 V
18
BATT voltage VBATT (V)
BATT voltage VBATT (V)
20
Ta = +25 °C VIN = 19 V
BATT : Electronic load,
(Product of KIKUSUI PLZ-150W)
16
8
BATT voltage vs. BATT charge current
(set at 16.8 V)
BATT voltage vs. BATT charge current
(set at 12.6 V)
18
6
BATT charge voltage VBATT (V)
16
14
12
Dead Battery MODE
10
8
6
4
2
DCC : Dynamically-Controlled
0
5
DCC MODE
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
BATT charge current IBATT (A)
(Continued)
27
MB3887
Switching waveform constant voltage mode
(set at 12.6 V)
Ta = +25 °C
VIN = 19 V
BATT = 1.5 A
VBATT (mV)
100
Switching waveform constant current mode
(set at 12.6 V, with 10 V)
VBATT (mV) Ta = +25 °C
VIN = 19 V
100
BATT = 3.0 A
98 mVp-p VBATT
0
VBATT
0
VD
−100
VD (V)
15
98 mVp-p
VD
−100
VD (V)
15
10
10
5
5
0
0
0
1
2
3
4
5
6
7
8
9
10
(µs)
Switching waveform constant voltage mode
(set at 16.8 V)
= +25 °C
VBATT (mV) Ta
VIN = 19 V
100
BATT = 1.5 A
0
VBATT
2
3
4
5
6
7
8
9
10
(µs)
Switching waveform constant current mode
(set at 16.8 V, with 10 V)
VBATT (mV)
100
58 mVp-p
1
Ta = +25 °C
VIN = 19 V
BATT = 3.0 A
96 mVp-p
VBATT
0
0
VD
−100
VD (V)
15
10
10
5
5
0
0
0
1
2
3
4
5
6
7
8
VD
−100
VD (V)
15
9
10
(µs)
0
1
2
3
4
5
6
7
8
9
10
(µs)
(Continued)
28
MB3887
(Continued)
Soft-start operating waveform
constant voltage mode
(set at 12.6 V)
Discharge operating waveform
constant voltage mode
(set at 12.6 V)
VBATT (V)
20
VBATT (V)
20
Ta = +25 °C, VIN = 19 V
BATT = 12 Ω
10
0
VCS (V)
4
VBATT
10
VBATT
VCS
ts = 10.4 ms
0
VCS (V)
4
2
2
0
0
VCS
VCTL (V)
5
VCTL
0
VCTL (V)
5
Ta = +25 °C
VIN = 19 V
BATT = 12 Ω
VCTL
0
0
2
4
6
8
10 12 14 16 18 20
(ms)
0
2
4
6
8
10 12 14 16 18 20
(ms)
Discharge operating waveform
constant voltage mode
(set at 16.8 V)
Soft-start operating waveform
constant voltage mode
(set at 16.8 V)
VBATT (V)
20
VBATT (V)
20
Ta = +25 °C, VIN = 19 V
BATT = 12 Ω
10
VBATT
10
VBATT
0
VCS (V)
4
ts = 10.4 ms
VCS
0
VCS (V)
4
2
2
0
0
VCS
VCTL (V)
5
VCTL
0
VCTL (V)
5
Ta = +25 °C
VIN = 19 V
BATT = 12 Ω
VCTL
0
0
2
4
6
8
10 12 14 16 18 20
(ms)
0
2
4
6
8
10 12 14 16 18 20
(ms)
29
MB3887
■ USAGE PRECAUTIONS
• Printed circuit board ground lines should be set up with consideration for common impedance.
• Take appropriate static electricity measures.
• Containers for semiconductor materials should have anti-static protection or be made of conductive material.
• After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
• Work platforms, tools, and instruments should be properly grounded.
• Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ between body and ground.
• Do not apply negative voltages.
• The use of negative voltages below −0.3 V may create parasitic transistors on LSI lines, which can cause
malfunction.
■ ORDERING INFORMATION
Part number
MB3887PFV
30
Package
24-pin plastic SSOP
(FPT-24P-M03)
Remarks
MB3887
■ PACKAGE DIMENSION
24-pin plastic SSOP
(FPT-24P-M03)
Note1: Pins width and pins thickness include plating thickness.
Note2: * This dimension does not include resin protrusion.
0.17±0.03
(.007±.001)
* 7.75±0.10(.305±.004)
24
13
5.60±0.10 7.60±0.20
(.220±.004) (.299±.008)
INDEX
Details of "A" part
+0.20
1.25 –0.10
+.008
.049 –.004
(Mounting height)
0.25(.010)
1
"A"
12
0.65(.026)
0.24
.009
+0.08
–0.07
+.003
–.003
0.13(.005)
0~8°
M
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
0.10±0.10
(.004±.004)
(Stand off)
0.10(.004)
C
2001 FUJITSU LIMITED F24018S-c-3-4
Dimensions in mm (inches) .
31
MB3887
FUJITSU LIMITED
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information and circuit diagrams in this document are
presented as examples of semiconductor device applications, and
are not intended to be incorporated in devices for actual use. Also,
FUJITSU is unable to assume responsibility for infringement of
any patent rights or other rights of third parties arising from the use
of this information or circuit diagrams.
The products described in this document are designed, developed
and manufactured as contemplated for general use, including
without limitation, ordinary industrial use, general office use,
personal use, and household use, but are not designed, developed
and manufactured as contemplated (1) for use accompanying fatal
risks or dangers that, unless extremely high safety is secured, could
have a serious effect to the public, and could lead directly to death,
personal injury, severe physical damage or other loss (i.e., nuclear
reaction control in nuclear facility, aircraft flight control, air traffic
control, mass transport control, medical life support system, missile
launch control in weapon system), or (2) for use requiring
extremely high reliability (i.e., submersible repeater and artificial
satellite).
Please note that Fujitsu will not be liable against you and/or any
third party for any claims or damages arising in connection with
above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You
must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and
equipment such as redundancy, fire protection, and prevention of
over-current levels and other abnormal operating conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
Foreign Exchange and Foreign Trade Law of Japan, the prior
authorization by Japanese government will be required for export
of those products from Japan.
F0211
 FUJITSU LIMITED Printed in Japan
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