MODEL NO. : LTN156AT19-0

MODEL NO. : LTN156AT19-0
Product Information
TO
: General
DATE
: Jan. 25 , 2013
SAMSUNG TFT-LCD
MODEL NO. : LTN156AT19-0
NOTE : Extension code [ - 0xx ]
→ LTN156AT19-0xx
Surface type [ A/G ]
Any modification of Spec is not allowed without SEC’s permission
Application engineering part, Mobile Division
Samsung Electronics Co
Co., Ltd
Ltd.
Samsung Secret
Doc.No.
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Rev.No
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Page
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Product Information
CONTENTS
Revision History
-------------------( 3 )
General Description
-------------------( 4 )
1. Absolute Maximum Ratings
1.1 Absolute Ratings of environment
1.2 Electrical Absolute Ratings
-------------------( 5 )
2. Optical Characteristics
-------------------( 7 )
3. Electrical Characteristics
3.1 TFT LCD Module
3.2 Backlight Unit
3.3 LED Driver
- - - - - - - - - - - - - - - - - - - ( 10 )
4. Block Diagram
4.1 TFT LCD Module
4.2 LED Placement Structure
- - - - - - - - - - - - - - - - - - - ( 13 )
5. Input Terminal Pin Assignment
- - - - - - - - - - - - - - - - - - - ( 14 )
5.1 Input Signal & Power
5 2 LVDS Interface
5.2
5.3 Timing Diagrams of LVDS For Transmitting
5.4 Pixel format
6. Interface Timing
6.1 Timing Parameters
6 2 Ti
6.2
Timing
i Di
Diagrams off iinterface
t f
Si
Signall
6.3 Power ON/OFF Sequence
- - - - - - - - - - - - - - - - - - - ( 19 )
7. Outline Dimension
- - - - - - - - - - - - - - - - - - - ( 222 )
8. Packing
- - - - - - - - - - - - - - - - - - - ( 24 )
9. Markings & Others
- - - - - - - - - - - - - - - - - - - ( 25 )
10. General Precautions
-- - - - - - - - - - - - - - - - - - ( 27 )
11. EDID
-- - - - - - - - - - - - - - - - - - ( 29 )
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REVISION HISTORY
Date
Revision No.
Page
Jan, 25. 2013
A00
All
Product Information
Summary
The approval specification of 15.6” SMS HD was issued first.
CODE REVISION HISTORY
Date
Model.
Revision No.
June, 15. 2011
LTN156AT19
001
Summary
Basic model
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Product Information
GENERAL DESCRIPTION
DESCRIPTION
LTN156AT19 is a color active matrix TFT (Thin Film Transistor) liquid crystal display
(LCD) that uses amorphous silicon TFT as switching devices.
This model is composed of a TFT LCD panel, a driver circuit and a backlight unit.
The resolution of a 15.6” contains 1366 x 768 pixels and can display up to 262,144colors.
6 O'clock direction is the optimum viewing angle.
FEATURES
• High contrast ratio
• HD(1366 x 768 pixels ) resolution
• Fast Response
• LED Back Light with embedded LED Driver
• DE (Data enable) only mode
• 3.3V
3 3V LVDS IInterface
t f
• Onboard EEDID chip
APPLICATIONS
• Notebook
N t b k PC
• If the usage of this product is not for PC application, but for others, please contact SEC
GENERAL INFORMATION
Item
Specification
Unit
Display area
344.232 (H) x 193.536 (V) (15.6”diagonal)
mm
Driver element
a-Si TFT active matrix
Display colors
262,144
Number of pixel
1366 * 768
Pixel arrangement
RGB vertical stripe
Pixel pitch
0.252 (H) x 0.252 (V) (TYP.)
Display Mode
Normally white
Surface treatment
Haze 25%, Hardness 2H
Note
pixel
mm
A/G
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Product Information
Mechanical Information
Item
Module
size
Min.
Typ.
Max.
Unit
Horizontal (H)
358 8
358.8
359 3
359.3
359 8
359.8
mm
Vertical (V)
209.0
209.5
210.0
mm
Depth (D)
-
-
4.0
mm
-
-
430
g
Weight
Note
Note (1) Measurement condition of outline dimension
. Equipment : Bernier Calipers
. Push
P hF
Force : 500g
00 ff (minimum)
( i i
)
1. ABSOLUTE MAXIMUM RATINGS
1.1 ENVIRONMENTAL ABSOLUTE RATINGS
Item
Symbol
Min.
Max.
Unit
Note
Storage temperate
TSTG
-20
60
C
(1)
Operating temperate
(Temperature of glass surface)
TOPR
0
50
C
(1)
Shock ( non-operating )
Snop
-
240
G
(2),(4)
Vibration (non-operating)
Vnop
-
2.41
G
(3),(4)
Note (1) Temperature and relative humidity range are shown in the figure below.
95 % RH Max. (40 C  Ta)
Maximum wet - bulb temperature at 39 OC or less. (Ta  40 C ) No condensation
100 90
Relative Humidity ( %RH)
( 40,90 )
80
60
Operating Range
( 50,50.4 )
40
( 60,27.7 )
20
Storage Range
5
0
-40
-20
0
20
40
60
80
Temperature (OC)
(2) 2ms, half sine wave, one time for X, Y,  Z.
(3) 5 - 500 Hz
Hz, random vibration
vibration, 30min for X
X, Y
Y, Z
Z.
(4) At testing Vibration and Shock, the fixture in holding the Module to be tested have to be
hard and rigid enough so that the Module would not be twisted or bent by the fixture.
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Product Information
1.2 ELECTRICAL ABSOLUTE RATINGS
(1) TFT LCD MODULE
VDD =3.3V, VSS = GND = 0V
Item
Symbol
Min.
Max.
Unit
Note
Power Supply Voltage
VDD
VDD - 0.3
VDD + 0.3
V
(1)
Logic Input Voltage
VIN
VDD - 0.3
VDD + 0.3
V
(1)
Note (1) Within Ta (25  2 C )
(2) BACK-LIGHT UNIT
Ta = 25  2 C
Item
Symbol
y
Min.
Typ.
yp
Max.
Unit
Note
LED Current
IL
-
22
-
mArm
s
(1)
LED Voltage
VL
-
3.2
-
V
(1)
Note 1) Permanent damage to the device may occur if maximum values are exceeded
Functional operation should be restricted to the conditions described under normal operating conditions.
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Product Information
2. OPTICAL CHARACTERISTICS
The following items are measured under stable conditions. The optical characteristics
should
h ld b
be measured
d iin a d
dark
k room or equivalent
i l t state
t t with
ith th
the methods
th d shown
h
iin N
Note
t (5)
(5).
Measuring equipment : TOPCON SR-3
* Ta = 25  2 C, VDD=3.3V, fv= 60Hz, fDCLK = 70.7MHz, IF = 100% duty
Item
Symbol
Contrast Ratio
(5 Points)
Conditio
n
Min.
Typ.
Max
Unit
Note
CR
300
-
-
-
(1), (2), (5)
Response Time at Ta
( Rising + Falling )
TRT
-
16
25
msec
(1), (3)
Average Luminance
of White (5 Points)
YL,AVE
200
220
-
cd/m2
IF=100%
IF
100%
duty
(1), (4)
Typ
+0.03
-
RX
Red
RY
GX
Color
Chromaticity
( CIE )
Normal
Viewing
Angle
=0
=0
0.570
0.340
0.330
Green
GY
Typ0.03
BX
0.560
0.160
Blue
BY
0.135
WX
0.313
WY
0.329
(1), (5)
SR-3
White
L
40
45
-
40
45
-
15
15
-
L
30
30-
-
Color Gamut
CG
-
45
-
%
13 Points
White Variation
L
-
-
2.0
-
Hor.
H
Viewing
Angle
Ver.
H
CR  10
At center
Degrees
(6)
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Product Information
Note 1) Definition of Viewing Angle : Viewing angle range(10  C/R)
Normal Line
 = 0o ,  = 0o
L
R
L
x
 L =90o
H
y'
6 O’clock
direction
 L= 90o
12 O’clock
direction
 H = 90o
y
x'
R =90o
Note 2) Definition of Contrast Ratio (CR) : Ratio of gray max (Gmax) ,gray min (Gmin)
at 5 points(4, 5, 7, 9, 10)
CR
Points
CR(4) + CR(5) + CR(7) + CR(9) + CR(10)
=
5
5 ,
4 ,
:
7 ,
9 ,
10
at the figure of Note (6).
Note 3) Definition of Response time :
Display data
White(TFT OFF)
White(TFT OFF)
Black(TFT ON)
TR
Optical
Response
TF
100%
90%
10%
0%
Time
Note 4) Definition of Average Luminance of White : measure the luminance of white at 5 points.
25%
50%
75%
VIEW AREA
Average Luminance of White ( YL,AVE )
10
YL4 + YL5 + YL7 + YL9 + YL10
9
50%
7
YL,AVE =
5
5
LTN156AT19-0
4
75%
(lines))
(li
: test point
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Product Information
Note 5) After stabilizing and leaving the panel alone at a given temperature for 30 min , the measurement
should be executed. Measurement should be executed in a stable, windless,and dark room.
30 min after lighting the backlight. This should be measured in the center of screen.
IF current : 22mA
Environment condition : Ta = 25  2 C
Photo-detector
( TOPCON SR-3 )
Field = 2
50 cm
TFT-LCD module
LCD panel
Center of the screen
[ Optical characteristics measurement setup ]
Note 6) Definition of 13 points white variation (
L =
), CR variation( CVER ) [
1
~
13
]
Maximum luminance of 13 points
Minimum luminance of 13 points
10mm
10mm
L
25%
13
50%
75%
12
10
8
11
25%
9
7
5
3
10mm
6
4
2
1
50%
: test point
75%
(lines)
10mm
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Product Information
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
Ta= 25  2C
Item
Symbol
y
Min.
Typ.
yp
Max.
Unit
Voltage of Power Supply
VDD
3.0
3.3
3.6
V
High
VIH
-
-
+100
mV
Low
VIL
-100
-
-
mV
Vsync Frequency
fv
-
60
-
Hz
Main Frequency
fDCLK
66.14
70.7
83.88
MHz
-
Rush Current
IRUSH
-
-
1.5
A
(4)
-
230
-
mA
-
230
-
mA
-
300
350
mA
Differential Input
Voltage for LVDS
Receiver Threshold
White
Current of Power
Supply
Mosaic
IDD
V.stripe
Note
VCM = +1.2V
*a),b),c)
Note (1) Display data pins and timing signal pins should be connected.( GND = 0V )
((2)) fV = 60Hz,, fDCLK = 72.33MHZ,, VDD = 3.3V , DC Current.
(3) Power dissipation pattern
*a) White Pattern
*b) Mosaic Pattern
VIEW AREA
Display Brightest Gray Level
Display Darkest Gray Level
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Product Information
*c) 1dot Vertical stripe pattern
RG B R G B R G B R G
RG B R G B R G B R G
RG B R G B R G B R G
RG B R G B R G B R G
4) Rush current measurement condition
3.3V
M1
2SK1059
VDD ( LCD
FUSE
R1
47K
INPUT)
C1
1uF
R2
CONTROL SIGNAL
(HIGH to LOW)
M2
2SK1399
1K
12V
R3
C3
1uF
C2
47K
10000pF
VDD rising time is 470us
3.3V
0.9VDD
0.1VDD
GND
470us
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Product Information
3.2 LED Driver
- On board LED Driver (Intersil)
Ta= 25  2 C
Item-
Symbol
Min.
Typ.
Max.
Unit
Note
Input Voltage
Vin
7
12
20
V
-
Input Current
I
-
270
-
mA
-
power consumption
P
-
0.9
1.0
W
@ 60nit
-
33
3.3
35
3.5
W
@ Max
ON
2.0
-
-
V
OFF
-
-
0.8
V
ON
2.0
-
-
V
OFF
-
-
0.8
V
5
-
100
%
10
-
100
EN control level
PWM control level
PWM Control Duty
Ratio
D
External PWM
Dimming Control
Frequency (BLIM)
FBLIM
0.2
1
10
kHz
Operating Life Time
Hr
10,000
-
-
Hour
PWM freq : 200Hz~10KHz
PWM freq : 1KHz~10KHz
Note (1) Life time (Hr) of LEDs can be defined as the time in which it continues to operate under the
condition Ta= 25  2 C and IF = 22mArms until one of the following event occurs.
When the brightness becomes 50% or lower than the original.
3.3 BACK-LIGHT UNIT
Ta= 25  2 C
Item
Symbol
Min.
Typ.
Max.
Unit
LED Forward Current
IF
-
22
-
mA
LED Forward Voltage
VF
3.0
3.2
3.4
V
LED Array
y Voltage
g
VP
-
36
-
V
BL consumption
P
-
-
3.3
W
Note
@ MAX
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Product Information
4. BLOCK DIAGRAM
4.1 TFT LCD Module
4.2 LED placement structure
D1
D2
D3
D4
D5
D6
D7
D8
D9
Anode
Cathode
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Product Information
5. INPUT TERMINAL PIN ASSIGNMENT
5.1. Input Signal & Power (LVDS, Connector : I-PEX 20455-#40E-## or equivalent )
No.
Symbol
Function
Polarity
1
NC
2
AVDD
Power Supply 3.3V (typical)
3
AVDD
Power Supply 3.3V (typical)
4
DVDD
DDC 3.3V power
5
NC
No Connection
6
SCL
DDC Clock
7
SDA
DDC data
8
RIN0-
-LVDS differential data input (R0-R5, G0)
Negative
9
RIN0+
+LVDS differential data input (R0-R5, G0)
Positive
10
GND
Ground
11
RIN1-
-LVDS differential data input (G1-G5, B0-B1)
Negative
12
RIN1+
+LVDS differential data input (G1-G5, B0-B1)
Positive
13
GND
Ground
14
RIN2-
-LVDS differential data input (B2-B5, HS, VS, DE)
Negative
15
RIN2+
+LVDS differential data input (B2-B5
(B2 B5, HS,
HS VS
VS, DE)
Positive
16
GND
Ground
17
CLK-
-LVDS differential clock input
Negative
18
CLK+
+LVDS differential clock input
Positive
19
GND
Ground
20
NC
No connection
21
NC
No connection
22
GND
23
NC
No connection
24
NC
No connection
25
GND
26
NC
No connection
27
NC
No connection
28
GND
29
NC
No Connect
30
NC
No Connect
Remarks
No Connection (Reserved for supplier)
Ground
Ground
Ground
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Product Information
No.
Symbol
Function
31
VSSLED
Ground – LED
32
VSSLED
Ground – LED
33
VSSLED
Ground – LED
34
NC
35
PWM
36
LED_EN
37
NC
No Connect
38
VDDLED
LED power
39
VDDLED
LED power
40
VDDLED
LED power
Polarity
Remarks
No Connect
System PWM Signal Input (+3.3V Swing)
LED enable pin (+3.3V Input)
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Product Information
5.2 LVDS Interface
5.2.1 LVDS DC Input
ITEM
SYMBOL
MIN.
TYP.
MAX.
UNIT
LVDS Differential
Voltage
VID
200
-
600
mV
Input Common Mode
Voltage
VCM
0.4
1.2
1.7
V
NOTE
5 2 1 LVDS AC IInputt
5.2.1
ITEM
SYMBOL
MIN.
LVDS input Clock Frequency
FCLK_LVDS
30
LVDS RX skew
Right margin
LVDS RX skew
Left margin
100MHz
50MHz
TRSRM
100MHz
50MHz
Maximum deviation of LVDS input
clock during SSCG
Modulating frequency of LVDS
input clock during SSCG
FCLK_DEV
FCLK_MOD
TYP.
MAX.
UNIT
100
Mhz
NOTE
-
-
270
ps
(1),(2)
-
-
700
ps
(1) (2)
(1),(2)
-270
-
-
ps
(1),(2)
-700
-
-
ps
(1),(2)
-
-
± 3
%
(3)
30
-
300
KHz
(3)
Note (1) : LVDS Receiver Skew (Strobe) Margin
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Product Information
5.3 Timing Diagrams of LVDS For Transmission
LVDS Receiver : Integrated T-con
T
TxCLK OUT
RxCLK IN
T/7
Rx IN2
RxOUT20
DE
Rx IN1
RxOUT13
RxOUT19
Vsync
RxOUT12
B1
RxIN0
RxOUT6
B0
RxOUT18
RxOUT17
RxOUT16
Hsync
B5
B4
RxOUT11
RxOUT10
G5
G4
RxOUT5
RxOUT4
RxOUT3
R5
R4
R3
G0
RxOUT9
G3
RxOUT2
R2
RxOUT15
B3
RxOUT8
G2
RxOUT1
R1
RxOUT14
B2
RxOUT7
G1
RxOUT0
R0
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Product Information
5.4 Pixel Format in the display
1366
1
Line 1
R G B R G B
R G B R G B
LTN156AT19Panel
Line 768
R G B R G B
R G B R G B
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Product Information
6. INTERFACE TIMING
6.1 Timing Parameters
Signal
Item
Symbol
Min
Min.
Typ
Typ.
Max
Max.
Unit
Frame Frequency
Cycle
TV
773
790
810
Lines
Vertical Active
Display Term
Display
Period
TVD
-
768
-
Lines
One Line
Scanning Time
Cycle
TH
1426
1526
1726
Clocks
Horizontal Active
Display Term
Display
Period
THD
-
1366
-
Clocks
Note
6.2 Timing diagrams of interface signal
TV
TVD
DE
TH
DCLK
TC
THD
DE
DATA
SIGNALS
Valid display data ( 1366 clocks)
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Product Information
6.3 Power ON/OFF Sequence
: To prevent a latch-up or DC operation of the LCD module, the power on/off sequence
should be as the diagram below.
0.9 VDD
Power Supply VDD
0.9 VDD
0.1 VDD
0.1 VDD
0V
T1
T7
T2
T4
T3
Signals
VALID
0V
T8
T9
0.9 LED Vin
0.1 LED Vin
0.9 LED Vin
0.1 LED Vin
LED Power (Vin)
T10
T11
PWM for LED driver
(Dimming signal)
T12
Enable signal for LED driver
(Backlight on/off)
T13
T6
T5
Power ON/OFF Sequence
Timing (ms)
Remarks
VDD rising time from 10% to 90%
0.5<T1≤10
0<T2 ≤50
Delay from VDD to valid data at power ON
0<T3 ≤50
Delay from valid data OFF to VDD OFF at power Off
500 ≤T4
VDD OFF time for Windows restart
300 ≤T5
Delay from valid data to B/L enable at power ON
200 ≤T6
Delay from valid data off to B/L disable at power Off
VDD falling time from 90% to 10%
0<T7 ≤10
0.5<T8≤10
LED Vin rising time from 10% to 90%
0.5<T9≤10
LED Vin falling time from 90% to 10%
0 ≤T10
Delay from LED driver Vin rising time 90% to PWM ON
0≤T11
Delay from PWM Off to LED driver Vin falling time 10%, Must Keep rule
0≤T12
Delay from PWM ON to B/L Enable ON, Must Keep rule
0 ≤T13
Delay from B/L Enable Off to PWM Off
Power Sequence & Timing Parameters
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6.3 Power ON/OFF Sequence
Product Information
NOTE.
(1) The supply voltage of the external system for the module input should be the same
as the definition of VDD.
(2) Apply the lamp voltage within the LCD operation range. When the back-light turns on
before the LCD operation or the LCD turns off before the back-light turns off, the
display may momentarily become white.
(3) In case of VDD = off level, please keep the level of input signals on the low or keep
a high
hi h iimpedance.
d
(4) T4 should be measured after the module has been fully discharged between power
off and on period.
(5) Interface signal shall not be kept at high impedance when the power is on.
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