Precision Low Cost ISOLATION AMPLIFIER ISO120 ISO121

Precision Low Cost ISOLATION AMPLIFIER ISO120 ISO121
ISO120
ISO121
Precision Low Cost
ISOLATION AMPLIFIER
FEATURES
APPLICATIONS
●
●
●
●
●
● INDUSTRIAL PROCESS CONTROL: Transducer Isolator for Thermocouples, RTDs,
Pressure Bridges, and Flow Meters, 4mA
to 20mA Loop Isolation
● GROUND LOOP ELIMINATION
● MOTOR AND SCR CONTROL
● POWER MONITORING
● ANALYTICAL MEASUREMENTS
● BIOMEDICAL MEASUREMENTS
●
●
●
●
●
100% TESTED FOR PARTIAL DISCHARGE
ISO120: Rated 1500Vrms
ISO121: Rated 3500Vrms
HIGH IMR: 115dB at 60Hz
USER CONTROL OF CARRIER
FREQUENCY
LOW NONLINEARITY: ±0.01% max
BIPOLAR OPERATION: VO = ±10V
0.3"-WIDE 24-PIN HERMETIC DIP, ISO120
SYNCHRONIZATION CAPABILITY
WIDE TEMP RANGE: –55°C to +125°C
(ISO120)
● DATA ACQUISITION
● TEST EQUIPMENT
DESCRIPTION
The ISO120 and ISO121 are precision isolation amplifiers incorporating a novel duty cycle modulationdemodulation technique. The signal is transmitted
digitally across a 2pF differential capacitive barrier.
With digital modulation the barrier characteristics do
not affect signal integrity, which results in excellent
reliability and good high frequency transient immunity across the barrier. Both the amplifier and barrier
capacitors are housed in a hermetic DIP. The ISO120
and ISO121 differ only in package size and isolation
voltage rating.
These amplifiers are easy to use. No external components are required for 60kHz bandwidth. With the
addition of two external capacitors, precision specifications of 0.01% max nonlinearity and 150µV/°C max
VOS drift are guaranteed with 6kHz bandwidth. A
power supply range of ±4.5V to ±18V and low quiescent current make these amplifiers ideal for a wide
range of applications.
Isolation Barrier
C1H
C2H
C1L
C2L
VIN
Sense
VOUT
Signal
Com 1
Signal
Com 2
Ext Osc
+VS1
Gnd 1
–VS1
–VS2
Gnd 2
+VS2
International Airport Industrial Park • Mailing Address: PO Box 11400
Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP •
• Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
© 1988 Burr-Brown Corporation
PDS-820D
Printed in U.S.A. March, 1992
SPECIFICATIONS
ELECTRICAL
At TA = +25°C: VS1 = VS2 = ±15V: and RL = 2kΩ, unless otherwise noted.
ISO120BG, ISO121BG
PARAMETER
CONDITIONS
ISOLATION
Voltage Rated Continuous ISO120: AC 60Hz
TMIN to TMAX
DC
TMIN to TMAX
ISO121: AC 60Hz
TMIN to TMAX
DC
TMIN to TMAX
100% Test (AC 60Hz): ISO120
1s; Partial Discharge ≤ 5pC
ISO121
1s; Partial Discharge ≤ 5pC
Isolation Mode Rejection ISO 120: AC 60Hz
1500Vrms
DC
ISO121: AC60Hz
3500Vrms
DC
Barrier Impedance
Leakage Current
VISO = 240Vrms, 60Hz
GAIN(4)
Nominal Gain
Gain Error
Gain vs Temperature
Nonlinearity
Nominal Gain
Gain Error
Gain vs Temperature
Nonlinearity
INPUT OFFSET VOLTAGE (4)
Initial Offset
vs Temperature
Initial Offset
vs Temperature
Initial Offset
vs Supply
Noise
Slew Rate
Settling Time
0.1%
0.01%
Overload Recovery Time(3)
POWER SUPPLIES
Rated Voltage
Voltage Range
Quiescent Current: VS1
VS2
TEMPERATURE RANGE
Specification: BG and G
SG(4)
Operating
Storage
θJA: ISO120
ISO121
MAX
1
±0.04
±5
±0.005
1
±0.04
±40
±0.02
±5
±100
±25
±250
C1 = C2 = 1000pF
C1 = C2 = 0
±VS1 or ±VS2 = ±4.5V to ±18V
ISO120G, ISO120SG(4), ISO121G
MIN
TYP
MAX
UNITS
*
Vrms
VDC
Vrms
VDC
Vrms
Vrms
dB
dB
dB
dB
Ω || pF
µArms
*
*
*
*
*
*
115
160
115
160
1014 || 2
0.18
C1 = C2 = 0
OUTPUT
Voltage Range
Current Drive
Capacitive Load Drive
Ripple Voltage(2)
TYP
1500
2121
3500
4950
2500
5600
VO = ±10V
C1 = C2 = 1000pF
INPUT
Voltage Range(1)
Resistance
FREQUENCY RESPONSE
Small Signal Bandwith
MIN
*
*
*
*
*
*
0.5
1
±0.05
±10
±0.01
1
±0.05
±40
±0.04
±0.1
±20
±0.01
±0.25
±0.1
±25
±150
±100
±10
±150
±40
±500
±2
4
±0.25
±40
±0.05
±0.25
±0.1
±50
±400
±100
V/V
%FSR
ppm/°C
%FSR
V/V
%FSR
ppm/°C
%FSR
mV
µV/°C
mV
µV/°C
±2
4
mV/V
µV/√Hz
±10
±15
200
*
*
*
V
kΩ
±10
±5
±12.5
±15
0.1
10
*
*
*
*
*
*
V
mA
µF
mVp-p
60
6
2
*
*
*
kHz
kHz
V/µs
50
350
150
*
*
*
µs
µs
µs
C1 = C2 = 0
C1 = C2 = 1000pF
VO = ±10V
C2 = 100pF
C1 = C2 = 1000pF
50% Output Overload,
C1 = C2 = 0
15
±4.5
±4.0
±5.0
–25
–25
–55
–65
40
25
*
±18
±5.5
±6.5
*
85
85
125
150
–25
–55
–55
–55
*
*
*
*
*
85
125
125
150
40
25
V
V
mA
mA
°C
°C
°C
°C
°C/W
°C/W
*Specifications same as ISO120BG, ISO121BG.
NOTE: (1) Input voltage range = ±10V for VS1, VS2 = ±4.5VDC to ±18VDC. (2) Ripple frequency is at carrier frequency. (3) Overload recovery is approximately three times
the settling time for other values of C2. (4) The SG-grade is specified –55°C to +125°C; performance of the SG in the –25°C to +85°C temperature range is the same
as the BG-grade.
ISO120/121
2
ABSOLUTE MAXIMUM RATINGS
CONNECTION DIAGRAM
Supply Voltage (any supply) ............................................................... 18V
VIN, Sense Voltage .......................................................................... ±100V
External Oscillator Input .................................................................... ±25V
Signal Common 1 to Ground 1 ........................................................... ±1V
Signal Common 2 to Ground 2 ........................................................... ±1V
Continuous Isolation Voltage: ISO120 ...................................... 1500Vrms
ISO121 ....................................... 3500Vrms
VISO, dv/dt ...................................................................................... 20kV/µs
Junction Temperature ...................................................................... 150°C
Storage Temperature ..................................................... –65°C to +150°C
Lead Temperature (soldering, 10s) ............................................... +300°C
Output Short Duration ......................................... Continuous to Common
C1H
1/1(1)
24/40
Gnd 1
C 1L
2/2
23/39
V IN
+VS1
3/3
22/38
Ext Osc
–VS1
4/4
21/37
Com 1
Com 2
9/17
16/24
–VS2
PACKAGE INFORMATION(1)
MODEL
PACKAGE
PACKAGE DRAWING
NUMBER
ISO120G
ISO120BG
ISO120SG
24-Pin DIP
24-Pin DIP
24-Pin DIP
225
225
225
ISO121G
ISO121BG
40-Pin DIP
40-Pin DIP
206
206
VOUT 10/18
15/23
+VS2
Sense 11/19
14/22
C2L
Gnd 2 12/20
13/21
C2H
NOTE: (1) First pin number is for ISO120.
Second pin number is for ISO121.
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
ORDERING INFORMATION
TEMPERATURE
RANGE
MODEL
ISO120G
ISO120BG
ISO120SG
ISO121G
ISO121BG
–25°C to 85°C
–25°C to 85°C
–55C to 125°C
–25°C to 85°C
–25°C to 85°C
ELECTROSTATIC
DISCHARGE SENSITIVITY
Electrostatic discharge can cause damage ranging from performance degradation to complete device failure. Burr-Brown
Corporation recommends that all integrated circuits be handled
and stored using appropriate ESD protection methods.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
3
ISO120/121
TYPICAL PERFORMANCE CURVES
TA = +25°C; VS1 = VS2 = ±15V; and RL = 2kΩ, unless otherwise noted.
ISOLATION MODE VOLTAGE
vs FREQUENCY ISO120
ISOLATION MODE VOLTAGE
vs FREQUENCY ISO121
Max DC Rating
Max DC Rating
Max AC
Rating
1k
2.1k
Peak Isolation Voltage
Peak Isolation Voltage
5k
Degraded
Performance
100
Typical
Performance
Max AC
Rating
1k
Degraded
Performance
100
Typical
Performance
10
10
100
1k
10k
100k
1M
10M
100
100M
1k
100k
10k
1M
10M
100M
Frequency (Hz)
Frequency (Hz)
BANDWIDTH vs C2
PHASE SHIFT vs C2
100nF
Phase Shift (degrees)
100
C2
10nF
1000pF
0
C2 = 1000pF
10
C2 = 0
1
0.1
100
1k
10k
100k
100
1k
10k
–3dB Frequency (Hz)
Frequency (Hz)
PSRR vs FREQUENCY
ISOLATION LEAKAGE CURRENT
vs FREQUENCY
100k
100mA
60
54
Leakage Current (rms)
10mA
PSRR (dB)
40
+VS1, +VS2
–VS1, –VS2
20
3500 Vrms
1mA
1500 Vrms
100µA
10µA
240 Vrms
1µA
0.1µA
0
1
10
100
1k
10k
100k
1
1M
ISO120/121
10
100
1k
Frequency (Hz)
Frequency (Hz)
4
10k
100k
1M
TYPICAL PERFORMANCE CURVES (CONT)
TA = +25°C; VS1 = VS2 = ±15V; and RL = 2kΩ, unless otherwise noted.
IMR vs FREQUENCY
SIGNAL RESPONSE vs CARRIER FREQUENCY
160
0
140
–20dB/dec (for comparison only)
VOUT/VIN (dB)
IMR (dB)
120
100
80
–20
–40
60
40
1
10
100
1k
10k
100k
1M
0
fIN (Hz)
Frequency (Hz)
fC
fOUT (Hz) 0
fc /2
SYNCHRONIZATION RANGE at 25°C
±4Vp SINE WAVE INPUT TO EXT OSC
0
fC /2
3fC
0
fC /2
0
NOISE vs SMALL SIGNAL BANDWIDTH
12
10nF
Typical
Free Run
Frequency
Noise, eN (µV/ Hz)
10
1000pF
8
C 2 = C1 *
6
4
C2 = 2C1
2
*C1 ≤ 5000pF
0
0
1k
10k
100k
C2 ≥ C1
Frequency (Hz)
0.1f–3dB
1M
0.2f–3dB
0.5f–3dB
f–3dB
Normalized Frequency
SINE RESPONSE
(f = 20kHz, C2 = 0)
SINE RESPONSE
(f = 2kHz, C2 = 0)
+10
Output Voltage (V)
+10
Output Voltage (V)
C1
2fC
0
–10
0
500
0
–10
0
1000
50
Time (µs)
Time (µs)
FPO
BLEED
TO EDGE
OF BOX
5
ISO120/121
100
TYPICAL PERFORMANCE CURVES (CONT)
TA = +25°C; VS1 = VS2 = ±15V; and RL = 2kΩ, unless otherwise noted.
STEP RESPONSE
+10
+10
0
0
Output Voltage (V)
Output Voltage (V)
STEP RESPONSE
–10
+10
0
–10
+10
0
–10
–10
0
250
0
500
50
100
Time (µs)
Time (µs)
THEORY OF OPERATION
SYNCHRONIZED MODE
A unique feature of the ISO120 and ISO121 is the ability to
synchronize the modulator to an external signal source. This
capability is useful in eliminating trouble-some beat frequencies in multi-channel systems and in rejecting AC
signals and their harmonics. To use this feature, external
capacitors are connected at C1 and C2 (Figure 1) to change
the free-running carrier frequency. An external signal is
applied to the Ext Osc pin. This signal forces the current
source to switch at the frequency of the external signal. If
VIN is zero, and the external source has a 50% duty cycle,
operation proceeds as described above, except that the switching frequency is that of the external source. If the external
signal has a duty cycle other than 50%, its average value is
not zero. At start-up, the current source does not switch until
the integrator establishes an output equal to the average DC
value of the external signal. At this point, the external signal
is able to trigger the current source, producing a triangular
waveform, symmetrical about the new DC value, at the
output of A1. For VIN = 0, this waveform has a 50% duty
cycle. As VIN varies, the waveform retains its DC offset, but
varies in duty cycle to maintain charge balance around A1.
Operation of the demodulator is the same as outlined above.
The ISO120 and ISO121 isolation amplifiers comprise input
and output sections galvanically isolated by matched 1pF
capacitors built into the ceramic barrier. The input is dutycycle modulated and transmitted digitally across the barrier.
The output section receives the modulated signal, converts it
back to an analog voltage and removes the ripple component
inherent in the demodulation. The input and output sections
are laser-trimmed for exceptional matching of circuitry common to both input and output sections.
FREE-RUNNING MODE
An input amplifier (A1, Figure1) integrates the difference
between the input current (VIN/200kΩ) and a switched
±100µA current source. This current source is implemented
by a switchable 200µA source and a fixed 100µA current
sink. To understand the basic operation of the input section,
assume that VIN = 0. The integrator will ramp in one
direction until the comparator threshold is exceeded. The
comparator and sense amp will force the current source to
switch; the resultant signal is a triangular waveform with a
50% duty cycle. If VIN changes, the duty cycle of the
integrator will change to keep the average DC value at the
output of A1 near zero volts. This action converts the input
voltage to a duty-cycle modulated triangular waveform at
the output of A1 near zero volts. This action converts the
input voltage to a duty-cycle modulated triangular waveform at the output of A1 with a frequency determined by the
internal 150pF capacitor. The comparator generates a fast
rise time square wave that is simultaneously fed back to keep
A1 in charge balance and also across the barrier to a
differential sense amplifier with high common-mode rejection characteristics. The sense amplifier drives a switched
current source surrounding A2. The output stage balances
the duty-cycle modulated current against the feedback current through the 200kΩ feedback resistor, resulting in an
average value at the Sense pin equal to VIN. The sample and
hold amplifiers in the output feedback loop serve to remove
undesired ripple voltages inherent in the demodulation process.
ISO120/121
Synchronizing to a Sine
or Triangle Wave External Clock
The ideal external clock signal for the ISO120/121 is a ±4V
sine wave or ±4V, 50% duty-cycle triangle wave. The ext osc
pin of the ISO120/121 can be driven directly with a ±3V to
±5V sine or 25% to 75% duty-cycle triangle wave and the ISO
amp's internal modulator/demodulator circuitry will synchronize to the signal.
Synchronizing to signals below 400kHz requires the addition
of two external capacitors to the ISO120/121. Connect one
capacitor in parallel with the internal modulator capacitor and
connect the other capacitor in parallel with the internal demodulator capacitor as shown in Figure 1.
6
C1(1)
C1H
C2(1)
Isolation Barrier
C1L
200µA
200µA
1pF
1pF
X
X
1pF
Sense
200kΩ
150pF
100µA
VIN
C2H
C2L
Sense
1pF
150pF
200kΩ
Sense
100µA
Signal
Com 1
30kΩ
Ext
Osc
A1
V OUT
Signal
Com 2
A2
16kΩ
S/H
G=1
16kΩ
S/H
G=6
50pF
+V S1 Gnd 1 –V S1
+V S2 Gnd 2 –V S2
NOTE: (1) Optional. See text.
FIGURE 1. Block Diagram.
The value of the external modulator capacitor, C1, depends on
the frequency of the external clock signal. Table I lists
recommended values.
EXTERNAL CLOCK
FREQUENCY RANGE
C1, C2 ISO120/121
MODULATOR, DEMODULATOR
EXTERNAL CAPACITOR
400kHz to 700kHz
200kHz to 400kHz
100kHz to 200kHz
50kHz to 100kHz
20kHz to 50kHz
10kHz to 20kHz
5kHz to 10kHz
none
500pF
1000pF
2200pF
4700pF
0.01µF
0.022µF
Synchronizing to a 400kHz to 700kHz
Square-Wave External Clock
At frequencies above 400kHz, an internal clamp and filter
provides signal conditioning so that a square-wave signal can
be used to directly drive the ISO120/121. A square-wave
external clock signal can be used to directly drive the ISO120/
121 ext osc pin if: the signal is in the 400kHz to 700kHz
frequency range with a 25% to 75% duty cycle, and ±3V to
±20V level. Details of the internal clamp and filter circuitry
are shown in Figure 1.
Synchronizing to a 10% to 90%
Duty-cycle External Clock
With the addition of the signal conditioning circuit shown in
Figure 2, any 10% to 90% duty-cycle square-wave signal can
be used to drive the ISO120/121 ext osc pin. With the values
shown, the circuit can be driven by a 4Vp-p TTL signal. For
a higher or lower voltage input, increase or decrease the 1kΩ
resistor, RX, proportionally. e.g. for a ±4V square wave
(8Vp-p) RX should be increased to 2kΩ.
TABLE I. Recommended ISO120/121 External Modulator/
Demodulator Capacitor Values vs External Clock
Frequency.
The value of the external demodulator capacitor, C2, depends
on the value of the external modulator capacitor. To assure
stability, C2 must be greater than 0.8 • C1. A larger value for
C2 will decrease bandwidth and improve stability:
f
− 3 dB
≈
The value of CX used in the Figure 2 circuit depends on the
frequency of the external clock signal. Table II shows recommended capacitor values.
Note: For external clock frequencies below 400kHz, external
modulator/demodulator capacitors are required on the
ISO120/121 as before.
1. 2
200 kΩ ( 150 pF + C 2 )
Where:
f–3dB ≈ –3dB bandwidth of ISO amp with external C2 (Hz)
C2 = External demodulator capacitor (f)
For example, with C2 = 0.01µF, the f–3dB bandwidth of the
ISO120/121 is approximately 600Hz.
7
ISO120/121
connected directly to VOUT or may be connected to a remote
load to eliminate errors due to IR drops. Pins are provided
for use of external integrator capacitors. The C1H and C2H
pins are connected to the integrator summing junctions and
are therefore particularly sensitive to external pickup. This
sensitivity will most often appear as degraded IMR or PSR
performance. AC or DC currents coupled into these pins
results in VERROR = IERROR X 200kΩ at the output. Guarding
of these pins to their respective Signal Common, or C1L and
C2L is strongly recommended. For similar reasons, long
traces or physically large capacitors are not desirable. If
wound-foil capacitors are used, the outside foil should be
connected to C1L and C2L, respectively.
10kΩ
1µF
Sq Wave In
CX
RX
1kΩ
OPA602
Triangle Out
to ISO120/121
Ext Osc
FIGURE 2. Square Wave to Triangle Wave Signal Conditioner for Driving ISO120/121 Ext Osc Pin.
EXTERNAL CLOCK
FREQUENCY RANGE
CX
400kHz to 700kHz
200kHz to 400kHz
100kHz to 200kHz
50kHz to 100kHz
20kHz to 50kHz
10kHz to 20kHz
5kHz to 10kHz
30pF
180pF
680pF
1800pF
3300pF
0.01µF
0.022µF
Optional Gain and Offset Adjustments
Rated gain accuracy and offset performance can be achieved
with no external adjustments, but the circuit of Figure 4a
may be used to provide a gain trim of ±0.5% for values
shown; greater range may be provided by increasing the size
of R1 and R2. Every 2kΩ increase in R1 will give an
additional 1% adjustment range, with R2 ≥ 2R1. If safety or
convenience dictates location of the adjustment potentiometer on the other side of the barrier from the position
shown in Figure 4a, the positions of R1 and R2 may be
reversed. Gains greater than one may be obtained by using
the circuit of Figure 4b. Note that the effect of input offset
errors will be multiplied at the output in proportion to the
increase in gain. Also, the small-signal bandwidth will be
decreased in inverse proportion to the increase in gain. In
most instances, a precision gain block at the input of the
isolation amplifier will provide better overall performance.
TABLE II. Recommended CX Values vs Frequency for
Figure 2 Circuit.
BASIC OPERATION
Signal and Power Connections
Figure 3 shows proper power and signal connections. Each
power supply pin should be bypassed with 1µF tantalum
capacitor located as close to the amplifier as possible. All
ground connections should be run independently to a common point if possible. Signal Common on both input and
output sections provide a high-impedance point for sensing
signal ground in noisy applications. Signal Common must
have a path to ground for bias current return and should be
maintained within ±1V of Gnd. The output sense pin may be
Figure 5 shows a method for trimming VOS of the ISO120
and ISO121. This circuit may be applied to either Signal
Com (input or output) as desired for safety or convenience.
With the values shown, ±15V supplies and unity gain, the
circuit will provide ±150mV adjustment range and 0.25mV
C1(1)
Guard
Isolation Barrier
C1H
C2(1)
C1L
VIN
Guard
C2L
C2H
Sense
VOUT
RL
–VS2 –
+VS2
Signal
Com1
Gnd1
Ext(2)
Osc
Gnd 2
Signal
Com 2
–VS1 –
+VS1
+
+1µF
+VS1
+
+1µF
NOTE: (1) Optional. See text. (2) Ground if not used.
FIGURE 3. Power and Signal Connections.
ISO120/121
8
+VS2
+
1µF
+
+1µF
resolution with a typical trim potentiometer. The output will
have some sensitivity to power supply variations. For a
±100mV trim, power supply sensitivity is 8mV/V at the
output.
VIN
output are not significant under these circumstances unless
the input signal contains significant components above
250kHz.
There are two ways to use these characteristics. One is to
move the carrier frequency low enough that the troublesome
signal components are attenuated to an acceptable level as
shown in Signal Response vs Carrier Frequency. This in
effect limits the bandwidth of the amplifier. The Synchronization Range performance curve shows the relationship
between carrier frequency and the value of C1. To maintain
stability, C2 must also be connected and must be equal to or
larger in value than C1. C2 may be further increased in value
for additional attenuation of the undesired signal components and provides the additional benefit of reducing the
residual carrier ripple at the output. See the Bandwidth vs C2
performance curve.
R2
2kΩ
R1
1kΩ
Sense
VOUT
Sense
VOUT
GND1
FIGURE 4a. Gain Adjust.
VIN R1 || R2
GND1
When periodic noise from external sources such as system
clocks and DC/DC converters are a problem, ISO120 and
ISO121 can be used to reject this noise. The amplifier can be
synchronized to an external frequency source, fEXT, placing
the amplifier response curve at one of the frequency and
amplitude nulls indicated in the Signal Response vs Carrier
Frequency performance curve. For proper synchronization,
choose C1 as shown in the Synchronization Range performance curve. Remember that C2 ≥ C1 is a necessary condition for stability of the isolation amplifier. This curve shows
the range of lock at the fundamental frequency for a 4V
sinusoidal signal source. The applications section shows the
ISO120 and ISO121 synchronized to isolation power supplies, while Figure 6 shows circuitry with opto-isolation
suitable for driving the Ext Osc input from TTL levels.
R1
R2
Gain = 1 +
(
R1
R2
+
)
R1
200k
FIGURE 4b. Gain Setting.
+VS1 or +VS2
1MΩ
100kΩ
–VS1 or –VS2
10kΩ
Signal Com 1
or
Signal Com 2
+5V
+15V
200Ω
2.5kΩ
2
FIGURE 5. VOS Adjust.
C2
8
Ext Osc on
ISO120 (pin 22)
2.5kΩ
CARRIER FREQUENCY CONSIDERATIONS
As previously discussed, the ISO120 and ISO121 amplifiers
transmit the signal across the iso-barrier by a duty-cycle
modulation technique. This system works like any linear
amplifier for input signals having frequencies below one
half the carrier frequency, fC. For signal frequencies above
fC/2, the behavior becomes more complex. The Signal Response vs Carrier Frequency performance curve describes
this behavior graphically. The upper curve illustrates the
response for input signals varying from DC to fC/2. At input
frequencies at or above fC/2, the device generates an output
signal component that varies in both amplitude and frequency, as shown by the lower curve. The lower horizontal
scale shows the periodic variation in the frequency of the
output component. Note that at the carrier frequency and its
harmonics, both the frequency and amplitude of the response go the zero. These characteristics can be exploited in
certain applications. It should be noted that when C1 is zero,
the carrier frequency is nominally 500kHz and the –3dB
point of the amplifier is 60kHz. Spurious signals at the
6
C1
fIN
10kΩ
TTL
5
3
6N136
C1 =
(
140E-6
fIN
)
– 350pF
C2 = 10 X C1, with a minimum 10nF
FIGURE 6. Synchronization with Isolated Drive Circuit for
Ext Osc Pin.
ISOLATION MODE VOLTAGE
Isolation mode voltage (IMV) is the voltage appearing between isolated grounds Gnd 1 and Gnd 2. IMV can induce
error at the output as indicated by the plots of IMV vs
Frequency. It should be noted that if the IMV frequency
exceeds fC/2, the output will display spurious outputs in a
manner similar to that described above, and the amplifier
response will be identical to that shown in the Signal Response vs Carrier Frequency performance curve. This occurs
9
ISO120/121
because IMV-induced errors behave like input-referred error
signals. To predict the total IMR, divide the isolation voltage
by the IMR shown in IMR vs Frequency performance curve
and compute the amplifier response to this input-referred
error signal from the data given in the Signal Response vs
Carrier Frequency performance curve. Due to effects of very
high-frequency signals, typical IMV performance can be
achieved only when dV/dT of the isolation mode voltage
falls below 1000V/µs. For convenience, this is plotted in the
typical performance curves for the ISO120 and ISO121 as a
function of voltage and frequency for sinusoidal voltages.
When dV/dT exceeds 1000V/µs but falls below 20kV/µs,
performance may be degraded. At rates of change above
20kV/µs, the amplifier may be damaged, but the barrier
retains its full integrity. Lowering the power supply voltages
below ±15V may decrease the dV/dT to 500V/µs for typical
performance, but the maximum dV/dT of 20kV/µs remains
unchanged.
effectively shorting itself out. This action redistributes electrical charge within the dielectric and is known as partial
discharge. If, as is the case with AC, the applied voltage
gradient across the device continues to rise, another partial
discharge cycle begins. The importance of this phenomenon
is that, if the discharge does not occur, the insulation system
retains its integrity. If the discharge begins, and is allowed
to continue, the action of the ions and electrons within the
defect will eventually degrade any organic insulation system
in which they occur. The measurement of partial discharge
is still useful in rating the devices and providing quality
control of the manufacturing process. Since the ISO120 and
ISO121 do not use organic insulation, partial discharge is
non-destructive.
The inception voltage for these voids tends to be constant, so
that the measurement of total charge being redistributed
within the dielectric is a very good indicator of the size of
the voids and their likelihood of becoming an incipient
failure. The bulk inception voltage, on the other hand, varies
with the insulation system, and the number of ionization
defects and directly establishes the absolute maximum voltage (transient) that can be applied across the test device
before destructive partial discharge can begin. Measuring
the bulk extinction voltage provides a lower, more conservative voltage from which to derive a safe continuous rating.
In production, measuring at a level somewhat below the
expected inception voltage and then derating by a factor
related to expectations about system transients is an
accepted practice.
Leakage current is determined solely by the impedance of
the 2pF barrier capacitance and is plotted in the Isolation
Leakage Current vs Frequency curve.
ISOLATION VOLTAGE RATINGS
Because a long-term test is impractical in a manufacturing
situation, the generally accepted practice is to perform a
production test at a higher voltage for some shorter time. The
relationship between actual test voltage and the continuous
derated maximum specification is an important one. Historically, Burr-Brown has chosen a deliberately conservative
one: VTEST = (2 X ACrms continuous rating) + 1000V for 10
seconds, followed by a test at rated ACrms voltage for one
minute. This choice was appropriate for conditions where
system transients are not well defined.
Partial Discharge Testing
Not only does this test method provide far more qualitative
information about stress-withstand levels than did previous
stress tests, but it provides quantitative measurements from
which quality assurance and control measures can be based.
Tests similar to this test have been used by some manufacturers, such as those of high-voltage power distribution
equipment, for some time, but they employed a simple
measurement of RF noise to detect ionization. This method
was not quantitative with regard to energy of the discharge,
and was not sensitive enough for small components such as
isolation amplifiers. Now, however, manufacturers of HV
test equipment have developed means to quantify partial
discharge. VDE, the national standards group in Germany
and an acknowledged leader in high-voltage test standards,
has developed a standard test method to apply this powerful
technique. Use of partial discharge testing is an improved
method for measuring the integrity of an isolation barrier.
Recent improvements in high-voltage stress testing have
produced a more meaningful test for determining maximum
permissible voltage ratings, and Burr-Brown has chosen to
apply this new technology in the manufacture and testing of
the ISO120 and ISO121.
Partial Discharge
When an insulation defect such as a void occurs within an
insulation system, the defect will display localized corona or
ionization during exposure to high-voltage stress. This ionization requires a higher applied voltage to start the discharge and lower voltage to maintain it or extinguish it once
started. The higher start voltage is known as the inception
voltage, while the extinction voltage is that level of voltage
stress at which the discharge ceases. Just as the total insulation system has an inception voltage, so do the individual
voids. A voltage will build up across a void until its inception voltage is reached, at which point the void will ionize,
ISO120/121
To accommodate poorly-defined transients, the part under
test is exposed to voltage that is 1.6 times the continuousrated voltage and must display ≤5pC partial discharge level
in a 100% production test.
10
APPLICATIONS
The ISO120 and ISO121 isolation amplifiers are used in
three categories of applications:
2. Accurate isolation of signals from severe ground noise
and,
3. Fault protection from high voltages in analog measurements.
1. Accurate isolation of signals from high voltage ground
potentials,
Figures 7 through 12 show a variety of Application Circuits.
APPLICATION CIRCUITS
20µH
+
'E
+15V
0.3µF
10µF
TO
PWS740-2
4
6
8 +V
IN
5
PWS740-1
3
0.3µF
PWS740-3
2
0.3µF
0.3µF
TO 6
3
1
1
4
3
6
4
5
20kΩ
To other
channels
+15V
20pF
1.0µF
IL = 0-20mA
–VS1
1.0µF
4
RL ≤ 600Ω
3
1.0µF
22
1.0µF
–15V
23
0-5V
16
15
10
VN2222
ISO120
11
12
1/4W
250Ω
0.1%
9
+15V
System Uses:
1 - Oscillator/Driver
8 - Transformers
8 - Bridges
8 - ISO120s
8 - Transistors VN2222
8 - Zener Diodes, 6.2V, 400mW, 20%
Not all components shown.
24
20kΩ
21
6.2V
400mW
–15V
FIGURE 7. Eight-channel Isolated 0-20mA Loop Driver.
11
ISO120/121
3θ Y-Connected Power Transformer
+VS1 –VS1 +VS2 –VS2
+VS1
120Vrms
100A
1 3 4 15
200kΩ
0.005 Power Resistor
2
8
C1
+
10
INA110
0.001µF
1
200kΩ
–
9
7
6
–VSI
16
2
11
10
23 ISO
120
21
24
22
VOUT
13
14
C2
9
12
C1 = 1000pF
C2 = 1000pF
Differential input accurately senses power resistor voltage.
Two resistors protect INA110 from open power resistor.
High frequency spike reject filter has fCO = 400Hz.
FIGURE 8. Isolated Powerline Monitor.
1mV
5MΩ
5.00V
0V
Calibration Signal
1kΩ
+VS1
Calibration
Left Arm
1/2W
300kΩ
50kΩ
On
500pF
NE2H(2)
–VS1
200pF
Calibration
1/2W
300kΩ
Right Arm
On
C1
+VS1
+VS1
50kΩ
NE2H
2
21
22
19
37 ISO
18
121
20 17
40
23
38
24
39
3
4
+VS2
–VS2
–VS1
+VS1
–VS1
500pF
C2
1
0.0082(1)
15
12
4
+
13
7
11
5 INA102
10
6
–
8
14
9 0.0082
–VS1
+VS1
+VS1
1/2W
300kΩ
180kΩ
7
6
2
32
20kΩ
Gain = 1000
OPA121
29
3
Right Leg
NE2H
–VS1 4
20pF
PWS
1
–VS1
726A
4
14
16
1
20µH
0.3
NOTE: (1) All capacitor values in µF unless otherwise
noted. Diodes are IN4148. (2) NE2H: Neon bulb, max
striking voltage 95VAC.
FIGURE 9. Right-Leg Driven ECG Amplifier (with defibrillator protection and calibration).
ISO120/121
12
+VS2
10kΩ
23
3
+V
5kΩ
15
V=
e1 =12V
10kΩ
11
ISO
21 120
22
e2 =12V
10
2
9, 12
4
16
–V
Multiplexer
24
e1
Charge/Discharge Control
Control
Section
+V –V
e49 =12V
23
21
e50 =12V
3
+V
7
11
ISO
120
10kΩ
4
5kΩ
15
25kΩ
10
25kΩ
5
2
9, 12
22
24
10kΩ
4
16
–V
25kΩ
6
INA105
3
1
V=
e50
2
25kΩ
FIGURE 10. Battery Monitor for a 600V Battery Power System.
3
1mA
1mA
10
8
5
RS
150Ω
+VS = 15V on PWS740
XTR101
0.01µF
6
4
R1
100Ω
11
7
RTD
(PT100)
7
RL
250Ω
3
250Ω
R2
2.5kΩ
3
5
INA105
1
2
4
6
23
11
21 ISO
120
22
10
VOUT
9
4
24
2mA
Sync
Gnd
–VS = –15V
NOTE: Some ISO120 connections left out for clarity.
on PWS740
FIGURE 11. Isolated 4-20mA Instrument Loop. (RTD shown).
13
ISO120/121
23
10
VOUT1
11
ISO
120
9
16
12
V–
15
V+
1
4
VOUT2
22
Ext Osc
24
3
+VS1
0.3µF
4
ISO
120
9
1
2
12
V–
15
V+
4
1
20kΩ
Gnd2
0.3µF
4
8
5
6
3
3
1
2
3
6
5
4
4
VIN2
20pF
20kΩ
PWS740-3
6
PWS740-2
6
21
22
Ext Osc
3
+VS2
24
–VS2
20pF
PWS740-3
3
V+
VIN1
11
16
–VS1
Gnd1
21
23
10
PWS740-2
4
Up to 6
more
channels
PWS740-1
6
3
5
20µH
10µF
0.3µF
0.3µF
FIGURE 12. Synchronized-Multichannel Isolation System.
ISO120/121
14
MECHANICALS
Package Number 225 — 24-Pin Single-Wide Hermatic Dip
A
24 23 22 21
DIM
A
B
C
D
F
G
H
J
K
L
N
16 15 14 13
B
Pin 1
2
3
4
9
10 11 12
F
C
INCHES
MIN
MAX
1.190 1.210
.280
.300
.140
.185
.016
.020
.030
.050
.100 BASIC
.035
.065
.009
.012
.125
.180
.300 BASIC
.040
.060
MILLIMETERS
MIN
MAX
30.23 30.73
7.11
7.62
3.56
4.70
0.41
0.51
0.76
1.27
2.54 BASIC
0.89
1.65
0.23
0.30
3.18
4.57
7.62 BASIC
1.02
1.52
NOTE: Leads in true
position within 0.01"
(0.25mm) R at MMC
at seating plane. Pin
numbers shown for
reference only.
Numbers may not be
marked on package.
J
N
H
G
D
K
L
Seating Plane
Package Number 206 — 40-Pin Double-Wide Hermetic DIP
A
40
21
1
20
F
DIM
A
C
D
F
G
H
J
K
L
M
N
INCHES
MIN
MAX
1.980 2.020
.115
.175
.015
.021
.035
.060
.100 BASIC
.030
.070
.008
.012
.120
.240
.600 BASIC
—
10°
.025
.060
MILLIMETERS
MIN
MAX
50.29 51.31
2.92
4.45
0.38
0.53
0.89
1.52
2.54 BASIC
0.76
1.78
0.20
0.30
3.05
6.10
15.24 BASIC
—
10°
0.64
1.52
NOTE: Leads in true
position within 0.01"
(0.25mm) R at MMC
at seating plane. Pin
numbers shown for
reference only.
Numbers may not be
marked on package.
N
C
K
H
D
G
Seating Plane
15
J
M
L
ISO120/121
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