CP3500AC52TE-FB Global Platform High Efficiency Rectifier

CP3500AC52TE-FB Global Platform High Efficiency Rectifier
GE
Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
RoHS Compliant
Features

Efficiency exceeding 96%1 (meets 80+ Titanium)

Compact 1RU form factor with 40 W/in3 density

3500W from nominal 200-240VAC

1500W from nominal 100 – 120VAC for VO > 52VDC

Output voltage programmable from 18V – 53VDC

ON/OFF control of the main output

Comprehensive input, output and overtemp. protection

PMBus compliant dual I2C serial bus and RS485

Precision measurement reporting such as input power
consumption, input/output voltage & current
Applications

Remote firmware upgrade capable


Power factor correction (meets EN/IEC 61000-3-2 and
Wide band power amplifiers
EN 60555-2 requirements)

Redundant, parallel operation with active load sharing

Redundant +5V @ 2A Aux power

Internally controlled Variable-speed fan

Hot insertion/removal (hot plug)

Four front panel LED indicators

RUL* Recognized to UL60950-1, CAN/ CSA† C22.2 No.
60950-1

CE mark meets 2006/95/EC directive§

Special Foldback Curve

Black faceplate
Description
The CP3500AC52TE-FB Rectifier has an extremely wide programmable output voltage capability and fold-back current limiting
features. High-density front-to-back airflow is designed for minimal space utilization and is highly expandable for future growth.
This custom rectifier incorporates both RS485 and dual-redundant I2C communications busses that allow it to be used in a broad
range of applications. Feature set flexibility makes this rectifier an excellent choice for a set of applications requiring operation
over a wide output voltage range.
* UL is a registered trademark of Underwriters Laboratories, Inc.
† CSA is a registered trademark of Canadian Standards Association.
‡ VDE is a trademark of Verband Deutscher Elektrotechniker e.V.
§ This product is intended for integration into end-user equipment. All CE marking procedures of end-user equipment should be followed.
** ISO is a registered trademark of the International Organization of Standards
+ The PMBus name and logo are registered trademarks of the System Management Interface Forum (SMIF)
1
At output voltages exceeding 52VDC
July 21, 2016
©2016 General Electric Company. All rights reserved.
GE
Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings
only, functional operation of the device is not implied at these or any other conditions in excess of those given in the operations
sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect the device reliability.
Parameter
Symbol
Min
Max
Unit
VIN
0
264
VAC
Operating Ambient Temperature
TA
-10
75
°C
Storage Temperature
Tstg
-40
85
°C
1500
VAC
Input Voltage: Continuous
2
I/O Isolation voltage to Frame (100% factory Hi-Pot tested)
Electrical Specifications
Unless otherwise indicated, specifications apply over all operating input voltage, Vo=52VDC, resistive load, and temperature
conditions.
INPUT
Parameter
Symbol
Startup Voltage
Low-line Operation
High-line Operation
Operating Voltage Range
Low-line Configuration
High-line Configuration
VIN
Voltage Swell (no damage)
Min
Typ
Max
80
85
90
185
90
185
100 – 120
200 - 240
140
265
80
85
VAC
275
Turn OFF Voltage
75
5
Hysteresis
Frequency
FIN
47
Source Impedance (NEC allows 2.5% of source voltage drop inside a
building)
Operating Current; at 110VAC
at 240VAC
Inrush Transient (220VRMS , 25°C, excluding X-Capacitor charging)
Idle Power (at 240VAC, 25C)
52V ON @ Io=0
Unit
52V OFF
Hz
0.2
Ω
IIN
15.5
16
AAC
IIN
25
PIN
9
18
Leakage Current (300VAC, 60Hz)
IIN
Power Factor (50 – 100% load)
PF
0.97
Efficiency3, 240VAC, 52VDC, @ 25C 10% of FL
20% of FL
50% of FL
FL

90
94
96
91
Holdup time (output allowed to decay down to 40VDC)
For loads below 1500W
T
Ride through (at 240VAC, 25C)
Power Good Warning4 (main output allowed to decay to 40VDC)
Isolation (per EN60950) (consult factory for testing to this requirement)
Input-Chassis/Signals
Input - Output
66
2.5
40
APK
W
3.5
mA
0.995
%
10
15
ms
T
1/2
1
cycle
PG
3
5
ms
V
1500
3000
VAC
VAC
2
See the derating guidelines under the Environmental Specifications section
3
Fan disabled, 5V output at 0 load.
4
Internal protection circuits may override the PG signal and may trigger an immediate shutdown. PG should not indicate normal (HI) until the
main output is within regulation. PG should be asserted if the main output is about to shut down for any detectible reason.
July 21, 2016
©2016 General Electric Company. All rights reserved.
Page 2
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Electrical Specifications (continued)
52VDC MAIN OUTPUT
Parameter
Output Power @ low line input 100 – 120VAC, VO > 52VDC
@ high line input 200 – 240VAC6, VO > 52VDC
5
Symbol
Min
W
1500
3500
VOUT
-1
-2
Typ
Max
WDC
Factory set default set point
52
Overall regulation (load, temperature, aging) 0 - 45C LOAD > 2.5A
> 45C
Output Voltage Set Range
18
Response to a voltage change command
Output Current - @ 1500W (100 – 120Vac), 53V/52V
@ 3500W (200 – 240VAC), 53V/52V
VO > 42VDC
VO < 42VDC
Output Ripple ( 20MHz bandwidth, load > 1A)
RMS (5Hz to 20MHz)
Peak-to-Peak (5Hz to 20MHz)
T
IOut
Current Share ( > 50% FL)
COUT
Turn-On (monotonic turn-ON from 30 – 100% of Vnom above 5C)
Delay
Rise Time – PMBus mode
Rise Time - RS-485 mode7
Output Overshoot
Load Step Response ( IO,START > 2.5A )
I8
V,
Response Time
Power limit , high line (down to 51VDC)
Low line
400
1
1
-5
-10
VDC
+1
+2
%
53
VDC
500
ms
28.3/28.9
66/67.3
5
10
VOUT
External Bulk Load Capacitance
0
VOUT
IOUT
VOUT
T
ADC
%FL
100
500
mVrms
mVp-p
5,000
F
2
s
ms
s
%
5
100
5
T
Unit
50
2.0
2
%FL
VDC
ms
POUT
3500
W
POUT
1500
W
The overload current limit threshold should be set  2% above the load envelope shown here9
Permissible
Load
Boundary
Contract terms are for supporting all loads inside the load map. The customer will develop a control
interface which maintains the operating voltage and current so as to not exceed the load map.
System power up
Upon insertion the rectifier will delay an overload shutdown for 20 seconds.
Output power capability is proportional to output voltage setting, see the permissible load boundary
Input line range: 90 – 264 VRMS (±10%)
7 Below -5°C, the rise time is approximately 5 minutes to protect the bulk capacitors. RS485 mode walk-in can be disabled.
8 di/dt (output current slew rate) 1A/µs.
9 Overload shutdown is delayed for 3 seconds to allow the equipment to reduce utilized power. Increase in fan speed is also delayed 500ms.
5
6
July 21, 2016
©2016 General Electric Company. All rights reserved.
Page 3
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Electrical Specifications (continued)
52VDC MAIN OUTPUT
Parameter
Symbol
Overvoltage - 200ms delayed shutdown
Immediate shutdown
Latched shutdown
Min
Typ
Max
Unit
< 60
VDC
> 65
Three restart attempts are implemented within a 1 minute window
prior to a latched shutdown.
VOUT
5
20
10
Over-temperature warning (prior to commencement of shutdown)
Shutdown (below the max device rating being protected)
Restart attempt Hysteresis (below shutdown level)
T
Isolation Output-Chassis (Standard, non-POE compliant)
Output-Chassis/Signals (POE compliant per IEEE802.3)
V
500
2250
Symbol
Min
C
VDC
VDC
5VDC Auxiliary output
Parameter
Output Voltage Setpoint
Overall Regulation
Output Current
Ripple and Noise (20mHz bandwidth)
Over-voltage Clamp
Over-current Limit
Typ
VOUT
Max
Unit
+3
2
100
7
175
VDC
%
A
mVp-p
VDC
%FL
5
-3
0.005
50
110
The 5VDC should be ON before availability of the 52VDC main output and should turn OFF only if insufficient input voltage exists to
provide reliable 5VDC power. The PG# signal should have indicated a warning that power would get turned OFF and the 52VDC main
output should be OFF way before interruption of the 5VDC output.
General Specifications
Parameter
Reliability
Service Life
Unpacked Weight
Packed Weight
Heat Dissipation
July 21, 2016
Min
Typ
450,000
Max
Units
Notes
Hours
Full load, 25C ; MTBF per SR232 Reliability protection for
electronic equipment, issue 2, method I, case III,
Full load, excluding fans
10
Years
2.18/4.8
Kgs/Lbs
2.45/5.4
Kgs/Lbs
190 Watts or 648 BTUs @ 80% load, 250 Watts or 853 BTUs @ 100% load
©2016 General Electric Company. All rights reserved.
Page 4
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Signal Specifications
Unless otherwise indicated, specifications apply over all operating input voltage, resistive load, and temperature conditions. Signals are referenced
to Logic_GRD unless noted otherwise. Fault, PG#, OTW, and Alert need to be pulled HI through external pull-up resistors.
Parameter
ON/OFF Main output OFF
52V output ON (should be connected to Logic_GRD)
Margining (through adjusting Vprog)
Voltage control range
Programmed output voltage range
Voltage adjustment resolution (8-bit A/D)
Output configured to 52VDC
Output configured to 18VDC
V ≤ 10VDC, settling time to new value
Interlock
Module Present
Symbol
Min
Typ
Max
Unit
VOUT
VOUT
0.7VDD
0


5
0.5
VDC
VDC
53
3.3
53
VDC
VDC
VDC
mVDC
VDC
VDC
ms
Vcontrol
VOUT
Vcontrol
Vcontrol
Vcontrol
T
18
0
18
3.3
3.0
3. 3
0
0.1
250
350

[short pin shorted to VOUT( - ) on system side]
[short pin to Logic_GRD internally]
Over Temperature Warning (OTW#) Logic HI (temperature normal)
Sink current [note: open collector output FET]
Logic LO (temperature is too high)
V
I
V
0.7VDD
Power Good (PG) Logic HI (temperature normal)
Sink current [note: open collector output FET]
Logic LO (temperature is too high)
Protocol select Logic HI - Analog/PMBus™ mode
Logic – intermediate – RS485 mode
Logic LO – DSP reprogram mode
Fault# Logic HI (No fault is present)
Sink current
Logic LO (Fault is present)
V
I
V
0.7VDD
VIH
VII
VIL
V
I
V

0

0
2.7
1.0
0
0.7VDD

0
Alert# (Alert#_0, Alert#_1) Logic HI (No Alert - normal)
Sink current [note: open collector output FET]
Logic LO (Alert# is set)
V
I
V
0.7VDD
SCL, SDA (SCL_0/1, SDA_0/1) Logic HI
Sink current [note: open collector output FET]
Logic LO (Alert# is set)
V
I
V
0.7VDD
July 21, 2016

0

0
©2016 General Electric Company. All rights reserved.



12
5
0.4
VDC
mA
VDC



VDC
mA
VDC




12
5
0.4
3.5
2.65
0.4
12
5
0.4



12
5
0.4
VDC
mA
VDC



12
5
0.4
VDC
mA
VDC

VDC
VDC
VDC
VDC
mA
VDC
Page 5
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Digital Interface Specifications
Parameter
Conditions
Symbol
Min
V
V
I
V
I
1.5
0
0
3.5
VOUT=3.6V
I
Slave Mode
FPMB
Typ
Max
Unit
3.6
0.8
10
0.4
VDC
VDC
μA
VDC
mA
0
10
μA
10
400
kHz
Iout(acc)
0
-1
5
-2
25
80
+1
5
+2
ms
ADC
% of FL
%
% of FL
Vout(rng)
Vout(acc)
0
-1
70
+1
VDC
%
PMBus Signal Interface Characteristics10
Input Logic High Voltage (CLK, DATA)
Input Logic Low Voltage (CLK, DATA)
Input high sourced current (CLK, DATA)
Output Low sink Voltage (CLK, DATA, ALERT#)
Output Low sink current (CLK, DATA, ALERT#)
Output High open drain leakage current (CLK,DATA,
ALERT#)
PMBus Operating frequency range
Measurement System Characteristics
IOUT=3.5mA
Clock stretching
IOUT measurement range
Tstretch
Irng
> 12.8A
< 12.8A
> 12.8A
IOUT measurement accuracy 25°C
IOUT measurement accuracy 0 - 40°C11
VOUT measurement range
VOUT measurement accuracy12
Iout(acc)
Temp measurement range
Temp(rng)
0
150
C
Temp measurement accuracy13
Temp(acc)
-4
+4
Vin(rng)
320
+1.25
2
30
C
VAC
Iin(rng)
0
-1.25
-2
0
Iin(acc)
-4
+4
% of FL
-2.5
-400
0
2.5
400
4000
+5
50
+1.5
+2.0
20
%
mA
Win
%
W
%
%
W
30k
10
100
RPM
%
%
VIN measurement range
VIN > 120VAC
VIN < 120VAC
VIN measurement accuracy @ 25°C
IIN measurement range
IIN measurement accuracy standard measurement @ 25°C
> 1A
≤ 1A
IIN measurement accuracy improved measurement @ 25°C
PIN measurement range
Vin(acc)
Iin(acc)
Pin(rng)
> 350W
< 350W
> 500W
100 – 500W
< 100W
PIN measurement accuracy –
standard measurement @ 25°C
PIN measurement accuracy –
improved measurement @ 25°C
Pin(acc)
Pin(acc)
Fan Speed measurement range
Fan Speed measurement accuracy
Fan speed control range
Clock, Data, and Alert# need to be pulled up to VDD externally.
11
Below 20% of FL; 10 – 20% of FL: ±0.64A; 5 – 10% of FL: ±0.45A; 2.5 – 5% of FL: ±0.32A.
13
35
-1.5
-2.0
-20
0
-10
0
10
12
-5
1
1.5
15
%
IAC
Above 2.5A of load current
Within 30 of the default warning and fault levels.
July 21, 2016
©2016 General Electric Company. All rights reserved.
Page 6
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Environmental Specifications
Parameter
Ambient Temperature
Min
Typ
-4014
Exhaust Air Temperature
Storage Temperature
-40
Max
Units
55
°C
Air inlet from sea level to 5,000 meters
15
°C
Maximum allowed internal temperature rise
85
°C
Operating Altitude
5000/16400
m / ft
Non-operating Altitude
8200/26900
m / ft
4
%/305m
2.0
%/°C
Power Derating with Altitude
Power Derating with Temperature
Acoustic noise
55
Over Temperature Protection
Humidity
Operating
Storage
dbA
125/110
5
5
Shock and Vibration acceleration
°C
95
95
%
%
2.4
Grms
Notes
Above 5000m de-rate 4% per 305m (1000 ft)
55°C to 75C
Full load
Shutdown / restart [internally measured
points]
Relative humidity, non-condensing
IPC-9592B, Class II
EMC
Parameter
AC input
Measurement
Standard
Level
Conducted emissions
EN55022, FCC Docket 20780 part 15, subpart J
EN61000-3-2
Meets Telcordia GR1089-CORE by a 3dB margin
A +6dB
0.15 – 30MHz
0 – 2 KHz
Radiated emissions
EN55022
A +6dB
30 – 10000MHz
15
Parameter
Measurement
Line sags and
interruptions
EN61000-4-11
Output will stay above 40VDC @ 75% load
AC Input
Immunity
Sag must be higher than 80Vrms.
Lightning surge
Enclosure
immunity
Standard
EN61000-4-5, Level 4, 1.2/50µs – error free
Test
Criteria16
Test
B
-30%, 10ms
B
-60%, 100ms
B
-100%, 5sec
A
25% line sag for 2 seconds
1 cycle interruption
A
4kV, common mode
A
2kV, differential mode
ANSI C62.41 - level A3
B
6kV, common & differential
Fast transients
EN61000-4-4, Level 3
B
5/50ns, 2kV (common mode)
Conducted RF fields
EN61000-4-6, Level 3
A
130dBµV, 0.15-80MHz, 80% AM
Radiated RF fields
EN61000-4-3, Level 3
A
10V/m, 80-1000MHz, 80% AM
ENV 50140
A
EN61000-4-2, Level 4
B
ESD
8kV contact, 15kV air
14
Designed to start and work at an ambient as low as -40°C, but may not meet operational limits until above -5°C
15
Emissions requirements can be verified using either the J2007001 or J85480 GE shelf. Standalone the additional margin is not required.
16
Criteria A: The product must maintain performance within specification limits. Criteria B: Temporary degradation which is self recoverable.
Criteria C: Temporary degradation which requires operator intervention.
July 21, 2016
©2016 General Electric Company. All rights reserved.
Page 7
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Characteristic Curves
Power Factor
EFFICIENCY,  (%) @ 52Vdc
The following figures provide typical characteristics for the CP3500AC52TE rectifier and 25oC.
230VIN @ 25C
110VIN @ 25C
OUTPUT CURRENT, IO (A)
OUTPUT CURRENT, IO (A)
Figure 2. Power Factor versus Output Current
OUTPUT VOLTAGE
OUTPUT VOLTAGE
Figure 1. Rectifier Efficiency versus Output Current.
Time (200ms/div)
Time (200ms/div)
TIME, t (10ms /div)
VO (V) (20mV/div)
Figure 4. Main output: Output changed from 18V to 52V;
commanded via I2C.
OUTPUT VOLTAGE
VO (V) (200mV/div)
OUTPUT VOLTAGE
Figure 3. Main output: Output changed from 52V to 18V;
commanded via I2C.
TIME, t (10ms/div)
Figure 5. 52VDC output ripple and noise, full load,
VIN = 185VAC, 20MHz bandwidth
July 21, 2016
240VIN, 52VDC, @ 25C
Figure 6. 5VDC output ripple and noise, all full load,
VIN = 185VAC, 20MHz bandwidth
©2016 General Electric Company. All rights reserved.
Page 8
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Characteristic Curves (continued)
VOUT - Red
VO(500mV/div)
IOUT - Green
IO (V) (50A/div)
VOUT - Red
VO(500mV/div)
IOUT - Green
IO (V) (50A/div)
The following figures provide typical characteristics for the CP3500AC52TE rectifier and 25oC.
TIME, t (2ms/div)
Time, t (50ms/div)
VO (V) (10V/div)
on/off (1V/div)
VO (10V/div)
Figure 8. Transient response 52VDC load step 10 – 60%,
Slew rate: 1A/µs, VIN = 230VAC .
OUTPUT VOLTAGE
ON/OFF - Green
52V OUT – Red
Figure 7. Transient response 52VDC load step 10 – 60%,
Slew rate: 1A/µs, VIN = 230VAC
TIME, t (200ms/div)
TIME, t (2s/div)
VO(V) (10V/div)
OUUTPUT - Green
PG - Red
VO(V) (10V/div)
VIN (V) (100V/div)
Figure 10. 52VDC soft start, full load, VIN = 230VAC RS485 mode with 4700µf external capacitance.
VPG (V) (5V/div)
OUUTPUT VOLTAGE
INPUT VOLTAGE
Figure 9. 52VDC soft start delay when ON/OFF is asserted,
VIN=230VAC - I2C mode.
TIME, t (10ms/div)
TIME, t (5ms/div)
Figure 11. Ride through missing ½ cycle, full load,
VIN = 230VAC.
July 21, 2016
Figure 12. PG# alarmed 10ms prior to Vo < 40V,
VIN = 230VAC, Output at Full load
©2016 General Electric Company. All rights reserved.
Page 9
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Characteristic Curves (continued)
5VOUT - Blue
5VO (1V/div)
54VO(10V/div)
5VO (1V/div)
52VO(10V/div)
54VOUT - Yellow
5VOUT - Green
52VOUT - Yellow
The following figures provide typical characteristics for the CP3500AC52TE rectifier and 25oC.
Power Good#
TIME, t (20ms/div)
TIME, t (1s/div)
Figure 13. 40ms AC dropout @ full load, VIN = 230VAC.
Figure 14. Turn-ON at full load VIN = 230VAC.
ON/OFF - Green
on/off (1V/div)
54V OUT – Red
VO (10V/div)
5VOUT - Blue
54VOUT - Yellow
54VO(10V/div)
5VO (1V/div)
Power Good#
TIME, t (500ms/div)
TIME, t (200ms/div)
Figure 16. 52VDC turn-OFF delay when ON/OFF is diasserted, VIN=230VAC - I2C mode.
OUTPUT POWER
Red: Output Voltage
Yellow: I2C communications capture
Figure 15. Turn-OFF at full load, VIN=230VAC
Time (100ms/div
Figure 17: Time delay from sending the
executing the output voltage change.
July 21, 2016
I2C
INPUT VOLTAGE
command and
Figure 18. Output power derating below VIN of 185VAC
©2016 General Electric Company. All rights reserved.
Page 10
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Timing diagrams
Response to input fluctuations
T1 – ride through time – 0.5 to 1 cycles [ 10 – 20ms] VOUT remains within regulation – load dependent
T2 – hold up time - 15ms – VOUT stays above 40VDC
T3 – delay time – 10s – from when the AC returns within regulation to when the output starts rising in I2C mode
T4 – rise time - 120ms – the time it takes for VOUT to rise from 10% to 90% of regulation in I2C mode
T5 – power good warning – 3ms – the time between assertion of the PG signal and the output decaying below 40VDC.
T6 – hold up time of the 5VAUX output @ full load – 1s – from the time AC input failed
T7 – rise time of the 5VAUX output - 3.65ms – 5VAUX is available at least 450ms before the main output is within regulation
Blinking of the input/AC LED – VIN < 80VAC (the low transitioned signal represents blinking of the input LED.
July 21, 2016
©2016 General Electric Company. All rights reserved.
Page 11
GE
Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Control and Status
When the unit is in latched shutdown the output LED is OFF.
The Rectifier provides three means for monitor/control:
analog, PMBus™, or the GE Galaxy-based RS485 protocol.
The rectifier will delay overcurrent shutdown for 3 seconds
to allow the user equipment to shed load. Voltages below
5Vdc are considered a deep overload/short circuit that will
cause an immediate shutdown.
Details of analog control and the PMBus™ based protocol
are provided in this data sheet. GE will provide separate
application notes on the Galaxy RS485 based protocol for
users to interface to the rectifier. Contact your local GE
representative for details.
Control hierarchy: Some features, such as output voltage,
can be controlled both through hardware and firmware. For
example, the output voltage is controlled both by a signal
pin (Vprog) and firmware (Vout_command; 0x21).
Using output voltage as an example, the Vprog signal pin
voltage level sets the output voltage if its value is
< 3VDC. (see the Vprog section). When the programming
signal Vprog is either a no connect or > 3VDC, the output
voltage is set at the default value of 52VDC.
The signal pin controls the feature it is configuring until a
firmware command is executed. However, once the
firmware command has been executed, the signal pin is
ignored. In the above example, the rectifier will no longer
‘listen’ to the Vprog pin if the Vout_command has been
executed.
In summary, signals such as Vprog are utilized for setting
the initial default value and for varying the value until
firmware based control takes over. Once firmware control is
executed, hardware based control is relinquished so the
processor can clearly decide who has control.
Auto restart: Auto-restart is the default configuration for
over-current and over-temperature shutdowns. These
features are configured by the PMBus™ fault_response
commands
An overvoltage shutdown is followed by three attempted
restarts, each restart delayed 1 second, within a 1 minute
window. If within the 1 minute window three attempted
restarts failed, the unit will latch OFF. If within the 1 minute
less than 3 shutdowns occurred then the count for latch OFF
resets and the 1 minute window starts all over again.
Restart after a latchoff: PMBus™ fault_response
commands can be configured to direct the rectifier to
remain latched off for over_temperature and over_current.
To restart after a latch off either of five restart mechanisms
are available.
1. The hardware pin ON/OFF may be cycled OFF and
then ON.
2. The unit may be commanded to restart via i2c
through the Operation command by cycling the
output OFF followed by ON.
3. Remove and reinsert the unit.
4. Turn OFF and then turn ON AC power to the unit.
5. Changing firmware from latch off to restart.
Each of these commands must keep the rectifier in the OFF
state for at least 2 seconds, with the exception of changing
to restart.
Analog controls: Details of analog controls are provided in
this data sheet under Feature Specifications.
A successful restart shall clear all alarm registers, set the
restarted successful bit of the Status_2 register.
Signal Reference: Unless otherwise noted, all signals are
referenced to Logic_GRD. See the Signal Definitions Table at
the end of this document for further description of all the
signals.
A power system that is comprised of a number of rectifiers
could have difficulty restarting after a shutdown event
because of the non-synchronized behavior of the individual
rectifiers. Implementing the latch-off mechanism permits a
synchronized restart that guarantees the simultaneous
restart of the entire system.
Logic_GRD is isolated from the main output of the rectifier
for PMBus communications. Communications and the 5V
standby output are not connected to main power return
(Vout(-)) and can be tied to the system digital ground point
selected by the user. (Note that RS485 communications is
referenced to Vout(-), main power return of the rectifier).
Logic_GRD is capacitively coupled to Frame_GRD inside the
rectifier. The maximum voltage differential between
Logic_GRD and Frame_GRD should be less than 100VDC.
Delayed overcurrent shutdown during startup: Rectifiers
are programmed to stay in a constant current state for up
to 20 seconds during power up. This delay has been
introduced to permit the orderly application of input power
to a subset of paralleled front-ends during power up. If the
overload persists beyond the 20 second delay, the front-end
will revert back into its programmed state of overload
protection.
Unit in Power Limit or in Current Limit: When output
voltage is > 10VDC the Output LED will continue blinking.
When output voltage is < 10VDC, if the unit is in the RESTART
mode, it goes into hiccup. When the unit is ON the output
LED is ON, when the unit is OFF the output LED is OFF.
July 21, 2016
A synchronous restart can be implemented by;
1. Issuing a GLOBAL OFF and then ON command to all
rectifiers,
2. Toggling Off and then ON the ON/OFF (ENABLE) signal
3. Removing and reapplying input commercial power to the
entire system.
The rectifiers should be turned OFF for at least 20 – 30
seconds in order to discharge all internal bias supplies and
reset the soft start circuitry of the individual rectifiers.
Control Signals
Protocol: This signal pin defines the communications mode
setting of the rectifier. Two different states can be
configured. State #1 is the I2C application in which case the
protocol pin should be left a no-connect. State #2 is the
RS485 mode application in which case a resistor value
between 1kΩ and 5kΩ should be present between this pin
and Vout ( - ).
©2016 General Electric Company. All rights reserved.
Page 12
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Device address in I2C mode: Address bits A3, A2, A1, A0 set
the specific address of the µP in the rectifier. With these four
bits, up to sixteen (16) rectifiers can be independently
addressed on a single I²C bus. These four bits are configured
by two signal pins, Unit_ID and Rack_ID. The least
significant bit x (LSB) of the address byte is set to either
write [0] or read [1]. A write command instructs the rectifier.
A read command accesses information from the rectifier.
Device
Address
µP
Broadcast
40 – 4F
00
Address Bit Assignments
(Most to Least Significant)
7 6 5 4 3
2
1
0
1 0 0 A3 A2 A1 A0 R/W
0 0 0 0
0
0
0
0
MSB
LSB
Unit_ID: Up to 10 different units are selectable.
Rack_ID
1
2
3
4
5
6
7
8
Configuration of the A3 – A0 bits: The rectifier will
determine the configured address based on the Unit_ID and
Rack_ID voltage levels as follows (the order is A3 – A0):
3.3Vdc
10k
Unit_ID
Rs
Rack_ID
Logic_GRD
Voltage level
3.30
3.00
2.67
2.34
2.01
1.68
1.35
1.02
0.69
0.36
0
RS (± 0.1%)
100k
45.3k
24.9k
15.4k
10.5k
7.15k
4.99k
2.49k
1.27k
0
Rack_ID: Up to 8 different combinations are selectable.
A voltage divider between
5VDC and Logic_GRD
configures Rack_ID. The
10k-20kΩ divider sets the
initial voltage level to 3.3VDC.
A switch between each RS
value changes the Rack_ID
level according to the table
below.
July 21, 2016
RS (± 0.1%)
open
35.2k
15k
8k
4.99k
2.87k
1.27k
0
Inside power supply
A voltage divider between 3.3V
and Logic_GRD configures Unit_ID.
Internally a 10kΩ resistor is pulled
up to 3.3VDC. A pull down resistor
Rs needs to be connected between
pin Unit_ID and Logic_GRD.
Unit_ID
Invalid
1
2
3
4
5
6
7
8
9
10
Voltage level
3.3
2.8
2.3
1.8
1.4
1
0.5
0
Inside power supply
Unit_ID
3
1
2
4
5
1
0000
0001
0010
0011
2
0100
0101
0110
0111
3
1000
1001
1010
1011
4
1100
1101
1110
1111
6
0000
0001
0010
0011
0100
7
0101
0110
0111
1000
1001
8
1010
1011
1100
1101
1110
5
Unit x Rack: 4 x 4 and 5 x 3
Rack_ID
1
6
0000
7
0001
2
0010
0011
3
0100
0101
4
0110
0111
5
1000
1001
6
1010
7
1100
8
1110
Unit_ID
8
9
10
0000
0001
0010
0011
0100
0101
1011
0110
0111
1000
1101
1001
1010
1011
1111
1100
1101
1110
5Vdc
Unit x Rack: 2 x 8 and 3 x 5
10k
Rack_ID
Rs
20k
Logic_GRD
Address detection: The Slot_ID pin must be shorted to
Vout(-) in order to deliver output power. This connection
provides a second interlock feature. (In RS485 mode the
slot_ID resistance to Vout(-) is sufficient to sense the
interlock feature)
©2016 General Electric Company. All rights reserved.
Page 13
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Device address in RS485 mode: The address in RS485 mode
is divided into three components; Bay_ID, Slot_ID and
Shelf_ID
Bay_ID: The Unit_ID definition in I2C mode becomes the bay
id in RS485 mode.
interrupted, for example if input power or bias power is
recycled.
An analog voltage level varies the output voltage from 18 to
53Vdc. (See timing limits under signal specifications)
Slot_ID: Up to 10 different rectifiers could be positioned
across a 19” shelf if the rectifiers are located vertically within
the shelf. The resistor below needs to be placed between
Slot_ID and Vout ( - ). Internal pull-up to 3.3V is 10kΩ.
Slot
invalid
1
2
3
4
5
Resistor
none
100k
45.3k
24.9k
15.4k
10.5k
Voltage
3.3V
3V
2.67V
2.34V
2.01V
1.68V
Slot
6
7
8
9
10
Resistor
7.15k
4.99k
2.49k
1.27k
0
Voltage
1.35V
1.02V
0.69V
0.36V
0
Shelf_ID: When placed horizontally up to 10 shelves can be
stacked on top of each other in a fully configured rack. The
shelf will generate the precision voltage level tabulated
below referenced to Vout ( - ).
Shelf
VMIN
VNOM
VMAX
1
2
3
4
5
6
7
8
9
10
2.3
4.7
7.4
9.5
11.8
14.2
16.6
19
21.3
23.8
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0
2.7
5.3
7.6
10.5
13.2
15.8
18.4
21
23.6
26.3
Global Broadcast: Instruct all rectifiers to respond
simultaneously. The GLOBAL BROADCAST command should
only be executed as a write instruction. The rectifier should
issue an ‘invalid command’ if a global ‘read’ is attempted.
An output voltage change instruction should be executed in
≤ 60ms for a V of ≤ 10V.
A ‘system’ output voltage change for paralleled rectifiers
requires global broadcast. This command is also used to
control the main output of a system. Unfortunately, this
command is vulnerable to error. The ACK bit does not assure
that all rectifiers responded. To be certain that each rectifier
responded to the global instruction, a READ instruction
should be executed to each rectifier to verify that the
command properly executed.
Voltage programming (Vprog): Hardware voltage
programming controls the output voltage until a software
command to change the output voltage is executed. Once a
software voltage programming command is executed, the
software voltage instruction permanently overrides the
hardware margin setting. The rectifier no longer listens to
the hardware margin setting until power to the controller is
July 21, 2016
Factory default setting driven by Vprog
The Vprog pin voltage level, which is referenced to Logic_GRD,
is configured by the user as shown in the graph above. It
must be set in order for the rectifier to know what its swtting
should be.
Programming of the Vprog signal level can be accomplished
either by a resistor divider or by a voltage source injecting a
precision voltage level into the Vprog pin. Above 3Vdc the
rectifier sets the output to its default state. Connecting the
Vprog pin to Logic_GRD provides an indication to the rectifier
that the output voltage is controlled by software commands.
See the accompanying implementation of hot plug for
further information on hot-plug performance.
When bias power powering the controller is recycled, the
controller restarts into its default configuration,
programmed to set the output as instructed by the Vprog pin.
Again, subsequent software commanded instructions
permanently override the margin setting.
If the output voltage of the rectifier is software controlled,
the Vprog voltage level should be set to a safety level that
rectifiers inserted into a live bus (hot plug) should be
powered into, until subsequent software instructions tell the
rectifiers on the bus the desired output voltage setting. One
such voltage level setting is 18Vdc, the lowest possible
margined voltage. The hot plugged rectifier will sit at 18Vdc
until it is commanded by the controller to another setting.
Load share (Ishare): This is a single wire analog signal that
is generated and acted upon automatically by rectifiers
connected in parallel. Ishare pins should be connected to
each other for rectifiers, if active current share among the
rectifiers is desired. No resistors or capacitors should get
connected to this pin.
ON/OFF: Controls the main 52VDC output when either
analog control or PMBus protocols are selected, as
configured by the Protocol pin. This pin must be pulled low
to turn ON the rectifier. The rectifier will turn OFF if either the
©2016 General Electric Company. All rights reserved.
Page 14
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
ON/OFF or the Interlock pin is released. This signal is
referenced to Logic_GRD. Note that in RS485 mode this pin
is ignored.
Interlock: This is a shorter pin utilized for hot-plug
applications to ensure that the rectifier turns OFF before the
power pins are disengaged. It also ensures that the rectifier
turns ON only after the power pins have been engaged.
Must be connected to V_OUT ( - ) for the rectifier to be ON.
Module Present: This signal is tied to Logic_GRD inside the
rectifier. It’s intent is to provide a signal to the system that a
rectifier is physically present in the slot.
8V_INT: Single wire connection between rectifiers, Provides
bias to the DSP of an unpowered rectifier.
Power Good Warning (PG#): This signal is HI when the
main output is being delivered and goes LO if the main
output is about to decay below regulation. Note that should
a catastrophic failure occur, the signal may not be fast
enough to provide a meaningful warning. PG# also pulses
at a 1ms duty cycle if the unit is in overload.
Fault#: A TTL compatible status signal representing
whether a Fault occurred. This signal needs to be pulled HI
externally through a resistor. This signal goes LO for any
failure that requires rectifier replacement. These faults may
be due to:
Fan failure
Over-temperature shutdown
Internal Rectifier Fault
Over temp warning (OTW#): A TTL compatible status signal
representing whether an over temperature exists. This signal
needs to be pulled HI externally through a resistor.
If an over temperature should occur, this signal would pull
LO for approximately 10 seconds prior to shutting down the
rectifier. In its default configuration, the unit would restart if
internal temperatures recover within normal operational
levels. At that time the signal reverts back to its open
collector (HI) state.
Power_CAP: This signal is HI when the main output is 3000w
and goes LO when the main output is 1400w.
PMBus™ compliance: The rectifier is fully compliant to the
Power Management Bus (PMBus™) rev1.2 requirements. This
Specification can be obtained from www.pmbus.org.
‘Manufacturer Specific’ commands are used to support
additional instructions that are not in the PMBus™
specification.
All communication over the PMBus interface must support
the Packet Error Checking (PEC) scheme. The PMBus master
must generate the correct PEC byte for all transactions, and
check the PEC byte returned by the rectifier.
Non-volatile memory is used to store configuration settings.
Not all settings programmed into the device are
automatically saved into this non-volatile memory. Only
those specifically identified as capable of being stored can
be saved. (see the Table of Commands for which command
parameters can be saved to non-volatile storage).
Non-supported commands: Non supported commands are
flagged by setting the appropriate STATUS bit and issuing an
Alert# to the ‘host’ controller.
If a non-supported read is requested the rectifier will return
0x00h for data.
Data out-of-range: The rectifier validates data settings and
sets the data out-of-range bit and Alert# if the data is not
within acceptable range.
Serial Bus Communications
The I²C interface facilitates the monitoring and control of
various operating parameters within the unit and transmits
these on demand over an industry standard I²C Serial bus.
July 21, 2016
Serial Data (SDA): This line is a bi-directional data line. This
signal needs to be pulled HI externally through a resistor as
necessary to ensure that rise and fall time timing and the
maximum sink current is in compliance to the I²C /SMBus
specifications.
The Alert# response protocol (ARA) whereby the PMBus
Master can inquire who activated the Alert# signal is also
supported. This feature is described in more detail later on.
Over-voltage shutdown
All signals are referenced to ‘Logic_GRD’.
Serial Clock (SCL): The clock pulses on this line are
generated by the host that initiates communications across
the I²C Serial bus. This signal needs to be pulled HI externally
through a resistor as necessary to ensure that rise and fall
time timing and the maximum sink current is in compliance
to the I²C /SMBus specifications.
Digital Feature Descriptions
Status Signals




Pull-up resistors: The clock, data, and Alert# lines do not
have any internal pull-up resistors inside the rectifier. The
customer is responsible for ensuring that the transmission
impedance of the communications lines complies with I2C
and SMBus standards.
Master/Slave: The ‘host controller’ is always the MASTER.
Rectifiers are always SLAVES. SLAVES cannot initiate
communications or toggle the Clock. SLAVES also must
respond expeditiously at the command of the MASTER as
required by the clock pulses generated by the MASTER.
©2016 General Electric Company. All rights reserved.
Page 15
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Clock stretching: The ‘slave’ µController inside the rectifier
may initiate clock stretching if it is busy and it desires to
delay the initiation of any further communications. During
the clock stretch the ‘slave’ may keep the clock LO until it is
ready to receive further instructions from the host controller.
The maximum clock stretch interval is 25ms.
The host controller needs to recognize this clock stretching,
and refrain from issuing the next clock signal, until the clock
line is released, or it needs to delay the next clock pulse
beyond the clock stretch interval of the rectifier. Note that
clock stretching can only be performed after completion of
transmission of the 9th ACK bit, the exception being the
START command.
will be latched LO until the rectifier receives a ‘clear_faults’
instruction.
The signal will be triggered for any state change, including
the following conditions;










VIN under or over voltage
Vout under or over voltage
IOUT over current
Over Temperature warning or fault
Fan Failure
Communication error
PEC error
Invalid command
Internal faults
Both Alert#_0 and -1 are asserted during power up to
notify the master that a new rectifier has been added
to the bus.
The rectifier will clear the Alert# signal (release the signal to
its HI state) upon the following events:
Clock
Stretch
Figure 15. Example waveforms showing clock stretching.
I²C Bus Lock-Up detection: The device will abort any
transaction and drop off the bus if it detects the bus being
held low for more than 35ms.
Communications speed: Both 100kHz and 400kHz clock
rates are supported. The rectifiers default to the 100kHz
clock rate.
Packet Error Checking (PEC): The rectifier will not respond
to commands without the trailing PEC. The integrity of
communications is compromised if packet error correction
is not employed. There are many functional features,
including turning OFF the main output, that require
validation to ensure that the desired command is executed.
PEC is a CRC-8 error-checking byte, based on the polynomial
C(x) = x8 + x2 + x + 1, in compliance with PMBus™
requirements. The calculation is based in all message bytes,
including the originating write address and command bytes
preceding read instructions. The PEC is appended to the
message by the device that supplied the last byte.
Alert#: The rectifier can issue Alert# driven from either its
internal micro controller (µC) or from the I2C bus master
selector stage. That is, the Alert# signal of the internal µC
funnels through the master selector stage that buffers the
Alert# signal and splits the signal to the two Alert# signal
pins exiting the rectifier. In addition, the master selector
stage signals its own Alert# request to either of the two
Alert# signals when required.
The µC driven Alert# signal informs the ‘master/host’
controller that either a STATE or ALARM change has
occurred. Normally this signal is HI. The signal will change to
its LO level if the rectifier has changed states and the signal
July 21, 2016

Receiving a CLEAR_FAULTS command

Bias power to the processor is recycled
The rectifier will re-assert the Alert line if the internal state of
the rectifier has changed, even if that information cannot be
reported by the status registers until a clear_faults is issued
by the host. If the Alert asserts, the host should respond by
issuing a clear_faults to retire the alert line (this action also
provides the ability to change the status registers). This
action triggers another Alert assertion because the status
registers changed states to report the latest state of the
rectifier. The host is now able to read the latest reported
status register information and issue a clear_faults to retire
the Alert signal.
Re-initialization: The I2C code is programmed to re-initialize
if no activity is detected on the bus for 5 seconds. Reinitialization is designed to guarantee that the I2C
µController does not hang up the bus. Although this rate is
longer than the timing requirements specified in the SMBus
specification, it had to be extended in order to ensure that a
re-initialization would not occur under normal transmission
rates. During the few µseconds required to accomplish reinitialization the I2C µController may not recognize a
command sent to it. (i.e. a start condition).
Read back delay: The rectifier issues the Alert# notification
as soon as the first state change occurred. During an event
a number of different states can be transitioned to before
the final event occurs. If a read back is implemented rapidly
by the host a successive Alert# could be triggered by the
transitioning state of the rectifier. In order to avoid
successive Alert# s and read back and also to avoid reading
a transitioning state, it is prudent to wait more than 2
seconds after the receipt of an Alert# before executing a
read back. This delay will ensure that only the final state of
the rectifier is captured.
Successive read backs: Successive read backs to the
rectifier should not be attempted at intervals faster than
every one second. This time interval is sufficient for the
©2016 General Electric Company. All rights reserved.
Page 16
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Master to Slave
Slave to Master
SMBUS annotations; S – Start , Wr – Write, Sr – re-Start, Rd –
Read,
A – Acknowledge, NA – not-acknowledged, P – Stop
internal processors to update their data base so that
successive reads provide fresh data.
Dual, redundant buses: Two independent I2C lines provide
true communications bus redundancy and allow two
independent controllers to sequentially control the rectifier.
For example, a short or an open connection in one of the I2C
lines does not affect communications capability on the
other I2C line. Failure of a ‘master’ controller does not affect
the rectifiers and the second ‘master’ can take over control
at any time.
Conceptually a Digital Signal Processor (DSP) referenced to
Vout(-) of the rectifier provides secondary control. A
Bidirectional Isolator provides the required isolation
between power GRD, Vout(-) and signal GRD (Logic_GRD). A
secondary micro controller provides instructions to and
receives operational data from the DSP. The secondary
micro controller also controls the communications over two
independent I2C lines to two independent system
controllers.
I2C_0
DSP
Bidirectional
Isolator
µC
Standard READ: Up to two bytes of data may follow a READ
request depending on the required data content. Analog
data is always transmitted as LSB followed by MSB. PEC is
mandatory and includes the address and data fields.
1
S
7
Slave address
1
Sr
1
Wr
7
Slave Address
8
MSB
IC 1
The secondary micro controller is designed to default to
I2C_0 when powered up. If only a single system controller is
utilized, it should be connected to I2C_0. In this case the
I2C_1 line is totally transparent as if it does not exist.
If two independent system controllers are utilized, then one
of them should be connected to I2C_0 and the other to
I2C_1.
At power up the master connected to I2C_0 has control of
the bus. See the section on Dual Master Control for further
description of this feature.
Conceptual representation of the dual I2C bus system.
PMBusTM Commands
Standard instruction: Up to two bytes of data may follow
an instruction depending on the required data content.
Analog data is always transmitted as LSB followed by MSB.
PEC is mandatory and includes the address and data fields.
8
Low data byte
July 21, 2016
Wr
1
A
8
Command Code
8
High data byte
1
A
8
LSB
8
PEC
1
A
1
A
1
NA
1
P
Block communications: When writing or reading more than
two bytes of data at a time BLOCK instructions for WRITE
and READ commands are used instead of the Standard
Instructions above to write or read any number of bytes
greater than two.
1
S
7
Slave address
8
Byte count = N
8
……….
1
Wr
1
A
1
A
8
PEC
1
A
1
P
1
A
8
Data 1
1
A
8
Command Code
1
A
8
Data N
8
Data 2
1
A
8
PEC
1
A
1
A
1
A
1
P
8
Command Code
1
A
Block read format:
1
S
7
Slave address
1
Sr
1
Wr
7
Slave Address
8
……….
1
A
1
A
1
Rd
1
A
8
Byte count = N
8
Slave address
8
Command Code
Block write format:
2
1
S
1
A
1
A
1
A
1
A
1
Rd
1
A
8
Data 1
1
A
8
Data N
1
A
8
Data 2
1
A
8
PEC
1
NA
1
P
Linear Data Format: The definition is identical to Part II of
the PMBus Specification. All standard PMBus values, with
the exception of output voltage related functions, are
represented by the linear format described below. Output
voltage functions are represented by a 16 bit mantissa.
Output voltage has a E=9 constant exponent.
The Linear Data Format is a two byte value with an 11-bit,
two’s complement mantissa and a 5-bit, two’s complement
exponent or scaling factor, its format is shown below.
Bit 7
Data Byte High
6 5 4 3 2 1
Exponent (E)
0
7
Data Byte Low
6 5 4 3 2
Mantissa (M)
1
The relationship between the Mantissa, Exponent, and
Actual Value (V) is given by the following equation:
V  M  2E
©2016 General Electric Company. All rights reserved.
Page 17
0
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Where: V is the value, M is the 11-bit, two’s complement
mantissa, E is the 5-bit, two’s complement exponent
Standard features
Supported features that are not readable: The commands
below are supported at the described setting but they cannot be
read back through the command set.
Command
ON_OFF_CONFIG (0x02)
Capability (0x19)
PMBus revision (0x98)
Comments
Both the CNTL pin, and the
OPERATION command, enabling or
disabling the output, are supported.
Other options are not supported.
400KHz, ALERT#
1.2
Hex
Code
Data
Field
Memory
Storage/
Default
Iout_OC_fault_response18
Iout_OC_LV_fault_limit
Iout_OC_warn_limit
OT_fault_limit
OT_fault_response19
OT_warn_limit
Vin_OV_fault_limit
Vin_OV_fault_response
Vin_OV_warn_limit
Vin_UV_warn_limit20
Vin_UV_fault_limit21
Vin_UV_fault_response
0x47
0x48
0x4A
0x4F
0x50
0x51
0x55
0x56
0x57
0x58
0x59
0x5A
1
2
2
2
1
2
2
1
2
2
2
1
Yes / F8
Yes/16
Yes / 67.3
Yes/110
Yes / C0
Yes/105
No/ 270
No/ C0
Yes / 265
Yes / 87.5
No / 80
No/ C0
Status_byte
Status_word (+ byte)
Status_Vout
Status_Iout
Status_Input
Status_temperature
Status_CML
Status_fans_1_2
Read_Vin
Read_Iin
Read_Vout
Read_Iout
Read_temp_PFC
Read_temp_dc_pri
Read_temp_dc_sec
Read_fan_speed_1
Read_fan_speed_2
Read_Pin
Mfr_ID
Mfr_model
Mfr_revision
Mfr_serial
0x78
0x79
0x7A
0x7B
0x7C
0x7D
0x7E
0x81
0x88
0x89
0x8B
0x8C
0x8D
0x8E
0x8F
0x90
0x91
0x97
0x99
0x9A
0x9B
0x9E
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
6
16
8
16
Status_summary
Status_unit
Status_alarm
Read_fan_speed
Read_input
Read_firmware_rev
Read_run_timer
Status_bus
Take_over_bus_control
EEPROM Record
Read_temp_exhaust
Read_ temp_inlet
0xD0
0xD1
0xD2
0XD3
0xD4
0xD5
0xD6
0xD7
0xD8
0xD9
0xDA
0xDB
12
2
4
7
5
7
4
1
Command
Status and Alarm registers: The registers are updated with
the latest operational state of the rectifier. For example,
whether the output is ON or OFF is continuously updated
with the latest state of the rectifier. However, alarm
information is maintained until a clear_faults command is
received from the host. For example, the shutdown or
OC_fault bits stay in their alarmed state until the host clears
the registers.
A clear_faults clears all registers. If a fault still persists after
the clear_faults is commanded, the register bit
annunciating the fault is reset again.
PMBusTM Command set:
17
Command
Hex
Code
Data
Field
Operation
Clear_Faults
Write _Protect
Restore_default_all
Restore_user_all
Store_user_code
Restore_user_code
Vout_mode
Vout_command
Vin_ON
Vin_OFF
Fan_config_1_2
Fan_command_1
0x01
0x03
0x10
0x12
0x16
0x17
0x18
0x20
0x21
0x35
0x36
0x3A
0x3B
1
1
1
1
1
2
2
2
1
2
Vout_OV_fault_limit
Vout_OV_fault_response
Vout_OV_warn_limit
Vout_UV_warn_limit
Vout_UV_fault_limit
Vout_UV_fault_response
Iout_OC_fault_limit
0x40
0x41
0x42
0x43
0x44
0x45
0x46
2
1
2
2
2
1
2
Yes – indicates that the data can be changed by the user
July 21, 2016
Memory
Storage17 /
Default
Yes/80
Yes/00
yes
Yes/52
Yes /99
Yes / 55
No / 80
Yes / 54
Yes / 17
Yes /16
No / C0
Yes / 68
128
2
2
18
Only latched (0xC0) or hiccup (0xF8) are supported
19
Only latched (0x80) or restart (0xC0) are supported
20
Recovery set at 90V
21
Recovery set at 86V
©2016 General Electric Company. All rights reserved.
yes
yes
Page 18
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Hex
Code
Command
Reserved for factory use
Reserved for factory use
Reserved for factory use
Test_Function
Memory
Storage/
Default
Data
Field
0XDC
0XDD
0XDE
0xDF
Clear_faults (0x03): Clears all STATUS and FAULT registers
and resets the Alert# line of the I2C side in control. The I2C
side not in control cannot clear registers in the rectifier. This
command is always executable.
1
If a fault still persists after the issuance of the clear_faults
command, the specific registers indicating the fault first
clears but then get set again to indicate that the unit is still
in the fault state.
Upgrade commands
Password
Target_list
Compatibility_code
Software_version
Memory_capability
Application_status
Boot_loader
Data_transfer
Product comcode
0xE0
0xE1
0xE2
0xE3
0xE4
0xE5
0xE6
0xE7
0xE8
4
4
32
7
7
1
1
≤32
11
Upload_black_box
0xF0
≤32
WRITE_PROTECT register (0x10): Used to control writing to
the PMBus device. The intent of this command is to provide
protection against accidental changes. All supported
commands may have their parameters read, regardless of
the write_protect settings. The contents of this register
cannot be stored into non-volatile memory using the
Store_user_code command. The default setting of this
register is enable_all_writes, write_protect 0x00h. The
write_protect command must always be accepted.
Command set adjustment range
If a command is received for a value setting that is outside
the range defined below, the module should not change the
present setting. The module sets the invalid/unsupported
data bit of the status_cml (0x7E) register.
Hex
Code
Default
Command
HL (LL)
Low
High
Vout_command
Fan_command_1
Vout_OV_fault_limit
Vout_OV_warn_limit
Vout_UV_warn_limit
Vout_UV_fault_limit
Iout_OC_fault_limit
Iout_OC_LV_fault_limit
Iout_OC_warn_limit
OT_fault_limit
OT_warn_limit
Vin_OV_fault_limit
Vin_OV_warn_limit
Vin_UV_warn_limit
Vin_UV_fault_limit
0x21
0x3B
0x40
0x42
0x43
0x44
0x46
0x48
0x4A
0x4F
0x51
0x55
0x57
0x58
0x59
52
55
54
17
16
68 (30)
16
67.3(29.8)
110
105
270
265
87.5
80
17
0
16
16
16
16
0
16
0
0
0
90
90
80
70
54
100
55
55
55
55
68
55
67.3
150
150
300
295
295
295
Adjustment range
Command Descriptions
Operation (0x01) : Turns the 52V output ON or OFF. The
default state is ON at power up. Only the following data
bytes are supported:
FUNCTION
Unit ON
Unit OFF
DATA BYTE
0x80
0x00
To RESET the rectifier using this command, command the
rectifier OFF, wait at least 2 seconds, and then command
July 21, 2016
the rectifier back ON. All alarms and shutdowns are cleared
during a restart.
NCTION
Enable all writes
Disable all writes except write_protect
Disable all writes except write_protect and
OPERATION
DATA BYTE
00
80
40
Restore_Default_All (0x12): Restores all operating register
values and responses to the factory default parameters set
in the rectifier. The factory default cannot be changed.
Restore_default_code (0x14): Restore only a specific
register parameter into the operating register section of the
rectifier.
Store_user_code (0x17): Changes the user default setting of
a single register. In this fashion some protection is offered to
ensure that only those registers that are desired to be
changed are in fact changed.
Restore_user_code (0x18): Restores the user default setting
of a single register.
Vout_mode (0x20): This is a ‘read only’ register. The upper
three bits specify the supported data format, in this case
Linear mode. The lower five bits specify the exponent of the
data in two’s complement binary format for output voltage
related commands, such as Vout_command. These
commands have a 16 bit mantissa. The exponent is fixed by
the rectifier and is returned by this command
Mode
Linear
Bits [7:5]
000b
Bits [4:0] (Parameter)
xxxxxb
Vout_Command (0x21) : Used to dynamically change the
output voltage of the rectifier. This command can also be
used to change the factory programmed default set point of
©2016 General Electric Company. All rights reserved.
Page 19
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
the rectifier by executing a store-user instruction that
changes the user default firmware set point.
The default set point can be overridden by the Vprog signal
pin which is designed to override the firmware based default
setting during turn ON.
In parallel operation, changing the output voltage should be
performed simultaneously to all rectifiers using the Global
Address (Broadcast) feature. If only a single rectifier is
instructed to change its output, it may attempt to source all
the required power which can cause either a power limit or
shutdown condition.
Software programming of output voltage permanently
overrides the set point voltage configured by the Vprog
signal pin. The program no longer looks at the ‘Vprog pin’
and will not respond to any hardware voltage settings. If
power is removed from the µController it will reset itself into
its default configuration looking at the Vprog signal for
output voltage control. In many applications, the Vprog pin
is used for setting initial conditions, if different that the
factory setting. Software programming then takes over once
I2C communications are established.
To properly hot-plug a rectifier into a live backplane, the
system generated voltage should get re-configured into
either the factory adjusted firmware level or the voltage
level reconfigured by the Vprog pin. Otherwise, the voltage
state of the plugged in rectifier could be significantly
different than the powered system.
Programmed voltage range: 18VDC – 53VDC.
A voltage programming example: The task: set the output
voltage to 50.45VDC
This rectifier supports the linear mode of conversion
specified in the PMBus™ specification. The supported output
voltage exponent is documented in the Vout_mode (0x20)
command. The exponent for output voltage setting is 2-9
(see the PMBus™ specification for reading this command).
Calculate the required voltage setting to be sent; 50.45 x 29
= 25830. Convert this decimal number into its hex
equivalent: 64E6 and send it across the bus LSB first and
then MSB; E664 with the trailing PEC.
Vin_ON (0x35): This is a ‘read only’ register that informs the
controller at what input voltage level the rectifier turns ON.
The default value is tabulated in the data section. The value
is contingent on whether the rectifier operates in the
low_line or high_line mode.
Fan_command_1 (0x3B): This command instructs the
rectifier to increase the speed of both fans above what is
internally required. The transmitted data byte represents
the hex equivalent of duty cycle in percentage, i.e. 100% = 0
x 64h. The command can increase or decrease fan speed.
An incorrect value will result in a ‘data error’.
Sending 00h tells the rectifier to revert back to its internal
control.
Vout_OV_fault_limit (0x40): Sets the value at which the
main output voltage will shut down. The default OV_fault
value is set at 60Vdc. This level can be permanently
changed and stored in non-volatile memory.
Vout_OV_fault_response (0x41): This is a ‘read only’
register. The only allowable state is a latched state after
three retry attempts.
An overvoltage shutdown is followed by three attempted
restarts, each successive restart delayed 1 second. If within
a 1 minute window three attempted restarts failed, the unit
will latch OFF. If less than 3 shutdowns occur within the 1
minute window then the count for latch OFF resets and the
1 minute window starts all over again. This performance
cannot be changed.
Restart after a latched state: Either of four restart
mechanisms is available;

The hardware pin ON/OFF may be cycled OFF and then
ON.

The unit may be commanded to restart via i2c through
the Operation command by first turning OFF then
turning ON .

The third way to restart is to remove and reinsert the
unit.

The fourth way is to turn OFF and then turn ON ac
power to the unit.
A successful restart clears all STATUS and ALARM registers.
A power system that is comprised of a number of rectifiers
could have difficulty restarting after a shutdown event
because of the non-synchronized behavior of the individual
rectifiers. Implementing the latch-off mechanism permits a
synchronized restart that guarantees the simultaneous
restart of the entire system.
A synchronous restart can be implemented by;



Issuing a GLOBAL OFF and then a GLOBAL ON
command to all rectifiers
Toggling Off and then ON the ON/OFF signal, if this
signal is paralleled among the rectifiers.
Removing and reapplying input commercial power to
the entire system.
Vin_OFF (0x36): This is a ‘read only’ register that informs the
controller at what input voltage level the rectifier turns OFF.
The default value is tabulated in the data section. The value
is contingent on whether the rectifier operates in the
low_line or high_line mode.
The rectifiers should be OFF for at least 20 – 30 seconds in
order to discharge all internal bias supplies and reset the
soft start circuitry of the individual rectifiers.
Fan_config_1_2 (0x3A) : This command requires that the
fan speed be commanded by duty cycle. Both fans must be
commanded simultaneously. The tachometer pulses per
revolution is not used. Default is duty cycle control.
Vout_OV_warn_limit (0x42): Sets the value at which a
warning will be issued that the output voltage is too high.
The default OV_warn limit is set at 56Vdc. Exceeding the
warning value will set the Alert# signal. This level can be
permanently changed and stored in non-volatile memory.
July 21, 2016
©2016 General Electric Company. All rights reserved.
Page 20
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Vout_UV_warn_limit (0x43): Sets the value at which a
warning will be issued that the output voltage is too low. The
default UV_warning limit is set at 41Vdc. Reduction below
the warning value will set the Alert# signal. This level can
be permanently changed and stored in non-volatile
memory.
Vout_UV_fault_limit (0x44): Sets the value at which the
rectifier will shut down if the output gets below this level.
The default UV_fault limit is set at 36Vdc. This register is
masked if the UV is caused by interruption of the input
voltage to the rectifier. This level can be permanently
changed and stored in non-volatile memory.
Vout_UV_fault_response (0x45): Sets the response if the
output voltage falls below the UV_fault_limit. The default
UV_fault_response is restart (0xC0). The only two allowable
states are latched (0x80) and restart (0xC0). The default
response state can be permanently changed and stored in
non-volatile memory.
Iout_OC_fault_limit (0x46): The OC Fault limit configures
where current limit starts at full power, High Line. This level
can be permanently changed and stored in non-volatile
memory. Below 42V the power capability curve determines
where current limit actually starts. These limits cannot be
changed. The rectifier will limit current immediately, but it
will not shut down for 3 seconds, when in current limit.
Voltages < 5Vdc are considered a short circuit and in this
state an immediate shutdown will commence.
The Low Line level is not adjustable, it is set at 30A.
Iout_OC_fault_response (0x47): Sets the response if the
output overload exceeds the OC_Fault_limit value. The
default OC_fault_response is hiccup (0xF8). The only two
allowable states are latched (0xC0) or hiccup. The default
response state can be permanently changed and stored in
non-volatile memory. The response is the same for both
low_line and high_line operations.
Iout_OC_warn_limit (0x4A): Sets the value at which the
rectifier issues a warning that the output current is getting
too close to the shutdown level at high line. This level can
be permanently changed and stored in non-volatile
memory. The Low Line level is not adjustable, it is set at
29A.
OT_fault_limit (0x4F): Sets the value at which the rectifier
responds to an OT event, sensed by the dc-sec sensor. The
response is defined by the OT_fault_response register.
OT_fault_response (0x50): Sets the response if the output
overtemperature exceeds the OT_Fault_limit value. The
default OT_fault_response is hiccup (0xC0). The only two
allowable states are latched (0x80) or hiccup. The default
response state can be permanently changed and stored in
non-volatile memory.
July 21, 2016
OT_warn_limit (0x51): Sets the value at which the rectifier
issues a warning when the dc-sec temperature sensor
exceeds the warn limit.
Vin_OV_fault_limit (0x55): Sets the value at which the
rectifier shuts down because the input voltage exceeds the
allowable operational limit. The default Vin_OV_fault_limit is
set at 300Vac. This level can be permanently lowered and
stored in non-volatile memory.
Vin_OV_fault_response (0x56): Sets the response if the
input voltage level exceeds the Vin_OV_fault_limit value.
The default Vin_OV_fault_response is restart (0xC0). The only
two allowable states are latched (0x80) and restart (0xC0).
The default response state can be permanently changed
and stored in non-volatile memory.
Vin_UV_warn_limit (0x58): This is another warning flag
indicating that the input voltage is decreasing dangerously
close to the low input voltage shutdown level. The default
UV_fault_limit is 90Vac. This level can be permanently
raised, but not lowered, and stored in non-volatile memory.
Vin_UV_fault_limit (0x59): Sets the value at which the
rectifier shuts down because the input voltage falls below
the allowable operational limit. The default
Vin_UV_fault_limit is set at 85Vac. This level can be
permanently raised and stored in non-volatile memory
Vin_UV_fault_response (0x5A): Sets the response if the
input voltage level falls below the Vin_UV_fault_limit value.
The default Vin_UV_fault_response is restart (0xC0). The only
two allowable states are latched (0x80) and restart (0xC0).
The default response state can be permanently changed
and stored in non-volatile memory.
STATUS_BYTE (0x78) : Returns one byte of information with
a summary of the most critical device faults.
Bit
Default
Flag
Position
Value
7
Unit is busy
0
6
OUTPUT OFF
0
5
VOUT Overvoltage Fault
0
4
IOUT Overcurrent Fault
0
3
VIN Undervoltage Fault
0
2
Temperature Fault or Warning
0
1
CML (Comm. Memory Fault)
0
0
None of the above
0
STATUS_WORD (0x79): Returns status_byte as the low byte
and the following high_byte.
Bit
Default
Flag
Position
Value
7
VOUT Fault or Warning
0
6
IOUT Fault or Warning
0
5
INPUT Fault or Warning
0
4
MFR SPECIFIC
0
3
POWER_GOOD# (is negated)
0
2
FAN Fault or Warning
0
1
OTHER
0
0
UNKNOWN Fault or Warning
0
©2016 General Electric Company. All rights reserved.
Page 21
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
STATUS_VOUT (0X7A): Returns one byte of information of
output voltage related faults.
Bit
Default
Flag
Position
Value
7
VOUT OV Fault
0
6
VOUT_OV_WARNING
0
5
VOUT_UV_WARNING
0
4
VOUT UV Fault
0
3-0
X
0
STATUS_fans_1_2 (0X81): Returns one byte of information
of fan status.
Bit
Default
Flag
Position
Value
7
Fan 1 fault
0
6
Fan 2 fault
0
5-4
X
0
3-2
Fan 1 & 2 speed overwritten
0
1-0
X
0
STATUS_IOUT (0X7B): Returns one byte of information of
output current related faults.
Bit
Default
Flag
Position
Value
7
IOUT OC Fault
0
6
IOUT OC LV Fault
0
5
IOUT OC Warning
0
4
X
0
3
CURRENT SHARE Fault
0
2
IN POWER LIMITING MODE
0
1-0
X
0
Read back Descriptions
STATUS_INPUT (0X7C): Returns one byte of information of
input voltage related faults.
Bit
Default
Flag
Position
Value
7
VIN_OV_Fault
0
6
VIN_OV_Warning
0
5
VIN_UV_ Warning
0
4
VIN_UV_Fault
0
3
Unit OFF for low input voltage
0
2
IIN_OC_Fault
0
1-0
X
0
STATUS_TEMPERATURE (0x7D): Returns one byte of
information of temperature related faults.
Bit
Default
Flag
Position
Value
7
OT Fault
0
6
OT Warning
0
5-0
X
0
STATUS_CML (0X7E): Returns one byte of information of
communication related faults.
Bit
Default
Flag
Position
Value
7
Invalid/Unsupported Command
0
6
Invalid/Unsupported Data
0
5
Packet Error Check Failed
0
4-2
X
0
1
Other Communication Fault
0
0
X
0
Single parameter read back: Functions can be read back
one at a time using the read_word_protocol with PEC. A
command is first sent out notifying the slave what function
is to be read back followed by the data transfer.
Analog data is always transmitted LSB followed by MSB. A
NA following the PEC byte signifies that the transmission is
complete and is being terminated by the ‘host’.
1
S
8
Slave address
Wr
1
Sr
8
Slave address
Rd
8
LSB
1
A
1
A
8
Command Code
1
A
1
A
8
MSB
1
A
8
PEC
1
No-Ack
1
P
Read back error: If the µC does not have sufficient time to
retrieve the requested data, it has the option to return all
FF’s instead of incorrect data.
Read_fan_speed 1 & 2 (0x90, 0x91): Reading the fan speed
is in Direct Mode returning the RPM value of the fan.
Read_FRU_ID (0x99,0x9A,0x9B,0x9E): Returns FRU
information. Must be executed one register at a time.
1
S
8
Slave address
Wr
1
A
8
Command 0x9x
1
Sr
8
Slave address
Rd
1
A
8
Byte count = x
8
Byte_1
1
A
8
Byte
1
A
8
Byte_x
1
A
8
PEC
1
A
1
A
1
No-Ack
1
P
Mfr_ID (0x99): Manufacturer in ASCII – 6 characters
maximum,
General Electric – Critical Power represented as,
GE-CP
Mfr_model (0x9A): Manufacturer model-number in ASCII –
16 characters, for this unit: CP3500AC52TEFBxx
Mfr_revision (0x9B): Total 8 bytes, this is the product series
taking the form X:YZ. Each byte is in ASCII format. The
July 21, 2016
©2016 General Electric Company. All rights reserved.
Page 22
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Status_unit(0xD1): This command returns the STATUS-2 and
STATUS-1 register values using the standard ‘read’ format.
series number is read from left to right, scanned from the
series number bar code on the rectifier. Unused characters
are filled at the end with null
Status-2
Bit
Position
7
6
5
4
3
2
1
0
Mfr_serial (0x9E): Product serial number includes the
manufacturing date, manufacturing location in up to 16
characters. For example:
13KZ51018193xxxx, is decoded as;
13 – year of manufacture, 2013
KZ – manufacturing location, in this case Matamoros
51 – week of manufacture
018193xxxx– serial #, mfr choice
Manufacturer-Specific
PMBusTM
Commands
Many of the manufacturer-specific commands read back
more than two bytes. If more than two bytes of data are
returned, the standard SMBusTM Block read is utilized. In this
process, the Master issues a Write command followed by
the data transfer from the rectifier. The first byte of the Block
Read data field sends back in hex format the number of
data bytes, exclusive of the PEC number, that follows.
Analog data is always transmitted LSB followed by MSB. A
No-ack following the PEC byte signifies that the transmission
is complete and is being terminated by the ‘host’.
Mfr_Specific Status and alarm registers: The content and
partitioning of these registers is significantly different than
the standard register set in the PMBus™ specification. More
information is provided by these registers and they are
either accessed rapidly, at once, using the ‘multi parameter’
read back scheme of this document, or in batches of two
STATUS and two ALARM registers.
Status_summary (0xD0) : This ‘manufacturer specific’
command is the basic read back returning STATUS and
ALARM register data, output voltage, output current, and
internal temperature data in a single read. Internal
temperature should return the temperature that is closest to
a shutdown level.
1
S
8
Slave address
Wr
1
A
1
Sr
8
Slave address
Rd
1
A
8
Byte count = 11
1
A
8
Alarm-3
8
Status-2
1
A
8
Status-1
8
Alarm-1
1
A
8
Voltage LSB
8
Current-LSB
1
A
8
Temperature-LSB
1
A
8
PEC
1
No-Ack
July 21, 2016
1
P
8
Command Code
1
A
1
A
1
A
1
A
8
Alarm-2
8
Voltage MSB
8
Current-MSB
8
Temperature-MSB
1
A
1
A
1
A
1
A
Flag
PEC Error
OC [hiccup=1,latch=0]
Invalid_Instruction
Power_Capacity [HL = 1]
OR’ing Test Failed
n/a
Data_out_of_range
Remote ON/OFF [HI = 1]
Default
Value
0
1
0
x
0
0
0
x
Oring fault: Triggered either by the host driven or’ing test or
by the repetitive testing of this feature within the rectifier. A
destructive fault would cause an internal shutdown. Success
of the host driven test depends on power capacity capability
which needs to be determined by the external processor.
Thus a non-destructive or’ing fault does not trigger a
shutdown.
Status-1
Bit
Position
7
6
5
4
3
2
1
0
Flag
OT [Hiccup=1, latch=0]
OR’ing_Test_OK
Internal_Fault
Shutdown
Service LED ON
External_Fault
LEDs_Test_ON
Output ON (ON = 1)
Default
Value
1
0
0
0
0
0
0
x
Status_alarm (0xD2): This command returns the ALARM-3 ALARM-1 register values.
Alarm-3
Bit
Position
7
6
5
4
3
2
1
0
Alarm-2
Bit
Position
7
6
5
4
3
2
1
0
Flag
Interlock open
Fuse fail
PFC-DC communications fault
DC-i2c communications fault
AC monitor communications fault
x
x
Or’ing fault
Flag
FAN_Fault
No_Primary
Primary_OT
DC/DC_OT
Vo lower than BUS
Thermal sensor filed
Stby_out_of_limits
Power_Delivery
©2016 General Electric Company. All rights reserved.
Default
Value
0
0
0
0
0
0
0
0
Default
Value
0
0
0
0
0
0
0
0
Page 23
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Power Delivery: If the internal sourced current to the
current share current is > 10A, a fault is issued.
Alarm-1
Bit
Position
7
6
5
4
3
2
1
0
Read_run_timer [0 x D6]: This command reads back the
recorded operational ON state of the rectifier in hours. The
operational ON state is accumulated from the time the
rectifier is initially programmed at the factory. The rectifier
is in the operational ON state both when in standby and
when it delivers main output power. Recorded capacity is
approximately 10 years of operational state.
Default
Value
0
0
0
0
0
0
0
0
Flag
POWER LIMIT
PRIMARY Fault
OT_Shutdown
OT_Warning
IN OVERCURRENT
OV_Shutdown
VOUT_out_of_limits
VIN_out_of_limits
1
S
1
Sr
Read_Fan_speed (0 x D3) : Returns the commanded speed
in percent and the measured speed in RPM. If a fan does
not exist, or if the command is not supported the unit return
0x00.
1
S
8
Slave address
1
Sr
8
Slave address
8
Adj%-LSB
1
A
Wr
8
Fan2-LSB
1
A
Rd
1
8
A Adj%-MSB
8
Command 0xE1
8
Byte count = 6
1
8
A Fan1-LSB
1
8
A Fan2-MSB
1
A
1
A
8
PEC
1
8
A Fan1-MSB
1
A
7
Slave address
1
A
1
Sr
1
Wr
1
A
7
Slave Address
1
P
8
Power - LSB
1
A
8
Power - MSB
8
PEC
1
A
7
Slave address
1
A
1
Sr
1
Wr
7
Slave Address
8
Primary major rev
1
A
8
Secondary major rev
8
i2c major rev
July 21, 2016
1
Rd
1
A
1
A
1
A
1
No-Ack
1
P
8
Byte Count = 6
8
Primary minor rev
8
Secondary minor rev
8
i2c revision
1
A
1
A
1
Wr
1
A
1
A
8
Byte count = 3
8
Time - MSB
1
A
1
A
1
A
8
Command Code 0xD9
8
Byte count
1
A
1
A
………………………………………………….
8
last - byte
1
A
1
P
1
8
A PEC
1
Sr
1
A
1
A
1
Wr
7
Slave address
8
Byte 1
8
PEC
1
A
1
A
1
No-ack
1
A
8
Command 0xD9
8
Byte count ≤ 32
1
Rd
1
A
1
A
1
A
………………………………………………….
8
Byte ≤ 32
1
A
1
P
Test Function (0xDF)
1
A
Bit
1
A
1
No-ack
7
Slave address
8
Memory location
8
Command Code 0xDD
1
A
1
A
1
A
1
P
7
Slave address
8
first_byte
1
S
Read_firmware_rev [0 x D5]: Reads back the firmware
revision of all three µC in the rectifier.
1
S
1
Rd
8
Command Code 0xDE
To read contents from the EEPROM section
8
Voltage - MSB
1
A
1
A
8
Time
1
No-ack
8
PEC
1
A
8
1
8
1
Byte Count = 4 A Voltage - LSB A
8
PEC
1
A
8
Start location
8
Command Code 0xDC
1
Rd
7
Slave Address
8
Time - LSB
1
S
Read input string (0xD4): Reads back the input voltage and
input power consumed by the rectifier.
1
S
1
Wr
EEPROM record (0xD9): The µC contains 128 bytes of
reserved EEPROM space for customer use. After the
command code, the starting memory location must be
entered followed by a block write, and terminated by the
PEC number;
1
A
1
No-Ack
7
Slave address
1
P
7
5-6
4
2-3
1
0
Function
25ms stretch for factory use
reserved
Or’ing test
reserved
Service LED
LED test
©2016 General Electric Company. All rights reserved.
State
1= stretch ON
1=ON, 0=OFF
1=ON, 0=OFF
1=ON, 0=OFF
Page 24
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
LEDS test ON: Will turn-ON simultaneously the front panel
LEDs of the Rectifier sequentially 7 seconds ON and 2
seconds OFF until instructed to turn OFF. The intent of this
function is to provide visual identification of the rectifier
being talked to and also to visually verify that the LEDs
operate and driven properly by the micro controller.
LEDS test OFF: Will turn-OFF simultaneously the four front
panel LEDs of the Rectifier.
Service LED ON: Requests the rectifier to flash-ON the
Service (ok-to-remove) LED. The flash sequence is
approximately 0.5 seconds ON and 0.5 seconds OFF.
Service LED OFF: Requests the rectifier to turn OFF the
Service (ok-to-remove) LED.
OR’ing Test: This command verifies functioning of output
OR’ing. At least two paralleled rectifiers are required. The
host should verify that N+1 redundancy is established. If
N+1 redundancy is not established the test can fail. Only one
rectifier should be tested at a time.
Verifying test completion should be delayed for
approximately 30 seconds to allow the rectifier sufficient
time to properly execute the test.
Failure of the isolation test is not considered a rectifier
FAULT because the N+1 redundancy requirement cannot be
verified. The user must determine whether a true isolation
fault indeed exists.
Dual Master Control:
Two independent I2C lines and Alert# signals provide true
communications redundancy allowing two independent
controllers to sequentially control the rectifier.
A short or an open connection in one of the I2C lines does
not affect communications capability on the other I2C line.
Failure of a ‘master’ controller does not affect the rectifiers
and the second ‘master’ can take over control at any time
when the bus is idle.
The µC may issue a clock stretch, as it can for any other
instruction, if it requires a delay because it is busy with
other activities.
Automatically resetting into the default state requires the
removal of bias supply from the controllers.
Bit
Position
7
6
5
4
3
2
1
0
Flag
Bus 1 command error
Bus 1 Alert# enabled
Bus 1 requested control
Bus 1 has control of the PS
Bus 0 command error
Bus 0 Alert# enabled
Bus 0 requested control
Bus 0 has control of the PS
Default
Value
0
0
0
0
0
0
0
1
Command Execution: The master not in control can issue
two commands on the bus, take_over_bus_control and
clear_faults
Take_over_Bus_Control(0xD8): This command instructs
the internal µC to switch command control over to the
‘master’ that initiated the request.
Actual transfer is controlled by the I2C selector section of the
µC. A bus transfer only occurs during an idle state when the
‘master’ currently in control (in the execution process of a
control command) has released the bus by issuing a STOP
command. Control can be transferred at any time if the
‘master’ being released is executing a read instruction that
does not affect the transfer of command control. Note; The
µC can handle read instructions from both busses
simultaneously.
The command follows PMBus™ standards and it is not
executed until the trailing PEC is validated.
Status Notifications: Once control is transferred both
Alert# lines should get asserted by the I2C selector section of
the µC. The released ‘master’ is notified that a STATUS
change occurred and he is no longer in control. The
connected ‘master’ is notified that he is in control and he
can issue commands to the rectifier. Each master must
issue a clear_faults command to clear his Alert# signal.
If the Alert# signal was actually triggered by the rectifier and
not the I2C selector section of the µC, then only the ‘master’
in control can clear the rectifier registers.
Incomplete transmissions should not occur on either bus.
Conceptual representation of the dual
I2C
bus system.
The Alert# line exciting the rectifier combines the Alert#
functions of rectifier control and dual_bus_control.
Status_bus (0xD7): Bus_Status is a single byte read back.
The command can be executed by either master at any
time independent of who has control.
General performance descriptions
Default state: Rectifiers are programmed in the default
state to automatically restart after a shutdown has
occurred. The default state can be reconfigured by changing
non-volatile memory (Store_user_code).
Delayed overcurrent shutdown during startup: Rectifiers
are programmed to stay in a constant current state for up
July 21, 2016
©2016 General Electric Company. All rights reserved.
Page 25
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
to 20 seconds during power up. This delay has been
introduced to permit the orderly application of input power
to a subset of paralleled rectifiers during power up. If the
overload persists beyond the 20 second delay, the rectifier
will revert back into its programmed state of overload
protection.
Unit in Power Limit or in Current Limit: When output
voltage is > 36VDC the Output LED will continue blinking.
When output voltage is < 36VDC, if the unit is in the RESTART
mode, it goes into hiccup after a 3 second delay. When the
DC power is ON the output LED is ON, when the DC power is
OFF the output LED is OFF.
When the unit is in latched shutdown the output LED is OFF.
Restart after a latchoff: PMBus™ fault_response
commands can be configured to direct the rectifier to
remain latched off for over_voltage, over_temperature and
over_current.
To restart after a latch off either of five restart mechanisms
are available.
1. The hardware pin ON/OFF may be cycled OFF and
then ON.
2. The unit may be commanded to restart via i2c
through the Operation command by cycling the
output OFF followed by ON.
3. Remove and reinsert the unit.
4. Turn OFF and then turn ON AC power to the unit.
5. Changing firmware from latch off to restart.
Each of these commands must keep the rectifier in the OFF
state for at least 2 seconds, with the exception of changing
to restart.
A successful restart shall clear all alarm registers, set the
restarted successful bit of the Status_2 register.
A power system that is comprised of a number of rectifiers
could have difficulty restarting after a shutdown event
because of the non-synchronized behavior of the individual
rectifiers. Implementing the latch-off mechanism permits a
synchronized restart that guarantees the simultaneous
restart of the entire system.
A synchronous restart can be implemented by;
1. Issuing a GLOBAL OFF and then ON command to all
rectifiers,
restarts failed, the unit will latch OFF. If within the 1 minute
less than 3 shutdowns occurred then the count for latch OFF
resets and the 1 minute window starts all over again
Fault Management
The rectifier recognizes that certain transitionary states can
occur before a final state is reached. The STATUS and
ALARM registers will not be frozen into a notification state
until the final state is reached. Once a final state is reached
the Alert# signal is set and the STATUS and ALARM registers
will not get reinstated until a clear_faults is issued by the
master. The only exception is that additional state changes
may be added to the original list if further changes are
noted.
The rectifier differentiates between internal faults that are
within the rectifier and external faults that the rectifier
protects itself from, such as overload or input voltage out of
limits. The FAULT LED, FAULT PIN or i2c alarm is not asserted
for EXTERNAL FAULTS. Every attempt is made to annunciate
External Faults. Some of these annunciations can be
observed by looking at the input LEDs. These fault
categorizations are predictive in nature and therefore there
is a likelihood that a categorization may not have been
made correctly.
Input voltage out of range: The Input LED will continue
blinking as long as sufficient power is available to power the
LED. If the input voltage is completely gone the Input LED is
OFF.
State Change Definition
A state_change is an indication that an event has occurred
that the MASTER should be aware of. The following events
shall trigger a state_change;

Initial power-up of the system when AC gets turned ON
. This is the indication from the rectifier that it has been
turned ON. Note that the master needs to read the
status of each rectifier to reset the system_interrupt.

Any changes in the bit pattern of either the PMBus
standard STATUS or the mfr_specific STATUS registers
should trigger the Alert# signal.
2 . Toggling Off and then ON the ON/OFF (ENABLE) signal
3. Removing and reapplying input commercial power to
the entire system.
The rectifiers should be turned OFF for at least 20 – 30
seconds in order to discharge all internal bias supplies and
reset the soft start circuitry of the individual rectifiers.
Auto_restart: Auto-restart is the default configuration for
over-current and over-temperature shutdowns. These
features are configured by the PMBus™ fault_response
commands
An overvoltage shutdown is followed by three attempted
restarts, each restart delayed 1 second, within a 1 minute
window. If within the 1 minute window three attempted
July 21, 2016
Hot plug procedures
Careful system control is recommended when hot plugging
a rectifier into a live system. It takes about 1 second for a
rectifier to configure its address on the bus based on the
analog voltage levels present on the backplane. If
communications are not stopped during this interval,
multiple rectifiers may respond to specific instructions
because the address of the hot plugged rectifier always
defaults to xxxx000 until the rectifier configures its address.
The system can detect the hot-plug activity by polling the
unit_present signal pin.
©2016 General Electric Company. All rights reserved.
Page 26
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
The one exception for this instruction delay
recommendation is execution of a ‘global or broadcast’
instruction to all rectifiers simultaneously which does not
utilize the rectifier’s own address.
The recommended procedure for hot removal in controller
based systems is the following: The system controller
should signal the craft person which rectifier is to be
removed. This is suggested so that the correct rectifier is
removed by the craft person. The controller turns the service
LED ON, thus informing the installer that the identified
rectifier can be removed from the system. The system
controller should then poll the rectifier_present signal to
verify when the rectifier is re-inserted. Once the re-insertion
is detected, the system controller should time out for 1
second before sending out a non-‘global or broadcast’
address based instruction. . At the end of the time out all
communications can resume.
The hot-plugged rectifier will turn ON to the voltage level set
by the Vprog pin. As described in the section on setting the
Vprog pin, the system needs to set the output voltage to a
level that would not cause harm or malfunction. For this
rectifier the recommended output voltage setting would be
18Vdc. The rectifier would stay at this level until a firmware
instruction tells it to change its setting.
The process has been implemented in visual basic by GE
Critical Power for controller based systems positioned
primarily for the telecommunications industry. GE Critical
Power will share its development with customers who are
interested to deploy the re-programming capability into
their own controllers.
For some customers internal system re-programming is
either not feasible or not desired. These customers may
obtain a re-programming kit from GE Critical Power. This kit
contains a turn-key package with the re-program firmware.
Conceptual Description: The rectifier contains three
independent µControllers. The boost (PFC) section is
controlled by the primary µController. The secondary DC-DC
converter is controlled by the secondary µController, and I2C
communications are being handled by the I2C Interface
µController.
For systems controlled via the Vprog pin (output controlled by
hardware instead of firmware) no special settings or
configurations are required.
Failure Prediction
Alarm warnings that do not cause a shutdown are
indicators of potential future failures of the rectifier. For
example, if a thermal sensor failed, a warning is issued but
an immediate shutdown of the rectifier is not warranted.
Another example of potential predictive failure mechanisms
can be derived from information such as fan speed when
multiple fans are used in the same rectifier. If the speed of
the fans varies by more than 20% from each other, this is an
indication of an impending fan wear out.
The goal is to identify problems early before a protective
shutdown would occur that would take the rectifier out of
service.
Information only alarms: The following alarms are for
information only, they do not cause a shutdown

Over temperature warning

Vout out-of-limits

Output voltage lower than bus

Unit in Power Limit

Thermal sensor failed

Or’ing (Isolation) test failure

Power delivery

Stby out of limits

Communication errors
Remote upgrade
The system controller receives the upgrade package. It
should first check whether an upgrade is required followed
by upgrading those processors, one at a time, that are
required to be upgraded. Each processor upgrade needs to
be validated and once the upgrade is successfully
completed the boot loader within each processor will permit
the application to run after a reset. If the validation fails the
boot loader will stay in its section. The system controller can
attempt another upgrade session to see if it would complete
successfully.
The Upgrade Package: This package contains the following
files;

Manifest.txt - The manifest describes the
contents of the upgrade package and any
incidental information that may be useful, for
example, what this upgrade contains or why is
this upgrade necessary. This file contains the
version number and the compatibility code of the
upgraded program for each of the three
processors

This section describes at a high-level the recommended reprogramming process for the three internal micro
controllers inside the rectifier when the re-programming is
implemented in live, running, systems.
July 21, 2016
Each of the µControllers contains a boot loader section and
an application section in memory. The purpose of the boot
loader section is to facilitate the upgrading capability
described here. All the commands for upgrading and
memory space required for incrementally changing the
application code are in this section. The application section
contains the running code of the rectifier.
Program.bin - The upgraded program contents
are located here. Each processor to be upgraded
will have its own file.
Below is an example of an upgrade package
©2016 General Electric Company. All rights reserved.
Page 27
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W

Contents of the upgrade are in a zip file
1
S
CP3x00AC52TEZ.zip

1
Sr
manifest.txt
Opening manifest.txt shows the following
new program,
revision number
Upgrade Status Indication: The FAULT LED is utilized for
indicating the status of the re-programming process.
Status
Idle
In boot block
Upgrading
Fault LED
OFF
Wink
Fast blink
Fault
ON
1
A
Description
Normal state
Application is good
Application is erased or
programming in progress
Erase or re-program failed
Note: Make sure that sufficient power is provided by the
remaining on-line rectifiers so that system functionality
is not jeopardized.
2. Unzip the distribution file
Password(0xE0): This command unlocks the upgrade
commands feature of the rectifier by sending the characters
‘UPGD’.
8
Byte 0 - U
1
A
…………
8
Cmd – 0xE0
1
A
8
Byte 4 - D
1
A
8
Byte count - 4
8
PEC
1
A
1
A
1
P
4. Obtain a list of upgradable processors (optional)
Target list(0xE1) : This command returns the upgradable
processors within the rectifier. The byte word is the ASCII
character of the processor (p, s, and i). The command is
optional to the user for information only.
July 21, 2016
1
A
8
PEC
1
No-Ack
1
P
1
S
8
Slave addr
1
Sr
8
Slave addr Rd
1
A
Wr
8
Cmd – 0xE2
1
8
1
A Target-x A
1
8
1
A Byte count = 32 A
8
Byte 31
1
A
8
PEC
8
Byte 0
1
A
1
1
No-Ack P
Where Target-x is an ASCII character pointing to the
processor to be updated;
p – primary (PFC)
s – secondary (DC-DC)
i – I2C
6. Check the software revision number of the target
processor in the rectifier and compare it to the revision
in the upgrade. If the revision numbers are the same, or
the rectifier has a higher revision number then no
upgrade is required for the target processor.
Software revision(0xE3): This command returns the
software revision of the target.
3. Unlock upgrade execution protection by issuing the
command below;
1
A
8
Byte n
…………
1
A
5. Verify upgrade compatibility by matching the upgrade
compatibility code in the manifest.txt file to the rectifier
compatibility code of the target processor.
……………
1. Initialization: To execute the re-programming/upgrade
in the system, the rectifier to be re-programmed must
first be taken OFF-line prior to executing the upgrade. If
the rectifier is not taken OFF-line by the system
controller, the boot loader will turn OFF the output prior
to continuing with the re-programming operation.
Wr
1
A
8
Byte count - n
Compatibility code (0xE2): This read command consists of
up to 32 characters defining the hardware configuration:
Upgrade procedure
8
Slave addr
1
A
Rd
p – primary (PFC)
s – secondary (DC-DC)
i – I2C
Wink: 0.25 seconds ON, 0.75 seconds OFF
Fast Blink: 0.25 seconds ON. 0.25 seconds OFF
1
S
8
Cmd – 0xE1
Potential target processors are the following:
Program contents
>p, CP3x00AC52TE _P01, CP3x00AC52TEZ _PFC.bin,1.18
>s, CP3x00AC52TE _S01, CP3x00AC52TEZ _SEC.bin,1.1
compatibility code,
8
Slave addr
8
Byte 0
# Upgrade manifest file
# Targets: CP3x00AC52TEZ PFC and SEC
# Date: Tue 01/14/2014 14:25:09.37
# Notes:

1
A
Wr
Unzipping the contents shows the following files
CP3x00AC52TEZ.pfc.bin
CP3x00AC52TEZ.sec.bin

8
Slave addr
1
S
8
Slave addr
Wr
1
A
1
Sr
8
Slave addr
Rd
1
8
1
A Byte count=7 A
8
Minor revision
1
A
8
month
8
hrs
1
A
8
PEC
1 8
A min
8
Cmd – 0xE3
1
A
8
day
1
No-Ack
1
A
1
A
8
Target-x
1
A
8
Major revision
8
year22
1
A
1
A
1
P
7. Verify the capability of each processor
22
Last two digits
©2016 General Electric Company. All rights reserved.
Page 28
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Memory capability (0xE4): Provides the specifics of the
capability of the device to be reprogrammed
1
S
8
Slave addr
1
Sr
8
Slave addr Rd
8
1
ET-LSB A
1
A
8
Target-x
1
A
1
8
1
A Byte count=7 A
8
Max bytes
1
A
Wr
8
ET-MSB
8
App_CRC_LSB
1
A
1
A
1
A
8
Cmd – 0xE2
8
BT-LSB
1
A
8
App_CRC_MSB
8
BT-MSB
1
A
8
PEC
1
No-Ack
1
A
BT
APP_CRC
1
P
Maximum number of bytes in a data packet
Erase time for entire application space (in
mS)
Data packet write execution time (uS)
Application CRC-16 – returns the application
CRC-16 calculation. Reading these register
values, if the application upload CRC-16
calculation returns an invalid, provides the
mismatch information to the host program.
(See application status(0xE5) command)
8. Verify availability: The Application status command is used
to verify the present state of the boot loader.
Application status (0xE5): Returns the Boot Loader’s present
status
1
Sr
8
Slave addr
Wr
1
A
8
Slave addr Rd
1
A
8
Cmd – 0xE5
8
Status
Status bits:
0x00 Processor is available
0x01 Application erased
0x02 CRC-16 invalid
0x04 Sequence out of
order
0x08 Address out of range
1
A
1
A
8
Target-x
8
PEC
1
No-Ack
1
A
1
P
0x10 Reserved
0x20 Reserved
0x40 Manages
downstream µC
0x80 In boot loader
Status of the application should be checked after the
execution of successive commands to verify that the
commands have been properly executed.
9. Issue a Boot Loader command with the enter boot block
instruction
Boot loader (0xE6): This command manages the upgrade
process starting with entering the sector, erasing the
present application, indicating completion of the upload and
finally exiting from the boot sector, thereby turning over
control to the uploaded application.
July 21, 2016
7
7
8
Slave addr
Wr
A
Cmd – 0xE6
1
A
8
PEC
1
A
1
8
1
A Target-x
A
1
P
Data:
This information should be used by the host processor to
determine the max data packet size and add appropriate
delays between commands.
1
S
7
S
8
Data
Where the fields definition are shown as below:
Max Bytes
ET
1
1=enter boot block (software reboot)
2=erase
3=done
4=exit23 boot block (watchdog reboot)
Note: The target µC field is ignored for enter and exit
commands. During this process if the output of the rectifier
was not turned OFF the boot loader will turn OFF the output
10. Erase and program each µC using the Boot Loader
command, starting with the PFC.
11. Wait at least 1 second after issuing en erase
command to allow the µC to complete its task.
12. Use command 0xE5 to verify that the PFC µC is erased.
The returned status byte should be 0x81.
13. Use the Data Transfer command to update the
application of the target µC.
Data transfer (0xE7): The process starts with uploading
data packets with the first sequence number (0x0000).
1
S
8
Slave addr
1
A
Wr
8
1
Seq-LSB A
8
Seq-MSB
8
Byte 0
………….
1
A
8
Cmd - 0xE7
1
A
1
8
A Target-x
8
Byte Count = n
8
1
Byte n-1 A
8
PEC
1
A
1
A
1
A
1
P
After completion of the first data packet upload the Boot
loader increments the sequence number. A subsequent
read to the boot loader will return the incremented
sequence number and a STATUS byte. This is a validity check
to ensure that the sequence number is properly kept. The
returned STATUS byte is the same as the application status
response. It is appended here automatically to save the
execution of another command. It should be checked to
ensure that no errors are flagged by the boot loader during
the download. If an error occurred, terminate the download
load and attempt to reprogram again.
1
S
1
Sr
8
Slave addr
8
Slave addr
1
Seq-LSB
8
A
1
A
Wr
Rd
8
Seq-MSB
1
A
1
A
8
Cmd - 0xE4
8
Byte count = 3
8
Status
1
A
8
PEC
1
A
1
A
1
No-Ack
1
P
23
The ‘exit boot block’ command is only successful if all
applications are valid, otherwise, control remains in the boot block
©2016 General Electric Company. All rights reserved.
Page 29
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Sequence number validation takes place after each data
block transfer. The next data block transfer starts with the
sequence number received from the boot loader.
1. A rolling event Recorder
The host keeps track of the upload and knows when the
upload is completed.
The rolling event recorder
14. Execute a Boot loader command to tell the PFC µC that
the transfer is done.
At the completion signal, the PFC µC should calculate
the PEC value of the entire application. The last two
bytes of the loaded application were the CRC-16 based
PEC calculation.
Wait for at least 1 second to allow time for the PFC µC
to calculate the error checking value.
15. Execute an Application status command to verify that
the error check is valid. The returned status should be
0x80.
16. Execute a Boot loader command to exit boot block.
Upon receipt of the command the PFC µC will transfer
to the uploaded application code.
2. Operational Use Statistics
The purpose of the black box is to provide operational
statistics as well as fault retention for diagnostics following
either recoverable or non-recoverable fault events.
Sufficient memory exists to store up to 5 time-stamped
snapshot records (pages) that include the state of the status
and alarm registers and numerous internal measurement
points within the rectifier. Each record is stored into
nonvolatile memory at the time when a black box trigger
event occurs. Once five records are stored, additional
records over-write the oldest record.
The memory locations will be cleared, when the product is
shipped from the GE factory.
Operational use statistics
This feature of the black box includes information on the
repetition and duration of certain events in order to
understand the long-term operational state of the rectifier.
The events are placed into defined buckets for further
analysis. For example; the rectifier records how long was
the output current provided in certain load ranges.
17. Wait for at least 1 second.
Accessing the event records
18. Use command 0xE1 to verify that the PFC µC is now in
the application code. The returned status data bte
should be 0x00.
19. Repeat the program upgrade for the Secondary and I2C
µC’s, if included in the upgrade package.
Product comcode
Although the comcode number is not required for the
upgrade process in its present form, it may be useful when
upgrading multiple version of the same product in order to
differentiate product upgrade requirements.
Product comcode (0xE8):
1
S
1
Sr
8
Slave addr
8
Slave addr
8
Byte 0
1
A
Wr
Rd
………….
1
A
1
A
8
Cmd - 0xE8
8
Byte count = 11
8
1
Byte 10 A
8
PEC
1
A
Upload black box(0xF0): This command executes the upload
from the rectifier to a file of the user’s choice.
The 100ms delay prior to the restart is mandatory to provide
enough time for the rectifier to gather the required data
from the secondary DSP controller.
1
S
8
Slave addr
1
A
Wr
8
Start address - msb
1
A
1
No-Ack
The event records are accessed by uploading the entire
contents of the black box of the rectifier into a folder
assigned by the user. Within the I2C protocol this upload is
accomplished by the upload_black_box (0xF0) command
described below. GE provides a Graphical User Interface
(GUI) that de-codes the contents of the black box into a set
of records that can be reviewed by the user.
1
P
Error handling: The Boot loader will not start the
application if errors occurred during the re-program stage.
The controlling program could restart the upgrade process
or terminate the upgrade and remove the offending rectifier
from service.
8
Length = N (≤ 32)
1
Sr
8
Slave addr
1
A
8
Cmd – 0xF0
1
A
1
A
8
Start address - lsb
1
A
……………….. delay 100ms
Rd
………………………
1
8
A Length ≤ 32
8
Byte N-1
1
A
1
A
8
Byte 0
8
PEC
1
A
1
No-Ack
Black box
Contents of the black box and more detailed information
about the specifics of the feature are described in a
separate document. The intent here is to provide a high level
summary This feature includes the following;
July 21, 2016
©2016 General Electric Company. All rights reserved.
Page 30
1
P
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
If a transmission error occurs, or if the uC did not receive the
data from the DSP, the uC may set the length to 0, issue a
PEC and terminate the transmission.
The data array supported by rev 1.3 of the GE Interface
Adapter is 32 x 64 comprising 2048 bytes of data.
July 21, 2016
©2016 General Electric Company. All rights reserved.
Page 31
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Table 1: Alarm and LED state summary
AC OK
Green
Condition
Rectifier LED State
DC OK
Service
Green
Amber
Monitoring Signals
Fault
Red
Fault
OTW
PG
Module
Present
OK
1
1
0
0
HI
HI
HI
LO
Thermal Alarm (5C before shutdown)
1
1
1
0
HI
LO
HI
LO
Thermal Shutdown
1
0
1
1
LO
LO
LO
LO
Defective Fan
1
?24
0
1
LO
HI
LO
LO
Blown AC Fuse in Unit
1
0
0
1
LO
HI
LO
LO
Blinks
0
0
0
HI
HI
LO
LO
AC not present1
0
0
0
0
HI
HI
LO
LO
Boost Stage Failure
1
0
0
1
LO
HI
LO
LO
Over Voltage Latched Shutdown
1
0
0
1
LO
HI
LO
Over Current
1
Blinks
0
0
HI
HI
Pulsing
LO
Non-catastrophic Internal Failure2
1
1
0
1
LO
HI
HI
LO
AC Present but not within limits
LO
4
Standby (remote)
1
0
0
0
HI
HI
LO
LO
Service Request (PMBus mode)
1
1
Blinks
0
HI
HI
HI
LO
Communications Fault (RS485 mode)
1
1
0
Blinks
HI
HI
HI
1 This signal is correct if the rectifier is back biased from other rectifiers in the shelf .
2 Any detectable fault condition that does not cause a shutting down. For example, ORing FET failure, boost section out of regulation, etc.
3 Signal transition from HI to LO is output load dependent
4
Pulsing at a duty cycle of 1ms as long as the unit is in overload.
LO
Table 2: Signal Definitions
All hardware alarm signals (Fault#, PG#, OTW#) are open drain FETs. These signals need to be pulled HI to either 3.3V or 5V. Maximum sink
current 5mA. An active LO signal (< 0.4VDC) state. All signals are referenced to Logic_GRD unless otherwise stated.
Function
Label
Type
Input
Description
Output control
ON/OFF
Power Good Warning
PG#
Output
Open drain FET; Changes to LO if an imminent loss of the main output may occur.
If shorted to Logic_GRD main output is ON in Analog or PMBus mode.
I2C Interrupt
Alert#_0/Alert#_1
Output
This signal is pulled to 3.3V via a 10kΩ resistor. Active LO.
Rectifier Fault
Fault#
Output
An open drain FET; normally HI, changes to LO.
Module Present
MOD_PRES
Output
Short pin, see Status and Control description for further information on this signal.
Interlock
Interlock
Input
Short pin, controls main output during hot-insertion and extraction. Ref: Vout ( - )
Protocol select
Protocol
Input
Selects operational mode. Ref: Vout ( - ). No-connect PMBus, 10kΩ - RS485
Margining
Vprog
Input
Over-Temperature Warning
OTW#
Output
Changes the set point of the main output.
i2c address
Unit_ID
Input
Voltage level selecting the A3 - A0 bits of the address byte
i2c address
Rack_ID
Input
Voltage level selecting the A3 – A0 bits of the address byte
Back bias
8V_INT
Standby power
5VA
Output
Current Share
Ishare
Bi-direct A single wire active-current-share interconnect between rectifiers Ref: Vout ( - ).
I2C Line 0
SCL_0
Open drain FET; normally HI, changes to LO 5°C prior to thermal shutdown.
Bi-direct Used to back bias the DSP from operating Rectifiers. Ref: Vout ( - ).
Input
5V at 2A provided for external use
PMBus line 0.
I C Line 0
SDA_0
I2C Line 1
SCL_1
I2C Line 1
SDA_1
Bi-direct PMBus line 1.
RS485 Line
RS_485+
Bi-direct RS485 line +
RS485 Line
RS_485-
Bi-direct RS485 line -
2
Bi-direct PMBus line 0.
Input
PMBus line 1.
24
A single fan fault may not cause a shutdown. Shutdown is controlled by internal unit temperatures. A double fan fault causes an immediate
shutdown.
July 21, 2016
©2016 General Electric Company. All rights reserved.
Page 32
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Mechanical Outline
Dimensions
351.2 mm
(13.85 in)
41.4mm
(1.63 in)
101.6mm
(4.00 in)
Front View
Top View
Rear View
Shelf insertion keying
The cover of the rectifier is notched to ensure that it gets inserted into
the correct shelf. The notch is located to accept the key in position 2
(-24V location in original design).
Note: front view, Black faceplate
Front Panel LEDs
Analog Mode
I2C Mode
RS485 Mode
ON: Input ok
Blinking: Input out of limits
ON: Output ok
Blinking: Overload
ON: Over-temperature Warning
Blinking: Service
ON: Over-temperature Warning
!
ON: Over-temperature Warning
ON: Fault
Blinking: Not communicating
ON: Fault
Output Connector:
TE: 3-6450832-8, or FCI: 10106262-7006001LF
Mating Connector: right angle PWB mate – all pins: TE – 1-6450872-6, FCI – 10106264-7006001LF;
right angle PWB mate except pass-thru input power: TE – 6450874-3, FCI – 10106265-70CB001LF
A1
P7
A6
P1
SIGNAL
A
B
C
D
6
SCL_0
SCL_1
SDA_0
SDA_1
5
MOD_PRES
OTW#
Vprog
Fault#
4
PG#
Alert#_0
ON/OFF
5VA
3
LOGIC_GRD
Alert#_1
Rack_ID
Unit_ID
2
RS_485+
RS_485Ishare
Interlock
1
Slot_ID
8V_INT
Protocol
Shelf_ID
P7
V_OUT
(-)
OUTPUT POWER
P6
P5
V_OUT
(+)
V_OUT
(+)
P4
P3
INPUT POWER
P2
P1
V_OUT
(-)
EARTH
(GND)
LINE-2
(Neutral)
LINE-1
(HOT)
Note: Connector is viewed from the rear positioned inside the rectifier
Signal pins columns 1 and 2 are referenced to V_OUT (–) . Slot_ID and Shelf_ID are used only with RS485 communications.
Signal pins columns 3 through 6 are referenced to Logic GRD
Last to make-first to break shortest pin
First make-last to break longest pin implemented in the mating connector
Earth
Appendix
July 21, 2016
©2016 General Electric Company. All rights reserved.
Page 33
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Bus transfer reporting
The events below concentrate on what happens when a clear_faults is issued. The system controller needs to be intelligent enough to inquire the status of the power supply before issuing a clar_faults. Otherwise, it would lose whatever information may be in the status registers. 1
2
operation
i2c1‐command sent, not in control
i2c1 issues a clear_faults
Alert#1
1
0
Alert#0
0
0
status_bus
0xC1
0x01
status_word
0x0000
0x0000
status_cml
0x00
0x00
3
4
5
6
7
8
i2c0 in control, unit issues a fault
i2c1 takes over control
i2c1 read system status
i2c1 issues a clear_faults
i2c0 reads system status
i2c0 issues clear faults
1
1
1
0
0
0
1
1
1
1
1
0
0x01
0x74
0x74
0x14
0x14
0x10
event1
event1
event1
0x0000
0x0000
0x0000
0x00
0x00
0x00
0x00
0x00
0x00
9
10
i2c0 in control, unit issues a fault
i2c0 issues clear faults
1
0
1
0
0x01
0x01
event1
0x0000
0x00
0x00
11
12
13
14
i2c1 in control i2c0 takes over control
i2c0 issues a clear_faults
i2c1 issues a clear_faults
0
1
1
0
0
1
0
0
0x10
0x47
0x41
0x01
0x0000
0x0000
0x0000
0x0000
0x00
0x00
0x00
0x00
15
16
17
18
19
i2c1 in control
i2c0 issues a command
i2c0 issues a clear_faults
i2c1 issues a bad command
i2c1 issues a clear_faults
0
0
0
1
0
0
1
0
0
0
0x10
0x1C
0x10
0x10
0x10
0x0000
0x0000
0x0000
0x0002
0x0000
0x00
0x00
0x00
0x80
0x00
controller needs to read status before clearing the registers. Assuming that the event has cleared
the Alert remains because of status_bus, not because of unit fault
Assuming that the event has cleared
the command is rejected because i2c0 is not in control
Rules:
Side in control is the only one that can clear the Status registers. The side in control cannot clear the alert of the side not in control
A power supply alarm should not set the status_bus registers
Latched status states until cleared
The following bits are sticky until cleared by the customer
Or’ing test failed or passed: I cannot see how it could be otherwise. The customer needs to delete the information (clear_faults)
thus indicating that he received the information.
Restarted_ok: this bit has been removed from the requirements. PMBus latched states replace this bit.
Shutdown: must be sticky – it tells the customer that the rectifier output has been turned OFF
OV, UV, OC, fan, input, unknown warnings & faults, CML Errors, Internal or External Fault: must be sticky
OC and OT response registers are in their own confined state. The only way these should change is by commanding the change
by the controller. So theoretically they are sticky because a clear_faults should never change them.
The way to look at this is, all fault information is sticky (if the fault still persists after a clear_faults has been issued then the fault
state will reassert), all operational state information is not sticky.
July 21, 2016
©2016 General Electric Company. All rights reserved.
Page 34
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Accessories
Item
Description
Part number
1u_CP3500_interface: Rectifier interface board. This debug
tool can be used to evaluate the performance of the rectifier.
The input interface is a standard IEC 320 C20 type socket.
Outputs are connected via standard 0.25 fast-ons.
150039572
Isolated Interface Adapter Kit – interface between a USB port
and the I2C connector on the rectifier interface board. Includes
a cable set to the PC and to the 1u_CP3500_interface board
above.
150036482
The site below downloads the GE Digital Power Insight™
software tools, including the pro_GUI. When the download is
complete, icons for the various utilities will appear on the
desktop. Click on pro_GUI.exe
after the download is complete.
Free download
to start the program
http://www.geindustrial.com/products/embeddedpower
Graphical User Interface Manual; The GUI download created a
directory
directory start the DPI_manual.pdf file.
In that
Software: Remote Upgrade
This GUI upgrades the application codes of all three processors
inside the rectifier. Available in both I2C and GP modes of
operation. Requires both the interface board and the Isolated
Interface Adapter kit revision 1.5 or higher.
In development
Software: Black Box
This GUI translates and displays the contents of the Black Box
In development
Designed to mount into standard 19” EIA-310-D racks, these
GE shelves provide a turn-key solution for customers. Available
in either I2C or GP based interfaces. The selection guide is
documented on the GE website.
See GE website
Single unit cable assembly
850045138
BLACK WIRE
AC INPUT PHASE L2/N
WHITE WIRE
AC INPUT PHASE L1
GREEN/YELLOW
AC GROUND
PIN 13
PIN 24
PIN 12
PIN 1
BLUE WIRE
54VDC NEG
BROWN WIRE
54VDC POS (RTN)
See next page for pin assignment
July 21, 2016
©2016 General Electric Company. All rights reserved.
Page 35
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Individual cable set connector pinout
SINGLE PS CABLE PIN ASSIGNMENT
P1 - MATING INTO THE PS
P2 - END OF EXTENSION
P1
A1
A2
A3
A4
A5
A6
B1
B2
B3
B4
B5
B6
C1
C2
C3
C4
C5
C6
D1
D2
D3
D4
D5
D6
July 21, 2016
P2
.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
SLOT_ID
RS_485+
LOGIC GRD
PFW#
MOD_PRES
SCL_0
8V_INT
RS_485ALERT#_1
ALERT#_0
OTW#
SCL_1
PROTOCOL
ISHARE
RACK_ID
ON/OFF
VPROG
SDA_0
SHELF_ID
INTERLOCK
UNIT_ID
5VA
FAULT#
SDA_1
.
©2016 General Electric Company. All rights reserved.
Page 36
GE
Preliminary Data sheet
CP3500AC52TE-FB Global Platform High Efficiency Rectifier
Input: 100-120/200-240 Vac; 3500W capable; Default set: ±52 Vdc @; 5 Vdc @ 10W
Ordering Information
Please contact your GE Sales Representative for pricing, availability and optional features.
Table 4: Device Codes
Item
CP3500AC52TEZ-FB
Description
3500W output power capacity, 5Vdc @ 2A, RoHS 6/6, Black faceplate
Comcode
150047375
Contact Us
For more information, call us at
USA/Canada:
+1 877 546 3243, or +1 972 244 9288
Asia-Pacific:
+86.021.54279977*808
Europe, Middle-East and Africa:
+49.89.878067-280
http://www.geindustrial.com/products/critical-power
GE Critical Power reserves the right to make changes to the product(s) or information contained herein without notice, and
no liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such
product(s) or information.
July 21, 2016
©2016 General Electric Company. All International rights reserved.
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