LMV1091 Dual Input, Far Field Noise Suppression Microphone

LMV1091 Dual Input, Far Field Noise Suppression Microphone

LMV1091 www.ti.com

SNAS481C – OCTOBER 2009 – REVISED MAY 2013

LMV1091 Dual Input, Far Field Noise Suppression Microphone Amplifier

Check for Samples: LMV1091

1

FEATURES

2

• No Loss of Voice Intelligibility

• Low Power Consumption

• Shutdown Function

• No added Processing Delay

• Differential Outputs

• Adjustable 12 - 54dB Gain

• Excellent RF Immunity

• Available in a 25–Bump DSBGA Package

APPLICATIONS

• Mobile Headset

• Mobile and Handheld Two-way Radios

• Bluetooth and Other Powered Headsets

• Hand-held Voice Microphones

KEY SPECIFICATIONS

• Far Field Noise Suppression Electrical (FFNS

E at f = 1kHz): 34dB (typ)

• SNRI

E

: 26dB (typ)

• Supply Voltage: 2.7V to 5.5V

• Supply Current: 600 μ A (typ)

• Standby Current: 0.1

μ A (typ)

• Signal-to-Noise Ratio (Voice band): 65dB (typ)

• Total Harmonic Distortion + Noise: 0.1% (typ)

• PSRR (217Hz): 99dB (typ)

DESCRIPTION

The LMV1091 is a fully analog dual differential input, differential output, microphone array amplifier designed to reduce background acoustic noise, while delivering superb speech clarity in voice communication applications.

The LMV1091 preserves near-field voice signals within 4cm of the microphones while rejecting far-field acoustic noise greater than 50cm from the microphones. Up to 20dB of far-field rejection is possible in a properly configured and using ±0.5dB

matched micropohones.

Part of the Powerwise™ family of energy efficient solutions, the LMV1091 consumes only 600 μ A of supply current providing superior performance over

DSP solutions consuming greater than ten times the power.

The dual microphone inputs and the processed signal output are differential to provide excellent noise immunity. The microphones are biased with an internal low-noise bias supply.

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright © 2009–2013, Texas Instruments Incorporated

LMV1091

SNAS481C – OCTOBER 2009 – REVISED MAY 2013

System Diagram

Far-field noise, > 50 cm

Tra ffic

Noise

Loud Mu sic

Crowd Noise

Anno unce men ts

Ma ch ine

N oise

Up to 4 cm

+/-0.5 dB matched omnidirectional microphones

LMV1091

Pure analog solution provides superior performance over DSP solutions

Analog

Noise

Canceling

Block

Near-Field Voice

Far field noise reduced by up to 20 dB in properly configured and using

+/-0.5 dB matched microphones

www.ti.com

Typical Application

R

IN3

1.1 k

:

R

IN4

1.1 k

:

V

DD

C

1

1

P

F

V

DD

Mic

Bias

R

IN1

1.1 k

:

C

IN1

470 nF

Mute 2

Mute 1

Mic2+

C

IN2

Mic2-

470 nF

C

IN3

Mic1+

470 nF

C

IN4

Mic1-

470 nF

R

IN2

1.1 k :

GND

Mic

CNTRL

Pre-Amp Gain

(6 - 36 dB)

Bias

REF

C

VREF

10 nF

Shutdown

Mode

+

-

Post-Amp Gain

(6-18 dB)

GA0 GA1 GA2 GA3

SD

Mode 0 Mode 1

GB0 GB1 GB2

* The value of the low-pass filter capacitor is application dependent, see the application section for additional information.

Figure 1. Typical Dual Microphone Far Field noise Cancelling Application

LPF+

OUT+

*

Optimized

Audio

Ouput

LPF-

OUT-

*

Optimized

Audio

Ouput

2

Submit Documentation Feedback

Product Folder Links:

LMV1091

Copyright © 2009–2013, Texas Instruments Incorporated

LMV1091

SNAS481C – OCTOBER 2009 – REVISED MAY 2013

Pin Name

GB0

NC

GA2

REF

MUTE1

GB1

GB2

GA3

VDD

LPF+

OUT+

OUT-

LPF-

SD

MIC BIAS

MIC2+

MIC2–

MIC1+

MIC1–

MODE0

MODE1

GA0

GA1

GND

MUTE2

D2

D3

D4

D5

E1

E2

E3

E4

E5

C2

C3

C4

C5

D1

A5

B1

B2

B3

B4

B5

C1

Bump

Numbe r

A1

A2

A3

A4

www.ti.com

Connection Diagram

1 2 3 4 5

A

Mic

Bias

Mic2+

Mic2-

Mic1+

Mic1-

B

Mode0 Mode1 GA0 GA1

GND

C

Mute2 GB0 NC GA2

REF

D

Mute1 GB1 GB2 GA3

VDD

E

LPF+ OUT+ OUTLPF-

_SD

Figure 2. 25-Bump DSBGA (Top View)

See YFQ0025 Package

PIN NAME AND FUNCTION

Pin Function

Microphone Bias

Microphone 2 positive input

Microphone 2 negative input

Microphone 1 positive input

Microphone 1 negative input

Mic mode select pin

Mic mode select pin

Pre-Amplifier Gain select pin

Pre-Amplifier Gain select pin

Ground

Mute select pin

Post-Amplifier Gain select pin

No Connect

Pre-Amplifier Gain select pin

Reference voltage de-coupling

Mute select pin

Post-Amp Gain select pin

Post-Amp Gain select pin

Pre-Amp Gain select pin

Power Supply

Low pass Filter for positive output

Positive optimized audio output

Negative optimized audio output

Low pass Filter for negative output

Chip enable

Pin Type

Analog Output

Analog Input

Analog Input

Analog Input

Analog Input

Digital Input

Digital Input

Digital Input

Digital Input

Ground

Digital Input

Digital Input

Digital Input

Analog Ref

Digital Input

Digital Input

Digital Input

Digital Input

Supply

Analog Input

Analog Output

Analog Output

Analog Input

Digital Input

Copyright © 2009–2013, Texas Instruments Incorporated

Product Folder Links:

LMV1091

Submit Documentation Feedback

3

LMV1091

SNAS481C – OCTOBER 2009 – REVISED MAY 2013

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

(1) (2)

Supply Voltage

Storage Temperature

Power Dissipation

(3)

ESD Rating

(4)

ESD Rating

(5)

CDM

Junction Temperature (T

JMAX

)

Mounting Temperature Infrared or Convection (20 sec.)

Thermal Resistance

θ

JA

(DSBGA)

Soldering Information See SNVA009A “microSMD Wafer Level Chip Scale Package.”

6.0V

-85°C to +150°C

Internally Limited

2000V

200V

500V

150°C

235°C

70°C/W

(1) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating

Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified.

(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications.

(3) The maximum power dissipation must be de-rated at elevated temperatures and is dictated by T

JMAX

, θ

JC

, and the ambient temperature

T

A

. The maximum allowable power dissipation is P whichever is lower. For the LMV1091, T

JMAX

DMAX

= (T

JMAX

– T

A

) / θ

JA or the number given in the Absolute Maximum Ratings,

= 150°C and the typical θ JA for this DSBGA package is 70°C/W. Refer to the Thermal

Considerations section for more information.

(4) Human body model, applicable std. JESD22-A114C.

(5) Machine model, applicable std. JESD22-A115-A.

Operating Ratings

(1)

Supply Voltage

T

MIN

≤ T

A

≤ T

MAX

2.7V

V

DD

5.5V

− 40°C ≤ T

A

≤ +85°C

(1) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating

Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified.

Electrical Characteristics 3.3V

(1) (2)

Unless otherwise specified, all limits ensured for T

A

20dB, Post Amp gain = 6dB, R

L

= 100k Ω , and C

L

= 25°C, V

DD

= 3.3V, V

IN

= 18mV

P-P

, f = 1kHz, SD = V

= 4.7pF, f = 1kHz pass through mode.

DD

, Pre Amp gain =

Symbol Parameter Conditions

Typical

LMV1091

(3)

Limits

(4)

Units

(Limits)

63 dB

SNR e

N

Signal-to-Noise Ratio

Input Referred Noise level

V

IN

= 18mV

P-P

, A-weighted, Audio band

V

OUT

= 18V

P-P

, voice band (300–3400Hz)

A-Weighted

65

5 dB

μ V

RMS

(1) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating

Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified.

(2) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not ensured.

(3) Typical values represent most likely parametric norms at T

A product characterization and are not ensured.

= +25°C, and at the Recommended Operation Conditions at the time of

(4) Datasheet min/max specification limits are specified by test, or statistical analysis.

4

Submit Documentation Feedback

Copyright © 2009–2013, Texas Instruments Incorporated

Product Folder Links:

LMV1091

LMV1091 www.ti.com

SNAS481C – OCTOBER 2009 – REVISED MAY 2013

Electrical Characteristics 3.3V

(1)(2)

(continued)

Unless otherwise specified, all limits ensured for T

A

20dB, Post Amp gain = 6dB, R

L

= 100k Ω , and C

L

= 25°C, V

DD

= 3.3V, V

IN

= 18mV

P-P

, f = 1kHz, SD = V

= 4.7pF, f = 1kHz pass through mode.

DD

, Pre Amp gain =

V

IN

Maximum Input Signal THD+N < 1%, Pre Amp Gain = 6dB 880 820 mV

P-P

(min)

V

OUT

Maximum AC Output Voltage

Differential Out+, Out-

THD+N < 1%

1.2

1.1

V

RMS

(min)

DC Level at Outputs Out+, Out820 mV

THD+N Total Harmonic Distortion + Noise Differential Out+ and Out0.1

0.2

% (max)

Z

IN

Z

OUT

Input Impedance

Output Impedance

142

220

Z

LOAD

A

M

A

MR

A

P

A

PR

Load Impedance (Out+, Out-)

(5)

Microphone Preamplifier Gain Range

Microphone Preamplifier Gain

Adjustment Resolution

Post Amplifier Gain Range

Post Amplifier Gain Resolution

R

LOAD

C

LOAD

Minimum

Maximum

Minimum

Maximum

6

36

2

6

18

3

10

100

1.7

2.3

2.6

3.4

26 k Ω

Ω k Ω (min) pF (max) dB dB dB (min) dB (max) dB dB dB (min) dB (max)

FFNS

E

SNRI

E

PSRR

CMRR

V

BM e

VBM

I

DDQ

I

DD

Far Field Noise Suppression Electrical

Signal-to-Noise Ratio Improvement

Electrical

Power Supply Rejection Ratio

Common Mode Rejection Ratio

Microphone Bias Supply Voltage

Mic bias noise voltage on V

REF pin

Supply Quiescent Current

Supply Current f = 1kHz (See

Test Methods

) f = 300Hz (See

Test Methods )

f = 1kHz (See

Test Methods

) f = 300Hz (See

Test Methods )

Input Referred, Input AC grounded f

RIPPLE

= 217Hz (V

RIPPLE

= 100mV

P-P

) f

RIPPLE

= 1kHz (V

RIPPLE

= 100mV

P-P

)

Input referred

I

BIAS

= 1.2mA

A-Weighted, C

B

= 10nF

V

IN

= 0V

V

IN

= 25mV

P-P both inputs

Noise cancelling mode

SD pin = GND

99

95

60

34

42

26

33

2.0

0.60

0.1

18

85

80

1.85

2.15

0.8

dB dB dB (min) dB (min) dB

V (min)

V (max)

μ V

RMS mA (max) mA

I

SD

T

ON

T

OFF

Shut Down Current

Turn-On Time

(6)

Turn-Off Time

(6)

7

0.60

0.7

40

60

μ A (max) ms (max) ms (max)

V

IH

V

IL

Logic High Input Threshold

Logic Low Input Threshold

GA0, GA1, GA2, GA3, GB0, GB1, GB2,

Mute1, Mute2,

Mode 0, Mode 1, SD

GA0, GA1, GA2, GA3, GB0, GB1, GB2,

Mute1, Mute2,

Mode 0, Mode 1, SD

1.4

0.4

V (min)

V (max)

(5) Specified by design.

(6) Specified by design.

Copyright © 2009–2013, Texas Instruments Incorporated

Product Folder Links:

LMV1091

Submit Documentation Feedback

5

LMV1091

SNAS481C – OCTOBER 2009 – REVISED MAY 2013

www.ti.com

Electrical Characteristics 5.0V

(1)

Unless otherwise specified, all limits ensured for T

A

Amp gain = 6dB, R

L

= 100k Ω , and C

L

= 25°C, V

DD

= 5V, V

IN

= 18mV

= 4.7pF, f = 1kHz pass through mode.

P-P

, SD = V

DD

, Pre Amp gain = 20dB, Post

Symbol Parameter Conditions

Typical

LMV1091

(2)

Limit

(3)

Units

(Limits)

63 dB

SNR e

N

V

IN

Signal-to-Noise Ratio

Input Referred Noise level

Maximum Input Signal

V

IN

= 18mV

P-P

, A-weighted, Audio band

V

OUT

= 18mV

P-P

, voice band (300–3400Hz)

A-Weighted

THD+N < 1% f = 1kHz, THD+N < 1% between differential output

65

5

880

1.2

820

1.1

dB

μ V

RMS mV

P-P

(min)

V

RMS

(min)

Maximum AC Output Voltage

V

OUT

DC Output Voltage

THD+N Total Harmonic Distortion + Noise

Z

IN

Z

OUT

Input Impedance

Output Impedance

A

M

Microphone Preamplifier Gain Range

Differential Out+ and Out-

Minimum

Maximum

820

0.1

142

220

6

36

0.2

A

MR

A

P

A

PR

Microphone Preamplifier Gain

Adjustment Resolution

Post Amplifier Gain Range

Post Amplifier Gain Adjustment

Resolution

Minimum

Maximum

2

6

18

3

1.7

2.3

2.6

3.4

26 mV

% (max) k Ω

Ω dB dB dB (min) dB (max) dB dB dB (min) dB (max)

FFNS

E

SNRI

E

PSRR

CMRR

V

BM e

VBM

I

DDQ

Far Field Noise Suppression Electrical

Signal-to-Noise Ratio Improvement

Electrical

Power Supply Rejection Ratio

Common Mode Rejection Ratio

Microphone Bias Supply Voltage

Microphone bias noise voltage on V

REF pin

Supply Quiescent Current f = 1kHz (See

Test Methods

) f = 300Hz (See

Test Methods )

f = 1kHz (See

Test Methods

) f = 300Hz (See

Test Methods )

Input Referred, Input AC grounded f

RIPPLE

= 217Hz (V

RIPPLE

= 100mV

P-P

) f

RIPPLE

= 1kHz (V

RIPPLE

= 100mV

P-P

)

Input referred

I

BIAS

= 1.2mA

A-Weighted, C

B

= 10nF

99

95

60

34

42

26

33

2.0

7

0.60

18

85

80

1.85

2.15

0.8

dB dB dB (min) dB (min) dB

V ( min)

V (max)

μ V

RMS mA (max)

I

DD

Supply Current

V

IN

= 0V

V

IN

= 25mV

P-P both inputs

Noise cancelling mode

SD pin = GND

0.60

0.1

mA

I

SD

T

ON

T

OFF

Shut Down Current

Turn On Time

Turn Off Time

40

60

μ

A ms (max) ms (max)

V

IH

V

IL

Logic High Input Threshold

Logic Low Input Threshold

GA0, GA1, GA2, GA3, GB0, GB1, GB2,

Mute1, Mute2,

Mode 0, Mode 1, SD

GA0, GA1, GA2, GA3, GB0, GB1, GB2,

Mute1, Mute2,

Mode 0, Mode 1, SD

1.4

0.4

V (min)

V (max)

(1) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating

Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All

(2) voltages are measured with respect to the ground pin, unless otherwise specified.

Typical values represent most likely parametric norms at T product characterization and are not ensured.

A

= +25°C, and at the Recommended Operation Conditions at the time of

(3) Datasheet min/max specification limits are specified by test, or statistical analysis.

6

Submit Documentation Feedback

Copyright © 2009–2013, Texas Instruments Incorporated

Product Folder Links:

LMV1091

LMV1091

SNAS481C – OCTOBER 2009 – REVISED MAY 2013

www.ti.com

Test Methods

LMV1091

Osc2

Osc1

Mic2+

470 nF

Mic2-

470 nF

Mic1+

470 nF

Mic1-

470 nF

LPF

OUT+

AC Voltmeter

OUT-

Figure 3. FFNS

E

, NFSL

E

, SNRI

E

Test Circuit

FAR FIELD NOISE SUPPRESSION (FFNS

E

)

For optimum noise suppression the far field noise should be in a broadside array configuration from the two microphones (see

Figure 20 ). Which means the far field sound source is equidistance from the two microphones.

This configuration allows the amplitude of the far field signal to be equal at the two microphone inputs, however a slight phase difference may still exist. To simulate a real world application a slight phase delay was added to the

FFNS

E test. The block diagram from

Figure 18

is used with the following procedure to measure the FFNS

E

.

1. A sine wave with equal frequency and amplitude (25mV

P-P

) is applied to Mic1 and Mic2. Using a signal generator, the phase of Mic 2 is delayed by 1.1° when compared with Mic1.

2. Measure the output level in dBV (X)

3. Mute the signal from Mic2

4. Measure the output level in dBV (Y)

5. FFNS

E

= Y - X dB

NEAR FIELD SPEECH LOSS (NFSL

E

)

For optimum near field speech preservation, the sound source should be in an endfire array configuration from the two microphones (see

Figure 21

). In this configuration the speech signal at the microphone closest to the sound source will have greater amplitude than the microphone further away. Additionally the signal at microphone further away will experience a phase lag when compared with the closer microphone. To simulate this, phase delay as well as amplitude shift was added to the NFSL with the following procedure to measure the NFSL

E

.

E test. The schematic from

Figure 18

is used

1. A 25mV

P-P and 17.25mV

P-P

(0.69*25mV

P-P

) sine wave is applied to Mic1 and Mic2 respectively. Once again, a signal generator is used to delay the phase of Mic2 by 15.9° when compared with Mic1.

2. Measure the output level in dBV (X)

3. Mute the signal from Mic2

4. Measure the output level in dBV (Y)

5. NFSL

E

= Y - X dB

SIGNAL TO NOISE RATIO IMPROVEMENT ELECTRICAL (SNRI

E

)

The SNRI

E is the ratio of FFNS

E to NFSL

E and is defined as:

SNRI

E

= FFNS

E

- NFSL

E

Copyright © 2009–2013, Texas Instruments Incorporated

Product Folder Links:

LMV1091

Submit Documentation Feedback

7

LMV1091

SNAS481C – OCTOBER 2009 – REVISED MAY 2013

www.ti.com

Measuring Noise and SNR

The overall noise of the LMV1091 is measured within the frequency band from 10Hz to 22kHz using an Aweighted filter. The Mic+ and Mic- inputs of the LMV1091 are AC shorted between the input capacitors, see

Figure 4

.

LMV1090

Mic2+ short

470 nF

Mic2-

470 nF

Mic1+ short

470 nF

Mic1-

470 nF

LPF

OUT+

A-WEIGHTED

FILTER

AC Voltmeter

OUT-

Figure 4. Noise Measurement Setup

For the signal to noise ratio (SNR) the signal level at the output is measured with a 1kHz input signal of 18mV

P-P using an A-weighted filter. This voltage represents the output voltage of a typical electret condenser microphone at a sound pressure level of 94dB SPL, which is the standard level for these measurements. The LMV1091 is programmed for 26dB of total gain (20dB preamplifier and 6dB postamplifier) with only Mic1 or Mic2 used.

The input signal is applied differentially between the Mic+ and Mic-. Because the part is in Pass Through mode the low-pass filter at the output of the LMV1091 is disabled.

8

Submit Documentation Feedback

Product Folder Links:

LMV1091

Copyright © 2009–2013, Texas Instruments Incorporated

LMV1091 www.ti.com

SNAS481C – OCTOBER 2009 – REVISED MAY 2013

Typical Performance Characteristics

Unless otherwise specified, T

J

= 25°C, V

DD

= 3.3V, Input Voltage = 18mV

20dB, Post Amp gain = 6dB, R

L

= 100k Ω

P-P

, f = 1kHz, pass through mode, Pre Amp gain =

, and C

L

= 4.7pF.

10

THD+N vs

Frequency

Mic1 = AC GND, Mic2 = 36mV

Noise Canceling Mode

P-P

10

THD+N vs

Frequency

Mic2 = AC GND, Mic1 = 36mV

Noise Canceling Mode

P-P

1

0.1

0.01

0.001

20 100 1k

FREQUENCY (Hz)

Figure 5.

10k 20k

10

THD+N vs

Frequency

Mic1 = 36mV

P-P

Mic1 Pass Through Mode

1

0.1

0.01

0.001

20 100 1k

FREQUENCY (Hz)

Figure 6.

10k 20k

THD+N vs

Frequency

Mic2 = 36mV

P-P

Mic2 Pass Through Mode

10

1

0.1

0.01

0.001

20 100 1k

FREQUENCY (Hz)

Figure 7.

10k 20k

100

THD+N vs

Input Voltage

Mic1 = AC GND, f = 1kHz

Mic2 Noise Canceling Mode

10

1

0.1

0.01

0.001

20 100 1k

FREQUENCY (Hz)

Figure 8.

10k 20k

100

THD+N vs

Input Voltage

Mic2 = AC GND, f = 1kHz

Mic1 Noise Canceling Mode

10

1

0.1

1

0.1

0.01

0.001

0.01

0.1

INPUT VOLTAGE (V

P-P

)

Figure 9.

Copyright © 2009–2013, Texas Instruments Incorporated

1

Product Folder Links:

LMV1091

0.01

0.001

0.01

0.1

INPUT VOLTAGE (V

P-P

)

Figure 10.

1

Submit Documentation Feedback

9

LMV1091

SNAS481C – OCTOBER 2009 – REVISED MAY 2013

www.ti.com

Typical Performance Characteristics (continued)

Unless otherwise specified, T

J

= 25°C, V

DD

20dB, Post Amp gain = 6dB, R

L

= 100k Ω

= 3.3V, Input Voltage = 18mV

, and C

L

= 4.7pF.

P-P

, f = 1kHz, pass through mode, Pre Amp gain =

THD+N vs

Input Voltage f = 1kHz

Mic1 Pass Through Mode

THD+N vs

Input Voltage f = 1kHz

Mic2 Pass Through Mode

100 100

10 10

1 1

0.1

0.1

10

0.01

0.001

0.01

0.1

INPUT VOLTAGE (V

P-P

)

Figure 11.

1

PSRR vs

Frequency

Pre Amp Gain = 20dB, Post Amp Gain = 6dB

V

RIPPLE

= 100mV

P-P

, Mic1 = Mic2 = AC GND

Mic1 Pass Through Mode

+0

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

20 10k 20k 100 1k

FREQUENCY (Hz)

Figure 13.

PSRR vs

Frequency

Pre Amp Gain = 20dB, Post Amp Gain = 6dB

V

RIPPLE

= 100mV

P-P

, Mic1 = Mic2 = AC GND

Noise Canceling Mode

+0

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

20 100 1k

FREQUENCY (Hz)

10k 20k

Figure 15.

Submit Documentation Feedback

Product Folder Links:

LMV1091

0.01

0.001

0.01

0.1

INPUT VOLTAGE (V

P-P

)

Figure 12.

1

PSRR vs

Frequency

Pre Amp Gain = 20dB, Post Amp Gain = 6dB

V

RIPPLE

= 100mV

P-P

, Mic1 = Mic2 = AC GND

Mic2 Pass Through Mode

+0

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

20 10k 20k 100 1k

FREQUENCY (Hz)

Figure 14.

Far Field Noise Suppression Electrical vs

Frequency

60

50

40

30

20

10

0

100 1k

FREQUENCY (Hz)

Figure 16.

10k

Copyright © 2009–2013, Texas Instruments Incorporated

LMV1091 www.ti.com

SNAS481C – OCTOBER 2009 – REVISED MAY 2013

Typical Performance Characteristics (continued)

Unless otherwise specified, T

J

= 25°C, V

DD

20dB, Post Amp gain = 6dB, R

L

= 100k Ω

= 3.3V, Input Voltage = 18mV

, and C

L

= 4.7pF.

P-P

, f = 1kHz, pass through mode, Pre Amp gain =

35

Signal-to-Noise Ratio Electrical vs

Frequency

30

25

20

15

10

5

0

100 10k 1k

FREQUENCY (Hz)

Figure 17.

Copyright © 2009–2013, Texas Instruments Incorporated

Product Folder Links:

LMV1091

Submit Documentation Feedback

11

LMV1091

SNAS481C – OCTOBER 2009 – REVISED MAY 2013

www.ti.com

APPLICATION DATA

INTRODUCTION

The LMV1091 is a fully analog single chip solution to reduce the far field noise picked up by microphones in a communication system. A simplified block diagram is provided in

Figure 18

.

Preamp Gain

(6 dB - 36 dB)

Post Amp Gain

(6 dB - 18 dB)

Mic1

Analog

Noise

Cancelling

Block

OUT+

Optimized

Audio

Ouput

OUT-

Mic2

Figure 18. Simplified Block Diagram of the LMV1091

The output signal of the microphones is amplified by a pre-amplifier with adjustable gain between 6dB and 36dB.

After the signals are matched the analog noise cancelling suppresses the far field noise signal. The output of the analog noise cancelling processor is amplified in the post amplifier with adjustable gain between 6dB and 18dB.

For optimum noise and EMI immunity, the microphones have a differential connection to the LMV1091 and the output of the LMV1091 is also differential. The adjustable gain functions can be controlled via GA0–GA3 and

GB0–GB2 pins.

Power Supply Circuits

A low drop-out (LDO) voltage regulator in the LMV1091 allows the device to be independent of supply voltage variations.

The Power On Reset (POR) circuitry in the LMV1091 requires the supply voltage to rise from 0V to V

DD than 100ms.

in less

The Mic Bias output is provided as a low noise supply source for the electret microphones. The noise voltage on the Mic Bias microphone supply output pin depends on the noise voltage on the internal the reference node. The de-coupling capacitor on the V

REF pin determines the noise voltage on this internal reference. This capacitor should be larger than 1nF; having a larger capacitor value will result in a lower noise voltage on the Mic Bias output.

Gain Balance and Gain Budget

In systems where input signals have a high dynamic range, critical noise levels or where the dynamic range of the output voltage is also limited, careful gain balancing is essential for the best performance. Too low of a gain setting in the preamplifier can result in higher noise levels while too high of a gain setting in the preamplifier will result in clipping and saturation in the noise cancelling processor and output stages.

The gain ranges and maximum signal levels for the different functional blocks are shown in

Figure 19 . Two

examples are given as a guideline on how to select proper gain settings.

12

Submit Documentation Feedback

Product Folder Links:

LMV1091

Copyright © 2009–2013, Texas Instruments Incorporated

www.ti.com

Mic1 or

Mic2

Pre Amp

Gain

(6 dB - 36 dB)

Gain

(Max. 0 dB)

Analog

Noise

Cancelling

Block

LMV1091

SNAS481C – OCTOBER 2009 – REVISED MAY 2013

Post Amp Gain

(6 dB - 18 dB)

OUT+

Optimized

Audio

Ouput

OUT-

Maximum

AC Input

Voltage

<440 mVpp

Maximum

AC Input

Voltage

<1.6 Vpp

Maximum

AC Intput

Voltage

<1.6 Vpp

Maximum

AC Output

Voltage

<3.2 Vpp

Figure 19. Maximum Signal Levels

Example 1

An application using microphones with 50mV

P-P

LMV1091 with 1.5V

P-P maximum input voltage.

maximum output voltage, and a baseband chip after the

For optimum noise performance, the gain of the input stage should be set to the maximum.

1. 50mV

P-P

+36dB = 3.1V

P-P

.

2. 3.1V

P-P is higher than the maximum 1.5V

gain lower than 29.5dB should be selected.

P-P allowed for the Noise Cancelling Block (NCB). This means a

3. Select the nearest lower gain from the gain settings shown in

Table 1 , 28dB is selected. This will prevent the

NCB from being overloaded by the microphone. With this setting, the resulting output level of the Pre

Amplifier will be 1.26V

P-P

.

4. The NCB has a gain of 0dB which will result in 1.26V

P-P at the output of the LMV1091. This level is less than maximum level that is allowed at the input of the post amp of the LMV1091.

5. The baseband chip limits the maximum output voltage to 1.5V

P-P with the minimum of 6dB post amp gain, this results in requiring a lower level at the input of the post amp of 0.75V

P-P

. Now calculating this for a maximum preamp gain, the output of the preamp must be no more than 0.75mV

P-P

.

6. Calculating the new gain for the preamp will result in <23.5dB gain.

7. The nearest lower gain will be 22dB.

So using preamp gain = 22dB and postamp gain = 6dB is the optimum for this application.

Example 2

An application using microphones with 10mV

P-P

LMV1091 with 3.3V

P-P maximum input voltage.

maximum output voltage, and a baseband chip after the

For optimum noise performance we would like to have the maximum gain at the input stage.

1. 10mV

P-P

+ 36dB = 631mV

P-P

.

2. This is lower than the maximum 1.5V

P-P

, so this is OK.

3. The NCB has a gain of 0dB which will result in 1.5V

P-P at the output of the LMV1091. This level is lower than the maximum level that is allowed at the input of the Post Amp of the LMV1091.

4. With a Post Amp gain setting of 6dB the output of the Post Amp will be 3V

P-P which is OK for the baseband.

5. The nearest lower Post Amp gain will be 6dB.

So using preamp gain = 36dB and postamp gain = 6dB is optimum for this application.

Pre-Amp/Post-Amp Gains

The Pre-amplifier gain of the LMV1091TM can be controlled using the GA0-GA3 pins. See

Table 1

below for

Pre-amplifier gain control. The Post-Amp gain can be controlled using the GB0-GB2 pins. See

Table 2

below for

Post-amplifier gain control.

Copyright © 2009–2013, Texas Instruments Incorporated

Product Folder Links:

LMV1091

Submit Documentation Feedback

13

LMV1091

SNAS481C – OCTOBER 2009 – REVISED MAY 2013

0

0

0

0

1

GA3

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

0

GA2

0

0

0

0

1

1

1

1

0

0

0

Table 1. Mic Pre-Amp Gain Settings

0

0

1

1

0

GA1

0

0

1

1

1

1

0

0

0

1

1

0

1

0

1

0

GA0

0

1

0

1

0

1

0

1

1

0

1

GB2

0

0

0

0

1

1

1

1

GB1

0

0

1

1

0

0

1

1

Table 2. Post-Amp Gain Settings

GB0

0

1

0

1

0

1

0

1

Pre-Amplifier Gain

6dB

8dB

10dB

12dB

14dB

16dB

18dB

20dB

22dB

24dB

26dB

28dB

30dB

32dB

34dB

36dB

Post-Amplifier Gain

6dB

9dB

12dB

15dB

18dB

18dB

18dB

18dB

www.ti.com

Noise Reduction Mode Settings

The LMV1091TM has four mode settings. It can be placed in noise cancellation mode, mic 1 on with mic 2 off, mic 1 off with mic 2 on, and mic1 and mic2. See

Table 3

for control settings.

Mode 1

0

0

1

1

Table 3. Noise Reduction Mode Settings

Mode 0

0

1

0

1

Noise Reduction Mode Selection

Noise cancelling mode

Only Mic 1 On

Only Mic 2 On

Mic 1 + Mic 2

Mute Section

Mic 1 and Mic 2 can be muted independently, using the Mute 1 and Mute 2 pins. See

Table 4

for control settings.

14

Submit Documentation Feedback

Product Folder Links:

LMV1091

Copyright © 2009–2013, Texas Instruments Incorporated

LMV1091 www.ti.com

Mute 2

0

0

1

1

SNAS481C – OCTOBER 2009 – REVISED MAY 2013

Table 4. Noise Reduction Mode Settings

Mute 1

0

1

0

1

Mute Mode Selection

Mic 1 an Mic 2 on

Mic 1 mute

Mic 2 mute

Mic 1 and Mic 2 mute

Microphone Placement

Because the LMV1091 is a microphone array Far Field Noise Reduction solution, proper microphone placement is critical for optimum performance. Two things need to be considered: The spacing between the two microphones and the position of the two microphones relative to near field source

If the spacing between the two microphones is too small near field speech will be canceled along with the far field noise. Conversely, if the spacing between the two microphones is large, the far field noise reduction performance will be degraded. The optimum spacing between Mic 1 and Mic 2 is 1.5-2.5cm. This range provides a balance of minimal near field speech loss and maximum far field noise reduction. The microphones should be in line with the desired sound source 'near speech' and configured in an endfire array (see

Figure 21

) orientation from the sound source. If the 'near speech' (desired sound source) is equidistant to the source like a broadside array (see

Figure 20 ) the result will be a great deal of near field speech loss.

NEAR

SPEECH

LMV1091

WRONG

Figure 20. Broadside Array (WRONG)

OPTIMIZED

SPEECH

1.5~2.5 cm

LMV1091

CORRECT

OPTIMIZED

SPEECH

Figure 21. Endfire Array (CORRECT)

Copyright © 2009–2013, Texas Instruments Incorporated

Product Folder Links:

LMV1091

Submit Documentation Feedback

15

LMV1091

SNAS481C – OCTOBER 2009 – REVISED MAY 2013

www.ti.com

Low-Pass Filter At The Output

At the output of the LMV1091 there is a provision to create a 1 st order low-pass filter (only enabled in 'Noise

Cancelling' mode). This low-pass filter can be used to compensate for the change in frequency response that results from the noise cancellation process. The change in frequency response resembles a first-order high-pass filter, and for many of the applications it can be compensated by a first-order low-pass filter with cutoff frequency between 1.5kHz and 2.5kHz.

The transfer function of the low-pass filter is derived as:

Post Amplifier gain

H(s) = sR f

C f

+1

(1)

This low-pass filter is created by connecting a capacitor between the LPF pin and the OUT pin of the LMV1091.

The value of this capacitor also depends on the selected output gain. For different gains the feedback resistance in the low-pass filter network changes as shown in

Table 5 .

This will result in the following values for a cutoff frequency of 2000 Hz:

Table 5. Low-Pass Filter Capacitor For 2kHz

Post Amplifier Gain Setting (dB)

6

9

12

15

18

R f

(k Ω )

20

29

40

57

80

C f

(nF)

3.9

2.7

2.0

1.3

1.0

A-Weighted Filter

The human ear is sensitive for acoustic signals within a frequency range from about 20Hz to 20kHz. Within this range the sensitivity of the human ear is not equal for each frequency. To approach the hearing response, weighting filters are introduced. One of those filters is the A-weighted filter.

The A-weighted filter is used in signal to noise measurements, where the wanted audio signal is compared to device noise and distortion.

The use of this filter improves the correlation of the measured values to the way these ratios are perceived by the human ear.

10

0

-10

-20

-30

-40

-50

-60

-70

10 100 1k

FREQUENCY (Hz)

10k 100k

Figure 22. A-Weighted Filter

16

Submit Documentation Feedback

Product Folder Links:

LMV1091

Copyright © 2009–2013, Texas Instruments Incorporated

www.ti.com

Rev

1.0

1.01

1.02

C

Date

10/28/09

05/17/10

01/13/11

05/02/13

LMV1091

SNAS481C – OCTOBER 2009 – REVISED MAY 2013

Table 6. Revision History

Description

Initial released.

Changed the unit measure of the X1, X2, and X3 (under the Physical Dimension) from mm to μ m.

Fixed typos on Figure 1 (Typical Application diagram).

Changed layout of National Data Sheet to TI format

Copyright © 2009–2013, Texas Instruments Incorporated

Product Folder Links:

LMV1091

Submit Documentation Feedback

17

PACKAGE OPTION ADDENDUM

www.ti.com

3-May-2013

PACKAGING INFORMATION

Orderable Device

LMV1091TM/NOPB

Status

(1)

NRND

Package Type Package

Drawing

Pins Package

Qty

DSBGA YFQ 25 250

Eco Plan

(2)

Green (RoHS

& no Sb/Br)

Lead/Ball Finish MSL Peak Temp

(3)

SNAGCU Level-1-260C-UNLIM

Op Temp (°C)

-40 to 85 ZA4

Top-Side Markings

(4)

LMV1091TMX/NOPB NRND DSBGA YFQ 25 3000 Green (RoHS

& no Sb/Br)

SNAGCU Level-1-260C-UNLIM -40 to 85

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

ZA4

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)

Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Samples

Addendum-Page 1

MECHANICAL DATA

YFQ0025xxx

D

0.600

±0.075

E

TMD25XXX (Rev C)

D: Max = 2.04 mm, Min = 1.98 mm

E: Max = 2.04 mm, Min = 1.98 mm

NOTES: A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.

B. This drawing is subject to change without notice.

4215084/A 12/12

www.ti.com

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily performed.

TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide adequate design and operating safeguards.

TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI.

Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions.

Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.

TI is not responsible or liable for any such statements.

Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications.

In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements. Nonetheless, such components are subject to these terms.

No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties have executed a special agreement specifically governing such use.

Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use.

TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.

Products Applications

Audio

Amplifiers

Data Converters

DLP® Products

DSP

Clocks and Timers

Interface

Logic

Power Mgmt

Microcontrollers

RFID

OMAP Applications Processors

Wireless Connectivity www.ti.com/audio amplifier.ti.com

dataconverter.ti.com

www.dlp.com

dsp.ti.com

www.ti.com/clocks interface.ti.com

logic.ti.com

power.ti.com

microcontroller.ti.com

www.ti-rfid.com

www.ti.com/omap

Automotive and Transportation www.ti.com/automotive

Communications and Telecom www.ti.com/communications

Computers and Peripherals

Consumer Electronics

Energy and Lighting

Industrial

Medical

Security www.ti.com/computers www.ti.com/consumer-apps www.ti.com/energy www.ti.com/industrial www.ti.com/medical www.ti.com/security

Space, Avionics and Defense www.ti.com/space-avionics-defense

Video and Imaging

TI E2E Community

www.ti.com/wirelessconnectivity www.ti.com/video e2e.ti.com

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

Copyright © 2013, Texas Instruments Incorporated

Was this manual useful for you? yes no
Thank you for your participation!

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project