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LM4923, LM4923LQBD www.ti.com
LM4923
1
FEATURES
2
• Fully Differential Amplification
• Available in Space-saving WQFN Package
• Ultra Low Current Shutdown Mode
• Can Drive Capacitive Loads up to 100pF
• Improved Pop & Click Circuitry Eliminates
Noises During Turn-on and Turn-off
Transitions
• 2.4 - 5.5V Operation
• No Output Coupling Capacitors, Snubber
Networks or Bootstrap Capacitors Required
APPLICATIONS
• Mobile Phones
• PDAs
• Portable Electronic Devices
SNAS211E – JULY 2004 – REVISED MAY 2013
1.1 Watt Fully Differential Audio Power Amplifier
With Shutdown Select
Check for Samples: LM4923 , LM4923LQBD
KEY SPECIFICATIONS
• Improved PSRR at 217Hz 85dB(typ)
• Power Output at 5.0V @ 1% THD+N 1.1W(typ)
• Power Output at 3.3V @ 1% THD+N
400mW(typ)
• Shutdown Current 0.1
μ
A(typ)
DESCRIPTION
The LM4923 is a fully differential audio power amplifier primarily designed for demanding applications in mobile phones and other portable communication device applications. It is capable of delivering 1.1 watt of continuous average power to an
8 Ω BTL load with less than 1% distortion (THD+N) from a 5V
DC power supply.
Boomer audio power amplifiers were designed specifically to provide high quality output power with a minimal amount of external components.
The
LM4923 does not require output coupling capacitors or bootstrap capacitors, and therefore is ideally suited for mobile phone and other low voltage applications where minimal power consumption is a primary requirement.
The LM4923 features a low-power consumption shutdown mode. To facilitate this, Shutdown may be enabled by logic low. Additionally, the LM4923 features an internal thermal shutdown protection mechanism.
The LM4923 contains advanced pop & click circuitry which eliminates noises which would otherwise occur during turn-on and turn-off transitions.
Connection Diagrams
IN1
V
O
-
8
GND
7
6 BYP
IN-
IN+
V
DD
V
O
+
V
O
-
GND
BYP
SD
IN+
2 5 SD
3 4
V
DD
V
O
+
Figure 1. NGP Package, Top View
See Package Number NGP0008A
Figure 2. 8 Pin VSSOP Package, Top View
See Package Number DGK0008A
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 2004–2013, Texas Instruments Incorporated
LM4923, LM4923LQBD
SNAS211E – JULY 2004 – REVISED MAY 2013
Typical Application
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C
S
1 P F
+
V
DD
R
F
1
20 k
:
R i
1
20 k :
-IN
-
Differential Input
-
+
V
O
+
SD
Bias
Common
Mode
R
L
8 :
-
V
O
-
+
Differential Input
1.0 P F
R i
2
20 k
:
R
F
2
20 k :
C
B
BYP
+IN
GND
+
Figure 3. Typical Audio Amplifier Application Circuit
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1) (2)
Supply Voltage
Storage Temperature
Input Voltage
Power Dissipation
(3)
ESD Susceptibility
(4)
ESD Susceptibility
(5)
Junction Temperature
Thermal Resistance θ
JA
(WQFN)
θ
JA
(DGK)
θ
JC
(DGK)
Soldering Information
See AN-1187 ( SNOA401 )
6.0V
− 65°C to +150°C
− 0.3V to V
DD
+0.3V
Internally Limited
2000V
200V
150°C
140°C/W
210°C/W
56°C/W
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications.
(3) The maximum power dissipation must be derated at elevated temperatures and is dictated by T
JMAX
, θ
JA
, and the ambient temperature
T
A
. The maximum allowable power dissipation is P
DMAX
= (T
JMAX
– T
A
) / θ
JA or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4923, see power derating curve for additional information.
(4) Human body model, 100pF discharged through a 1.5k
Ω resistor.
(5) Machine Model, 220pF – 240pF discharged through all pins.
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Operating Ratings
Temperature Range
T
MIN
≤ T
A
≤ T
MAX
Supply Voltage
LM4923, LM4923LQBD
SNAS211E – JULY 2004 – REVISED MAY 2013
− 40°C ≤ T
A
≤ 85°C
2.4V
≤ V
DD
≤ 5.5V
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SNAS211E – JULY 2004 – REVISED MAY 2013
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Electrical Characteristics V
DD
= 5V
(1) (2)
The following specifications apply for V
DD
= 5V, A
V
= 1, and 8 Ω load unless otherwise specified. Limits apply for T
A
= 25°C.
Symbol Parameter Conditions
Typical
(3)
LM4923
Limit
(4)
Units
(Limits)
I
DD
I
SD
P o
THD+N
PSRR
CMRR
V
OS
V
SDIH
V
SDIL
Quiescent Power Supply Current
Shutdown Current
Output Power
Total Harmonic Distortion+Noise
Power Supply Rejection Ratio
Common_Mode Rejection Ratio
Output Offset
Shutdown Voltage Input High
Shutdown Voltage Input Low
V
IN
V
IN
= 0V, no load
= 0V, R
L
= 8 Ω
V
SHUTDOWN
= GND
THD = 1% (max); f = 1 kHz
LM4923, R
L
= 8 Ω
P o
= 0.4 Wrms; f = 1kHz
V ripple
= 200mV sine p-p f = 217Hz
(5) f = 1kHz
(5)
V
CM f = 217Hz,
= 200mV pp
V
IN
= 0V
4
4
0.1
1.1
0.02
4
0.9
0.7
85
85
50
1
73
73
9
9
1 mA (max)
µA (max)
% dB mV
V
V
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance.
(3) Typicals are measured at 25°C and represent the parametric norm.
(4) Datasheet min/max specification limits are specified by design, test, or statistical analysis.
(5) 10 Ω terminated input.
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SNAS211E – JULY 2004 – REVISED MAY 2013
Electrical Characteristics V
DD
= 3V
(1) (2)
The following specifications apply for V
DD
= 3V, A
V
= 1, and 8 Ω load unless otherwise specified. Limits apply for T
A
= 25°C.
Symbol Parameter Conditions
Typical
(3)
LM4923
Limit
(4)
Units
(Limits)
I
DD
I
SD
P o
THD+N
PSRR
CMRR
Quiescent Power Supply Current
Shutdown Current
Output Power
Total Harmonic Distortion+Noise
Power Supply Rejection Ratio
Common-Mode Rejection Ratio
V
IN
V
IN
= 0V, no load
= 0V, R
L
= 8 Ω
V
SHUTDOWN
= GND
THD = 1% (max); f = 1kHz
LM4923, R
L
= 8 Ω
P o
= 0.25Wrms; f = 1kHz
V ripple
= 200mV sine p-p f = 217Hz
(5) f = 1kHz
(5)
V
CM f = 217Hz
= 200mV pp
V
IN
= 0V
3
3
0.1
0.375
0.02
5.5
5.5
1
73 mA (max)
µA (max)
W
% dB
V
OS
V
SDIH
V
SDIL
Output Offset
Shutdown Voltage Input High
Shutdown Voltage Input Low
85
85
50
4
0.8
0.6
mV
V
V
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance.
(3) Typicals are measured at 25°C and represent the parametric norm.
(4) Datasheet min/max specification limits are specified by design, test, or statistical analysis.
(5) 10
Ω terminated input.
EXTERNAL COMPONENTS DESCRIPTION
(
)
Components
1.
2.
3.
R
R f
C
S i
4.
C
B
Functional Description
Inverting input resistance which sets the closed-loop gain in conjunction with R f
.
Feedback resistance which sets the closed-loop gain in conjunction with R i
.
Supply bypass capacitor which provides power supply filtering. Refer to the
section for information concerning proper placement and selection of the supply bypass capacitor.
Bypass pin capacitor which provides half-supply filtering. Refer to the section,
, for information concerning proper placement and selection of C
B
.
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Typical Performance Characteristics
10
V
DD
THD+N vs
Frequency
= 2.6V, R
L
= 8 Ω , P
O
= 150mW
10
V
DD
THD+N vs
Frequency
= 2.6V, R
L
= 4 Ω , P
O
= 150mW www.ti.com
1 1
0.1
0.01
0.001
20 100 1k
FREQUENCY (Hz)
Figure 4.
10k 20k
10
V
DD
THD+N vs
Frequency
= 5V, R
L
= 8 Ω , P
O
= 400mW
1
0.1
0.01
0.001
20 100 1k
FREQUENCY (Hz)
Figure 6.
10k 20k
10
V
DD
THD+N vs
Frequency
= 3V, R
L
= 4 Ω , P
O
= 225mW
1
0.1
0.01
0.001
20 100 1k
FREQUENCY (Hz)
Figure 8.
10k 20k
0.1
0.01
0.001
20 100 1k
FREQUENCY (Hz)
Figure 5.
10k 20k
10
V
DD
THD+N vs
Frequency
= 3V, R
L
= 8 Ω , P
O
= 275mW
1
0.1
0.01
0.001
20 100 1k
FREQUENCY (Hz)
Figure 7.
V vs
Output Power
DD
THD+N
= 2.6V, R
L
= 8 Ω
10k 20k
10
1
20 kHz
0.1
1 kHz
0.01
20 Hz
0.001
10m 100m
OUTPUT POWER (W)
Figure 9.
1
6
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1
0.1
LM4923, LM4923LQBD
SNAS211E – JULY 2004 – REVISED MAY 2013
Typical Performance Characteristics (continued)
THD+N vs
V
Output Power
DD
= 2.6V, R
L
= 4 Ω
10
THD+N vs
V
Output Power
DD
= 5V, R
L
= 8 Ω
20 kHz
1
20 kHz
1 kHz
0.1
1 kHz
20 Hz
0.01
20 Hz
0.001
10m 100m
OUTPUT POWER (W)
Figure 10.
THD+N vs
V
Output Power
DD
= 3V, R
L
= 8 Ω
10
1
0.01
0.001
10m 100m
OUTPUT POWER (W)
Figure 11.
1 2
THD+N vs
V
Output Power
DD
= 3V, R
L
= 4 Ω
10
1
0.1
20 kHz
1 kHz
1
20 kHz
1 kHz
0.1
0.01
20 Hz
0.01
20 Hz
0.001
10m 100m
OUTPUT POWER (W)
Figure 12.
1
V
0
DD
= 5V, R
L
PSRR vs
Frequency
= 8 Ω , Input terminated
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
20 100k 100 1k 10k
FREQUENCY (Hz)
Figure 14.
0.001
10m 100m
OUTPUT POWER (W)
Figure 13.
1
V
0
DD
PSRR vs
= 3V, R
L
Frequency
= 8 Ω , Input terminated
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
20 100k 100 1k 10k
FREQUENCY (Hz)
Figure 15.
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2
1.8
1.6
1.4
1.2
1
800m
600m
400m
200m
0
2.4
Typical Performance Characteristics (continued)
Output Power vs
Supply Voltage
R
L
= 8 Ω
0
CMRR vs
V
DD
Frequency
= 5V, R
L
= 8 Ω
10% THD+N
1% THD+N
5.5
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
20 3 3.5
4 4.5
SUPPLY VOLTAGE (V)
Figure 16.
5 100 1k
FREQUENCY (Hz)
Figure 17.
10k 20k
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CMRR vs
V
DD
Frequency
= 3V, R
L
= 8 Ω
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
20 100 1k
FREQUENCY (Hz)
Figure 18.
10k 20k
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
0
0
PSRR vs
V
Common Mode Voltage
DD
= 5V, R
L
= 8 Ω , f = 217Hz
1 2 3 4
DC COMMON-MODE VOLTAGE (V)
Figure 20.
5
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
0
0
PSRR vs
V
Common Mode Voltage
DD
= 3V, R
L
= 8 Ω , f = 217Hz
T
1 2 3 4
DC COMMON-MODE VOLTAGE (V)
Figure 19.
5
0.35
0.3
0.25
0.2
0.15
0.1
0.4
V
DD
Power Dissipation vs
Output Power
= 2.6V, R
L
= 8 Ω and 4 Ω
R
L
= 8 :
R
L
= 4 :
0.05
0
0 0.1
0.2
0.3
OUTPUT POWER (W)
Figure 21.
0.4
8
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Typical Performance Characteristics (continued)
Power Dissipation vs
V
Output Power
DD
= 5V, R
L
= 8 Ω
0.25
Power Dissipation vs
V
Output Power
DD
= 3V, R
L
= 8 Ω
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0 0.2
0.4
0.6
0.8
1
OUTPUT POWER (W)
Figure 22.
1.2
1.4
0.2
0.15
0.1
0.05
0
0 0.1
0.2
0.3
OUTPUT POWER (W)
Figure 23.
0.4
0.5
Noise Floor
V
DD
= 5V Power Derating Curve
0.4
0.3
0.2
0.1
0.7
0.6
0.5
0
0
20 40 60 80 100 120 140 160
AMBIENT TEMPERATURE ( o
C)
Figure 24.
100
P
10
P
1
P
Vo1 + Vo2
Shutdown On
100
P
10 P
1
P
100n
20
Noise Floor
V
DD
= 3V
Vo1 + Vo2
Shutdown On
100 1k
FREQUENCY (Hz)
Figure 26.
10k 20k
100n
20 100 1k
FREQUENCY (Hz)
Figure 25.
10k 20k
0.8
0.7
0.6
0.5
Clipping Voltage vs
Supply Voltage
R
L
= 4 : Top
R
L
= 4 : Bottom
0.4
0.3
R
L
= 8 : Top
0.2
R
L
= 8 : Bottom
0.1
0
1.5
2 2.5
3 3.5
4 4.5
5 5.5
6
SUPPLY VOLTAGE (V)
Figure 27.
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1.6
1.4
1.2
1.0
Typical Performance Characteristics (continued)
Output Power vs
Load Resistance Supply Current Shutdown Voltage
5
5V, 10% THD+N
5V, 1% THD+N
0.8
0.6
3V, 10% THD+N
3V, 1% THD+N
0.4
2.6V, 10% THD+N
0.2
0
2.6V, 1% THD+N
4 8 12
16
20 24
LOAD RESISTANCE ( : )
Figure 28.
28 32
4
3
2
1
0
-1
0 0.5
1 1.5
2
SHUTDOWN VOLTAGE (V)
Figure 29.
2.5
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SNAS211E – JULY 2004 – REVISED MAY 2013
APPLICATION INFORMATION
DIFFERENTIAL AMPLIFIER EXPLANATION
The LM4923 is a fully differential audio amplifier that features differential input and output stages. Internally this is accomplished by two circuits: a differential amplifier and a common mode feedback amplifier that adjusts the output voltages so that the average value remains V
DD
/ 2. When setting the differential gain, the amplifier can be considered to have "halves". Each half uses an input and feedback resistor (R i1 and R
F1
) to set its respective closed-loop gain (see Figure 1). With R i1 in a differential gain of
= R i2 and R
F1
= R
F2
, the gain is set at -R
F
/ R i for each half. This results
A
VD
= -R
F
/R i
(1)
It is extremely important to match the input resistors to each other, as well as the feedback resistors to each other for best amplifier performance. See the
Proper Selection of External Components
section for more information. A differential amplifier works in a manner where the difference between the two input signals is amplified. In most applications, this would require input signals that are 180° out of phase with each other. The
LM4923 can be used, however, as a single ended input amplifier while still retaining its fully differential benefits.
In fact, completely unrelated signals may be placed on the input pins. The LM4923 simply amplifies the difference between them.
All of these applications provide what is known as a "bridged mode" output (bridge-tied-load, BTL). This results in output signals at V o1 and V o2 that are 180° out of phase with respect to each other. Bridged mode operation is different from the single-ended amplifier configuration that connects the load between the amplifier output and ground. A bridged amplifier design has distinct advantages over the single-ended configuration: it provides differential drive to the load, thus doubling maximum possible output swing for a specific supply voltage. Four times the output power is possible compared with a single-ended amplifier under the same conditions. This increase in attainable output power assumes that the amplifier is not current limited or clipped. In order to choose an amplifier's closed-loop gain without causing excess clipping, please refer to the
section.
A bridged configuration, such as the one used in the LM4923, also creates a second advantage over singleended amplifiers. Since the differential outputs, V o1 and V o2
, are biased at half-supply, no net DC voltage exists across the load. This assumes that the input resistor pair and the feedback resistor pair are properly matched
(see
PROPER SELECTION OF EXTERNAL COMPONENTS ). BTL configuration eliminates the output coupling
capacitor required in single-supply, single-ended amplifier configurations. If an output coupling capacitor is not used in a single-ended output configuration, the half-supply bias across the load would result in both increased internal IC power dissipation as well as permanent loudspeaker damage. Further advantages of bridged mode operation specific to fully differential amplifiers like the LM4923 include increased power supply rejection ratio, common-mode noise reduction, and click and pop reduction.
EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATIONS
The LM4923's exposed-DAP (die attach paddle) package (WQFN) provide a low thermal resistance between the die and the PCB to which the part is mounted and soldered. This allows rapid heat transfer from the die to the surrounding PCB copper traces, ground plane and, finally, surrounding air. Failing to optimize thermal design may compromise the LM4923's high power performance and activate unwanted, though necessary, thermal shutdown protection. The WQFN package must have its DAP soldered to a copper pad on the PCB. The DAP's
PCB copper pad is connected to a large plane of continuous unbroken copper. This plane forms a thermal mass and heat sink and radiation area. Place the heat sink area on either outside plane in the case of a two-sided
PCB, or on an inner layer of a board with more than two layers. Connect the DAP copper pad to the inner layer or backside copper heat sink area with a thermal via. The via diameter should be 0.012in - 0.013in. Ensure efficient thermal conductivity by plating-through and solder-filling the vias.
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Best thermal performance is achieved with the largest practical copper heat sink area. In all circumstances and conditions, the junction temperature must be held below 150°C to prevent activating the LM4923's thermal shutdown protection.
in the Typical Performance Characteristics shows the maximum power dissipation versus temperature. Example PCB layouts are shown in the Demonstration Board Layout section.
Further detailed and specific information concerning PCB layout, fabrication, and mounting an WQFN package is available from Texas Instruments's package Engineering Group under application note AN1187.
PCB LAYOUT AND SUPPLY REGULATION CONSIDERATIONS FOR DRIVING 4
Ω
LOADS
Power dissipated by a load is a function of the voltage swing across the load and the load's impedance. As load impedance decreases, load dissipation becomes increasingly dependent on the interconnect (PCB trace and wire) resistance between the amplifier output pins and the load's connections. Residual trace resistance causes a voltage drop, which results in power dissipated in the trace and not in the load as desired. This problem of decreased load dissipation is exacerbated as load impedance decreases. Therefore, to maintain the highest load dissipation and widest output voltage swing, PCB traces that connect the output pins to a load must be as wide as possible.
Poor power supply regulation adversely affects maximum output power. A poorly regulated supply's output voltage decreases with increasing load current. Reduced supply voltage causes decreased headroom, output signal clipping, and reduced output power. Even with tightly regulated supplies, trace resistance creates the same effects as poor supply regulation. Therefore, making the power supply traces as wide as possible helps maintain full output voltage swing.
POWER DISSIPATION
Power dissipation is a major concern when designing a successful amplifer, whether the amplifier is bridged or single-ended.
states the maximum power dissipation point for a single-ended amplifier operating at a given supply voltage and driving a specified output load.
P
DMAX
= (V
DD
)
2
/ (2 π
2
R
L
) Single-Ended (2)
However, a direct consequence of the increased power delivered to the load by a bridge amplifier is an increase in internal power dissipation versus a single-ended amplifier operating at the same conditions.
P
DMAX
= 4 * (V
DD
)
2
/ (2 π
2
R
L
) Bridge Mode (3)
Since the LM4923 has bridged outputs, the maximum internal power dissipation is 4 times that of a single-ended amplifier. Even with this substantial increase in power dissipation, the LM4923 does not require additional heatsinking under most operating conditions and output loading. From
Equation 3 , assuming a 5V power supply
and an 8 Ω load, the maximum power dissipation point is 625mW. The maximum power dissipation point obtained from
must not be greater than the power dissipation results from
P
DMAX
= (T
JMAX
- T
A
) / θ
JA
(4)
The LM4923's θ
JA in an NGP0008A package is 140°C/W. Depending on the ambient temperature, T
A
, of the system surroundings,
can be used to find the maximum internal power dissipation supported by the
IC packaging. If the result of
is greater than that of
Equation 4 , then either the supply voltage must be
decreased, the load impedance increased, the ambient temperature reduced, or the θ
JA reduced with heatsinking. In many cases, larger traces near the output, V
DD
, and GND pins can be used to lower the θ
JA
. The larger areas of copper provide a form of heatsinking allowing higher power dissipation. For the typical application of a 5V power supply, with an 8 Ω load, the maximum ambient temperature possible without violating the maximum junction temperature is approximately 62°C provided that device operation is around the maximum power dissipation point. Recall that internal power dissipation is a function of output power. If typical operation is not around the maximum power dissipation point, the LM4923 can operate at higher ambient temperatures.
Refer to the
Typical Performance Characteristics
curves for power dissipation information.
12
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SNAS211E – JULY 2004 – REVISED MAY 2013
POWER SUPPLY BYPASSING
As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply rejection ratio (PSRR). The capacitor location on both the bypass and power supply pins should be as close to the device as possible. A larger half-supply bypass capacitor improves PSRR because it increases half-supply stability. Typical applications employ a 5V regulator with 10µF and 0.1µF bypass capacitors that increase supply stability. This, however, does not eliminate the need for bypassing the supply nodes of the LM4923. The LM4923 will operate without the bypass capacitor C
B recommended for C
B
, although the PSRR may decrease. A 1µF capacitor is
. This value maximizes PSRR performance. Lesser values may be used, but PSRR decreases at frequencies below 1kHz. The issue of C
B selection is thus dependant upon desired PSRR and click and pop performance as explained in the section
Proper Selection of External Components .
SHUTDOWN FUNCTION
In order to reduce power consumption while not in use, the LM4923 contains shutdown circuitry that is used to turn off the amplifier's bias circuitry. The device may then be placed into shutdown mode by toggling the
Shutdown Select pin to logic low. The trigger point for shutdown is shown as a typical value in the Supply
Current vs Shutdown Voltage graphs in the
Typical Performance Characteristics
section. It is best to switch between ground and supply for maximum performance. While the device may be disabled with shutdown voltages in between ground and supply, the idle current may be greater than the typical value of 0.1µA. In either case, the shutdown pin should be tied to a definite voltage to avoid unwanted state changes.
In many applications, a microcontroller or microprocessor output is used to control the shutdown circuitry, which provides a quick, smooth transition to shutdown. Another solution is to use a single-throw switch in conjunction with an external pull-up resistor. This scheme ensures that the shutdown pin will not float, thus preventing unwanted state changes.
PROPER SELECTION OF EXTERNAL COMPONENTS
Proper selection of external components in applications using integrated power amplifiers is critical when optimizing device and system performance. Although the LM4923 is tolerant to a variety of external component combinations, consideration of component values must be made when maximizing overall system quality.
The LM4923 is unity-gain stable, giving the designer maximum system flexibility. The LM4923 should be used in low closed-loop gain configurations to minimize THD+N values and maximize signal to noise ratio. Low gain configurations require large input signals to obtain a given output power. Input signals equal to or greater than
1Vrms are available from sources such as audio codecs. Please refer to the
section for a more complete explanation of proper gain selection. When used in its typical application as a fully differential power amplifier the LM4923 does not require input coupling capacitors for input sources with
DC common-mode voltages of less than V
DD function of V
DD
, R i
, and R f
. Exact allowable input common-mode voltage levels are actually a and may be determined by
V
CMi
< (V
DD
-1.2)*((R f
+(R i
)/(R f
)-V
DD
*(R i
/ 2R f
) (5)
-R
F
/ R
I
= A
VD
(6)
Special care must be taken to match the values of the feedback resistors (R
F1 matching the input resistors (R i1 and R i2 and R
F2
) to each other as well as
) to each other (see Figure 1) more in front. Because of the balanced nature of differential amplifiers, resistor matching differences can result in net DC currents across the load. This
DC current can increase power consumption, internal IC power dissipation, reduce PSRR, and possibly damaging the loudspeaker. The chart below demonstrates this problem by showing the effects of differing values between the feedback resistors while assuming that the input resistors are perfectly matched. The results below apply to the application circuit shown in Figure 1, and assumes that V
DD coupled inputs tied to ground.
= 5V, R
L
= 8 Ω , and the system has DC
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LM4923, LM4923LQBD
SNAS211E – JULY 2004 – REVISED MAY 2013
Tolerance
20%
10%
5%
1%
0%
R
0.8R
0.9R
0.95R
0.99R
R
F1
R
F2
1.2R
1.1R
1.05R
1.01R
R
V
02
- V
01
-0.500V
-0.250V
-0.125V
-0.025V
0
I
LOAD
62.5mA
31.25mA
15.63mA
3.125mA
0
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Similar results would occur if the input resistors were not carefully matched. Adding input coupling capacitors in between the signal source and the input resistors will eliminate this problem, however, to achieve best performance with minimum component count it is highly recommended that both the feedback and input resistors matched to 1% tolerance or better.
AUDIO POWER AMPLIFIER DESIGN
Design a 1W/8
Ω
Audio Amplifier
Given:
Power Output
Load Impedance
Input Level
Input Impedance
Bandwidth
1Wrms
8 Ω
1Vrms
20k Ω
100Hz–20kHz ± 0.25dB
A designer must first determine the minimum supply rail to obtain the specified output power. The supply rail can easily be found by extrapolating from the Output Power vs Supply Voltage graphs in the
section. A second way to determine the minimum supply rail is to calculate the required V
OPEAK using
and add the dropout voltages. Using this method, the minimum supply voltage is (Vopeak +
(V
DO TOP
+ (V
DO BOT
)), where V
DO BOT and V
DO TOP are extrapolated from the Dropout Voltage vs Supply Voltage curve in the
Typical Performance Characteristics
section.
(7)
Using the Output Power vs Supply Voltage graph for an 8 Ω load, the minimum supply rail just about 5V. Extra supply voltage creates headroom that allows the LM4923 to reproduce peaks in excess of 1W without producing audible distortion. At this time, the designer must make sure that the power supply choice along with the output impedance does not violate the conditions explained in the
section. Once the power dissipation equations have been addressed, the required differential gain can be determined from
(8)
R f
/ R i
= A
VD
(9)
From
, the minimum A
VD to R i results in an allocation of R i is 2.83. Since the desired input impedance was 20k Ω , a ratio of 2.83:1 of R
= 20k Ω for both input resistors and R f
= 60k Ω for both feedback resistors. The final design step is to address the bandwidth requirement which must be stated as a single -3dB frequency point.
f
Five times away from a -3dB point is 0.17dB down from passband response which is better than the required
±0.25dB specified.
f
H
= 20kHz * 5 = 100kHz (10)
The high frequency pole is determined by the product of the desired frequency pole, f
H
A
VD
. With a A
VD
= 2.83 and f
H
, and the differential gain,
= 100kHz, the resulting GBWP = 150kHz which is much smaller than the LM4923
GBWP of 10MHz. This figure displays that if a designer has a need to design an amplifier with a higher differential gain, the LM4923 can still be used without running into bandwidth limitations.
14
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Revision History
Rev
1.0
1.01
1.02
E
Date
09/28/07
12/17/07
02/19/09
05/03/13
LM4923, LM4923LQBD
SNAS211E – JULY 2004 – REVISED MAY 2013
Description
Added the VSSOP package, then released.
Updated the mktg outline NGP0008A into the rev B.
Fixed typo labels on the typical circuit diagram.
Changed layout of National Data Sheet to TI format.
Copyright © 2004–2013, Texas Instruments Incorporated
Product Folder Links:
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15
PACKAGE OPTION ADDENDUM
www.ti.com
2-May-2013
PACKAGING INFORMATION
Orderable Device
LM4923LQ/NOPB
LM4923LQX/NOPB
Status
(1)
ACTIVE
ACTIVE
Package Type Package
Drawing
WQFN
WQFN
NGP
NGP
Pins Package
8
8
Qty
Eco Plan
(2)
1000 Green (RoHS
& no Sb/Br)
4500 Green (RoHS
& no Sb/Br)
Lead/Ball Finish MSL Peak Temp
(3)
CU SN Level-3-260C-168 HR
CU SN Level-3-260C-168 HR
Op Temp (°C)
-40 to 85
-40 to 85
GB2
Top-Side Markings
(4)
GB2
LM4923MM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS
& no Sb/Br)
CU SN Level-1-260C-UNLIM -40 to 85 GC8
LM4923MMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS
& no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
CU SN Level-1-260C-UNLIM -40 to 85
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
GC8
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
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PACKAGE OPTION ADDENDUM
2-May-2013
Addendum-Page 2
www.ti.com
TAPE AND REEL INFORMATION
PACKAGE MATERIALS INFORMATION
8-May-2013
*All dimensions are nominal
Device
LM4923LQ/NOPB
LM4923LQX/NOPB
LM4923MM/NOPB
LM4923MMX/NOPB
Package
Type
Package
Drawing
WQFN
WQFN
VSSOP
NGP
NGP
VSSOP DGK
DGK
Pins
8
8
8
8
SPQ
1000
4500
1000
3500
Reel
Diameter
(mm)
Reel
Width
W1 (mm)
178.0
12.4
A0
(mm)
330.0
178.0
330.0
12.4
12.4
12.4
2.2
2.2
5.3
5.3
B0
(mm)
2.2
2.2
3.4
3.4
K0
(mm)
P1
(mm)
W
(mm)
Pin1
Quadrant
1.0
1.0
1.4
1.4
8.0
8.0
12.0
8.0
12.0
8.0
12.0
12.0
Q1
Q1
Q1
Q1
Pack Materials-Page 1
www.ti.com
PACKAGE MATERIALS INFORMATION
8-May-2013
*All dimensions are nominal
Device
LM4923LQ/NOPB
LM4923LQX/NOPB
LM4923MM/NOPB
LM4923MMX/NOPB
Package Type Package Drawing Pins
WQFN
WQFN
VSSOP
VSSOP
NGP
NGP
DGK
DGK
8
8
8
8
SPQ
1000
4500
1000
3500
Length (mm) Width (mm) Height (mm)
213.0
367.0
210.0
367.0
191.0
367.0
185.0
367.0
55.0
35.0
35.0
35.0
Pack Materials-Page 2
NGP0008A
MECHANICAL DATA
LQB08A (Rev B)
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