Finisar FTLX3871MCCxx 10G Multi-Protocol Fixed Channel DWDM

Finisar FTLX3871MCCxx 10G Multi-Protocol Fixed Channel DWDM
Product Specification
10Gb/s DWDM 80km Multi-Rate SFP+ Transceiver
FTLX3871MCCxx
PRODUCT FEATURES
 Hot-pluggable SFP+ footprint
 Supports 8.5 and 9.95 to 11.3 Gb/s
 Up to 80km link length
 100 GHz channel spacing
 -5 /70°C case temperature range
 Single 3.3V power supply
 Cooled 1550nm EML laser
 Limiting electrical interface receiver
APPLICATIONS
 DWDM 80km links for:
 Duplex LC connector

Fibre Channel 8.5G and 10G
 Built-in digital diagnostic functions

10G Ethernet
 RoHS-6 compliant (lead-free)

10Gb/s SONET/SDH/OTN
 ITU-T G.698.1 DS100S1-2Dz(C)
Finisar’s FTLX3871MCCxx transceivers are Enhanced Small Form Factor Pluggable
SFP+ transceivers designed for use in 10-Gigabit multi-rate links up to 80km of G.652
single mode fiber. They are compliant with SFF-84311, SFF-84322 and G.698.1
DS100S1-2Dz(C), and support SONET OC-192, SDH STM-64, 10G Ethernet ZR and
10G Fibre Channel over 80km fiber. Finisar’s FTLX3871MCCxx transceivers use
internal retimers (clock and data recovery or CDR) IC’s for both the transmitter and the
receiver. This guarantees compliance with the SONET/SDH jitter requirements, and they
can be used to set the electrical interface XFI-compliant.
Digital diagnostics functions are available via a 2-wire serial interface, as specified in
SFF-84723. The optical transceiver is compliant per the RoHS Directive
2011/65/EU4. See Finisar Application Note AN-2038 for more details5.
PRODUCT SELECTION
Product Part Number
FTLX3871MCCxx
 Finisar Corporation – September 2015
Channel Spacing
100 GHz ITU-T grid
Rev. C1
Page 1
FTLX3871MCCxx Product Specification
Product Channel Selection
Channel
(xx)
Product
Code
Frequency
(THz)
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
FTLX3871MCC17
FTLX3871MCC18
FTLX3871MCC19
FTLX3871MCC20
FTLX3871MCC21
FTLX3871MCC22
FTLX3871MCC23
FTLX3871MCC24
FTLX3871MCC25
FTLX3871MCC26
FTLX3871MCC27
FTLX3871MCC28
FTLX3871MCC29
FTLX3871MCC30
FTLX3871MCC31
FTLX3871MCC32
FTLX3871MCC33
FTLX3871MCC34
FTLX3871MCC35
FTLX3871MCC36
FTLX3871MCC37
FTLX3871MCC38
FTLX3871MCC39
FTLX3871MCC40
FTLX3871MCC41
FTLX3871MCC42
FTLX3871MCC43
FTLX3871MCC44
FTLX3871MCC45
FTLX3871MCC46
FTLX3871MCC47
FTLX3871MCC48
FTLX3871MCC49
FTLX3871MCC50
FTLX3871MCC51
FTLX3871MCC52
FTLX3871MCC53
FTLX3871MCC54
FTLX3871MCC55
FTLX3871MCC56
FTLX3871MCC57
FTLX3871MCC58
FTLX3871MCC59
FTLX3871MCC60
FTLX3871MCC61
191.70
191.80
191.90
192.00
192.10
192.20
192.30
192.40
192.50
192.60
192.70
192.80
192.90
193.00
193.10
193.20
193.30
193.40
193.50
193.60
193.70
193.80
193.90
194.00
194.10
194.20
194.30
194.40
194.50
194.60
194.70
194.80
194.90
195.00
195.10
195.20
195.30
195.40
195.50
195.60
195.70
195.80
195.90
196.00
196.10
Center
Wavelength
(nm)
1563.86
1563.05
1562.23
1561.42
1560.61
1559.79
1558.98
1558.17
1557.36
1556.55
1555.75
1554.94
1554.13
1553.33
1552.52
1551.72
1550.92
1550.12
1549.32
1548.51
1547.72
1546.92
1546.12
1545.32
1544.53
1543.73
1542.94
1542.14
1541.35
1540.56
1539.77
1538.98
1538.19
1537.40
1536.61
1535.82
1535.04
1534.25
1533.47
1532.68
1531.90
1531.12
1530.33
1529.55
1528.77
Table 1. Product ordering codes: the central wavelength is defined as per ITU-T 694.1
 Finisar Corporation – September 2015
Rev. C1
Page 2
FTLX3871MCCxx Product Specification
I.
Pin Descriptions
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Symbol
VEET
TFAULT
TDIS
SDA
SCL
MOD_ABS
RS0
RX_LOS
RS1
VEER
VEER
RDRD+
VEER
VCCR
VCCT
VEET
TD+
TDVEET
Name/Description
Transmitter Ground
Transmitter Fault
Transmitter Disable. Laser output disabled on high or open.
2-wire Serial Interface Data Line
2-wire Serial Interface Clock Line
Module Absent. Grounded within the module
Rate Select 0.
Loss of Signal indication. Logic 0 indicates normal operation.
Rate Select 1.
Receiver Ground
Receiver Ground
Receiver Inverted DATA out. AC Coupled.
Receiver Non-inverted DATA out. AC Coupled.
Receiver Ground
Receiver Power Supply
Transmitter Power Supply
Transmitter Ground
Transmitter Non-Inverted DATA in. AC Coupled.
Transmitter Inverted DATA in. AC Coupled.
Transmitter Ground
Ref.
1
2
3
2
2
2
4
5
4
1
1
1
6
6
1
1
Notes:
1. Circuit ground is internally isolated from chassis ground.
2. TFAULT is an open collector/drain output, which should be pulled up with a 4.7k – 10k Ohms resistor on
3.
4.
5.
6.
the host board if intended for use. Pull up voltage should be between 2.0V to Vcc + 0.3V. A high
output indicates a transmitter fault caused by either the TX bias current or the TX output power
exceeding the preset alarm thresholds. A low output indicates normal operation. In the low state, the
output is pulled to <0.8V.
Laser output disabled on TDIS >2.0V or open, enabled on TDIS <0.8V.
Internally pulled down per SFF-8431 Rev 4.1. See Sec. X of this datasheet for the logic table to use for
the internal CDRs locking modes.
LOS is open collector output. Should be pulled up with 4.7k – 10k on host board to a voltage
between 2.0V and 3.6V. Logic 0 indicates normal operation; logic 1 indicates loss of signal.
Internally connected
Towards
Bezel
1
VeeT
2
TX_Fault
3
TX_Disable
4
SDA
5
SCL
6
MOD_ABS
7
RS0
8
RX_LOS
9
10
VeeT
20
TD-
19
TD+
18
VeeT
17
VccT
16
VccR
15
VeeR
14
RD+
13
RD-
12
VeeR
11
Towards
ASIC
RS1
VeeR
Figure 1. Diagram of Host Board Connector Block Pin Numbers and Names.
 Finisar Corporation – September 2015
Rev. C1
Page 3
FTLX3871MCCxx Product Specification
II. Absolute Maximum Ratings
Exceeding the limits below may damage the transceiver module permanently.
Parameter
Maximum Supply Voltage
Storage Temperature
Relative Humidity
Receiver Optical Damage Threshold
Symbol
Vcc
TS
RH
RxDamage
Min
-0.5
-40
0
5
Typ
Max
4.0
85
85
Unit
V
C
%
dBm
Ref.
Symbol
Vcc
Min
3.14
Typ.
Max
3.46
Unit
Ref.
Rin
Vin,pp
VD
VEN
80
120
Vcc-0.8
Vee
100
120
850
Vcc
Vee+ 0.8
1
Notes:
1. Non-condensing
III.
Electrical Characteristics (TOP = -5 to 70 C)
Parameter
Supply Voltage
Transmitter
Input differential impedance
Differential data input swing
Transmit Disable Voltage
Transmit Enable Voltage
Receiver
Output differential impedance
Differential data output swing
Output rise time and fall time
LOS asserted
LOS de-asserted
Power Supply Noise Tolerance
Power Consumption
Tx and Rx CDR’s ON
Tx CDR OFF and Rx CDR ON
Tx & Rx CDR’s OFF and Ethernet spec.
Rout
Vout,pp
Tr, Tf
VLOS A
VLOS D
VccT/VccR
80
100
120
300
850
28
Vcc-0.8
Vcc
Vee
Vee+0.8
Per SFF-8431 Rev 4.1


mV
V
V


mV
ps
V
V
mVpp
Pdiss
1.8
1.7
1.6
W
W
W
1.9
1.8
1.7
Notes:
1. Internally AC coupled. Data pins connect directly to the CDR.
2.
20 – 80%. Measured with Module Compliance Test Board and OMA test pattern. Use of four 1’s and four 0’s
sequence in the PRBS 9 is an acceptable alternative. SFF-8431 Rev 4.1.
3. LOS is an open collector output. Should be pulled up with 4.7k – 10k on the host board. Normal operation is
logic 0; loss of signal is logic 1.
4. See Section 2.8.3 of SFF-8431 Rev 4.1.
5. Typical power consumption values refer to 3.3V, 70C case temperature and beginning of life.
 Finisar Corporation – September 2015
Rev. C1
Page 4
1
1
2
3
3
4
5
5
5
FTLX3871MCCxx Product Specification
IV. Optical Characteristics (TOP = -5 to 70 C, VCC = 3.14 to 3.46 Volts)
Parameter
Symbol
Transmitter (Tx)
Average Launch Power
PAVE
Optical Wavelength
c 
Side-Mode Suppression Ratio
SMSR
Optical Extinction Ratio
ER
Average Launch power when Tx is OFF
POFF
Tx Jitter 20kHz - 80MHz
Txj1
Tx Jitter 4MHz - 80MHz
Txj2
Relative Intensity Noise
RIN
Center Wavelength
c EOL
Receiver (Rx)
Optical Center Wavelength
C
Reflectance
Rrx
Rx Power-Limited Performance
Bit Rate
BER
(Gb/s)
Sensitivity
(0km)
8.5, 9.95-10.7 <10-12 RSENS1
11.1-11.3
<10-4 RSENS2
8.5, 9.95-10.7 <10-12 RSENS3
Sensitivity
11.1
<10-4 RSENS4
(80km)
11.3
<10-4 RSENS5
Power Penalty
8.5, 9.95-10.7 <10-12
PP
Overload (Average Power)
PAVE
LOS De-Assert
LOSD
LOS Assert
LOSA
LOS Hysteresis
LOSH
Rx Noise-Limited Performance (OSNR)
Bit Rate
Max CD
BER
(Gb/s)
(ps/nm)
0
OSNR1
8.5, 9.95-10.7
1E-12
1450
OSNR2
0
OSNR3
11.1
1E-12
1300
OSNR4
0
OSNR5
10.7-11.1
1E-7
1300
OSNR6
Min
Typ
Max
-1
+3
As per ITU-T 694.1
30
8.2
-30
0.3
0.1
-128
z-100
z
z+100
1260
1600
-27
-24
-27
-21
-24
-24
3
-7
-37
0.5
-28
-30
Max OSNR
(dB)
23
28
23
28
18
23
Unit

dBm
Nm
dB
dB
dBm
UI
UI
dB/Hz
Pm

nm
dB
Ref.
dBm
dBm
dBm
dBm
dBm
dB
dBm
dBm
dBm
dB
2
2
2,3.a
2,3.b
2,3.c
2.3.a
RDT
Default
Default
Default
Default
Default
Default
Notes:
1. Refer to Tab. 1.
2. Measured with worst ER=8.2dB; 231 – 1 PRBS.
3. Max chromatic dispersion (CD) tolerance over 80km of G.652 single mode fiber:
3.a  1450ps/nm; 3.b 1300ps/nm; 3.c  1100ps/nm
4. With optical input power at the receiver between -7 and -18 dBm
5. Please see Sec. XII for additional details on the Receiver Decision Threshold (RDT).
 Finisar Corporation – September 2015
Rev. C1
1
Page 5
4,5
4,5
4,5
4,5
4,5
4,5
FTLX3871MCCxx Product Specification
V.
General Specifications
Parameter
Symbol
BR
LMAX
Min
8.5
Typ
Max
11.3168
80
Bit Rate
Max. Supported Link Length
Notes:
1. Tested with a 231 – 1 PRBS pattern at the BER defined in Table IV.
2. Over G.652 single mode fiber.
Units
Gb/s
km
Ref.
1
2
Timing Parameters
Parameter
Time to initialize cooled module
VI.
Symbol
t_start_up_cooled
Min
Max
90
Units
s
Ref.
Environmental Specifications
Finisar FTLX3871MCCxx transceivers have an operating temperature range from -5°C
to +70°C case temperature.
Parameter
Case Operating Temperature
Storage Temperature
Symbol
Top
Tsto
Min
-5
-40
Typ
Max
70
85
Units
°C
°C
Ref.
VII. Regulatory Compliance
Finisar transceivers are Class 1 Laser Products and comply with US FDA regulations.
These products are certified by TÜV and CSA to meet the Class 1 eye safety
requirements of EN (IEC) 60825 and the electrical safety requirements of
EN (IEC) 60950. Copies of certificates are available at Finisar Corporation upon request.
 Finisar Corporation – September 2015
Rev. C1
Page 6
FTLX3871MCCxx Product Specification
VIII. Digital Diagnostic Functions
Finisar FTLX3871MCCxx SFP+ transceivers support the 2-wire serial communication
protocol as defined in the SFP MSA1. It is very closely related to the memory map
defined in the GBIC standard, with the same electrical specifications.
The standard SFP serial ID provides access to identification information that describes
the transceiver’s capabilities, standard interfaces, manufacturer, and other information.
Additionally, Finisar SFP+ transceivers provide a enhanced digital diagnostic monitoring
interface, which allows real-time access to device operating parameters such as
transceiver temperature, laser bias current, transmitted optical power, received optical
power and transceiver supply voltage. It also defines a sophisticated system of alarm and
warning flags, which alerts end-users when particular operating parameters are outside of
a factory set normal range.
The SFP MSA defines a 256-byte memory map that is accessible over a
2-wire serial interface at the 8 bit address 1010000X (A0h). The digital diagnostic
monitoring interface makes use of the 8 bit address 1010001X (A2h), so the originally
defined serial ID memory map remains unchanged. The interface is identical to, and is
thus fully backward compatible with both the GBIC Specification and the SFP Multi
Source Agreement. The complete interface is described in Finisar Application Note AN2030: “Digital Diagnostics Monitoring Interface for SFP Optical Transceivers” 7.
The operating and diagnostics information is monitored and reported by a Digital
Diagnostics Transceiver Controller (DDTC) inside the transceiver, which is accessed
through a 2-wire serial interface. When the serial protocol is activated, the serial clock
signal (SCL, Mod Def 1) is generated by the host. The positive edge clocks data into the
SFP transceiver into those segments of the E2PROM that are not write-protected. The
negative edge clocks data from the SFP transceiver. The serial data signal (SDA, Mod
Def 2) is bi-directional for serial data transfer. The host uses SDA in conjunction with
SCL to mark the start and end of serial protocol activation. The memories are organized
as a series of 8-bit data words that can be addressed individually or sequentially.
For more information, please see the SFP MSA documentation6 and Finisar Application
Note AN-2030.
Please note that evaluation board FDB-1027 is available with Finisar ModDEMO
software that allows simple to use communication over the 2-wire serial interface.
 Finisar Corporation – September 2015
Rev. C1
Page 7
FTLX3871MCCxx Product Specification
IX. Digital Diagnostic Specifications
FTLX3871MCCxx transceivers can be used in host systems that require either internally
or externally calibrated digital diagnostics.
Parameter
Symbol
Units
Min
Max
Accuracy
Accuracy

Transceiver temperature
ºC
-10
+75
±5ºC
DDTemp
Transceiver supply voltage
V
2.8
4.0
±3%
DDVoltage
Transmitter bias current
mA
0
127
±10%
DDBias
Transmitter output power
dBm
-1
+5
±2dB
DDTx-Power
Receiver average optical input power
dBm
-28
-5
±2dB
DDRx-Power
Notes:
1. Internally measured
2. The accuracy of the Tx bias current is 10% of the actual current from the laser driver to the laser
X.
Ref.
1
2
Internal CDRs Locking Modes
The FTLX3871MCCxx is equipped with internal CDR units on both the receiver and
the transmitter sides. The host can set the CDR’s to lock at 8.5Gb/s, 10G (9.95-11.3Gb/s),
or in by-pass mode, by setting the rate select pins or the soft bits (logic OR). The
different locking modes are shown in the following logic table:
R/S 0
R/S 1
CDR’s
Logic OR of:
Logic OR of:
Locking Mode
pin 7 & bit 110.3 pin 9 & bit 118.3
Low or 0
Low or 0
Both CDR’s lock at 8.5Gb/s
Tx CDR is in bypass mode.
Low or 0
High or 1
Rx CDR locks at 10G (9.95-11.3Gb/s)
High or 1
Low or 0
Tx & Rx CDR’s in bypass mode
Both CDR’s lock at 10G (9.95-11.3Gb/s)
High or 1
High or 1
The bits 110.3 and 118.3 are set to 1 by default at power-up
The RS0 and RS1 pins are internally pulled-down to ground as per [1]. The soft bits
110.3 and 118.3 are both set to “1” at the transceiver power-up, to select the 10G locking
mode by default. The host can change this configuration via the 2-wire communication as
described in the SFP MSA [1]. Alternative configurations can be factory set upon
request. Please refer to Finisar for additional details.
XI. SFF-8431 Power-up Sequence
If either CDR is enabled, the typical power consumption of the FTLX3871MCCxx
may exceed the limit of 1.5W specified for the Power Level II transceivers in [1], for
which a power-up sequence is recommended. However, the FTLX3871MCCxx is factory
set to power-up directly to its operating conditions. Upon request, it can be factory set to
follow the power-up sequence specified for transceivers exceeding 1W, as per [1]. In
power level I, the FTLX3871MCCxx does not carry traffic, but the 2-wire serial
communication is active.
Please refer to [1] and Finisar Application Note AN-2076 for additional details.
 Finisar Corporation – September 2015
Rev. C1
Page 8
FTLX3871MCCxx Product Specification
XII.
Receiver Decision Threshold Control
The host can control the Receiver Decision Threshold (RxDT) of Finisar
FTLX3871MCCxx SFP+ transceivers via the 2-wire serial communication, by setting the
byte 131 of Table 02h. The availability of this function is indicated in Bit 3, Byte 64 of
A0h in the serial ID section. Byte 131 is a 2's complement 7 bit value (-128 - +127) The
decision threshold set is given by:
RxDT = default RxDT + [Byte(131)/256]*100%.
On power-up the byte 131 defaults to 0, corresponding to the RxDT optimum value.
The actual RxDT range the formula covers is about ±20% around the default optimum
value.
 Finisar Corporation – September 2015
Rev. C1
Page 9
FTLX3871MCCxx Product Specification
XIII. Mechanical Specifications
Finisar FTLX3871MCCxx SFP+ transceivers are compatible with the SFF-8432
specification for improved pluggable form factor, and shown here for reference purposes
only. Bail color is white.
Figure 2. Mechanical Dimensions
Note: the option of the label on the top side of the transceiver is not recommended.
 Finisar Corporation – September 2015
Rev. C1
Page 10
FTLX3871MCCxx Product Specification
XIV. Host Board SFP+ Connector Recommendations
Figure 3. PCB Layout and Bezel Recommendations, as per [9]
 Finisar Corporation – September 2015
Rev. C1
Page 11
FTLX3871MCCxx Product Specification
Figure 4
 Finisar Corporation – September 2015
Rev. C1
Page 12
FTLX3871MCCxx Product Specification
XV.
Host-Module Interface Diagram
Figure 5
 Finisar Corporation – September 2015
Rev. C1
Page 13
FTLX3871MCCxx Product Specification
XVI. References
1. “Specifications for Enhanced 8.5 and 10 Gigabit Small Form Factor Pluggable
Module ‘SFP+ ‘”, SFF Document Number SFF-8431, Revision 4.1, including SFF8431 Rev 4.1 Addendum. September 15, 2013
2. “Improved Pluggable Form factor”, SFF Document Number SFF-8432, Revision 4.2,
April 18, 2007.
3. “Digital Diagnostics Monitoring Interface for Optical Transceivers”. SFF Document
Number SFF-8472, Revision 11.3, June 11, 2013.
4. Directive 2011/65/EU of the European Council Parliament and of the Council, “on
the restriction of the use of certain hazardous substances in electrical and electronic
equipment”
5. “Application Note AN-2038: Finisar Implementation of RoHS Compliant
Transceivers”
6. Small Form-factor Pluggable (SFP) Transceiver Multi-Source Agreement (MSA)
7. “Application Note AN-2030: Digital Diagnostic Monitoring Interface for SFP Optical
Transceivers”
8. “Application Note AN-2076: SFP+ Level II Power Up Sequence”, Rev B
XVII. For More Information
Finisar Corporation
1389 Moffett Park Drive
Sunnyvale, CA 94089-1133
Tel. 1-408-548-1000
Fax 1-408-541-6138
sales@finisar.com
www.finisar.com
 Finisar Corporation – September 2015
Rev. C1
Page 14
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