SERVICE MANUAL
CDX-C6850
US Model
Canadian Model
SPECIFICATIONS
AUDIO POWER SPECIFICATIONS (US Model)
POWER OUTPUT AND TOTAL HARMONIC DISTORTION
17 watts per channel minimum continuous average power into
4 ohms, 4 channels driven from 20 Hz to 20 kHz with no more than 1% total harmonic distortion.
Other Specifications
CD player section
System
Signal-to-noise ratio
Frequency response
Wow and flutter
Compact disc digital audio system
90 dB
10 – 20,000 Hz
Below measurable limit
Laser Diode Properties
Material GaAlAs
Wavelength 780 nm
Emission Duration Continuous
Laser output power Less than 44.6
µ
W*
* This output is the value measured at a distance
of 200 mm from the objective lens surface on the
Optical Pick-up Block.
Tuner section
FM
Tuning range 87.5 – 107.9 MHz
Antenna terminal External antenna connector
Intermediate frequency 10.7 MHz
Usable sensitivity
Selectivity
Signal-to-noise ratio
10 dBf
75 dB at 400 kHz
65 dB (stereo),
68 dB (mono)
Harmonic distortion at 1 kHz
0.7% (stereo),
0.5% (mono)
Separation
Frequency response
35 dB at 1 kHz
30 – 15,000 Hz
AM
Tuning range
Antenna terminal
530 – 1,710 kHz
External antenna connector
Intermediate frequency 10.71 MHz/450 kHz
Sensitivity 30
µ
V
Model Name Using Similar Mechanism CDX-C5750/C5850
CD Drive Mechanism Type MG-363T-121
Optical Pick-up Name KSS-521A
Power amplifier section
Outputs Speaker outputs
(sure seal connectors)
Speaker impedance 4 – 8 ohms
Maximum power output 40 W
×
4 (at 4 ohms)
General
Outputs Line outputs (2)
Power antenna relay control lead
Power amplifier control lead
Tone controls
Telephone ATT control lead
Bass
±
8 dB at 100 Hz
Treble
±
8 dB at 10 kHz
12 V DC car battery Power requirements
Dimensions
(negative ground)
Approx. 178
×
50
×
185 mm
(7
1/8
×
2
×
7
3/8 in.)
(w/h/d)
Mounting dimensions Approx. 182
×
53
×
162 mm
(7
1/4
×
2
1/8
×
6
1/2 in.)
(w/h/d)
Mass Approx. 1.2 kg (2 lb. 10 oz.)
Supplied accessories Parts for installation and connections (1 set)
Front panel case (1)
Design and specifications are subject to change without notice.
FM/AM COMPACT DISC PLAYER
MICROFILM
– 1 –
SECTION 4
DIAGRAMS
UNI SI
UNI SO
UNI CK
C IN
SIRCS
TXT SI
NIL
TXT CKO
CLOK25
SYSRST
DEEMPH
AMP ATT
MD ON
VSS
C
CD ON
FOK
XLAT25
DATA25
XRST
GFS
NIL
VCC
NIL
FLS SI/NOSE1
LCD SO/FLS SO
LCD CKO
BEEP
NIL
SQ SI
NIL
SQ CKO
BUS ON
AD ON
DVCC
DVSS
NIL
ANGLE
AVCC
AVRH
AVRL
AVSS
KEY IN0 – 2
RC IN0
QUALITY
NIL
MPDH
S-METER
VCC
NS MASK
4-1. IC PIN DESCRIPTION
• IC801 MB90574PFV-G-179-BND (SYSTEM CONTROL)
Pin No.
1
Pin Name
LD ON
I/O
O Laser ON/OFF control output
32
33
34
35
28
29
30
31
24
25
26
27
20
21
22
23
16
17
18
19
12
13
14
15
6
7
8
9 – 11
4
5
2
3
44
45
46 – 48
49
50
51
52
53
54
55
40
41
42
43
36
37
38
39
Pin Description
I
O
O
O
Focus OK signal detection input
CD signal processing latch output
CD signal serial data output
Reset output to CD signal processor IC.
I GFS signal detection input
— Not used. (Connect to ground in this set.)
— Power supply pin (+5 V)
— Not used. (Open)
I
O
O
O
Front panel attachment detection input
LCD serial data output
LCD serial clock output
BEEP output
— Not used. (Open)
I Sub Q data input
— Not used. (Connect to ground in this set.)
O Sub Q read clock output
I
O
BUS system serial interface input
BUS system serial interface output
I/O BUS system serial clock input/output
I Track jump No. count input
I
I Remote commander input
CD-TEXT data input
— Not used. (Connect to ground in this set.)
O CD-TEXT data read clock output
O
O
O
O
CD signal processing serial clock output
System reset output
De-emphasis output
Power amplifier attenuator control output
O CD mechanism power control output
— Ground
— Power stabilization capacitor pin
O CD power control output
O
O
BUS ON control output
Power control output of A/D conversion.
— VREF input of D/A converter.
— Ground of D/A converter.
— Not used. (Open)
O LCD view angle alignment output (Not used in this set.)
— Analog power supply pin (+5 V)
— VREF + input of A/D converter.
I
I
— VREF – input of A/D converter.
— Analog ground
Key input 0 – 2
Rotary commander input 0
I
I
I Not used in this set.
— Not used. (Connect to ground in this set.)
Tuner multi path input (Not used in this set.)
S-meter voltage detection input
— Power supply pin (+5 V)
O Not used in this set.
– 20 –
NARROW
HSTX
MD2
MD1, 0
RESET
VSS
X0
X1
VCC
COM8V ON
NIL
AREA1
AREA2
AREA3
BAND
ACC IN
PH3, 2
LCD CE
FLS W
RE IN0, 1
ILL ON
PW ON
NIL
ANT REM
TU ON
SDA
SCL
NOSE2
X1A
X0A
SCOR
BU IN
DQSY
CD SENS
KEY ACK
TEL ATT
ST/MONO
SEEKOUT
SD IN
WIDE
Pin Name
AMP ON
TXT ON
VOL ATT
NIL
ATT
RC IN1
TU ATT
VSS
NIL
SSTOP
TEST
DAVN
FM ON/AM ON
98
99
100
101
94
95
96
97
85
86
87
88, 89
90
91
92
93
102, 103
104
105
106, 107
108
109
110
111
81
82
83
84
77
78
79
80
73
74
75
76
69
70
71
72
65
66
67
68
61
62
63
64
Pin No.
56
57
58
59
60
I/O Pin Description
O Power amplifier power control output
O Reset output to CD-TEXT decoder IC.
O Electric volume mute control output
— Not used. (Open)
O System attenuate control output
I Rotary commander shift key input 1
O Tuner attenuate output (Not used in this set.)
— Ground
— Not used. (Open)
I
I IF counter result signal detection input of PLL.
Test mode initial setting detection input
I RDS IC data acquisition detection input (Fixed at “L” in this set.)
O FM ON output
O Tuner power control output
I/O I
2
C BUS serial data input/output
O I 2 C BUS serial clock output
I Front panel OPEN detection input (Not used in this set.)
I
I
O Sub ceramic oscillator output (32 kHz)
I Sub ceramic oscillator input (32 kHz)
SCOR signal detection input
Backup power detection input
I
I
I
I CD-TEXT data setting completion signal detection input
CD SENS signal detection input
Key input acknowledge
Telephone attenuate detection input
I/O Tuner stereo signal detection input/forced monaural output
O SEEK output
I Signal detector input
O WIDE/NARROW select output (Not used in this set.)
O WIDE/NARROW select output (Not used in this set.)
— Hardware standby input (Connect to pin (º (RESET).)
— Operation mode input (Connect to ground in this set.)
— Operation mode input (Connect to VCC in this set.)
I Reset input
— Ground
I Main ceramic oscillator input (4.19 MHz)
O Main ceramic oscillator output (4.19 MHz)
I
I
I
I
— Power supply pin (+5 V)
O COM 8V control output
— Not used. (Open)
I Destination select input 1 (Fixed at “L” in this set.)
Destination select input 2 (Fixed at “L” in this set.)
Destination select input 3 (Fixed at “H” in this set.)
Not used in this set.
Accessory power detection input
I
I
I Disc insertion detection photo sensor input (Not used in this set.)
O LCD chip enable output
Flash write input (Fixed at “H” in this set.)
Rotary encoder input
O Illumination power control output
O System power control output
— Not used. (Open)
O ANT REMOTE power control output
– 21 –
Pin No.
112, 113
114
115
116
117
118
119
120
Pin Name
NIL
CD LD
CD EJ
L SW
IN SW/(PH1)
D SW
VSS
SELF SW/(IN SW)
I/O
— Not used. (Open)
I
I
O
O
Pin Description
Loading motor control output (Loading direction)
Loading motor control output (Eject direction)
Sled limit switch detection input
Disc insertion detection input
I DOWN switch detection input
— Ground
I Disc self store detection input
– 22 –
4-6. SCHEMATIC DIAGRAM — CD MECHANISM SECTION — • Refer to page 28 for Waveforms.
• Refer to page 48 for IC Block Diagrams.
CDX-C6850
– 31 –
note:
• Voltage and waveforms are dc with respect to ground under no-signal conditions.
no mark : CD PLAY
∗
: Impossible to measure
– 32 –
CDX-C6850
4-8. SCHEMATIC DIAGRAM — MAIN SECTION (1/2) — • Refer to page 48 for IC Block Diagrams.
– 37 –
(Page 39)
– 38 –
note:
• Voltage is dc with respect to ground under no-signal
(detuned) condition.
no mark : FM
(
<
) : AM
> : CD PLAY
4-9. SCHEMATIC DIAGRAM — MAIN SECTION (2/2) — • Refer to page 50 for IC Block Diagrams.
(Page 38)
– 39 –
CDX-C6850
(Page 47)
– 40 –
note:
• Voltage is dc with respect to ground under no-signal
(detuned) condition.
( no mark : FM
) : AM
< > : CD PLAY
CDX-C6850
4-11. SCHEMATIC DIAGRAM — DISPLAY SECTION —
(Page 47)
– 43 –
note:
• Voltage is dc with respect to ground under no-signal
(detuned) condition.
no mark : FM
– 44 –
CDX-C6850
4-13. SCHEMATIC DIAGRAM — RELAY SECTION —
(Page 43)
(Page 40)
– 47 –
• IC Block Diagrams
IC1 CXD2507AQ IC402, 403 TDA8574
FOK
1
MON
MDP
MDS
LOCK
TEST
4
5
2
3
6
FILO
FILI
PCO
VSS
AVSS
CLTV
AVDD
7
8
9
10
11
12
13
RF
BIAS
ASYI
ASYO
ASYE
14
15
16
17
18
WDCK 19
64
63
62
61 60 59 58
57 56
55 54
53
52
SERVO AUTO
SEQUENCER 5
14
CPU
INTERFACE
SUB CODE
PROCESSOR
4
DIGITAL
PLL
EFM
DEMODULATOR
ASYMMETRY
CORRECTOR
5
3
D/A
INTERFACE
16K
RAM
ERROR
CORRECTOR
3
6
DIGITAL
CLV
DIGITAL
OUT
VCCL 1
INL
2
SVRL 3
DATA
XRST
SENS
MUTE
SQCK
SQSO
EXCK
SBSO
SCOR
VSS
WFCK
EMPH
43
42
41
40
47
46
45
44
51
50
49
48
INML 4
INMR
5
39
DOUT
38
37
36
35
34
33
C4M
FSTT
XTSL
XTAO
XTAI
MNTO
SVRR 6
INR 7
VCCR
8
20 21 22 23 24 25 26 27 28 29 30 31 32
BUFFER
BUFFER
REFERENCE
REFERENCE
BUFFER
BUFFER
VCCL
LIFT
AMP
16
15
CL+
CL–
VCCL
SIGNAL
AMP
14 LGND
13
OUTL
VCCR
SIGNAL
AMP
12 OUTR
11 RGND
VCCR
LIFT
AMP
10 CR–
9 CR+
IC3 BA6796FP-T1
28 27 26 25 24
LEVEL
SHIFT
23 22 21
LEVEL
SHIFT
VCC
20 19 18 17
DRIVE
BUFFER
LEVEL
SHIFT
DRIVE
BUFFER
THERMAL
SHUT
DOWN
LEVEL
SHIFT
16
DRIVE
BUFFER
15
DRIVE
BUFFER
1 2 3
CTL1
4
CTL2
LOGIC
FWD
5
6
REV
7
V/I
DRIVE
BUFFER
8
9
10
DRIVE
BUFFER
11
DRIVE
BUFFER
12
DRIVE
BUFFER
13
DRIVE
BUFFER
14
– 48 –
IC2 CXA1782BQ
36 35 34 33 32 31 30 29 28 27 26 25
APC
LEVEL S
FE BIAS
37
F
38
E
39
EI 40
VEE
41
TED 42
LPFI
TEI
43
44
ATSC
TZC
45
46
TDFCT
47
VC
48
MIRR
RF IV AMP1
DFCT
IIL
TTL
24
SENS
23 C.OUT
RF IV AMP2
F IV AMP
TTL
IIL
FZC COMP
IIL DATA REGISTER
INPUT SHIFT REGISTER
ADDRESS DECODER
OUTPUT DECODER
TOG1-3
BAL1-3
FS1-4 TG1-2 TM1-7 PS1-4
TTL
IIL
22 XRST
21 DATA
20
XLT
19
CLK
18 VCC
E IV AMP
TE AMP
WINDOW COMP
ATSC
DFCT
TZC COMP
DFCT
TM1
HPF COMP
TG1
FCS PHASE
LPF COMP
COMPENSATION
FS1
FS2
TRACKING
PHASE
COMPENSATION
TM6
TM5
TM4
TM3
TM7
ISET 17
ISET
TM2
16
15
14
13
SL O
SL M
SL P
TA O
FS4
1 2 3 4 5 6 7 8 9 10 11 12
– 49 –
IC401 TDA7462D
6
7
4
5
1
2
3
8
9
10
11
12
13
SE1L
SE1R
MD+
MD–
CDL+
CDL–
CDR–
CDR+
PDR
PDGND
PDL
SE2L
SE2R
CREF 14
PAUSE
DETECT
INPUT
GAIN &
AUTO
ZERO
LOUDNESS
CONTROL
CIRCUIT
VOLUME
CONTROL
CIRCUIT
SOFT
MUTE
TREBLE/
BASS
CONTROL
CIRCUIT
COMPANDER
INPUT
GAIN
BEEP
LOUDNESS
CONTROL
CIRCUIT
DIGITAL CONTROL CIRCUIT
VOICE BANDPASS
HP LP
FRONT
FADER
FRONT
FADER
REAR
FADER
REAR
FADER
SUBWOOFER
LP
FADER
SUBWOOFER
OUT
IIC
BUS
SDA
SCL
POWER
SUPPLY
28
27
26
25
24
23
SE3L
SE3R
MUTE
SDA
SCL
PAUSE
22 OUT FL
21
20
19
OUT FR
OUT RL
OUT RR
18
17
SUBOUT+
SUBOUT–
16
VDD
15 GND
IC702 PCM1717E-S
XTI
DGND
VDD
LRCIN
DIN
BCKIN
ZERO
1
2
3
4
5
6
7
D/C R
8
VOUTR
AGND
9
10
CLK
CONTROL
20
19
XTO
CLKO
INPUT
INTERFACE
DIGITAL
FILTER
MODE
CONT
ROL
18 ML/MUTE
17 MC/DM1
16 MD/DM0
15 RSTB
14 MODE
NOISE SHAPER
5LEVE DAC 5LEVEL DAC
LOWPASS FILTER LOWPASS FILTER
CMOS
AMP
CMOS
AMP
13
D/C L
12
11
VOUTL
VCC
IC901 BA4903
5.7V
ON
– +
THERMAL
SHUT
DOWN
ON
+ –
REGULATOR
VREF
OVER
VOLTAGE
PROTECT
1
AMP
ON
2
AMP
OUT
CIRCUIT ON
3
GND
4
VCC
5
VDD
OUT
– 50 –
IC601 TDA7427AD1
LP FM
1
LP HC
2
LP AM
3
V REF
4
LCL/DX
5
SEEK
6
NIL
7
MONO
8
SWITCH
LP1/LP2
PORT
EXTENSION
TEST
LOGIC
CHARGE
PUMP
PHASE
COMP
INLOCK
DETECTOR
OSCIN
OSCOUT
9
10
NC
11
SCL
SDA
12
13
I
2
C BUS
INTERFACE
REF
OSCILLATOR
16 BIT PROG
COUNTER
IF AM
14
14 BIT PROG
COUNTER
TIMER
SWITCH
AM/FM
CONTROL
11-21 BIT PROG COUNTER
VDD1
11 BIT PROG
COUNTER
SWITCH
SWM/DIR
6 BIT PROG
COUNTER
SWITCH
SWM/DIR
PRE COUNTER
:32/33
SWITCH
AM/FM
28 LPOUT
27 VDD2
26
GND AM
25 AM IN
24 FM IN
SUPPLY
&
POWER ON
SWITCH
OUT
RESET
23 NC
22 GND D
21 VDD1
20 ADDR
19 HFREF
18 AMOSC
17 DOUT/INLOCK
16 SSTOP
15
IF FM
EXCK 1
SBSO
2
SCOR
3
WFCK 4
MCK
5
XMODE 6
GND
7
IC703 LC89170M-T
CPU INTERFACE
32 WORD X 8 BIT
DUAL PORT RAM
CRC
CHECKER
TIMING
&
SYNCHRONIZATION
SIGNAL
PROTECTION
VDD
14
VDD
13 DQSY
12 SRDT
11 SCLK
10 SW2
9 SW1
8 TEST
IC803 BA8270F-E2
BUS ON
1
RST
2
BATT
3
CLK
VREF
DATA
4
5
6
GND 7
BUS ON
SWITCH
RESET
SWITCH
BATTERY
SWITCH
14
VCC
13
12
11
10
RST
BUS ON
CLK IN
BU IN
9
8
DATA IN
DATA OUT
– 51 –
