SERVICE MANUAL
CDX-2180
US Model
Canadian Model
E Model
SPECIFICATIONS
AUDIO POWER SPECIFICATIONS (US Model)
POWER OUTPUT AND TOTAL HARMONIC DISTORTION
17 watts per channel minimum continuous average power into
4 ohms, 4 channels driven from 20 Hz to 20 kHz with no more than
1% total harmonic distortion.
Other Specifications
CD player section
System
Signal-to-noise ratio
Frequency response
Wow and flutter
Laser Diode Properties
Compact disc digital audio system
90 dB
10 - 20,000 Hz
Below measurable limit
Material
Wavelength
GaAlAs
780 nm
Emission Duration
Laser output power
Continuous
Less than 44.6
µ
W*
* This output is the value measured at a distance
of 200 mm from the objective lens surface on the Optical Pick- up Block.
Tuner section
FM
Tuning range US, Canadian model:
87.5 - 107.9 MHz
E model:
FM tuning interval:
50 kHz/200 kHz switchable
87.5 - 108.0 MHz
(at 50 kHz step)
87.5 - 107.9 MHz
Antenna terminal
Intermediate frequency
Usable sensitivity
Selectivity
Signal-to-noise ratio
Harmonic distortion at 1 kHz
(at 200 kHz step)
External antenna connector
10.7 MHz
8 dBf
75 dB at 400 kHz
65 dB (stereo),
68 dB (mono)
Separation
Frequency response
Capture ratio
0.5% (stereo),
0.3% (mono)
35 dB at 1 kHz
30 - 15,000 Hz
2 dB
Model Name Using Similar Mechanism CDX-4180
CD Drive Mechanism Type
Optical Pick-up Name
MG-363X-121
KSS-521A
AM
Tuning range
Antenna terminal
Intermediate frequency
Sensitivity
US, Canadian model:
530 - 1,710 kHz
E model:
AM tuning interval:
9 kHz/10 kHz switchable
531 - 1,602 kHz
(at 9 kHz step)
530 - 1,710 kHz
(at 10 kHz step)
External antenna connector
10.71 MHz/450 kHz
30
µ
V
Power amplifier section
Outputs
Speaker impedance
Maximum power output
Speaker outputs
(sure seal connectors)
4 - 8 ohms
40 W
×
4 (at 4 ohms)
– Continued on next page –
FM/AM COMPACT DISC PLAYER
MICROFILM
– 1 –
SECTION 4
DIAGRAMS
4-1. IC PIN DESCRIPTION
• IC801
µ
PD17705GC-526-3B9 (SYSTEM CONTROL)
Pin No.
Pin Name I/O
1 SIRCS I SIRCS input (A/D)
36
37
38
39
32
33
34
35
22 – 24
25
26
27
28
29
30
31
10
11
12
13
14, 15
16
17 – 20
21
8
9
6
7
4
5
2
3
48
49
50
51
52
53
54
55, 56
57
58
44
45
46
47
40
41
42
43
KEYIN3 – 1
ROT-IN
S-METER
TEST-SW
AM-IFC
FM-IFC
VDD2
VCOH-FM
VCOL-AM
GND2
NC
EO1-PDOUT
TESTO
AM-ON(TU-ON)
FM-ON(FM/AM)
LCL/DX
IN-SW
D-SW
SELF-SW
L-SW
LM-EJ
LM-LOD
ANT-ON
MONO
SD
BAND-SW
AREA1-SW
AREA2-SW
RE1, 2
SEEK/SEEK
NC
GND3
BEEP
ACC-IN
SCOR
MUTE
AMP-MUTE
TEL-MUTE
PH2
VOL-CE
VOL-CLK
VOL-DATA
EMPHO
PW-ON
MD-ON
CD-ON
ILL-ON
MOD1, 2
PH3
LCD-CE
Pin Description
I
I
I
I CD mechanism position detection
CD mechanism position detection
CD mechanism position detection
LIMIT switch
O Loading motor control (Eject direction)
O Loading motor control (Loading direction)
O Power control for amplifier.
O Force MONO output
I
I
I
I SD signal input
Band plan setting of general area.
Destination select 1
Destination select 2
I Rotary encoder input 1, 2
O SEEK output
— Not used.
— GND
I
I
I
I
A/D key input 3 – 1
Rotary commander input
FM and AM common signal meter A/D conversion input
TEST mode select input
I
I AM center frequency input
FM center frequency input
— Power supply (+5 V)
I Local oscillation frequency input (FM)
I Local oscillation frequency input (AM)
— GND
— Not used.
O Error out output
— Fixed at “L”.
O AM power output (AM select)
O FM power output (FM select)
O LOCAL/DX select (“H” : LOCAL, “L” : DX)
O BEEP output
I Accessory input
I SUBQ data read request
O System mute output
O Power amplifier mute output
O Telephone mute output
— Fixed at “H” in this set.
O Electric volume chip select
O Electric volume serial clock
O Electric volume serial data
O De-emphasis control output
O System power control
O Loading motor power
O Servo drive power
O Illumination output
O Bus boost control 1, 2
— Fixed at “H” in this set.
O LCD drive chip select output
– 19 –
68
69
70
71
64
65
66
67
Pin No.
59
60
61
62
63
76
77
78
79
72
73
74
75
80
Pin Name
EZ-SEL
SENS
FOK
LD-ON
NC
ST/MONO
LCD-CKO
LCD-SO
C.ALARM
SQ-CKO
CD-RST
SQ-SI
CD-SO
CD-LAT
CD-CKO
VREF
GND1
X-OUT
X-IN
BU-IN
VDD1
RESET
I/O
I SHIFT + input
I
I Information input from servo IC.
Focus OK input
O Laser diode control
— Not used. (Connect to GND.)
Pin Description
O
O
I
O
I/O Used for both STEREO indicator display input and force MONO output. (FM)
O LCD driver serial clock output
O
O
LCD driver serial data output
Caution alarm output
Q data read serial clock output
Servo IC/DAC reset output
Q data input
Serial data output to servo IC.
O
O
Data latch output to servo IC.
Serial clock output to servo IC.
— Not used.
— GND
— Crystal oscillator connection (4.5 MHz)
I Crystal oscillator connection (4.5 MHz)
I Back-up detection
— Power supply (+5 V)
I RESET input
– 20 –
4-4. SCHEMATIC DIAGRAM — CD MECHANISM SECTION — • Refer to page 22 for Waveforms and Note and page 37 for IC Block Diagrams.
CDX-2180
(Page 33)
– 25 – – 26 –
CDX-2180
4-6. SCHEMATIC DIAGRAM — DISPLAY SECTION —
(Page 36)
– 29 –
Note:
• All capacitors are in
µ
F unless otherwise noted. pF:
µµ
F
50 WV or less are not indicated except for electrolytics and tantalums.
• All resistors are in
Ω
and 1 /
4
W or less unless otherwise specified.
•
U
: B+ Line.
• Power voltage is dc 14.4V and fed with regulated dc power supply from ACC and BATT cords.
– 30 –
•
C
: panel designation.
• Voltage is dc with respect to ground under no-signal
(detuned) condition.
no mark : FM
• Voltages are taken with a VOM (Input impedance 10 M
Ω
).
Voltage variations may be noted due to normal production tolerances.
CDX-2180
4-8. SCHEMATIC DIAGRAM — MAIN SECTION (1/2) — • Refer to page 39 for IC Block Diagrams.
(Page 26)
– 33 –
Note:
• All capacitors are in
µ
F unless otherwise noted. pF:
µµ
F
50 WV or less are not indicated except for electrolytics and tantalums.
• All resistors are in
Ω
and 1 /
4
W or less unless otherwise specified.
•
¢
: internal component.
•
C
: panel designation.
•
U
: B+ Line.
• Power voltage is dc 14.4V and fed with regulated dc power supply from ACC and BATT cords.
• Voltage is dc with respect to ground under no-signal
(detuned) condition.
no mark : FM
( ) : AM
< > : CD PLAY
∗
: Impossible to measure
• Voltages are taken with a VOM (Input impedance 10 M
Ω
).
Voltage variations may be noted due to normal production tolerances.
• Signal path.
F : FM f
: AM
J
: CD
• Abbreviation
CND : Canadian model.
– 34 –
CDX-2180
4-9. SCHEMATIC DIAGRAM — MAIN SECTION (2/2) — • Refer to page 34 for Note and page 39 for IC Block Diagrams.
– 35 – – 36 –
(Page 29)
FOK 1
MON
MDP
MDS
LOCK
TEST
4
5
2
3
6
FILO
FILI
PCO
VSS
AVSS
CLTV
AVDD
13
7
8
9
10
11
12
RF
BIAS
ASYI
ASYO
ASYE
14
15
16
17
18
WDCK 19
• IC Block Diagrams
IC1 CXD2507AQ
64
63
62
61 60 59 58
57 56
55 54
53
52
SERVO AUTO
SEQUENCER 5
14
CPU
INTERFACE
SUB CODE
PROCESSOR
4
DIGITAL
PLL
EFM
DEMODULATOR
ASYMMETRY
CORRECTOR
5
3
D/A
INTERFACE
16K
RAM
ERROR
CORRECTOR
3
6
DIGITAL
CLV
DIGITAL
OUT
DATA
XRST
SENS
MUTE
SQCK
SQSO
EXCK
SBSO
SCOR
VSS
WFCK
EMPH
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
DOUT
C4M
FSTT
XTSL
XTAO
XTAI
33 MNTO
20 21 22 23 24 25 26 27 28 29 30 31 32
IC3 BA6796FP-T1
28 27 26 25 24
LEVEL
SHIFT
23 22 21
LEVEL
SHIFT
VCC
20 19 18 17
DRIVE
BUFFER
LEVEL
SHIFT
DRIVE
BUFFER
THERMAL
SHUT
DOWN
LEVEL
SHIFT
16
DRIVE
BUFFER
15
DRIVE
BUFFER
1 2 3
CTL1
4
CTL2
LOGIC
FWD
5 6
REV
7
V/I
DRIVE
BUFFER
8 9 10
DRIVE
BUFFER
11
DRIVE
BUFFER
12
DRIVE
BUFFER
13
DRIVE
BUFFER
14
– 37 –
IC2 CXA1782BQ
36 35 34
33
32
31
30 29 28 27 26 25
APC
LEVEL S
FE BIAS
VEE
TED
37
41
42
LPFI
43
TEI
44
ATSC 45
TZC
46
TDFCT
47
VC
48
F
38
E
39
EI 40
RF IV AMP1
MIRR
DFCT
IIL
TTL
24
SENS
23
C.OUT
RF IV AMP2
F IV AMP
TTL
IIL
FZC COMP
IIL DATA REGISTER
INPUT SHIFT REGISTER
ADDRESS DECODER
OUTPUT DECODER
TOG1-3
BAL1-3
FS1-4 TG1-2 TM1-7 PS1-4
TTL
IIL
22 XRST
21 DATA
20
XLT
19
CLK
18 VCC
E IV AMP
TE AMP
WINDOW COMP
ATSC
1 2
DFCT
TZC COMP
DFCT
TM1
HPF COMP LPF COMP
TG1
FCS PHASE
COMPENSATION
FS1
FS2
TRACKING
PHASE
COMPENSATION
TM6
TM5
TM4
TM3
TM7
FS4
3 4
5
6 7 8 9
ISET
TM2
10 11 12
17 ISET
16
15
14
13
SL O
SL M
SL P
TA O
– 38 –
IC401 LC75374E
LSELO
L4
L3
L2
L1
38
34
35
36
37
VDD 39
R1
R2
R3
R4
RSELO
40
41
42
43
44
33
+
–
32
+
–
31 30 29
–
+
28 27 26 25 24 23
–
+
+
–
–
+
DECODER
+
–
CONTROL
LATCH
SHIFT
REGISTER
+
–
–
+
–
+
+
–
–
+
1 2 3 4 5 6 7 8 9 10 11
+
–
22 LFIN
21 LFOUT
+
–
20 LROUT
–
+
19 VREF
18
17
16
15
CE
DI
CL
14
VSS
RROUT
–
+ 13 RFOUT
12 RFIN
LRCI
BCKI
DI
1
2
3
CLK
VSS
4
5
RSTN 6
TESTN
MUTEN
7
8
IC701 SM5852FS-E2
INPUT
INTERFACE
SYSTEM
CLOCK
SEQUENTIAL
CONTROL
MUTE
CONTROL
DIGITAL
SIGNAL
PROCESSOR
OUTPUT
INTERFACE
MODE
CONTROL
IC702 SM5878AM-E2
16
15
14
13
DB/DS
MOD2
MOD1
OPT
12
VDD
11
10
9
LRCO
BCKO
DOUT
MUTE 1
DEEN 2
CKO
DVSS
BCKI
DI
5
6
3
4
DVDD
LRCI
7
8
TSTN
TO1
9
10
AVDDL
11
ATTENUATION COUNTER
FILTER & ATTENUATION
OPERATION BLOCK
NOISE SHAPER
OPERATION BLOCK
INPUT INTERFACE
11 LEVEL
DEM DAC
LPF
AMP
11 LEVEL
DEM DAC
11 LEVEL
DEM DAC
LPF
AMP
11 LEVEL
DEM DAC
24
23
ATCK
MODE
TIMING
CONTROL
CLOCK
GENERATOR
22
21
RSTN
DS
20 XVSS
19 XTO
18 XTI
17
16
XVDD
MUTE
15
AVDDR
LO 12 14
13
RO
AVSS
– 39 –
