null  null
USOO7925030B2
(12) United States Patent
(10) Patent N0.:
Holmstrom et a].
(54)
(45) Date of Patent:
CROSSTALK CANCELLATION USING LOAD
5,119,420 A *
6/1992 Kato et a1. ...................... .. 381/1
5,434,921 A *
7/1995 Dombrowski et a1.
5,774,556 A *
6/1998
.
..
_
MIChael HOImStrom,
Bengt
Edholm, Lund (SE); Sven Mattisson,
Bjarred (SE)
5,854,847 A *
12/1998
6/2004
Sugimoto
6,870,933 B2*
3/2005
Roovers ........................ .. 381/27
2005/0184807 A1
2006/0023889 A1
Primary Examiner * Xu Mei
U.S.C. 154(b) by 1312 days.
(57)
(21) Appl.No.: 11/482,595
(22) Filed:
Int. Cl.
H04R 1/10
H04R 5/00
stereo channel and a second stereo channel, wherein a ?rst
Jan. 10, 2008
?er is connected between each output ampli?er and a refer
ence ampli?er. In one embodiment, the ?rst and second sig
nals are split prior to inputting the signals to the ?rst and
(2006.01)
(2006.01)
US. Cl. ............................... .. 381/74; 381/1; 381/17
Field of Classi?cation Search ........ .. 381/1, 17418,
381/26427, 74, 307, 309, 300, 310
See application ?le for complete search history.
(56)
ABSTRACT
signal is input to a ?rst output ampli?er for the ?rst channel,
and a second signal is input to a second output ampli?er for
the second channel, and an output load for each output ampli
Prior Publication Data
US 2008/0008325 A1
References Cited
second output ampli?ers, and a gain-adjusted portion of each
signal is added to the other signal on the inputs of the output
ampli?ers. In another embodiment, the ?rst and second input
signals are again split into two paths each. While a ?rst path
of each signal is inputted to each signal’s respective output
ampli?er, the second paths of the ?rst and second signals are
adding together. The resulting sum is adjusted by a gain
function, biased by a suitable DC voltage, and input to the
reference ampli?er.
U.S. PATENT DOCUMENTS
4,449,229 A *
5/1984
Mori ............................... .. 381/2
4,868,878 A *
9/1989
Kunugiet a1. .................. .. 381/1
20a
\/1
,31
a
/
30
v2
—1
381/302
t t t H 381/17
A method and ASIC for canceling crosstalk between a ?rst
Jul. 8, 2006
(65)
tttttt
2/2006 Suzaki et al.
(*)
Subject to any disclaimer, the term of this
patent is extended or adjusted under 35
Yoshida et a1.
8/2005 Doy et al.
* cited by examiner
Notice:
381/1
Lowe et al. ................... .. 381/17
6,754,350 B2 *
(73) Assignee: Telefonaktiebolaget LM Ericsson
(publ), Stockholm (SE)
(52)
(58)
Apr. 12, 2011
IMPEDENCE MEASUREMENTS
Inventors:
(51)
US 7,925,030 B2
/
B
21 Claims, 6 Drawing Sheets
/
21
US. Patent
Apr. 12, 2011
Sheet 1 0f6
US 7,925,030 B2
FIG. 1A
(Prior Art)
FIG. 15
(Prior Art)
US. Patent
Apr. 12, 2011
Sheet 2 0f6
US 7,925,030 B2
VDD
?g
OUH
17
/
Output
[] RL1
VDD
signal
° hannel1
19
§—_..
18
/
Crosstalk
E] RL2
vohage
from
channel1
FIG. 2
(Prior Art)
US. Patent
Apr. 12, 2011
Sheet 3 0f6
20a
V1
’31
/
T“ *— D/A
U.
/
30
v2
v1
33/
V2
US 7,925,030 B2
21
US. Patent
Apr. 12, 2011
Sheet 4 0f6
US 7,925,030 B2
ASIC
"'""aazagn'zggzasa"
39
{b Vin1 _
HEADPHONE
JACK
208
/
'
+92%?
V
Rs.
50—“
E
x
21
[]RL,
Refere???
\ VMID
VMIDR
v
\
24
b
am
42
OdB gain
Ouiput
sz
_>AMP2
22
0,
R52
Ho
37
/
VIYEBSUI'E
PGA Gain calculator I Am ~
’
36
w
/
43
'31.
35
FIG. 5
|
iL
55
RL2
US. Patent
Apr. 12, 2011
Sheet 5 0f6
US 7,925,030 B2
Split a first input signal prior / 45
to a first output ampli?er
Split a second input signal prior / 46
to a second output ampli?er
1
Aoy'ust the gain of each / 47
split signal portion
i
Add an acy'usted split portion of /
each signal to the other signal
i
48
Input the summed signals to the / 49
first and second output ampli?ers
FIG. 6
US. Patent
Apr. 12, 2011
Sheet 6 0f 6
US 7,925,030 B2
Split a first input signal J'th two paths
poor to a first output amph?er
4
/51
/52
Apply ?rst path to input
of first output ampli?er
J,
l
53
Apph/ second path to an adder
54
Split a second input signal into two paths
prior to a second output amph'?er
l
Apply ?rst path to input
/55
ofsecond output ampli?er
56
App/y second path to the adder
l
57
Add second paths of each signal
i
Aojust the gal?! of the
/58
summed second paths
l
Add suitable DC bias
to the adjusted sum
,59
Input the biased adjusted sum to a
reference amph?er connected in parallel
with the ?rst and second output ampli?ers
FIG. 7
60
US 7,925,030 B2
1
2
CROSSTALK CANCELLATION USING LOAD
IMPEDENCE MEASUREMENTS
FIG. 2 illustrates a problem that arises when using the
Reference AMP 16 for the output ampli?er loads. With this
con?guration, it is dif?cult to avoid crosstalk between the
channels. The primary source of crosstalk is an output imped
ance (RM) 19 in the Reference AMP 16. Crosstalk is injected
CROSS-REFERENCE TO RELATED
APPLICATIONS
from one channel to the other via this internal ReferenceAMP
output impedance, Rim. If Rim is 1 ohm, and the load is 32
ohms, the crosstalk will be —30.1 dB (Crosstalk:20 log 1/32).
NOT APPLICABLE
STATEMENT REGARDING FEDERALLY
SPONSORED RESEARCH OR DEVELOPMENT
Generally, a small Rim is more costly than a larger Rim. A
method that will allow higher output impedance with the
same crosstalk performance would thus save cost.
NOT APPLICABLE
Instability can also be a problem with the Reference AMP
con?guration. Different con?gurations of the ampli?er load
REFERENCE TO SEQUENCE LISTING, A
result in differing capacitive and inductive loads. Too much
capacitive load on the ampli?er can easily make it unstable. It
is known that the stability of an ampli?er can be improved by
TABLE, OR A COMPUTER PROGRAM LISTING
COMPACT DISC APPENDIX
NOT APPLICABLE
BACKGROUND OF THE INVENTION
20
The present invention relates to systems for amplifying
electronic signals. More particularly, and not by way of limi
tation, the present invention is directed to a system and
25
method for canceling crosstalk between multiple channels
using load impedance measurements.
adding a serial resistor between the Reference AMP output
and the capacitive load. The drawback of adding more serial
resistance to the output, however, is that it increases crosstalk
between the channels.
It would be advantageous to have a system and method of
crosstalk cancellation that overcomes the disadvantages of
the prior art. The present invention provides such a system
and method.
BRIEF SUMMARY OF THE INVENTION
Driving a stereo headset is a common requirement in
today’s mobile phones. There is a requirement to minimize
the number of pins in the headset connector, and also to
The present invention is directed to a system and method
30
for canceling crosstalk between multiple channels using load
adhere to the standard headset connector found on mo st home
impedance measurements. In a ?rst embodiment involving a
music equipments. Typically, the standard headset has a
three-terminal connector with left, right, and ground termi
stereo system, the signal from each channel is added to the
other channel on the input of the output ampli?ers. In a
second embodiment, the signals from both channels are
added on the input of the reference ampli?er. While some
nals. No DC current is allowed to ?ow through the headset.
This requires the left and right signals to be anAC signal with
35
distortion of the output signal will occur using both methods,
the distortion will only affect the amplitude of the output
a zero-volt DC offset. Such a signal may be generated using
an ampli?er with a positive and negative voltage supply.
signal level.
Thus, the present invention improves the crosstalk ?gure
However, a negative supply is not readily available in a device
operated by a single battery.
FIG. 1A is a simpli?ed schematic drawing of a common
40
con?guration of stereo ampli?ers for generating a stereo sig
with crosstalk cancellation. Other advantages include the fact
that the invention can be implemented in the digital region of
nal (i.e., left signal and right signal). The signal, Vinl is fed
into a ?rst single-ended output ampli?er (Output AMP1) 11,
an ASIC while using a minumum of silicon area. A low cost,
and the signal Vin2 is fed into a second single-ended output
ampli?er (Output AMP2) 12. The output ampli?ers are pro
viding the signal to a load such as headphones, speakers, etc.
(not shown). The output ampli?ers have a common-mode DC
voltage equal to VDD/ 2. To prevent this voltage from creating
a DC current ?ow through the load, DC-blocking capacitors
(CLl and CL2) 13 and 14 are used. The DC-blocking capaci
already existing in the ASIC, can be used as a measuring
low performance analog input ampli?er, or an ampli?er
45
ampli?er. The calculations performed in the present invention
also provide a load resistance ?gure connected to the output
ampli?er. This information can be used to send a warning
message to the user indicating that the load is not acceptable
for the system. Also, the stability of the Reference AMP can
50
indirectly be improved if the Reference AMP stability
tors are needed in the absence of a negative voltage supply. A
improves when adding a serial resistance between the Refer
drawback with the DC-blocking capacitors is that they typi
ence AMP and the load.
cally are 100-200 uF, each of which occupies signi?cant area
Thus, in one aspect, the present invention is directed to a
method of canceling crosstalk between a ?rst stereo channel
and a second stereo channel, wherein a ?rst signal is input to
a ?rst output ampli?er for the ?rst channel, and a second
on a printed circuit board (PCB).
FIG. 1B is a simpli?ed schematic drawing of another com
mon con?guration of stereo ampli?ers for generating a stereo
55
signal. This con?guration utilizes a reference voltage supply
60
signal is input to a second output ampli?er for the second
channel, and an output load for each output ampli?er is con
nected between each output ampli?er and a reference ampli
?er. The method includes splitting the ?rst and second signals
65
prior to inputting the signals to the ?rst and second output
ampli?ers; and adding a split portion of each signal to the
other signal on the inputs of the ?rst and second output ampli
?ers. The step of adding a split portion of each signal to the
other signal may include adjusting each split signal by a
(VMID) 15. The VMID driver is implemented as a reference
ampli?er (Reference AMP) 16 and provides half the voltage
of the power supply (VDD/2) as a reference DC voltage level.
A ?rst output load (RM) 17 is connected between Output
AMP1 11 and the Reference AMP. A second output load
(RL2) 18 is connected between Output AMP2 12 and the
Reference AMP. The main reason for using the Reference
AMP is to eliminate the DC blocking capacitors CL 1 and CL2,
thereby reducing the PCB area occupied and reducing the
number of pins in the headphone jack.
programmable gain ampli?er before adding the split signal to
the other signal.
US 7,925,030 B2
3
4
In another aspect, the present invention is directed to a
method of canceling crosstalk between a ?rst stereo channel
and a second stereo channel, wherein a ?rst signal is input to
a ?rst output ampli?er for the ?rst channel, and a second
and second splitters for splitting the ?rst and second input
signals into two paths each; means for inputting a ?rst path of
each signal to each signal’s respective output ampli?er; and
an adder for adding together a second path of the ?rst and
second signals. The crosstalk cancellation unit also includes a
gain ampli?er for adjusting the sum of the ?rst and second
signals and adding a suitable DC bias to the adjusted sum; and
means for inputting the biased adjusted sum to the reference
signal is input to a second output ampli?er for the second
channel, and an output load for each output ampli?er is con
nected between each output ampli?er and a reference ampli
?er. The method includes splitting the ?rst signal onto a ?rst
path and a second path prior to an input of the second output
ampli?er, and adjusting the ?rst signal on the ?rst path by a
ampli?er.
?rst programmable gain ampli?er. The second signal is split
BRIEF DESCRIPTION OF THE SEVERAL
VIEWS OF THE DRAWING
onto a third path and a fourth path prior to an input of the
second output ampli?er. The second signal on the third path is
adjusted by a second programmable gain ampli?er. The
In the following section, the invention will be described
with reference to exemplary embodiments illustrated in the
adjusted second signal on the third path is added to the ?rst
signal on the secondpath to create a ?rst sum, and the adjusted
?rst signal on the ?rst path is added to the second signal on the
?gures, in which:
FIG. 1A (Prior Art) is a simpli?ed schematic drawing of a
common con?guration of stereo ampli?ers for generating a
fourth path to create a second sum. The ?rst sum is input to the
?rst output ampli?er, and the second sum is input to the
second output ampli?er.
20
In another embodiment, the present invention is directed to
another common con?guration of stereo ampli?ers for gen
erating a stereo signal;
FIG. 2 (Prior Art) illustrates a problem that arises when
a method of canceling crosstalk between a ?rst stereo channel
and a second stereo channel, wherein a ?rst signal is input to
a ?rst output ampli?er for the ?rst channel, and a second
using the Reference AMP for the output ampli?er loads;
signal is input to a second output ampli?er for the second
channel, and an output load for each output ampli?er is con
nected between each output ampli?er and a reference ampli
?er. The method includes splitting the ?rst and second input
signals into two paths each; inputting a ?rst path of each
25
signal to each signal’s respective output ampli?er; adding
30
FIG. 3 is a simpli?ed schematic drawing of an ampli?er
con?guration in accordance with a ?rst embodiment of the
present invention;
FIG. 4 is a simpli?ed schematic drawing of an ampli?er
con?guration in accordance with a second embodiment of the
together a second path of the ?rst and second signals; adjust
ing the sum of the ?rst and second signals by a gain function;
adding a suitable DC bias to the adjusted sum, and inputting
the biased adjusted sum to the reference ampli?er.
In yet another aspect, the present invention is directed to a
stereo signal;
FIG. 1B (Prior Art) is a simpli?ed schematic drawing of
present invention;
FIG. 5 is a simpli?ed schematic drawing of an implemen
tation of an ampli?er con?guration in an existing Mixed
Signal ASIC of a mobile phone platform in accordance with
the ?rst embodiment of the present invention;
Mixed Signal Application Speci?c Integrated Circuit (ASIC)
FIG. 6 is a ?ow chart illustrating the steps of a ?rst embodi
ment of the method of the present invention; and
of a mobile phone platform. The ASIC provides a ?rst stereo
channel and a second stereo channel to a headphone jack. The
ASIC includes ?rst and second output ampli?ers. The ?rst
FIG. 7 is a ?ow chart illustrating the steps of a second
embodiment of the method of the present invention.
output ampli?er ampli?es a ?rst input signal for the ?rst
channel, and supplies the ?rst ampli?ed signal to a ?rst load
associated with the headphone jack. The second output
ampli?er ampli?es a second input signal for the second chan
nel, and supplies the second ampli?ed signal to a second load
associated with the headphone jack. A reference ampli?er
35
40
The present invention is directed to a system and method
for canceling crosstalk between multiple channels using load
45
provides a reference signal between the ?rst and second
loads. TheASIC also includes a crosstalk cancellation unit for
canceling crosstalk between the ?rst and second channels.
The crosstalk cancellation unit includes means for splitting
the ?rst and second signals prior to inputting the signals to the
50
?rst and second output ampli?ers; and means for adding a
split portion of each signal to the other signal on the inputs of
the ?rst and second output ampli?ers.
impedance measurements. Two exemplary embodiments are
described herein in the context of an exemplary two-channel
system. In a ?rst embodiment illustrated in FIG. 3, the signal
from each channel is added to the other channel on the input
of the output ampli?ers. In a second embodiment illustrated
in FIG. 4, the signals from both channels are added on the
input of the reference ampli?er. Some distortion of the output
signal will occur using both methods. However, the distortion
will only affect the amplitude of the output signal level.
The amount of crosstalk can be calculated using the equa
tion Rm /RL, where Rim is the Reference AMP output imped
In yet another aspect, the present invention is directed to a
Mixed Signal ASIC of a mobile phone platform. The ASIC
DETAILED DESCRIPTION OF EMBODIMENTS
55
ance, and RL is the load. This can be shown to be true from the
a headphone jack. The ASIC includes ?rst and second output
following calculations. To simplify the calculations, certain
assumptions regarding the ampli?ers and their connected
ampli?ers. The ?rst output ampli?er ampli?es a ?rst input
signal for the ?rst channel, and supplies the ?rst ampli?ed
have a ?at frequency response within the audio frequency
provides a ?rst stereo channel and a second stereo channel to
signal to a ?rst load associated with the headphone jack. The
loads are made. The ampli?ers are assumed to be linear and to
60
second output ampli?er ampli?es a second input signal for
the second channel, and supplies the second ampli?ed signal
to a second load associated with the headphone jack. A ref
erence ampli?er provides a reference signal between the ?rst
and second loads. The ASIC also includes a crosstalk cancel
lation unit for canceling crosstalk between the ?rst and sec
ond channels. The crosstalk cancellation unit includes ?rst
range (f<20 kHZ). It is also assumed that the ampli?er loads
are not frequency dependent for the audio frequency range
(f<20 kHZ).
65
FIG. 3 is a simpli?ed schematic drawing of an ampli?er
con?guration in accordance with the ?rst embodiment of the
present invention. In this embodiment, the signal from each
channel is added to the other channel on the input of the
output ampli?ers. The signal V1 is converted by a digital-to
US 7,925,030 B2
5
6
analog (D/A) converter 20a and fed into a ?rst single-ended
crosstalk from the Reference AMP output impedance R0 for
output ampli?er (Output AMP1) 21, and the signal V2 is
this implementation can be assumed to be Rim/RL.
The output signals VA and VB will be affected by the
converted by a D/A converter 20b and fed into a second
single-ended output ampli?er (Output AMP2) 22. A refer
amount of added crosstalk signal on each channel as shown
ence voltage supply (VMID) 23 is implemented as an input to
a reference ampli?er (Reference AMP) 24. The Reference
AMP has an internal output impedance R0 25, and generates
a reference signal, which may be a reference DC voltage
by:
level. A ?rst output load (RA) 26 is connected between Output
AMP1 21 and the Reference AMP. A voltage drop VA is
associated with the ?rst output load RA. A second output load
(RB) 27 is connected between Output AMP2 22 and the Ref
erence AMP. A voltage drop VB is associated with the second
output load RE.
The signal V1 is split prior to Output AMP1 21, and is
routed through a gain function [3 28 to an adder 29 where the
signal V1 is added to the signal V2. Likewise, the signal V2 is
split prior to Output AMP2 22, and is routed through a gain
function 0t 30 to an adder 31 where the signal V2 is added to
20
the signal V1. The gain functions 0t and [3 and the adders may
be implemented in the digital domain, as shown, or in the
analog domain. In the digital domain, the gain functions 0t
and [3 may be implemented using programable gain ampli?
ers (PGAs). In the analog domain, the variable ampli?cation
25
and summing operations may be implemented using, for
example, variable and ?xed resistors.
The calculations below begin by showing that VA and VB
are the signals that will appear over the resistive loads RA and
RB, respectively. Without loss of generality, all ampli?ers are
30
assumed to have 0 dB gain.
35
Thus, the ?rst embodiment cancels out the small amount of
signal level from one channel that occurs over the load resis
Note that the symbol “[1.” in all equations indicates that the
resistors, R, on either side of the symbol are connected in
40
parallel.
Total crosstalk cancellation will occur if the contribution
from V2 over load RA and the contribution from Vl over load
RB are completely cancelled out:
45
tance in the other channel by adding the same amount of
inverted signal level at the input of the ampli?ers.
FIG. 4 is a simpli?ed schematic drawing of an ampli?er
con?guration in accordance with the second embodiment of
the present invention. In this embodiment, the signals from
both channels are added on the input of the reference ampli
?er. The signals V1 and V2 are split prior to their respective
Output AMPs, and are routed through an adder 33 and a gain
function 0t 34. A suitable DC bias, VMID 23, is added to the
adjusted sum before voltage V0 is applied to the Reference
50
AMP 24. The Reference AMP generates a reference signal,
which may be a reference DC voltage level. Note that the
added DC bias may be zero, depending on the values of V1
and V2, respectively.
Like in the ?rst embodiment, it can be shown that this
55
The factors of crosstalk to reach total cancellation are given
embodiment also results in crosstalk equal to —RO/R:—Rim/
RL. The calculations below begin by showing that VA and VB
are the signals that will appear over the resistive loads RA and
by:
RB, respectively. Without loss of generality, all ampli?ers are
assumed to have 0 dB gain.
60
65
This shows that the crosstalk signal level needed for total
cancellation is equal to —RO/R:—Rim/RL. It also proves that
US 7,925,030 B2
8
7
tors. An analog ampli?er 35 measures the impedance level
and sends the information to an analog PGA gain calculator
36. If the headset is equipped with two cords to each head
phone speaker, as found in a stereo headset, the total cord
impedance is included in RLl and RL2 and canbe measured. In
an alternative con?guration, the crosstalk cancellation circuit
and the PGA gain calculator are digital, and PGA1 40 and
Total crosstalk cancellation is achieved when:
The factor of crosstalk to reach total cancellation and
PGA2 41 are utilized in the crosstalk cancellation circuit to
assuming (3) is given by:
perform the variable gain function. The con?guration utilizes
the A/D converter 43 using a DC voltage measurement
instead of the analog ampli?er 35 with an AC voltage mea
surement. In another alternative con?guration, the crosstalk
cancellation circuit and the PGA gain calculator are digital,
and the con?guration utilizes both the analog ampli?er 35 and
the A/D converter 43, as illustrated in FIG. 5.
when R0 << R.
The crosstalk level also increases if the headset is equipped
The output signals VA and VB will be affected by the
amount of added crosstalk signal on each channel, as shown
by:
20
with one common cord to the headphone speakers. In this
case, the common cord is not included in RLl and RL2. The
common cord impedance must then be known in case
crosstalk cancellation from that impedance is needed.
The amount of PGA gain can also be calculated from an
internal measurement directly from the Reference AMP out
put signal by using a multiplexer (MUX) 37. The signal
25
measurement may be a voltage measurement, a current mea
surement, or a combination of voltage and current.
Using the con?guration of FIG. 5, three scenarios for
crosstalk cancellation may arise:
1. When RL is known (i.e., crosstalk cancellation with
30
pre-loaded PGA gain);
2. When RL is unknown (load impedance must ?rst be
measured); and
3. When internal crosstalk measurements are taken on the
Reference AMP output. In this scenario, a MUX may be
35
utilized to select between external and internal measure
ments.
The crosstalk cancellation may be implemented by using
adders 38 and 39, and programmable gain ampli?ers PGA1
40 and PGA2 41 with negative gain settings in front of the
Assuming RAIRBIRII 009 and R0: 1 Q:
40
vA = vlw = 0.98vl
100 +1
100-1
(12)
45
original output ampli?ers.
In scenario 1, when RL is known, the amount of PGA gain
can be calculated directly using:
R
1
GPGA = ZOlogR—L = ZOlogi = -30.1 dB
Both embodiments shown in FIGS. 3 and 4 can easily be
implemented and used for crosstalk cancellation. For simplic
ity, only the ?rst embodiment is chosen here to show how an
implementation can be done in an existing Mixed Signal
ASIC of a mobile phone platform.
FIG. 5 is a simpli?ed schematic drawing of an implemen
tation of an ampli?er con?guration in a Mixed Signal Appli
50
cation Speci?c Integrated Circuit (ASIC) of a mobile phone
platform in accordance with the ?rst embodiment of the
present invention. The crosstalk level increases as the load
resistance decreases. For example, a 169 headset will have
larger crosstalk than a 329 headset. If the platform cannot
predict the impedance of the load, the impedance must be
measured. The load impedance is determined by calculating
the relationship between the load impedance (RLl and RL2)
and the resistance in serial of RL (RLl and RL2) and RS (RSl
and R52). In a ?rst embodiment, the arrangement is imple
mented entirely in the analog domain, and thus the digital-to
analog (D/A) converters 20a and 20b, and the analog-to
digital (A/D) converter 43 are not present. The variable gain
55
where the internal output impedance is assumed to be IQ and
the load impedance is assumed to be 329. With this result, the
PGA gain calculator 36 can set the correct PGA gain.
In scenario 2, when RL is unknown, the correct amount of
crosstalk cancellation is calculated through the following
steps in the given order:
A. Determine the internal output impedance Rim 42 of the
Reference AMP 24 and the headset cord impedance (if the
headset is equipped with one common cord) to the headphone
speakers.
60
B. Measure the load impedance (RLl and RLZ); and
C. Calculate the PGA setting.
For step A, to determine Rim 42, the Rim is given by the
ampli?er design. For the examples given below, the Rim is
assumed to be IQ. The headset cord impedance, if the headset
is equipped with one common cord, can be found by mea
surement or from the supplier.
65
For step B, to optimize the crosstalk cancellation for any
and summing operations performed in the crosstalk cancel
load, the ampli?er load RL (RLl and RL2) must be measured.
lation section may be performed by variable and ?xed resis
This requires that the Rint and RS (R51 and RS2) be known, and
US 7,925,030 B2
9
10
that the input signal level Vin be known. The output imped
respectively. The conversion back to digital is performed by
ance of RL is then measured as shown in FIG. 5.
the A/ D converter 43. Of course, those skilled in the art would
recognize that the digital and analog domains may be de?ned
differently by implementing the D/A and A/D converters at
Vlnl = Voutl
Vln2 = VoutZ
different locations in the circuit. For example, instead of
performing the crosstalk cancellation in the digital domain, as
(13)
RLl + Rim
i
RLl + Rim + RS1
Vmeasurel = Vou12 -
RL2 + Rim
VmeasureZ = Voutl '
shown, the variable ampli?cation and summing operations
could be performed in the analog domain using, for example,
(14)
variable and ?xed resistors.
FIG. 6 is a ?ow chart illustrating the steps of a ?rst embodi
ment of the method of the present invention. Referring to
FIGS. 3 and 6, a ?rst signal is input to a ?rst output ampli?er
21 for the ?rst channel, and a second signal is input to a
second output ampli?er 22 for the second channel, and an
output load 26 and 27 for each output ampli?er is connected
between each output ampli?er and a reference ampli?er 24.
RL2 + Rim + RS2
Alternatively as sume RL l :RL2 QVmeaswe l :V measure2 '
As an example of how the RL can be calculated, it can be
assumed that RSI1OOQ, VOMtI1V, and Vmeasure:0.767V.
Then:
Rim = 19
1 1 Vmeasure >1
1- 11-
20
—
each split signal is adjusted in gain function [3 28 and gain
Vi
l—mveiif”) - 1
Vmeasure
—
At step 45, the ?rst signal is split prior to the input of the ?rst
output ampli?er. At step 46, the second signal is split prior to
the input of the second output ampli?er. At step 47, the gain of
function 0t 30. At step 48, the adjusted split portions of each
signal are added to the other signal in adders 29 and 31. At
step 49, the summed signals are input to the ?rst and second
= 0.767
25
out
output ampli?ers.
FIG. 7 is a ?ow chart illustrating the steps of a second
RL = 31.929
embodiment of the method of the present invention. Referring
to FIGS. 4 and 7, a ?rst signal is input to a ?rst output
Note that it is the relation of a signal provided to the
channel and the measured signal level provided by the input
ampli?er (Input AMP) 35 that indirectly gives the load
ampli?er 21 for the ?rst channel, and a second signal is input
30
impedance ?gure.
For step C, calculate the PGA setting, when the load resis
tance is known, the calculation of the right amount of signal
added through the PGA to each channel can be calculated as
35
follows:
to a second output ampli?er 22 for the second channel, and an
output load 26 and 27 for each output ampli?er is connected
between each output ampli?er and a reference ampli?er 24.
At step 51, a ?rst input signal is split into two paths prior to the
?rst output ampli?er. At step 52, the ?rst path is input to the
?rst output ampli?er. At step 53, the second path is applied to
an adder 33. At step 54, a second input signal is split into two
R”
GPGA = 201Qg_’
15
( )
RL
40
For example:
paths prior to the second output ampli?er. At step 55, the ?rst
path is input to the second output ampli?er. At step 53, the
second path is applied to the adder. At step 57, the second
paths of each signal are added, and at step 58 the gain of the
summed second paths is adjusted by the gain function a 34. At
step 59, a suitable DC bias is added to the adjusted sum. At
Rim
1
45
output ampli?ers.
GPGA = ZOlogR—L = 201%?92 = —30.08 dB
The PGA gain calculator 36 can then set the correct PGA
gain.
step 60, the biased adjusted sum is input to the reference
ampli?er 24 connected in parallel with the ?rst and second
50
The ?nal scenario considered is when internal crosstalk
Thus, the crosstalk ?gure can be improved with crosstalk
cancellation. The present invention can be implemented in the
digital region of an ASIC while using a minimum of silicon
area. A low cost, low performance analog input ampli?er, or
an ampli?er already existing in the ASIC, can be used as a
measurements are taken on the Reference AMP output. This
measuring ampli?er.
measurement is performed using the MUX 37 to select and
measure the VMIDR voltage level. Calculation of PGA gain
can be done in the following ways:
The calculation also gives the load resistance ?gure con
nected to the output ampli?er. This information can be used to
send a warning message to the user indicating that the load is
55
not acceptable for the platform.
The stability of the Reference AMP can indirectly be
Vlnl = Voutl
GPGA = ZOlOg
Vln2 = VoutZ
improved if the Reference AMP stability improves when
Vmeasure = VMIDR
Vmeasure
V. 1
60
in
As will be recognized by those skilled in the art, the inno
vative concepts described in the present application can be
The PGA gain calculator 36 can then set the correct PGA
modi?ed and varied over a wide range of applications. For
gain.
In an alternative embodiment of the ampli?er con?guration
of FIG. 5, digital-to-analog (D/A) converters 20a and 20b are
implemented prior to Output AMP1 21 and Output AMP2 22,
adding a serial resistance between the Reference AMP and
the load.
65
example, although the description herein has focused on a
two-channel stereo implementation, the invention is also
applicable to crosstalk cancellation in multi-channel imple
mentations. Accordingly, the scope of patented subject matter
US 7,925,030 B2
11
12
should not be limited to any of the speci?c exemplary teach
a PGA gain calculator for calculating the gain of the PGA
based on the known internal output impedance of the
reference ampli?er and the measured ?rst and second
loads.
7. The arrangement of claim 6, wherein the PGA gain
calculator calculates the gain of the PGA using the equation,
ings discussed above, but is instead de?ned by the following
claims.
What is claimed is:
1. A method of canceling crosstalk between a ?rst channel
and a second channel, wherein a ?rst signal is input to a ?rst
5
GPGAI20 log Rim/RL.
8. The arrangement of claim 3, wherein the reference
ampli?er has a known internal output impedance (Rim), the
gain function is a programmable gain ampli?er (PGA), and
the arrangement further comprises:
a crosstalk measurement multiplexer and input ampli?er
for measuring the signal level of the reference ampli?er;
output ampli?er for the ?rst channel, and a second signal is
input to a second output ampli?er for the second channel, and
an output load for each output ampli?er is connected between
each output ampli?er and a reference ampli?er, said method
comprising:
splitting the ?rst and second input signals into two paths
and
a PGA gain calculator connected to the multiplexer for
calculating the gain of the PGA based on the measured
each;
inputting a ?rst path of each signal to each signal’s respec
tive output ampli?er;
signal level of the reference ampli?er.
9. The arrangement of claim 8, wherein the PGA gain
calculator calculates the gain of the PGA using the equation,
adding together a second path of the ?rst and second sig
nals;
adjusting the sum of the ?rst and second signals by a gain
20
adding a suitable DC bias to the adjusted sum, and
inputting the biased adjusted sum to the reference ampli
?er.
2. An arrangement for providing a ?rst channel and a sec
25
ond channel to a headphone jack, said arrangement compris
and input ampli?er for measuring the signal level of the
reference ampli?er; and
a ?rst output ampli?er for amplifying a ?rst input signal for
plied to a ?rst load associated with the headphone jack;
a second output ampli?er for amplifying a second input
30
signal level of the reference ampli?er.
11. The arrangement of claim 2, wherein the arrangement
is implemented as a Mixed Signal Application Speci?c lnte
signal being supplied to a second load associated with
35
a reference ampli?er for providing a reference signal
between the ?rst and second loads; and
a crosstalk cancellation unit for canceling crosstalk
between the ?rst and second channels, said crosstalk
prising:
a ?rst output ampli?er for amplifying a ?rst input signal for
the ?rst channel, said ?rst ampli?ed signal being sup
means for splitting the ?rst and second signals prior to
inputting the signals to the ?rst and second output
plied to a ?rst load associated with the headphone jack;
a second output ampli?er for amplifying a second input
ampli?ers; and
signal for the second channel, said second ampli?ed
signal being supplied to a second load associated with
45
ampli?ers.
50
4. The arrangement of claim 3, wherein the reference
ampli?er has a known internal output impedance (Rim), the
?rst and second loads (RL) are known, and the gain function
is a programmable gain ampli?er (PGA), and wherein the
arrangement further comprises a PGA gain calculator for
calculating the gain of the PGA based on the known internal
output impedance of the reference ampli?er and the known
?rst and second loads.
5. The arrangement of claim 4, wherein the PGA gain
calculator calculates the gain of the PGA using the equation,
GPGAI20 log Rim/RL.
6. The arrangement of claim 3, wherein the reference
ampli?er has a known internal output impedance (Rim), the
gain function is a programmable gain ampli?er (PGA), and
the arrangement further comprises:
means for measuring the impedance of the ?rst and second
loads (RL); and
the headphone jack;
a reference ampli?er for providing a reference signal
between the ?rst and second loads; and
a crosstalk cancellation unit for canceling crosstalk
between the ?rst and second channels, said crosstalk
3. The arrangement of claim 2, wherein the means for
adding a split portion of each signal to the other signal
includes adjusting each split signal by a gain function before
adding the split signal to the other signal.
grated Circuit (ASIC) of a mobile phone platform.
12. An arrangement for providing a ?rst channel and a
second channel to a headphone jack, said arrangement com
cancellation unit comprising:
means for adding a split portion of each signal to the
other signal on the inputs of the ?rst and second output
a PGA gain calculator connected to the A/D converter for
calculating the gain of the PGA based on the measured
signal for the second channel, said second ampli?ed
the headphone jack;
gain function is a programmable gain ampli?er (PGA), and
the arrangement further comprises:
a crosstalk measurement analog-to-digital (A/ D) converter
mg:
the ?rst channel, said ?rst ampli?ed signal being sup
GPGAI20 log Vmeaswe/Vinl, where Vmeaswe is the measured
voltage level of the reference ampli?er, andVin l is the voltage
level of the ?rst input signal.
10. The arrangement of claim 3, wherein the reference
ampli?er has a known internal output impedance (Rim), the
function;
cancellation unit comprising:
?rst and second splitters for splitting the ?rst and second
input signals into two paths each;
means for inputting a ?rst path of each signal to each
signal’s respective output ampli?er;
55
a ?rst adder for adding together a second path of the ?rst
and second signals;
a gain function for adjusting the sum of the ?rst and second
signals;
60
a second adder for adding a suitable DC bias to the adjusted
sum; and
means for inputting the biased adjusted sum to the refer
ence ampli?er.
13. The arrangement of claim 12, wherein the gain function
is a programmable gain ampli?er (PGA).
14. The arrangement of claim 13, wherein the reference
ampli?er has a known internal output impedance (RM) and
the ?rst and second loads (RL) are known, and the arrange
US 7,925,030 B2
14
13
ment further comprises a PGA gain calculator for calculating
the gain of the PGA based on the known internal output
impedance of the reference ampli?er and the known ?rst and
second loads.
15. The arrangement of claim 14, wherein the PGA gain
calculator calculates the gain of the PGA using the equation,
a crosstalk measurement multiplexer and input ampli?er
for measuring the signal level of the reference ampli?er;
5
signal level of the reference ampli?er.
19. The arrangement of claim 18, wherein the PGA gain
calculator calculates the gain of the PGA using the equation,
GPGAI20 log Rim/RD
16. The arrangement of claim 13, wherein the reference
ampli?er has a known internal output impedance (RM) and
the arrangement further comprises:
GPGAI20 log Vmeaswe/Vinl, where Vmeaswe is the measured
voltage level of the reference ampli?er, and Vin l is the voltage
level of the ?rst input signal.
20. The arrangement of claim 13, wherein the reference
ampli?er has a known internal output impedance (RM) and
the arrangement further comprises:
a crosstalk measurement analog-to-digital (A/ D) converter
means for measuring the impedance of the ?rst and second
loads (RL); and
a PGA gain calculator for calculating the gain of the PGA
based on the known internal output impedance of the
reference ampli?er and the measured ?rst and second
loads.
17. The arrangement of claim 16, wherein the PGA gain
calculator calculates the gain of the PGA using the equation,
GPGAI20 log Rim/RL.
18. The arrangement of claim 13, wherein the reference
ampli?er has a known internal output impedance (Rim) and
the arrangement further comprises:
and
a PGA gain calculator connected to the multiplexer for
calculating the gain of the PGA based on the measured
and input ampli?er for measuring the signal level of the
reference ampli?er; and
a PGA gain calculator connected to the A/D converter for
calculating the gain of the PGA based on the measured
20
signal level of the reference ampli?er.
21. The arrangement of claim 12, wherein the arrangement
is implemented as a Mixed Signal Application Speci?c lnte
grated Circuit (ASIC) of a mobile phone platform.
*
*
*
*
*
UNITED STATES PATENT AND TRADEMARK OFFICE
CERTIFICATE OF CORRECTION
PATENT NO.
I 7,925,030 B2
APPLICATION NO.
: 11/482595
DATED
: April 12, 2011
INVENTOR(S)
: Holmstrom et a1.
Page 1 Ofl
It is certified that error appears in the above-identi?ed patent and that said Letters Patent is hereby corrected as shown below:
On the Title Page, Item (54), in Title, Line 2, delete “IMPEDENCE” and insert
-- IMPEDANCE --, therefor.
In Column 1, Line 2, delete “IMPEDENCE” and insert -- IMPEDANCE --, therefor.
In Column 5, Line 40, delete ““u”” and insert -- “||” --, therefor.
In Column 5, Line 55, in Equation (3), delete “RA:RBR>>RO” and
insert -- RAIRBIR>>RO --, therefor.
In Column 9, Line 14, delete “RSIIOOQ,” and insert -- RSIIOQ, --, therefor.
Signed and Sealed this
Twenty-third Day of August, 2011
David J. Kappos
Director 0fthe United States Patent and Trademark O?ice
Was this manual useful for you? yes no
Thank you for your participation!

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project

Download PDF

advertisement