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LATTICE SEMICONDUCTOR LATTICE SEMICONDUCTOR LFE3-35EA-VERSA-EVN Development Kit Data Sheet
Below you will find brief information for Evaluation Board ECP3 Versa Versa. The LatticeECP3™ Versa Evaluation Board enables you to explore and experiment with the features of the LatticeECP3 Field-Programmable Gate Array. The board includes features to assist engineers with rapid prototyping and testing of their specific designs. The board is part of the LatticeECP3 Versa Development Kit. It is intended to be used along with demo user's guides to demonstrate the LatticeECP3 FPGA. The board features a half-length PCI Express form-factor, allowing demonstration of PCI Express x1 interconnection. It also includes a DDR3 memory device (1.5V, 64Mb/x16, 96-ball FBGA, 667 MHz, DDR3-1333) such as the Micron MT41J64M16JT-15E:G device. The board includes termination of data, address and command signals. It includes all power and external components needed to demonstrate the memory controller of the LatticeECP3 device.
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LatticeECP3 Versa Evaluation Board User’s Guide July 2013 Revision: EB62_01.6 LatticeECP3 Versa Evaluation Board User’s Guide Introduction The LatticeECP3™ Versa Evaluation Board allows designers to investigate and experiment with the features of the LatticeECP3 Field-Programmable Gate Array. The features of the LatticeECP3 Versa Evaluation Board can assist engineers with rapid prototyping and testing of their specific designs. The LatticeECP3 Versa Evaluation Board is part of the LatticeECP3 Versa Development Kit. The guide is intended to be referenced in conjunction with demo user’s guides to demonstrate the LatticeECP3 FPGA. Figure 1. LatticeECP3 Versa Evaluation Board, Top Side GSRn & LED PROGRAMn Push-buttons Display SERDES Test DDR3 SMA Connectors Memory Expansion Connectors User Switches Status LEDs USB Programming J3 – JTAG Interface J13 – JTAG Interface 10/100/1000 RJ-45 Connections On-Board Clock Management SPI Flash Configuration Memory PCI Express x1 Features • Half-length PCI Express form-factor – Allows demonstration of PCI Express x1 interconnection • Electrical testing of one full-duplex SERDES channel via SMA connections • USB-B connection for UART and device programming • Two RJ45 interfaces to 10/100/1000 Ethernet to GMII • On-board Boot Flash – 64M Serial SPI Flash • DDR3-1333 memory components (64Mb/x16) • Expansion mezzanine interconnection for prototyping • 14-segment alpha-numeric display • Switches, LEDs and displays for demo purposes • ispVM™ programming support • On-board reference clock sources 2 12V DC Power Input LatticeECP3 Versa Evaluation Board User’s Guide The contents of this user’s guide include top-level functional descriptions of the various portions of the evaluation board, descriptions of the on-board connectors, diodes and switches and a complete set of schematics. Caution: The LatticeECP3 Versa Evaluation Board contains ESD-sensitive components. ESD safe practices should be followed while handling and using the evaluation board. LatticeECP3 Device This board features a LatticeECP3 FPGA with a 1.2V core supply. It can accommodate all pin-compatible LatticeECP3 devices in the 484-ball fpBGA (1mm pitch) package. A complete description of this device can be found in the LatticeECP3 Family Data Sheet. Note: The connections referenced in this document refer to the LFE3-35EA-8FN484C device. Applying Power to the Board The LatticeECP3 Versa Evaluation Board is ready to power on. The board can be supplied with power from a PCI Express host system or standalone with an external wall power module. The 12V DC input power source is fused with a surface mounted fuse, as noted in Table 1. Table 1. Board Power Supply Fuses – (See Appendix B, Figure 12) Fuse Designator F1 Description 12V Input Supply Fuse The board may be plugged into a host PC. Only plug the board into a PCI Express slot when the system is powered off. Once inserted, the PC can be safely powered on. Using the evaluation board outside of a PC chassis supply requires the factory-supplied wall supply module. Use of other supplies is not suggested. GME Technology’s GFP181DA-1215B-1 (or equivalent) is provided with the LatticeECP3 Versa Development Kit. Figure 2. Power Distribution Scheme – (See Appendix B, Figure 12) EN LDO SW 12_0V (5A fused) Power Status LED D13 SERDES 1_2V, +1.2V, 1A, Power Status LED D12 2_5V, +2.5V, 1.1 A, Power Status LED D31 EN SW 3_3V, +3.3V, 1.35 A, Power Status LED D9 SW 1_5V, +1.5V, 1.1 A, Power Status LED D11 EN SW VCC_CORE, +1.2V, 1.35 A, Power Status LED D10 Programming/FPGA Configuration The LatticeECP3 Versa Evaluation Board has a built-in download controller for programming the LatticeECP3 FPGA. The built-in module consists of a USB Type-B connector and a USB UART device. To use the built-in download cable, simply connect a standard USB cable (a USB-B to USB-A cable is included with the LatticeECP3 Versa Development Kit) from J2 to your PC (with ispVM System software installed). The USB hub on the PC will detect the addition of the USB function, making the built-in cable available for use with the ispVM System software. The USB cable is connected in parallel to J3. 3 LatticeECP3 Versa Evaluation Board User’s Guide Alternate ispVM Download Interface J3 is a 1x10 100mil header that is provided for use with an external Lattice download cable (available separately). A USB download cable can be attached to the board using J3 to interface with the FPGA (U1). Note: Resistors R38, R33, R32 and R36 need to be removed. A separate header is provided to interface to a download cable for the ispClock™5406A clock device (U13). U13 is not interfaced to the built-in download interface. U13 is factory-programmed for use with the reference designs and should only be altered for customized designs. A 10-pin JTAG connector is used in conjunction with the ispVM USB download cable to program and control the device. A separate 10-pin header (J14) is provided for programming U13. Table 2. ispVM JTAG Connector Pinout (J3 and J14) – (See Appendix B, Figure 5) Pin Function Color 1 PWR Red 2 TDO Brown 3 TDI Orange 4 N/C — 5 N/C — 6 TMS Purple 7 GND Black 8 TCK White 9 N/C — 10 N/C — ispVM Requirements Note: An ispDOWNLOAD™ cable is included with Lattice Diamond® design software. This cable is not needed for the typical use of this board since it includes the built-in download module and only requires the USB cable included with the board. Standalone ispVM download cables may be purchased separately from Lattice. After initial board setup, use the following procedure to program the board. Instructions assume that ispVM software has been installed on a local PC. Requirements: • PC with ispVM System 18.0 (or later) programming software, installed with appropriate drivers (USB driver for USB cable, Windows 7/XP/2000/NT parallel port driver for ispDOWNLOAD cable). Note: An option to install these drivers is included as part of the ispVM System setup. • ispDOWNLOAD cable (pDS4102-DL2A, HW7265-DL3A, HW-USB-1A, etc.). Required only for alternative FPGA programming and ispClock5406A reprogramming. 4 LatticeECP3 Versa Evaluation Board User’s Guide Board Programming Configuration Status Indicators (see Appendix B, Figure 13) Figure 3. LatticeECP3 Status LEDs and Push-button Controls The LEDs indicate the configuration status of the LatticeECP3 FPGA. • D17 (red) illuminated indicates that programming was aborted or reinitialized, driving the INITN output low. • D20 (green) illuminated indicates the successful completion of configuration by releasing the open collector DONE output pin. • D19 (red) illuminated indicates that PROGRAMN is low. • D18 (red) illuminated indicates that GSRN is low. PROGRAMN and GSRN These push-button switches assert/de-assert the logic levels on PROGRAMN (SW2) and GSRN (SW1). Depressing the button drives a logic level “0” to the device. Programming Serial SPI Flash Memory A serial SPI (16-pin TSSOP, 64M) Flash memory device (U8) is on-board for non-volatile configuration memory storage. A STMicro M25P64VMF16 device is populated on-board. The Serial SPI Flash memory device can be configured easily via its JTAG port. This mode enables the FPGA to be programmed at power-up or assertion of PROGRAMN with a bitstream stored in the memory device. 1. Connect the LatticeECP3 Versa Evaluation Board. 2. In the dialog box, select SPI Flash Programming Mode in the Device Access Option pull-down menu. 5 LatticeECP3 Versa Evaluation Board User’s Guide Figure 4. Device Information Dialog Screen 3. The SPI Serial Flash Device dialog box will open. In this box, select SPI Flash Erase, Program, Verify in the Operation pull-down menu. 4. Select SPI Serial Flash in the Device Family pull-down menu, STMicro under the Vendor pull-down menu, SPI-M2564 under the Device pull-down menu, and 16-lead SOIC under the Package submenu. Figure 5. Select Device Dialog Box 6 LatticeECP3 Versa Evaluation Board User’s Guide Figure 6. Sample SPI Serial Flash Device Dialog Box 5. Click OK in the SPI Serial Flash Device dialog box. Then click OK in the Select Device dialog box. You will return to the main configuration screen 6. From the main programming window, select Go from the top toolbar. This will begin the SPI Serial Flash programming. On-Board Clock Capabilities (See Appendix B, Figure 19) The LatticeECP3 Versa Evaluation Board allows for several clock source options. Some of these options are controlled via the ispClock5406A programmable clock manager device. The ispClock5406A enables the reference clock from the PCI Express interface to provide a reference clock to the SERDES. This is true only when the board is in a PCI Express host socket. When the board is not in a PCI Express host socket, the clock will be supplied by a 156.25 MHz clock on-board oscillator. Both clock inputs can be fanned out to the dedicated SERDES reference inputs, FPGA inputs, and to the expansion connectors. The factory default programming only connects the SERDES reference clock inputs. Factory-defined demonstration designs will control and manage the clock. Figure 7. Clock Controller Scheme FPGA Clock Clock Select PCI Express 156.25 MHz On-board Oscillator SERDES Reference Clock PCLKT0 F11 PCLKC0 F12 REFCLKP V12 Factory Default Clock Programming REFCLKN V11 SERDES Reference Clock Only Expansion Interface Clock 7 LatticeECP3 Versa Evaluation Board User’s Guide General Purpose Clock Source An on-board 100MHz LVDS oscillator is provided for general purpose use. This clock source is connected to differential inputs L5 and K6 and must be used as LVDS inputs to the FPGA. This pin pair also provides optimal interface to the FPGA PLL for customized use. The PCI Express add-in card specification requires add-in boards to include capabilities to tell the host of its presence. The LatticeECP3 Versa Evaluation Board allows this optional connection via a board jumper. The factory default will have two jumpers installed as shown below for the PRSNT connection to the PCI Express host. Figure 8. PCI Express PRSNT Control Connection J4 1 2 3 4 5 6 PCI Express PRSNT Jumper Selector SERDES The LatticeECP3 quad-based SERDES FPGA is utilized on the board for several purposes. The PCSA quad is provisioned to provide a single, full-duplex PCI Express channel. The high-speed signals are connected to the PCI Express edge connection. Table 3. PCI Express Channel Interconnections PETp0 HDINP0 Y15 PETn0 HDINN0 Y14 PERp0 HDOUTP0 AB15 PERn0 HDOUTN0 AB14 J5 HDINP3 Y8 Table 4. SMA Test Interconnections J6 HDINN0 Y9 J7 HDOUTP3 AB8 J8 HDOUTN3 AB9 FPGA Test Pins (see Appendix B, Figure 18) General Purpose DIP Switches General purpose FPGA pins are available for user applications. FPGA pins are connected to switch SW3, a SPST slide-actuated DIP switch. The switches are connected to logic level 0 when moved to the ON position. Switch position 1 is indicated with a dot. These inputs are within a bank connected to 1.5V. The user must program these inputs to be the LVCMOS15 type in the design. 8 LatticeECP3 Versa Evaluation Board User’s Guide Figure 9. LatticeECP3 Versa Evaluation Board LEDs and Switches The designated pins are connected according to Table 5. Table 5. FPGA Ball to DIP Switch Position FPGA Ball Number SW3 DIP Switch Position J7 1 J6 2 H2 3 H3 4 J3 5 K3 6 J2 7 J1 8 General Purpose LEDs (See Appendix B, Figure 18) The LEDs provided on the LatticeECP3 Versa Evaluation Board are connected to general purpose FPGA I/Os. These LEDs provide status for user designs and must be included in the design. The LEDs illuminate when the FPGA output is driven LOW. Table 6 shows the LED and associated FPGA pins. These pins are within an I/O bank connected to 3.3V and the user should program these to be LVCMOS33 type outputs in the design. Table 6. LED Definitions LED Number FPGA Ball Number PCB Designator LED Color LED0 U19 D21 Green LED1 U18 D22 Green LED2 AA21 D24 Yellow LED3 Y20 D25 Yellow LED4 W19 D26 Red LED5 V19 D27 Red LED6 AA20 D29 Blue LED7 AB20 D28 Blue 9 LatticeECP3 Versa Evaluation Board User’s Guide Alpha-numeric LED Display (see Appendix A, Figure 18) A 14-segment alpha-numeric display is provided on the board (D23). These LED segments are connected to general-purpose FPGA I/Os. The LEDs must be included in the FPGA design. The LEDs illuminate when the FPGA output is driven LOW. Table 7 shows the LED and associated FPGA pins. These pins are within an I/O bank connected to 3.3V and the user should program these to be LVCMOS33 outputs in the design. Figure 10. 14-Segment Display Table 7. Alpha-numeric LED Definitions Display fpBGA Ball Number Display fpBGA Ball Number A V6 J AB3 B U7 K AB4 C Y6 L W4 D Aa6 M Y5 E U8 N AA4 F T8 P AA5 G R9 DP W5 H T9 DDR3 Memory Device (see Appendix B, Figure 17) • The LatticeECP3 Versa Evaluation Board is equipped with a SDRAM memory device (1.5V, 64Mb/x16, 96-ball FBGA, 667 MHz, DDR3-1333) such as the Micron MT41J64M16JT-15E:G device. • The DDR3 memory includes a 16-bit wide memory controller interface. • The board includes termination of data, address and command signals. It includes all power and external components needed to demonstrate the memory controller of the LatticeECP3 device. • A 100 MHz on-board clock oscillator is available to provide a DDR3 reference clock. 10 LatticeECP3 Versa Evaluation Board User’s Guide Table 8. DDR3 Memory Controller Interconnections NETNAME 484 fpBGA Ball Number NETNAME 484 fpBGA Ball Number DQ0 E5 A0 C8 DQ1 E4 A1 C7 DQ2 D2 A2 B7 DQ3 D1 A3 D8 DQ4 C2 A4 F9 DQ5 B2 A5 E9 DQ6 G5 A6 A3 DQ7 G4 A7 D7 DQ8 G2 A8 A7 DQ9 F1 A9 B8 DQ10 H4 A10 C9 DQ11 E2 A11 C10 DQ12 J4 K_0 K4 DQ13 B1 K_0# K5 DQ14 C1 CAS# A4 DQ15 G3 BA0 B4 DQS0 F5 BA1 E6 DQS0# F4 BA2 D5 DQS1 H5 ODT E7 DQS1# H6 CS0# C6 CEO G8 WE# D6 RAS# A6 VREF E1 CLKP L5 DM0 E3 CLKN K6 DM1 F3 Ethernet Interfaces (see Appendix B, Figure 18) Two Marvell 88E1119R Gigabit Ethernet transceiver devices (U17) are included on the board. This physical layer device supports 1000BASE-T, 100BASE-TX, and 10BASE-T applications via a standard media interface to a dual RJ45 connection. The RJ45 connection includes network magnetics providing the proper signal conditioning, electro-magnetic interference suppression and signal isolation. This connector includes two LEDs and the board includes four status LEDs from the Marvell device. The LEDs are register-programmed and detailed descriptions are available in the Marvell device data sheet. Table 9. PHY Status Indicators LED Status Description RJ45 (Yellow) LED RX RJ45 (Yellow) LED TX Each Marvell 88E1119R device communicates via a GMII interface to the LatticeECP3 device. 11 LatticeECP3 Versa Evaluation Board User’s Guide Table 10. FPGA GPIO to GMII Interfaces Signal PHY#1 PHY#2 RSTN L3 R21 MDIO L2 U16 MDC: V4 Y18 RXC L4 N19 RX_ER M4 V20 RX_DV M1 U15 RX_D0 M5 AB17 RX-D1 N1 AA17 RX_D2 N6 R19 RX_D3 P6 V21 RX_D4 T2 T17 RX_D5 R2 R18 RX_D6 P5 W21 RX_D7 P3 Y21 TXC C12 M21 TX_EN V3 V22 TX_D0 V1 W22 TX_D1 U1 R16 TX_D2 R3 P17 TX_D3 P1 Y22 TX_D4 N5 T21 TX_D5 N3 U22 TX_D6 N4 P20 TX_D7 N2 U20 GTXCLK M2 M19 CRS P4 P19 COL R1 N18 COMA R41 T151 125CLK T3 R17 1. Each PHY device includes a header dedicated to the COMA connection to the device. The header is populated with a jumper that disables and places the PHY in a low power configuration. Headers J10 and J12 are used for this purpose. It is assigned to PHYs U9 and U10, respectively. 12 LatticeECP3 Versa Evaluation Board User’s Guide Table 11. Expansion Connections x3 Expansion Connector x4 Expansion Connector Pin Signal 484-Ball fpBGA Pin Signal 484-Ball fpBGA 1 GND GND 1 HPE-RST# J20 2 NC NC 2 GND GND 3 2.5V 2.5V 3 IO0 B11 4 IO29 D17 4 IO1 B12 5 IO30 J22 5 IO2 A12 6 IO31 K22 6 IO3 A13 7 IO32 L18 7 IO4 E12 8 IO33 L19 8 IO5 E13 9 IO34 L22 9 IO6 C13 10 IO35 M22 10 IO7 C14 11 IO36 K18 11 IO8 D13 12 IO37 K17 12 IO9 D14 13 IO38 H22 13 IO10 A14 14 IO39 H21 14 IO11 B14 15 IO40 G22 15 IO12 F13 16 IO41 G21 16 IO13 F14 17 IO42 J18 17 IO14 A15 18 IO43 J17 18 IO15 B15 19 IO44 F22 19 GND GND 20 IO45 E22 20 3.3V 3.3V 21 5VIN 5VIN 21 IO16 C15 22 GND GND 22 GND GND 23 2.5V 2.5V 23 IO17 D15 24 GND GND 24 GND GND 25 3.3V 3.3V 25 IO18 G15 26 GND GND 26 GND GND 27 3.3V 3.3V 27 IO19 G14 28 GND GND 28 IO20 A16 29 OSC U13 PIN27 29 IO21 B16 30 GND GND 30 GND GND 31 CLKIN E15 31 IO22 F15 32 GND GND 32 IO23 F16 33 CLKOUT D12 33 IO24 A17 34 GND GND 34 GND GND 35 3.3V 3.3V 35 IO25 B18 36 GND GND 36 IO26 A18 37 3.3V 3.3V 37 IO27 A19 38 GND GND 38 CARDSEL# J19 39 3.3V 3.3V 39 IO28 D16 40 GND GND 40 GND GND 13 LatticeECP3 Versa Evaluation Board User’s Guide References • DS1021, LatticeECP3 Family Data Sheet • HB1009, LatticeECP3 Family Handbook • QS013, LatticeECP3 Versa Evaluation Board Quick Start Guide • UG46, PCI Express Demos for the LatticeECP3 Versa Evaluation Board • UG45, DDR3 Demo for the LatticeECP3 Versa Evaluation Board • UG44, SERDES Eye/Backplane Demo for the LatticeECP3 Versa Evaluation Board Ordering Information Description LatticeECP3 Versa Evaluation Board Ordering Part Number LFE3-35EA-VERSA-EVN 14 China RoHS Environment-Friendly Use Period (EFUP) LatticeECP3 Versa Evaluation Board User’s Guide Technical Support Assistance e-mail: [email protected] Internet: www.latticesemi.com Revision History Date Version Change Summary April 2011 01.0 Initial release. August 2011 01.1 Updated LatticeECP3 Versa Evaluation Board, Top Side diagram. Corrected ispVM System software version number in the ispVM Requirements text section. Corrected ispVM JTAG Connector Pinout table caption information. November 2011 01.2 Corrected error in the column headings of the Expansion Connections table. February 2012 01.3 Updated document with new corporate logo. February 2012 01.4 Expansion Connections table – Updated information for pins 31 and 33. August 2012 01.5 Added alternate Abracon part numbers for Discera oscillators in Bill of Materials. July 2013 01.6 Added note in the Alternate ispVM Download Interface section. Updated Technical Support Assistance information. © 2013 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. 15 16 A B C 5 RefClk 156.25M OSC PCIe CLK5406 LED SEGMENT ARRAY 4 100.00M DIFF OSC USER DIP SWITCH Device Power Pins Power DDR3 1.5V 16-Bit Expansion Clk General Clk PCSA RefClk 3.3V GMII PHY#1 PLL 4 REFERENCE CLOCKS 3 PCIe CH#0 Bank 6 Bank 7 X1 Bank 8 SMA Test CH#3 SERDES Bank 3 Bank 2 Bank 1 ECP3 FPGA Bank 0 Expansion Port- 3.3V Designator U1 is the FPGA DUT. 3 2 Revision History: February 9, 2011 February 24, 2011 USER LEDS 2 Date: Size B Title Monday, March 14, 2011 JPS JPS 1 Sheet 1 of 11 Rev B 1605 Valley Center Parkway Bethlehem, PA 18017 ECP3 VERSA Eval Board Project 1 Rev A Final Design Rev B Cover Page 3.3V Programming SPI 3.3V GMII PHY#2 Expansion Port-3.3V PCSA D 5 A B C D LatticeECP3 Versa Evaluation Board User’s Guide Appendix A. Schematics Figure 11. Cover Page A B C R5 10K-0402SMT 12_0V (5A fused) POWER INPUT +11v to +16v 5 C21 10NF-0402SMT VCCPLL 12_0V TP4 F1251CT-ND F1 C20 10NF-0402SMT 5A Fast-Blo SMT Socketed Fuse 12_0VIN 1 J1 TP1 D14 SCHOTTKY/VISHAY-V12P10 12_0VIN Male Power Jack 2.1mm 3 PJ-032A TP3 TP2 Data Sheet Version = 1.0 LFE3-35E-FN484CES AB2 AA3 N15 K9 N9 K14 N14 M8 R11 H11 M15 R12 H12 L8 L15 VCCA 10NF-0402SMT 10NF-0402SMT C22 C3 C23 C4 C33 C34 100NF-0402SMT + 3_3V C7 C25 C6 C24 C32 C5 C35 C8 100NF-0402SMT 10NF-0402SMT + C36 C9 3_3V R25 12_0V 1_8K-1206SMT LED_GREEN_0603 D13 12VIN GOOD SW 4 1_8K-1206SMT R22 Q1 2N2222/SOT23 2_5V R27 1 10K-0603SMT VCC_CORE 3 R28 1 10K-0603SMT LED_GREEN_0603 D11 C52 220NF-0402SMT 16V 1_5V 12_0V Q3 2N2222/SOT23 3_3V R29 1 10K-0603SMT 1000pF-0402SMT 22 23 24 2 1 8 7 C37 10uF,25V-1206SMT RLP-134 RT/SYNC PG1 VC1 TRACK/SS1 FB1 SW1 R6 51K-0402SMT R14 51K-0402SMT RT/SYNC PG1 VC1 TRACK/SS1 FB1 SW1 BOOST1 C27 2 3.3V R26 220R-0603SMT R179 220R-0603SMT D9 LED_GREEN_0603 3_3V PG2 VC2 TRACK/SS2 FB2 SW2 BOOST2 20 19 17 18 11 12 20 19 17 18 11 12 U4 LT3508EUF 12_0V PG2 VC2 TRACK/SS2 FB2 SW2 BOOST2 U3 LT3508EUF 12_0V DNI 3_3V C44 1000pF-0402SMT VCCA C19 PCSA_VCCOB C14 PCSA_VCCIB C31 D2 1N4448W C29 C28 + C13 + C18 FB2 2.5V D31 + C26 BOOST1 LED_GREEN_0603 2_5V 1% 22 23 24 2 1 8 7 C51 10uF,25V-1206SMT RLP-134 DNI FB1 BLM41PG600SN1 +1.2 v 500 mA BLM41PG600SN1 C17 10uF,25V-1206SMT VOUT2 R4 OPEN-0603SMT 2.3v minimum input voltage 0.46 v drop at 500 mA max C56 1000pF-0402SMT D5 1N4448W LED_GREEN_0603 D12 VCCA 1.2V Analog R21 10K-0402SMT 1% 100pF-0402SMT C245 R15 5_11K-0402SMT 1% D7 DFLS220L R24 1_8K-1206SMT C63 22uF,6.3V-0805SMT RLP-133 1.5V C43 C12 3_3UF-10V-0805SMT 10V 2 R2 0R-0603SMT 10NF-0402SMT C16 D1 1N4448W 8 9 7 6 10 3_3V BYP2 ADJ2 C38 16V 220NF-0402SMT R9 10K-0402SMT 1% L3 4.7uH-SPD62R-472M 22uF,6.3V-0805SMT RLP-133 C55 VCC_CORE R23 1_8K-1206SMT 12_0V Q2 2N2222/SOT23 D3 DFLS220L R7 21_5K-0402SMT 1% EN2 VOUT2 VOUT2_6 2_5V Vout = 0.8*(R7/R9+1) = 2.52 v C49 22uF,6.3V-0805SMT RLP-133 BYP1 ADJ1 VOUT1 VOUT1_3 EN U2 LT3029EDE 1 16 L1 4.7uH-SPD62R-472M 22uF,6.3V-0805SMT RLP-133 C41 2.5V Core Power C54 22uF,6.3V-0805SMT RLP-133 1.2v/ms +1.2 v 1.35 A C40 22uF,6.3V-0805SMT RLP-133 1.2v/ms BLM41PG600SN1 FB3 R3 OPEN-0603SMT R1 0R-0603SMT 4 3 15 2_5V Voltage Regulators C15 10NF-0402SMT C10 3_3UF-10V-0805SMT 10V Vout = 0.8*(R15/R21+1) = 1.21 v LED_GREEN_0603 D10 12_0V VCC_CORE, +1.2 V, 1.35 A 1_5V, +1.5 V, 1.1 A SW EN 3_3V, +3.3 V, 1.35 A 3 VOUT1 +2.5v 1.1 A C30 10uF,25V-1206SMT 6.3V 0805 +1.2 v 500 mA 1.2V VCC_CORE SERDES 1_2V, +1.2 V, 1A FB4 BLM41PG600SN1 2_5V, +2.5V, 1.1 A LDO EN C11 VCC_CORE 100NF-0402SMT SW EN SW Power Supply Block Diagram 100NF-0402SMT V13 U12 U11 V10 C2 10NF-0402SMT 1NF-0402SMT 100NF-0402SMT 10NF-0402SMT 1UF-16V-0805SMT 10NF-0402SMT C1 100NF-0402SMT 22UF-16V-TANTBSMT 22UF-16V-TANTBSMT 4 1UF-16V-0805SMT 100NF-0402SMT 22UF-16V-TANTBSMT 14 13 VIN1 VIN1_13 12 11 VIN2 VIN2_11 NC GND GND_PAD J11 J9 P11 P12 J14 J13 M14 M9 P9 L9 P14 P10 J12 J10 L14 P13 1UF-16V-0805SMT D GND VCC GND VCC VCC GND VCC GND VCC GND GND VCC GND VCC GND VCC GND VCC VCC GND GND VCC GND VCC VCC GND VCC GND GND VCC VCC GND GND GND GND VCCA GND VCCA GND VCCA VCCA GND GND GND VCCAUX GND VCCAUX VCCAUX GND GND VCCAUX GND VCCAUX GND VCCAUX GND VCCAUX GND VCCAUX GND VCCPLL_L GND GND VCCPLL_L GND VCCPLL_R GND VCCPLL_R GND XRES GND GND GND RESERVE-AB2 GND RESERVE-AA3 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND 2 1 2 100NF-0402SMT G 2 1 2 5 17 C45 330pF-0402SMT 1NF-0402SMT 5 G 3 2 G 3 2 1 2 G 3 2 C46 10pF-0402SMT C60 10pF-0402SMT 2 1 C59 330pF-0402SMT 1% 22UF-16V-TANTBSMT GND1 GND2 GND3 GND4 R11 34K-0402SMT R18 63_4K-0402SMT 21 SHDN 3 4 5 6 21 SHDN 9 VIN1 GND5 25 GND1 GND2 GND3 GND4 3 4 5 6 R10 51K-0402SMT R19 30_1K-0402SMT 100NF-0402SMT 10 VIN2 GND6 GND7 GND8 GND9 13 14 15 16 10 VIN2 2 1 22UF-16V-TANTBSMT 1UF-16V-0805SMT Date: Size C Title R20 20K-0402SMT 1% R13 11_5K-0402SMT 1% R8 35_7K-0402SMT D4 DFLS220L 3.3V C39 220NF-0402SMT 16V L2 4.7uH-SPD62R-472M 1 3_3V C50 22uF,6.3V-0805SMT RLP-133 C42 22uF,6.3V-0805SMT RLP-133 1.2v/ms +3.3 v 1.35 A 3_3V 1_5V 1.1 A C64 22uF,6.3V-0805SMT RLP-133 C58 22uF,6.3V-0805SMT RLP-133 1.2v/ms 1 Wednesday, February 09, 2011 Sheet ECP3- VERSA Eval Board Project Power 2 of 11 Rev B 1605 Valley Center Parkway Bethlehem, PA 18017 Vout = 0.8*(R16/R17+1) = 1.51 v 100pF-0402SMT R17 16_9K-0402SMT 1% C246 15K-0402SMT R16 1% D8 DFLS220L C53 220NF-0402SMT 16V L4 4.7uH-SPD62R-472M DDR3 1.5V Power +1.5v Vout = 0.8*(R8/R13+1) = 3.28 v C57 1000pF-0402SMT D6 1N4448W R12 51K-0402SMT 1UF-16V-0805SMT U1A G C62 330pF-0402SMT 9 VIN1 GND5 25 G 2 1 C47 10pF-0402SMT C61 10pF-0402SMT 1 2 10NF-0402SMT GND6 GND7 GND8 GND9 C48 330pF-0402SMT SERDES Power 1 2 17 13 14 15 16 N11 K13 B9 G12 V2 K8 M16 Y4 N12 AA7 U13 AA10 AA15 D3 M13 AB1 AA13 T10 U9 L12 AA18 K12 R10 K2 Y7 F2 U10 E14 N10 H8 AB22 W16 R5 M12 H18 AA16 V14 Y16 AA12 C11 E21 P2 T12 AA9 V15 M7 W20 M11 H10 L7 AB7 B5 B13 AA8 W7 V16 J5 A22 L16 H13 L20 K15 J21 U21 N8 U6 P16 V8 AA14 R15 A1 B17 R8 T11 F17 L13 F6 H15 V9 L10 M3 V7 AA11 P18 K11 T13 C19 K10 G11 N21 AB16 N13 U14 U17 E8 M10 L11 R13 A B C D LatticeECP3 Versa Evaluation Board User’s Guide Figure 12. Power A B C 8 8 7 9 9 100NF-0402SMT J2 C82 5 C83 3_3V SW2 FPGA_CSSPI0N_DI SPI0_Q PROGRAMN SW1 3_3V C77 100NF-0402SMT FLASH_DIS PROGRAMN & GSRN Pushbuttons FPGA GSRN L5 1UH-1206SMT 4_7K-0402SMT R51 7 6 R66 10K-0402SMT R34 4_7K-0402SMT CS CLK DI DO 93LC56-SO8 VCC NU ORG VSS 3 1 3_3V OUT1 OUT2 MAX6817 IN2 IN1 U7 1 2 3 4 5 6 7 8 U8 M25P64-FLASH HOLD# CK VCC D DU1 DU8 DU2 DU7 DU3 DU6 DU4 DU5 S# VSS Q W# R39 27R-0603SMT USB1_CS USB1_SK USB1_D USB1_Q 1 12 MHz 2 C80 12PF-0603SMT DI Y1 ATS120SM-1 HC-49/US-SM DI 1 2 3 4 16 15 14 13 12 11 10 9 6 GSRN PROGRAMN NW FPGA_MCLK FPGA_SISPI 4 3_3V 4 + R48 C76 DI LFE3-35E-FN484CES VCCIO8 VCCIO8 H16 G16 13 3 2 63 62 61 6 14 7 8 49 50 FPGA_CSSPI0N_DI FPGA_CS1N FPGA_CSN GSRN FPGA_MCLK PROGRAMN TXD_UART RXD_UART SPI0_Q FPGA_SISPI DONE INITN FPGA_WRITEN SPIFASTN FTVCC1_8V FT2232H CLK_RESETn 156MHz_EN SCL [9] SDA [9] PCIE_PERSTN BCBUS0 BCBUS1 BCBUS2 BCBUS3 BCBUS4 BCBUS5 BCBUS6 BCBUS7 BDBUS0 BDBUS1 BDBUS2 BDBUS3 BDBUS4 BDBUS5 BDBUS6 BDBUS7 ACBUS0 ACBUS1 ACBUS2 ACBUS3 ACBUS4 ACBUS5 ACBUS6 ACBUS7 ADBUS0 ADBUS1 ADBUS2 ADBUS3 ADBUS4 ADBUS5 ADBUS6 ADBUS7 3_3V C85 [9] [9] [4] 16 17 18 19 21 22 23 24 TP5 36 60 48 52 53 54 55 57 58 59 38 39 40 41 43 44 45 46 26 27 28 29 30 32 33 34 C69 100NF-0402SMT 3_3V C70 R67 R62 OPEN-0402SMT R68 R71 R69 10K-0402SMT 10K-0402SMT 10K-0402SMT 3_3V FPGA_TMS R54 10K-0402SMT FPGA_TCK 10K-0402SMT FPGA_CCLK TXD_UART RXD_UART UART_ACT R36 0R-0603SMT R32 0R-0603SMT R33 0R-0603SMT R38 0R-0603SMT JTAG_ACT C68 100NF-0402SMT FPGA_TDI C67 PWREN# C84 R52 0R-0402SMT 3 3_3V 3_3V 3_3V VCCJ TCK TDI TDO TMS U1I R57 R58 R59 4_7K-0603SMT 3_3V 2 TCK TMS NC VCC 7 1 3_3V D16 3_3V INITN R65 10K-0603SMT DONE 1 Date: Size C Title DONE TMS GND TCK DONE INITn 680R-0603SMT R55 1 3_3V GSRN D18 LED_RED_0603 +3.3V TDO TDI PROGRAMn Local JTAG header (ispVM) Friday, March 18, 2011 1 Sheet ECP3 VERSA Eval Board Project Programming 3_3V PROGRAMN D19 LED_RED_0603 680R-0603SMT R56 3 of 11 Rev B 1605 Valley Center Parkway Bethlehem, PA 18017 CONFIG Status LEDs DONE indicator will light when configuration is successfully completed INITN LED_RED_0603 R60 D17 680R-0603SMT R INITN indicator will light if an error occurs during configuration programming HEADER 10 INITN GND ispEN_N TDI TDO R30 LED_GREEN_0603 DONE J3 2 3 4 5 6 8 9 10 D15 3_3V Q4 2N2222/SOT23 D20 R49 1K-0603SMT R45 R46 R47 4_7K-0603SMT 4_7K-0603SMT 4_7K-0603SMT LFE3-35E-FN484CES 3_3V H7 G7 G6 C3 C4 100NF-0402SMT C73 3_3V 220R-0603SMT G 100NF-0402SMT SUSPEND# FTDI High-Speed USB TEST OSCO OSCI EECS EECLK EEDATA REF RESET# DM DP VREGOUT VREGIN U5 FT2232HL FPGA_CCLK R44 12K-0603SMT R40 4_7K-0402SMT F20 E20 E19 B21 F21 D20 J16 H17 C22 D22 G17 G18 G19 G20 H19 H20 C21 D21 F19 F18 A21 B22 C20 C18 B19 E18 E17 A20 B20 D18 D19 2_2K-0603SMT CCLK CFG0 CFG1 CFG2 DONE INITN PR11A/WRITEN PR11B/D0/SPIFASTN PR12A/D1 PR12B/D2 PR14A/D3/SI PR14B/D4/SO PR15A/D5 PR15B/D6/SPID1 PR17A/D7/SPID0 PR17B/BUSY/SISPI PR6A PR6B/DI/CSSPI0N/CSSPIN PR8A/CS1N/HOLDN/CONT2N PR8B/CSN/SN/CONT1N PR9A/DOUT/CSON/CSSPI1N PR9B/MCLK PROGRAMN PT68A PT68B PT70A PT70B PT71A PT71B PT73A PT73B U1H R50 1M-0603SMT DI C75 USB_N_i USB_P_i C74 3_3UF-10V-SMT 3_3V C72 100NF-0402SMT C71 4_7UF-10V-SMT 2 FB6 MPZ1608Y600B + DI 1 33pF-0402SMT-DNI FTVCC1_8V C66 100NF-0402SMT C65 4_7UF-10V-SMT 2 FB5 MPZ1608Y600B + DI 1 R31 LED_GREEN_0603 3_3V R35 27R-0603SMT 18pF = 12pF + Ground Plane ( 6pF ) DI USB_N USB_P R42 R41 R43 10K-0402SMT 10K-0402SMT 10K-0402SMT C79 12PF-0603SMT 8 7 6 5 U6 SPI FLASH R53 6 1 2 3 4 5 4_7K-0402SMT 1 2 3 4 5 C81 USB Download 10NF-0402SMT 5 VCC 2 GND 100NF-0402SMT R37 10K-0603SMT R64 10K-0402SMT 10 33pF-0402SMT-DNI 12 37 64 VCORE VCORE VCORE 20 31 42 56 D R63 10K-0402SMT 100NF-0603SMT 220R-0603SMT G UART_ACT 100NF-0402SMT VCCIO VCCIO VCCIO VCCIO 4 9 VPHY VPLL AGND USB_MINI_AB R70 10K-0402SMT SPIFASTN 2 FPGA_CSN 3 FPGA_WRITEN 4 FPGA_CS1N C78 JTAG_ACT R61 LED_GREEN_0603 GND GND GND GND GND GND GND GND 100NF-0603SMT Y 1 5 11 15 25 35 47 51 10NF-0402SMT 220R-0603SMT G 3 2 Y GSRN 18 PROGRAMN 5 A B C D LatticeECP3 Versa Evaluation Board User’s Guide Figure 13. Programming PROGRAMN DONE INITN FPGA_TDO A B 2 3 4 5 J6 SMA PCSA_HDOUTP3 2 3 4 5 SMA 1 J8 1 SMA 1 J7 PCSA_HDINP3 SMA 1 J5 PCSA_HDOUTN3 PCSA_HDINN3 C93 C92 C91 C90 C89 C88 PCSA_VCCIB PCSA_VCCOB 100NF-0402SMT 4 [9] [9] PRSNT1# PRSNT3# 5 4 All Nets to SMAs are 100-ohm differential pairs. The P and N traces shall be <20mil matched in length 2 3 4 5 2 3 4 5 PCSA_REFCLKP PCSA_REFCLKN PCSA_VCCIB PCSA_HDOUTP3 PCSA_HDOUTN3 PCSA_REFCLKP PCSA_REFCLKN PCSA_HDINP3 PCSA_HDINN3 PCSA_HDOUTP0 PCSA_HDOUTN0 x1_PETp0 x1_PETn0 10NF-0402SMT PCSA_VCCOB LFE3-35E-FN484CES Y15 Y14 Y12 Y13 Y11 Y10 Y8 Y9 AB15 AB14 AB12 AB13 AB11 AB10 AB8 AB9 V12 V11 W15 W12 W11 W8 W14 W13 W10 W9 1NF-0402SMT C PCSA_HDINP0 PCSA_HDINN0 PCSA_HDINP1 PCSA_HDINN1 PCSA_HDINP2 PCSA_HDINN2 PCSA_HDINP3 PCSA_HDINN3 PCSA_HDOUTP0 PCSA_HDOUTN0 PCSA_HDOUTP1 PCSA_HDOUTN1 PCSA_HDOUTP2 PCSA_HDOUTN2 PCSA_HDOUTP3 PCSA_HDOUTN3 PCSA_REFCLKP PCSA_REFCLKN PCSA_VCCIB0 PCSA_VCCIB1 PCSA_VCCIB2 PCSA_VCCIB3 PCSA_VCCOB0 PCSA_VCCOB1 PCSA_VCCOB2 PCSA_VCCOB3 100NF-0402SMT D U1J 10NF-0402SMT 19 1NF-0402SMT J4 1 3 5 [3] HEADER 3X2 2 4 6 PCIE_PERSTN 3 3 3_3V PRSNT [9] [9] R72 4_7K-0603SMT 5 R178 [9] PCIE_CLKP PCIE_CLKN OPEN-0603SMT x1_PERp0 x1_PERn0 PCIE_CLKP PCIE_CLKN PCIE_3V3 12_0VIN C86 PRSNT1# +12V +12V GND JTAG2 JTAG3 JTAG4 JTAG5 +3.3V +3.3V PERST# GND REFCLK+ REFCLKGND PERp0 PERn0 GND CN1 +12V +12V RSVD_B3 GND SMCLK SMDAT GND +3.3V JTAG1 3.3Vaux WAKE# RSVD_B12 GND PETp0 PETn0 GND PRSNT3# GND B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 x1_PERn0 x1_PERp0 PCI Express x1 Edge Finger Conn. A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 C87 PRSNT3# x1_PETp0 x1_PETn0 PCIE_3V3 1 X1 PCIe Board Fingers PRSNT1# 100NFX5R-0402SMT 100NFX5R-0402SMT 1 TP6 Testpoint 2 Date: Size B Title Wednesday, February 09, 2011 1 Sheet ECP3 VERSA Eval Board Project SERDES 4 of 11 Rev B 1605 Valley Center Parkway Bethlehem, PA 18017 All Nets are 85-ohm differential pairs. The P and N traces shall be <20mil matched in length B side = Primary Component Side(TOP) A side = Secondary Component Side(BOTTOM) PCSA_HDOUTP0 PCSA_HDOUTN0 2 A B C D LatticeECP3 Versa Evaluation Board User’s Guide Figure 14. SERDES A B C 5 C109 C108 3_3V C107 LFE3-35E-FN484CES VTT6 VCCIO6 VCCIO6 10NF-0402SMT 100NF-0603SMT D 100NF-0603SMT M6 P8 N7 V6 U7 Y6 AA6 U8 T8 R9 T9 AB3 AB4 W4 Y5 AA4 AA5 W5 W6 AB5 AB6 L3 L2 L4 M4 M2 M1 M5 N6 N2 N1 N4 P4 N3 P3 N5 P6 P1 R1 P5 R6 R3 R2 U1 U2 T2 T1 T3 U3 P7 V1 W1 R7 T7 V3 W3 R4 T5 W2 Y1 T4 U4 AA1 Y2 T6 U5 Y3 AA2 V4 V5 TP7 3_3V PHY1_MDC PHY1_COMAn 0 R97 PHY1_TXD1 0 R82 1_TX_EN PHY1_TXD2 0 R81 [8] C116 C125 C124 2 1 FB13 Z-600 ohm / 74279265 C101 C94 C103 C106 10uF/6V3/X7R-0805SMT C105 C104 C102 PHY1_VDDO 1 2 PHY1_AVDDR PHY1_DVDD C123 10uF/6V3/X7R-0805SMT C117 10uF/6V3/X7R-0805SMT TXD[3] TXD[4] TXD[5] TXD[6] TXD[7] GTX_CLK DVDD COMA_n CLK125 LED[0] LED[1] VDDO LED[2] RESET_n DIS_REG12 DVDD AVDDR AVDDR Q5 1 R106 4_75K-0603SMT 3 C126 100NF-0603SMT BCP69-16 3_3V 88E1119R_72QFN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 C118 100NF-0603SMT GPHY 1.8V Power PHY1_COMAn C110 R101 4_7K-0402SMT TP8 PHY1_TXD3 PHY1_TXD4 PHY1_TXD5 PHY1_TXD6 PHY1_TXD7 PHY1_GTXCLK PHY1_DVDD PHY1_COMAn PHY1_CLK125 PHY1_LED0 PHY1_LED1 PHY1_VDDO PHY1_LED2 PHY1_RSTN U9 TX and RX traces are all matched length < 2" 1_RSTN R104 R180 1_8K-0402SMT PHY1_AVDDR 4 PHY1_AVDDX PHY1_AVDDC PHY1_VDDO Place termination resistors TX_D0-7, TX_ER, TX_EN, GTX_CLK as close to FPGA as possible using 50 ohm impedence traces. 1 2 FB10 Z-600 ohm / 74279265 2 1 FB12 Z-600 ohm / 74279265 2 1 FB11 Z-600 ohm / 74279265 2 1 2 FB9 Z-600 ohm / 74279265 HEADER 2 J10 1 FB8 Z-600 ohm / 74279265 PHY1_VCC_CT PHY1_AVDD C114 C115 C113 PHY1_TX_EN PHY1_TXD0 PHY1_CLK125 PHY1_TXD3 0 PHY1_TXD4 0 0 PHY1_TXD5 0 R96 PHY1_TXD6 0 0 1_TXD0 PHY1_TXD7 0 1_125MHz R95 1_RXD4 1_TXD2 1_RXD5 1_TXD1 PHY1_GTXCLK SEG[0:14] 0 1_RSTN PHY1_MDIO 1_RXC 1_RX_ER 1_GTXCLK R75 1_RX_DV 1_RXD0 1_RXD2 1_TXD7 R76 1_RXD1 1_TXD6 R77 1_CRS 1_TXD5 R78 1_RXD7 1_TXD4 R79 1_RXD3 1_TXD3 R80 1_COL 1_RXD6 SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 10uF/6V3/X7R-0805SMT 10uF/6V3/X7R-0805SMT 10uF/6V3/X7R-0805SMT 100NF-0603SMT 3 PHY1_AVDDX C95 C127 ETH1_MD3_N ETH1_MD3_P PHY1_AVDD 4_7UF-16V-0805SMT 2 PHY1_VDDOR FB7 Z-600 ohm / 74279265 C128 C119 100NF-0603SMT 1 CRS COL MDC DVDD VDDO MDIO TDO TDI TCK TMS TRST_n DVDD XTAL_OUT XTAL_IN AVDDC HSDACP HSDACN AVDDC PHY1_DVDD C129 C130 C131 C122 R105 4_99K-0402SMT RLP-100 PHY1_AVDD C120 C121 ETH1_MD2_N ETH1_MD2_P ETH1_MD1_N ETH1_MD1_P PHY1_AVDD 100NF-0603SMT 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 PHY1_AVDDC PHY1_DVDD PHY1_XTAL_OUT PHY1_XTAL_IN PHY1_AVDDC 2 C241 ETH1_MD0_P ETH1_MD3_N ETH1_MD3_P ETH1_MD2_N ETH1_MD2_P ETH1_MD1_N ETH1_MD1_P ETH1_MD0_N C242 PHY1_VDDO 1_CRS 1_COL R102 1K-0402SMT R103 4_7K-0402SMT 0R-0402SMT PHY1_CRS R98 PHY1_COL R99 PHY1_MDC PHY1_DVDD PHY1_VDDO R100 PHY1_MDIO 4_7K-0402SMT Place termination resistors RX_D0-7, RX_ER, RX_DV, RX_CLK, TX_CLK, CRS, COL, RSTN as close to the G-PHY as possible using 50 ohm impedence traces. 2 PHY1_VCC_CT 1 10NF-0402SMT C97 C100 10NF-0402SMT C99 10NF-0402SMT C98 10NF-0402SMT Place caps close to RJ45 jack 28 27 29 23 21 22 24 26 25 31 32 30 2_SHLD1 2_SHLD2 7 8 4 5 3 6 1 2 Date: Size C Title Y2 R73 100R-0402SMT PHY1_LED0 PHY1_LED1 27pF-0603SMT 1 Thursday, February 24, 2011 Sheet 5 of 11 Rev B 1605 Valley Center Parkway Bethlehem, PA 18017 C112 27pF-0603SMT ECP3-VERSA Eval Board Project R74 100R-0402SMT PHY1_XTAL_OUT C111 25MHZ CRYSTAL 36 35 34 33 37 38 MH1 and MH2 are 0.100" diameter plated through holes 10/100/1000-T PHY#1/RJ45 PHY1_XTAL_IN 0826-1X1T-43-F Gr/Yel 2_LED2+ 2_LED22_LED1+ Yel 2_LED1- 2_MDID+ 2_MDDCT 2_MDID- 2_MDIC+ 2_MDCCT 2_MDIC- 2_MDIB+ 2_MDIBCT 2_MDIB- 2_MDIA+ 2_MDACT 2_MDIA- J9B Ethernet RJ45 Connector C96 10NF-0402SMT 2 1 3_3V 100NF-0603SMT PB10A PB10B PB11A PB11B PB13A PB13B PB16A PB16B PB2A PB2B PB4A PB4B PB5A PB5B PB7A PB7B PB8A PB8B PL36A/LDQ41 PL36B/LDQ41 PL38A/PCLKT6_0/LDQ41 PL38B/PCLKC6_0/LDQ41 PL39A/LDQ41 PL39B/LDQ41 PL41A/LDQS41_P PL41B/LDQS41_N PL42A/LDQ41 PL42B/LDQ41 PL44A/VREF1_6/LDQ41 PL44B/VREF2_6/LDQ41 PL45A/LDQ50 PL45B/LDQ50 PL47A/LDQ50 PL47B/LDQ50 PL48A/LDQ50 PL48B/LDQ50 PL50A/LDQS50_P PL50B/LDQS50_N PL51A/LDQ50 PL51B/LDQ50 PL53A/LDQ50 PL53B/LDQ50 PL53E_A/LLM1_GPLLT_FB_A PL53E_B/LLM1_GPLLT_FB_B PL53E_C/LLM1_GPLLT_IN_A PL53E_D/LLM1_GPLLT_IN_B PL56B/LDQ59 PL57A/LDQ59 PL57B/LDQ59 PL59A/LDQS59_P PL59B/LDQS59_N PL60A/LDQ59 PL60B/LDQ59 PL62A/LDQ59 PL62B/LDQ59 PL63A/LDQ68 PL63B/LDQ68 PL65A/LDQ68 PL65B/LDQ68 PL66A/LDQ68 PL66B/LDQ68 PL68A/LDQS68_P PL68B/LDQS68_N PL69A/LDQ68 PL69B/LDQ68 PL71A/LDQ68 PL71B/LDQ68 100NF-0603SMT 100NF-0603SMT ETH1_MD0_N ETH1_MD0_P 100NF-0603SMT 4 100NF-0402SMT 1 2 1 2 RJ45 U1F 10uF/6V3/X7R-0805SMT 10uF/6V3/X7R-0805SMT 10uF/6V3/X7R-0805SMT 3 4 2 1_TXC [10] 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 TXD[2] TXD[1] TXD[0] TX_EN VDDOR TX_CLK RXD[7] RXD[6] RXD[5] RXD[4] RXD[3] RXD[2] RXD[1] RXD[0] VDDOR RX_CLK RX_DV RX_ER AVDDX CTRL18 NC MDIN[3] MDIP[3] AVDD AVDD MDIN[2] MDIP[2] MDIN[1] MDIP[1] AVDD AVDD AVDD MDIN[0] MDIP[0] TSTPT RSET 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 20 EPAD 20R-0402SMT PHY1_RX_ER PHY1_RX_DV PHY1_RXC PHY1_VDDOR PHY1_RXD0 PHY1_RXD1 PHY1_RXD2 PHY1_RXD3 PHY1_RXD4 PHY1_RXD5 PHY1_RXD6 PHY1_RXD7 PHY1_TXC PHY1_VDDOR PHY1_TX_EN PHY1_TXD0 PHY1_TXD1 PHY1_TXD2 73 0 0 100NF-0603SMT 20R-0402SMT 0 0 0 0 0 0 0 0 100NF-0603SMT R91 R90 R89 R88 R87 R86 R85 R84 R83 100NF-0603SMT 1_RXD0 1_RXD1 1_RXD2 1_RXD3 1_RXD4 1_RXD5 1_RXD6 1_RXD7 1_TXC 100NF-0603SMT 1_RX_ER R94 1_RX_DV R93 1_RXC R92 100NF-0402SMT PHY1_LED2 5 A B C D LatticeECP3 Versa Evaluation Board User’s Guide Figure 15. 10/100/1000-T PHY #1/RJ45 A B 5 C147 3_3V C146 C145 LFE3-35E-FN484CES 10NF-0402SMT 100NF-0603SMT VTT3 VCCIO3 VCCIO3 100NF-0603SMT C PB61A PB61B PB62A PB62B PB64A PB64B PB65A PB65B PB67A PB67B PB68A PB68B PB70A PB70B PB71A PB71B PB73A PB73B PR36A/RDQ41 PR36B/RDQ41 PR38A/PCLKT3_0/RDQ41 PR38B/PCLKC3_0/RDQ41 PR39A/RDQ41 PR39B/RDQ41 PR41A/RDQS41_P PR41B/RDQS41_N PR42A/RDQ41 PR42B/RDQ41 PR44A/VREF1_3/RDQ41 PR44B/VREF2_3/RDQ41 PR45A/RDQ50 PR45B/RDQ50 PR47A/RDQ50 PR47B/RDQ50 PR48A/RDQ50 PR48B/RDQ50 PR50A/RDQS50_P PR50B/RDQS50_N PR51A/RDQ50 PR51B/RDQ50 PR53A/RDQ50 PR53B/RDQ50 PR53E_A/RLM1_GPLLT_FB_A/RDQ50 PR53E_B/RLM1_GPLLT_FB_B/RDQ50 PR53E_C/RLM1_GPLLT_IN_A/RDQ50 PR53E_D/RLM1_GPLLT_IN_B/RDQ50 PR63A/RDQ68 PR63B/RDQ68 PR65A/RDQ68 PR65B/RDQ68 PR66A/RDQ68 PR66B/RDQ68 PR68A/RDQS68_P PR68B/RDQS68_N PR69A/RDQ68 PR69B/RDQ68 PR71A/RDQ68 PR71B/RDQ68 U1E M17 P15 N16 U16 U15 AB17 AA17 T14 R14 AB18 AB19 W18 W17 Y17 Y18 V18 V17 AA19 Y19 T15 T16 P22 R21 N19 M19 R22 T22 N18 P19 T20 R20 P20 N20 U22 V22 R16 P17 Y22 W22 T21 U20 Y21 W21 R19 R18 V21 V20 R17 T17 AA22 AB21 T19 T18 U19 U18 AA21 Y20 W19 V19 AA20 AB20 R110 0 0 TP9 3_3V LED0 LED1 LED2 LED3 LED4 LED5 LED6 LED7 2_TXD5 R111 0 2_TX_EN R112 0 2_TXD1 R113 0 2_TXD2 R114 0 2_TXD3 R115 0 2_TXD0 R116 0 2_TXD4 R117 0 2_TXD7 R118 0 2_RXD7 2_RXD6 2_RXD2 2_RXD5 2_RXD3 2_RX_ER 2_125MHz R131 0 2_RXD4 2_TXD6 2_COL 2_CRS 2_RSTN 2_RXC 2_GTXCLK R109 PHY2_COMAn PHY2_MDC PHY2_MDIO 2_RX_DV 2_RXD0 2_RXD1 100NF-0603SMT C157 C151 C162 C152 C163 C158 4 PHY2_AVDDR 1 1 FB20 Z-600 ohm / 74279265 2 FB19 Z-600 ohm / 74279265 2 2 1 FB18 Z-600 ohm / 74279265 PHY2_AVDD PHY2_AVDDX PHY2_AVDDC PHY2_VDDO C140 C142 C144 C141 C143 C133 C139 10uF/6V3/X7R-0805SMT 1 2 PHY2_COMAn C148 C161 10uF/6V3/X7R-0805SMT TXD[3] TXD[4] TXD[5] TXD[6] TXD[7] GTX_CLK DVDD COMA_n CLK125 LED[0] LED[1] VDDO LED[2] RESET_n DIS_REG12 DVDD AVDDR AVDDR U10 3_3V Q6 3 C164 100NF-0603SMT BCP69-16 1 R140 4_75K-0603SMT 88E1119R_72QFN C160 100NF-0603SMT C159 10uF/6V3/X7R-0805SMT GPHY 1.8V Power HEADER 2 J12 R135 4_7K-0402SMT TP10 R181 2_RSTN R138 1_8K-0402SMT PHY2_VDDO 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 PHY2_DVDD 16 17 18 PHY2_AVDDR PHY2_TXD3 PHY2_TXD4 PHY2_TXD5 PHY2_TXD6 PHY2_TXD7 PHY2_GTXCLK PHY2_DVDD PHY2_COMAn PHY2_CLK125 PHY2_LED0 PHY2_LED1 PHY2_VDDO PHY2_LED2 PHY2_RSTN TX and RX traces are all matched length and < 2" Place termination resistors TX_D0-7, TX_ER, TX_EN, GTX_CLK as close to FPGA as possible using 50 ohm impedence traces. 1 2 FB17 Z-600 ohm / 74279265 [8] PHY2_VCC_CT 2 FB16 Z-600 ohm / 74279265 1 2 1 FB15 Z-600 ohm / 74279265 LED[0:7] PHY2_CLK125 PHY2_TXD5 PHY2_TX_EN PHY2_TXD1 PHY2_TXD2 PHY2_TXD3 PHY2_TXD0 PHY2_TXD4 PHY2_TXD7 PHY2_TXD6 PHY2_GTXCLK 10uF/6V3/X7R-0805SMT 10uF/6V3/X7R-0805SMT 10uF/6V3/X7R-0805SMT 10uF/6V3/X7R-0805SMT 10uF/6V3/X7R-0805SMT 10uF/6V3/X7R-0805SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT C165 C153 CRS COL MDC DVDD VDDO MDIO TDO TDI TCK TMS TRST_n DVDD XTAL_OUT XTAL_IN AVDDC HSDACP HSDACN AVDDC C166 PHY2_AVDD C154 C155 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 PHY2_DVDD C167 C168 C156 R139 4_99K-0402SMT RLP-100 ETH2_MD3_N ETH2_MD3_P ETH2_MD2_N ETH2_MD2_P ETH2_MD1_N ETH2_MD1_P ETH2_MD0_N ETH2_MD0_P C169 2 PHY2_AVDDC PHY2_DVDD PHY2_XTAL_OUT PHY2_XTAL_IN PHY2_AVDDC C243 C244 PHY2_VDDO 2_CRS 2_COL R136 1K-0402SMT R137 4_7K-0402SMT 33R-0402SMT PHY2_CRS R132 PHY2_COL R133 PHY2_MDC PHY2_DVDD PHY2_VDDO R134 PHY2_MDIO 4_7K-0402SMT Place termination resistors RX_D0-7, RX_ER, RX_DV, RX_CLK, TX_CLK, CRS, COL as close to the G-PHY as possible using 50 ohm impedence traces. 2 PHY2_VCC_CT 10NF-0402SMT C135 C138 10NF-0402SMT C137 10NF-0402SMT C136 10NF-0402SMT 8 7 9 3 1 2 4 6 5 11 12 10 1_SHLD1 1_SHLD2 7 8 4 5 3 6 1 2 Date: Size C Title Y3 R107 100R-0402SMT PHY2_LED0 PHY2_LED1 27pF-0603SMT 1 Thursday, February 24, 2011 Sheet 6 of 11 Rev B 1605 Valley Center Parkway Bethlehem, PA 18017 C150 27pF-0603SMT ECP3-VERSA Eval Board Project R108 100R-0402SMT PHY2_XTAL_OUT C149 25MHZ CRYSTAL 16 15 14 13 19 20 MH1 and MH2 are 0.100" diameter plated through holes 10/100/1000-T PHY#2/RJ45 PHY2_XTAL_IN 0826-1X1T-43-F Gr/Yel 1_LED2+ 1_LED21_LED1+ Yel 1_LED1- 1_MDID+ 1_MDDCT 1_MDID- 1_MDIC+ 1_MDCCT 1_MDIC- 1_MDIB+ 1_MDIBCT 1_MDIB- 1_MDIA+ 1_MDACT 1_MDIA- J9A Ethernet RJ45 Connector C134 10NF-0402SMT 2 1 1 Place caps close to RJ45 jack RJ45 C132 100NF-0603SMT 1 2 1 2 1 2 PHY2_VDDOR FB14 Z-600 ohm / 74279265 PHY2_AVDDX PHY2_LED2 3_3V ETH2_MD3_N ETH2_MD3_P PHY2_AVDD 3 100NF-0603SMT D 100NF-0603SMT 100NF-0603SMT ETH2_MD2_N ETH2_MD2_P ETH2_MD1_N ETH2_MD1_P PHY2_AVDD 4_7UF-16V-0805SMT ETH2_MD0_N ETH2_MD0_P 100NF-0603SMT 4 3 4 2 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 TXD[2] TXD[1] TXD[0] TX_EN VDDOR TX_CLK RXD[7] RXD[6] RXD[5] RXD[4] RXD[3] RXD[2] RXD[1] RXD[0] VDDOR RX_CLK RX_DV RX_ER AVDDX CTRL18 NC MDIN[3] MDIP[3] AVDD AVDD MDIN[2] MDIP[2] MDIN[1] MDIP[1] AVDD AVDD AVDD MDIN[0] MDIP[0] TSTPT RSET 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 100NF-0603SMT EPAD 73 100NF-0603SMT 21 100NF-0603SMT PHY2_RX_ER PHY2_RX_DV PHY2_RXC PHY2_VDDOR PHY2_RXD0 PHY2_RXD1 PHY2_RXD2 PHY2_RXD3 PHY2_RXD4 PHY2_RXD5 PHY2_RXD6 PHY2_RXD7 PHY2_TXC PHY2_VDDOR PHY2_TX_EN PHY2_TXD0 PHY2_TXD1 PHY2_TXD2 100NF-0603SMT [10] 100NF-0603SMT R130 0 R129 0 R128 20R-0402SMT R127 0 R126 0 R125 0 R124 0 R123 0 R122 0 R121 0 R120 0 R119 20R-0402SMT 100NF-0603SMT 2_TXC 2_RXD0 2_RXD1 2_RXD2 2_RXD3 2_RXD4 2_RXD5 2_RXD6 2_RXD7 2_TXC 100NF-0402SMT 2_RX_ER 2_RX_DV 2_RXC 100NF-0402SMT 5 A B C D LatticeECP3 Versa Evaluation Board User’s Guide Figure 16. 10/100/1000-T PHY #2/RJ45 A B C R142 4_7K-0603SMT C190 C196 10NF-0603SMT C219 1_5V 5 1UF-16V-0805SMT VDDQ VREF SD C172 LFE3-35E-FN484CES 5 VTT7 VCCIO7 VCCIO7 C174 L6 J8 K7 E3 D4 E5 E4 B2 C2 F5 F4 D2 D1 G4 G5 E2 F3 H4 J4 B1 C1 H5 H6 G3 G2 E1 F1 G1 H1 J7 J6 H2 H3 J3 K3 J2 J1 K4 K5 K1 L1 L5 K6 8 3 LP2998-SO8 VTT VSENSE AVIN PVIN U12 DDR3_VS TP11 1_5V 100MHz 100MHz_N SWITCH1 SWITCH2 SWITCH3 SWITCH4 SWITCH5 SWITCH6 SWITCH7 SWITCH8 DDR3_K0 DDR3_K0# DDR3_DM0 DDR3_RST# DDR3_DQ0 DDR3_DQ1 DDR3_DQ5 DDR3_DQ4 DDR3_DQS0 DDR3_DQS0# DDR3_DQ2 DDR3_DQ3 DDR3_DQ7 DDR3_DQ6 DDR3_DQ11 DDR3_DM1 DDR3_DQ10 DDR3_DQ12 DDR3_DQ13 DDR3_DQ14 DDR3_DQS1 DDR3_DQS1# DDR3_DQ15 DDR3_DQ8 ECP3_VREF DDR3_DQ9 C177 + C179 + 100UF-D3POSCAP C178 R141 0R-0603SMT DDR3_VDD 1UF-16V-0805SMT 6 7 100NF-0603SMT PL9A/LDQ14 PL9B/LDQ14 PL11A/LDQ14 PL11B/LDQ14 PL12A/LDQ14 PL12B/LDQ14 PL14A/LDQS14_P PL14B/LDQS14_N PL15A/LDQ14 PL15B/LDQ14 PL17A/LDQ14 PL17B/LDQ14 PL18A/LDQ23 PL18B/LDQ23 PL20A/LDQ23 PL20B/LDQ23 PL21A/LDQ23 PL21B/LDQ23 PL23A/LDQS23_P PL23B/LDQS23_N PL24A/LDQ23 PL24B/LDQ23 PL26A/VREF1_7/LDQ23 PL26B/VREF2_7/LDQ23 PL27A/LDQ32 PL27B/LDQ32 PL29A/LUM0_GDLLT_IN_A/LDQ32 PL29B/LUM0_GDLLT_IN_B/LDQ32 PL30A/LUM0_GDLLT_FB_A/LDQ32 PL30B/LUM0_GDLLT_FB_B/LDQ32 PL32A/LDQS32_P PL32B/LDQS32_N PL33A/LDQ32 PL33B/LDQ32 PL35A/PCLKT7_0/LDQ32 PL35B/PCLKC7_0/LDQ32 PL35E_A/LUM0_GPLLT_FB_A PL35E_B/LUM0_GPLLT_FB_B PL35E_C/LUM0_GPLLT_IN_A PL35E_D/LUM0_GPLLT_IN_B U1G 10NF-0603SMT C191 C197 100NF-0603SMT 100NF-0603SMT C192 C198 10NF-0603SMT 10NF-0603SMT DDR3_VDDQ 1_5V R143 R148 1 3_3V DI 2 10NF-0603SMT C225 DI C226 DI MPZ1608Y600B FB23 R156 100R-0402SMT 100NF-0603SMT 100MHz R146 0R-0603SMT R145 0R-0603SMT OPEN-0603SMT R144 + C180 BLM41PG600SN1 FB22 4 2 1 NC DIS# R157 10K-0402SMT 100MHz_N OPEN-0603SMT R149 ECP3_VREF Place close to FPGA OPEN-0603SMT 1_5V 1_5V + C176 BLM41PG600SN1 FB21 MEM_VREF OPEN-0603SMT 1_5V PP1 DDR3_VTT 1_5V MEM_VREF Q_N Q M8 H1 B1 B9 D1 D8 E2 E8 F9 G1 G9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 A1 A8 C1 C9 D2 E9 F1 H2 H9 B2 D9 K2 K8 G7 N1 N9 R1 R9 VREFCA VREFDQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDD VDD VDD VDD VDD VDD VDD VDD VDD ddr3-96bga 100MHz 100MHz_N 5 VCCIO0 VCCIO0 H9 G10 3 NC_J1 NC_L1 NC_J9 NC_L9 NC_T3 NC_T7 NC_M7 1_5V PCLKT0 PCLKC0 DDR3_BA1 DDR3_BA2 DDR3_CS0# DDR3_BA0 DDR3_A2 DDR3_A8 DDR3_A3 DDR3_ODT0 DDR3_A9 DDR3_RAS# DDR3_A0 DDR3_A1 DDR3_A4 DDR3_A5 DDR3_A10 DDR3_A11 3 ZQ CAS# CK CK# CKE CS# LDM UDM ODT RAS# RST# WE# BA0 BA1 BA2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 LDQS LDQS# UDQS UDQS# DDR3_WE# DDR3_A7 DDR3_A6 DDR3_CAS# DDR3_A12 DDR3_CE0 ddr3-96bga D6 D7 A3 A4 F7 G8 A5 A6 C8 C7 F9 E9 C9 C10 D9 D10 B7 A7 D8 E7 B8 A8 C5 B4 F10 E10 A9 B10 E11 D11 A10 A11 F11 F12 E6 D5 C6 B6 F8 G9 B3 A2 U11A PT10A/TDQ7 PT10B/TDQ7 PT11A/TDQ16 PT11B/TDQ16 PT13A/TDQ16 PT13B/TDQ16 PT14A/TDQ16 PT14B/TDQ16 PT20A/TDQ25 PT20B/TDQ25 PT22A/TDQ25 PT22B/TDQ25 PT23A/TDQ25 PT23B/TDQ25 PT25A/TDQS25_P PT25B/TDQS25_N PT26A/TDQ25 PT26B/TDQ25 PT28A/TDQ25 PT28B/TDQ25 PT29A/TDQ34 PT29B/TDQ34 PT2A/TDQ7 PT2B/TDQ7 PT31A/TDQ34 PT31B/TDQ34 PT32A/TDQ34 PT32B/TDQ34 PT34A/TDQS34_P PT34B/TDQS34_N PT35A/TDQ34 PT35B/TDQ34 PT37A/PCLKT0_0/TDQ34 PT37B/PCLKC0_0/TDQ34 PT4A/VREF1_0/TDQ7 PT4B/VREF2_0/TDQ7 PT5A/TDQ7 PT5B/TDQ7 PT7A/TDQS7_P PT7B/TDQS7_N PT8A/TDQ7 PT8B/TDQ7 U1B C205 LFE3-35E-FN484CES 10NF-0603SMT 4 X1 DSC-100_00MHz C181 DDR3_VDDQ C171 DDR3_VDD U11B DDR3_BA0 DDR3_BA1 DDR3_BA2 DDR3_CAS# DDR3_K0 DDR3_K0# DDR3_CE0 DDR3_CS0# DDR3_DM0 DDR3_DM1 DDR3_ODT0 DDR3_RAS# DDR3_RST# DDR3_WE# ZQ0 M2 N8 M3 K3 J7 K7 K9 L2 E7 D3 K1 J3 T2 L3 L8 PCLKT0 PCLKC0 SWITCH8 SWITCH7 SWITCH6 SWITCH5 SWITCH4 SWITCH3 SWITCH2 SWITCH1 [9] [9] DDR3_A0 DDR3_A1 DDR3_A2 DDR3_A3 DDR3_A4 DDR3_A5 DDR3_A6 DDR3_A7 DDR3_A8 DDR3_A9 DDR3_A10 DDR3_A11 DDR3_A12 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 J1 L1 J9 L9 T3 T7 M7 DDR3_DQ0 DDR3_DQ1 DDR3_DQ2 DDR3_DQ3 DDR3_DQ4 DDR3_DQ5 DDR3_DQ6 DDR3_DQ7 DDR3_DQ8 DDR3_DQ9 DDR3_DQ10 DDR3_DQ11 DDR3_DQ12 DDR3_DQ13 DDR3_DQ14 DDR3_DQ15 DDR3_DQS0 DDR3_DQS0# DDR3_DQS1 DDR3_DQS1# E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 F3 G3 C7 B7 DDR3_VTT 10NF-0603SMT C185 A3 B3 C3 D3 E3 F3 G3 H3 J3 100NF-0603SMT C183 CTS-RT1402B7 R1=50 Ohm VTT R1 R1 RP1 A1 B1 C1 D1 E1 F1 G1 H1 J1 A1 B1 C1 D1 E1 F1 G1 H1 J1 Memory X1 U1 Pin X1 needs to be matched length for all traces X2 Termination at end of line MEMORY DEVICE TERMINATION for ADDRESS/ CONTROL SIGNALS 1 DDR3_BA1 DDR3_A8 DDR3_A11 DDR3_A12 DDR3_RAS# DDR3_BA2 DDR3_A2 DDR3_A5 DDR3_A3 SWITCH[1:8] DDR3_VTT R151 50R-0402SMT RN1 741X083-100R 1 8 2 7 6 3 4 5 R152 50R-0402SMT C207 10NF-0402SMT DDR3_VTT R153 50R-0402SMT R154 50R-0402SMT DDR3_VTT [8] Memory RN2 741X083-100R 8 1 2 7 3 6 4 5 1 8 7 2 3 6 4 5 RN4 741X083-100R DDR3_DQ6 DDR3_DQ10 DDR3_DQ0 DDR3_DQ7 DDR3_DQ12 DDR3_DQ15 DDR3_DQ1 DDR3_DQ2 2 Date: Size C Title R155 50R-0402SMT 1 Wednesday, February 09, 2011 Sheet 7 of 11 Rev B 1605 Valley Center Parkway Bethlehem, PA 18017 C206 10NF-0402SMT ECP3 VERSA Eval Board Project DDR3 Memory Termination as close as possible to U1 VTT X2 U1 Pin X1 FPGA DEVICE TERMINATION for DQ/DQS SIGNALS DDR3_DQ5 DDR3_DQ13 DDR3_DQ4 DDR3_DQ14 DDR3_DQ3 DDR3_DQ11 DDR3_DQ9 DDR3_DQ8 RN3 741X083-100R 8 1 7 2 6 3 5 4 8 1 7 2 6 3 5 4 RN5 741X083-100R Place DDR3_DQ/DQS Termination Resistors as close as possible to U1 DDR3_DQS0# DDR3_DQS0 DDR3_DQS1 DDR3_DQS1# DDR3_WE# DDR3_ODT0 DDR3_CE0 DDR3_CS0# R150 50R-0402SMT C203 10NF-0402SMT Place Address/Control Termination Resistors as close as possible to Memory Chip U7 DDR3_A6 DDR3_A4 DDR3_A1 DDR3_A10 DDR3_CAS# DDR3_A0 DDR3_A9 DDR3_A7 DDR3_BA0 A3 B3 C3 D3 E3 F3 G3 H3 J3 ALL Memory controller buses, clocks, and control traces must be 50 Ohm Transmission lines 2 100NF-0603SMT 4 C182 4 100NF-0603SMT GND C193 C199 C194 C200 100NF-0603SMT 100NF-0603SMT 1 2 1UF-16V-0805SMT 1UF-16V-0805SMT 47UF-16V-TANTBSMT 10NF-0603SMT 10NF-0603SMT C195 C201 C217 10NF-0603SMT C209 D 10NF-0603SMT 10NF-0603SMT 2 C220 C202 + C218 100NF-0603SMT C184 C210 DDR3_SD0 100NF-0603SMT 10NF-0402SMT 100NF-0603SMT C211 DDR3_VREF C221 10NF-0603SMT C173 10NF-0603SMT C212 1 C222 100NF-0603SMT 100NF-0603SMT C170 C223 C208 C213 100NF-0603SMT 100NF-0603SMT 10NF-0603SMT 10NF-0603SMT 2_5V 10NF-0603SMT 10UF-16V-TANTBSMT 100NF-0603SMT C186 1 2 10NF-0402SMT 100NF-0603SMT C175 C224 C214 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 1_5V C215 DDR3_VREF C187 100NF-0603SMT 22UF-16V-TANTBSMT 22UF-16V-TANTBSMT 6 VCC GND PAD 100NF-0603SMT DDR3_K0 5 C204 C188 100NF-0603SMT 100NF-0603SMT J2 J2 H2 H2 F2 F2 E2 E2 G2 G2 B2 B2 A2 A2 C2 C2 D2 D2 1 2 DDR3_K0# KOC C216 22 3 7 R147 240R-0603SMT C189 PLACE CLOSE TO MEMORY CHIP 100NF-0603SMT 2_5V A B C D LatticeECP3 Versa Evaluation Board User’s Guide Figure 17. DDR3 Memory SWITCH[1..8] 23 A B C D 14 5 3_3V DP P N M L K J H G F E D C B D23 SEG2 11 6 RN8F RN8G 6 11 10 SEG3 12 8 RN8H 150R EXB2HV151JV 7 9 10 SEG0 SEG1 SEG4 5 13 RN8E 4 7 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 RN8C 14 15 16 9 10 11 SEG12 RN8D 3 2 13 12 8 RN8B 9 1 8 7 6 5 4 SEG13 SEG14 16 RN6H RN6G 12 RN8A RN6F 4 15 RN6E 13 RN6D 2 3 1 5 RN6A 16 1 EXB2HV151JV 15 RN6B 2 150R 14 3 RN6C 4 14-SEGMENT DISPLAY 14-SEGMENT A 4 TDA DIP-8 SW3 X1_POLL LED2 LED0 LED6 LED[0:7] LED7 8 4_7K 9 RN9H EXB2HV472JV 3 10 RN9G 7 4_7K EXB2HV472JV SWITCH8 6 4_7K 11 RN9F EXB2HV472JV SWITCH6 SWITCH7 4 4_7K 13 RN9D EXB2HV472JV 5 4_7K 12 RN9E EXB2HV472JV SWITCH5 3 4_7K 14 RN9C EXB2HV472JV SWITCH3 SWITCH4 2 4_7K 15 RN9B EXB2HV472JV SWITCH2 1_5V 1 4_7K 16 RN9A EXB2HV472JV SWITCH1 X1_USR1 X1_USR2 X1_PLL_LK LED3 LED5 X1_L0 LED1 DIP SWITCH/BANK=1.5V X1_USR0 LED4 LEDs LED USER 3 D26 LED_RED_0603 X1_USR3 D24 LED_YELLOW_0603 POLLING STATUS D29 LED_BLUE_0603 LED USER 0 SWITCH1 SWITCH2 SWITCH3 SWITCH4 SWITCH5 SWITCH6 SWITCH7 SWITCH8 USR0_PU USR3_PU POLL_PU DL_UP_PU 3 DL UP D21 LED_GREEN_0603 X1_DL_UP SWITCH[1..8] 5 Date: Size B Title USR1_PU USR2_PU D28 LED_BLUE_0603 LED USER 1 LED USER 2 D27 LED_RED_0603 2 L0_PU Wednesday, February 09, 2011 1 Sheet ECP3 VERSA Eval Board Project [5] [6] SWITCH[1:8] SEG[0:14] LED[0:7] 2 470R 15 RN7B EXB2HV471JV 8 470R 9 RN7H EXB2HV471JV 3 470R 14 RN7C EXB2HV471JV 6 470R 11 RN7F EXB2HV471JV [7] 8 of 11 Rev B 1605 Valley Center Parkway Bethlehem, PA 18017 USR1_PU PLL_LK_PU USR2_PU L0_PU 1 470R 16 RN7A EXB2HV471JV 7 470R 10 RN7G EXB2HV471JV POLL_PU USR0_PU 13 RN7D 4 470R EXB2HV471JV USR3_PU 3_3V 5 470R 12 RN7E EXB2HV471JV 1 DL_UP_PU LEDs & Switches PLL_LK_PU D25 LED_YELLOW_0603 PLL LOCK STATUS D22 LED_GREEN_0603 L0 2 A B C D LatticeECP3 Versa Evaluation Board User’s Guide Figure 18. LEDs and Switches SEG[0:14] A B C D 2 C228 DI 2 1 TANT DI C229 6.8UF-0805SMT DI FB25 MPZ1608Y600B SDA [3] 3_3V SCL [3] 10NF-0603SMT C227 DI 100NF-0603SMT 6V DI MPZ1608Y600B FB24 6 GND VCC J13 C231 DI EN OUTP C233 DI CLK_VCC CLK_SDA 3_3V C235 DI 4 C236 DI [4] [4] PCIE_CLKP PCIE_CLKN D30 LED_GREEN_0603 R160 0R-0402SMT R162 4_7K-0402SMT 10NF-0603SMT VCCO 560PF-0603SMT C234 DI R163 3_3V 680R-0402SMT 156MHz_EN [3] 156MHz_VREF R167 470R-0402SMT DI CLK_SCL 10NF-0603SMT 0R-0603SMT 100NF-0603SMT C232 DI 100NF-0603SMT CLK_RESETn R170 0R-0603SMT R169 [3] [4] PRSNT 1 R166 DI 220R-0402SMT 156MHz 156MHz_EN 4 R159 DI 220R-0402SMT Place bypass caps close to output bank supply pins. 100NF-0603SMT 5 1 2 3 HEADER 3(DNP) 3 X2 156.25MHz NC1 2 PAD 7 NC2 5 1 3 R174 1K-0603SMT R171 4_7K-0402SMT DI DI 19 18 17 156MHz 156MHz_VREF U13 DI ispCLOCK5406D CLK_VCC TDO TMS TCK TDI FBKP FBKN FBKVTT REFBP REFBN REFBVTT REFAP REFAN REFAVTT RREF RESETb USER0 USER1 USER2 USER3 CLK_VCC VCC NC TMS TCK GND 7 HEADER 10 INITN DONE 1 VCCO_5 BANK_5P BANK_5N GNDO_5 VCCO_4 BANK_4P BANK_4N GNDO_4 VCCO_3 BANK_3P BANK_3N GNDO_3 VCCO_2 BANK_2P BANK_2N GNDO_2 VCCO_1 BANK_1P BANK_1N GNDO_1 VCCO_0 BANK_0P BANK_0N GNDO_0 ispEN_N TDI TDO J14 2 3 4 5 6 8 9 10 DNI R172 R173 4_7K-0402SMT 4_7K-0402SMT DI 38 39 40 41 22 21 20 16 15 14 24 42 48 47 46 45 PCIE_CLKP PCIE_CLKN CLK_RESETn CLK_LOCK1 CLK_SDA CLK_SCL 49 VCCD 44 DIE_PAD 3 43 GNDD 4 VCCJ 23 VCCA 37 GNDA 13 24 3_3V 4 2 3 1 5 6 7 8 12 10 11 9 25 27 26 28 32 31 30 29 33 35 34 36 C230 3_3V 5 2 VCCO 2 Date: Size B Title EXPCON_OSC 10R-0402SMT PCLKC0 10R-0402SMT PCLKT0 10R-0402SMT PCSA_REFCLKN 10R-0402SMT PCSA_REFCLKP 10R-0402SMT Tuesday, February 22, 2011 1 Sheet ECP3 VERSA Eval Board Project [7] [7] EXPCON_OSC PCLKC0 PCLKT0 PCSA_REFCLKN PCSA_REFCLKP [10] [4] [4] 9 of 11 Rev B 1605 Valley Center Parkway Bethlehem, PA 18017 REF CLOCK GEN R168 DI R165 DI R161 DI R164 DI R158 DI 1 A B C D LatticeECP3 Versa Evaluation Board User’s Guide Figure 19. Reference Clock Generator 100NF-0603SMT A B C 5 GND TP12 R176 0R-0603SMT 3_3V LFE3-35E-FN484CES VTT2 VCCIO2 VCCIO2 4 L17 J15 K16 E22 F22 J17 J18 G21 G22 J19 J20 H21 H22 K17 K18 J22 K22 K20 K19 K21 L21 L18 L19 L22 M22 M21 M20 P21 N22 M18 N17 EXPCON_OSC PR18A/RDQ23 PR18B/RDQ23 PR20A/RDQ23 PR20B/RDQ23 PR21A/RDQ23 PR21B/RDQ23 PR23A/RDQS23_P PR23B/RDQS23_N PR24A/RDQ23 PR24B/RDQ23 PR26A/VREF1_2/RDQ23 PR26B/VREF2_2/RDQ23 PR27A/RDQ32 PR27B/RDQ32 PR29A/RUM0_GDLLT_IN_A/RDQ32 PR29B/RUM0_GDLLT_IN_B/RDQ32 PR30A/RUM0_GDLLT_FB_A/RDQ32 PR30B/RUM0_GDLLT_FB_B/RDQ32 PR32A/RDQS32_P PR32B/RDQS32_N PR33A/RDQ32 PR33B/RDQ32 PR35A/PCLKT2_0/RDQ32 PR35B/PCLKC2_0/RDQ32 PR35E_A/RUM0_GPLLT_FB_A/RDQ32 PR35E_B/RUM0_GPLLT_FB_B/RDQ32 PR35E_C/RUM0_GPLLT_IN_A/RDQ32 PR35E_D/RUM0_GPLLT_IN_B/RDQ32 U1D 5VIN TP13 R175 0R-0603SMT 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 TP14 C240 C239 C238 3_3V 2_TXC C237 3_3V EXPCON_IO32 EXPCON_IO33 EXPCON_IO34 EXPCON_IO35 2_TXC EXPCON_IO45 EXPCON_IO44 EXPCON_IO43 EXPCON_IO42 EXPCON_IO41 EXPCON_IO40 CARDSEL# HPE_RESOUT# EXPCON_IO39 EXPCON_IO38 EXPCON_IO37 EXPCON_IO36 EXPCON_IO30 EXPCON_IO31 [9] EXPCON_IO29 EXPCON_IO31 EXPCON_IO33 EXPCON_IO35 EXPCON_IO37 EXPCON_IO39 EXPCON_IO41 EXPCON_IO43 EXPCON_IO45 [6] Pin 2 removed for coding of expansion board EXPCON_OSC HDR40 X3 10NF-0402SMT 2_5V 1 3 EXPCON_2V5 5 EXPCON_IO30 7 EXPCON_IO32 9 EXPCON_IO34 11 EXPCON_IO36 13 EXPCON_IO38 15 EXPCON_IO40 17 EXPCON_IO42 19 EXPCON_IO44 21 23 EXPCON_2V5 25 27 29 EXPCON_OSC EXPCON_CLKIN 31 EXPCON_CLKOUT 33 35 37 39 EXPCON_3V3 100NF-0603SMT 4 10NF-0402SMT 25 100NF-0603SMT D 5 3 HDR40 X4 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 VCCIO1 VCCIO1 H14 G13 B11 B12 C12 D12 A12 A13 E12 E13 C13 C14 D13 D14 A14 B14 F13 F14 A15 B15 E16 E15 C15 D15 G15 G14 A16 B16 F15 F16 A17 B18 C17 C16 A18 A19 D16 D17 EXPCON_IO26 CARDSEL# EXPCON_IO23 EXPCON_IO20 EXPCON_IO1 EXPCON_IO3 EXPCON_IO5 EXPCON_IO7 EXPCON_IO9 EXPCON_IO11 EXPCON_IO13 EXPCON_IO15 EXPCON_3V3 PT38A/TDQ43 PT38B/TDQ43 PT40A/PCLKT1_0/TDQ43 PT40B/PCLKC1_0/TDQ43 PT41A/TDQ43 PT41B/TDQ43 PT43A/TDQS43_P PT43B/TDQS43_N PT44A/TDQ43 PT44B/TDQ43 PT46A/TDQ43 PT46B/TDQ43 PT47A/TDQ52 PT47B/TDQ52 PT49A/TDQ52 PT49B/TDQ52 PT50A/TDQ52 PT50B/TDQ52 PT52A/TDQS52_P PT52B/TDQS52_N PT53A/TDQ52 PT53B/TDQ52 PT55A/TDQ52 PT55B/TDQ52 PT56A/TDQ61 PT56B/TDQ61 PT58A/TDQ61 PT58B/TDQ61 PT59A/TDQ61 PT59B/TDQ61 PT61A/TDQS61_P PT61B/TDQS61_N PT62A/TDQ61 PT62B/TDQ61 PT64A/VREF1_1/TDQ61 PT64B/VREF2_1/TDQ61 U1C 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 LFE3-35E-FN484CES EXPCON_IO16 EXPCON_IO17 EXPCON_IO18 EXPCON_IO19 EXPCON_IO21 EXPCON_IO22 EXPCON_IO24 EXPCON_IO25 EXPCON_IO27 EXPCON_IO28 HPE_RESOUT# EXPCON_IO0 EXPCON_IO2 EXPCON_IO4 EXPCON_IO6 EXPCON_IO8 EXPCON_IO10 EXPCON_IO12 EXPCON_IO14 3 3_3V EXPCON_IO26 EXPCON_IO27 EXPCON_IO28 EXPCON_IO29 EXPCON_CLKIN EXPCON_IO16 EXPCON_IO17 EXPCON_IO18 EXPCON_IO19 EXPCON_IO20 EXPCON_IO21 EXPCON_IO22 EXPCON_IO23 EXPCON_IO24 EXPCON_IO25 2 R177 0R-0603SMT- DNI EXPCON_IO0 EXPCON_IO1 1_TXC EXPCON_CLKOUT EXPCON_IO2 EXPCON_IO3 EXPCON_IO4 EXPCON_IO5 EXPCON_IO6 EXPCON_IO7 EXPCON_IO8 EXPCON_IO9 EXPCON_IO10 EXPCON_IO11 EXPCON_IO12 EXPCON_IO13 EXPCON_IO14 EXPCON_IO15 3_3V 2 1_TXC Date: Size B Title Friday, March 18, 2011 1 Sheet ECP3 VERSA Eval Board Project 10 of 11 Rev B 1605 Valley Center Parkway Bethlehem, PA 18017 Expansion Connector [5] 1 A B C D LatticeECP3 Versa Evaluation Board User’s Guide Figure 20. Expansion Connector 26 A B TH2 TH1 5 ThruHole ThruHole TH3 ThruHole TH4 ThruHole 4 3 Date: Size A Title 2 Friday, March 18, 2011 Sheet ECP3 VERSA Eval Board Project Mechanical 11 1 of 11 Rev B 1605 Valley Center Parkway Bethlehem, PA 18017 4.75" x 6.6in Dimensions are approximations only. Refer to the PCIe Card Electromechanical Spec Rev 1.1/2.0 1 A B C 2 C 3 D 4 D 5 LatticeECP3 Versa Evaluation Board User’s Guide Figure 21. Mechanical Drawing LatticeECP3 Versa Evaluation Board User’s Guide Appendix B. Bill of Materials Table 12. LatticeECP3 Versa Evaluation Board Bill of Materials Item Quantity 1 1 CN1 Reference PCI Express x1 Edge Finger Connectors Part Manufacturer 2 34 C1, C2, C3, C4, C5, C15, C16, C20, C21, C29, C33, C83, C85, C89, C92, C96, C97, C98, C99, C100, C108, C134, C135, C136, C137, C138, C146, C202, C203, C206, C207, C208, C237, C239 10NF-0402SMT Panasonic ECJ0EB1E103K CAP .01UF 25V CERAMIC X7R 0402 3 25 C6, C7, C8, C9, C11, C22, C23, C28, C34, C66, C67, C68, C69, C70, C72, C73, C77, C81, C82, C88, C91, C241, C242, C243, C244 100NF-0402SMT Panasonic ECJ-0EB1A104K CAP .1UF 10V CERAMIC X5R 0402 4 9 C14, C19, C24, C27, C35, C171, C173, C178, C181 1UF-16V-0805SMT Panasonic ECJ-2FB1C105K CAP 1UF 16V CERAMIC 0805 X5R 5 7 C13, C18, C25, C26, C36, C176, C180 22UF-16V-TANTBSMT Kemet T491B226M016AT CAPACITOR TANT 22UF 16V 20% SMD 6 4 C17, C30, C37, C51 10uF, 25V-1206SMT TDK Corporation C3216Y5V1E106Z CAP CER 10UF 25V Y5V 1206 7 4 C31, C32, C90, C93 1NF-0402SMT TDK Corporation C1005C0G1E102J CAP CER 1000PF 25V C0G 5% 0402 8 4 C38, C39, C52, C53 220NF-0402SMT TDK Corporation C1005X7R1C223K CAP CER 22000PF 16V X7R 10% 0402 9 10 C40, C41, C42, C49, C50, C54, C55, C58, C63, C64 22uF, 6.3V-0805SMT TDK Corporation C2012X5R0J226M CAP CER 22UF 6.3V X5R 20% 0805 10 4 C43, C44, C56, C57 1000pF-0402SMT Panasonic ECJ-0EB1E102K CAP 1000PF 25V CERAMIC X7R 0402 11 4 C45, C48, C59, C62 330pF-0402SMT TDK Corporation C1005C0G1H331J CAP CER 330PF 50V C0G 5% 0402 12 2 C46, C47 10pF-0402SMT TDK Corporation C1005C0G1H100D CAP CER 10PF 50V C0G 0402 12A 0 C60, C61 10pF-0402SMT DNI 13 2 C65, C71 4_7UF-10V-SMT TDK Corporation C1608X5R1A475K CAP CER 4.7UF 10V X5R 0603 14 1 C74 3_3UF-10V-SMT TDK Corporation C1608X5R1A335K CAP CER 3.3UF 10V X5R 0603 15 2 C75, C76 DNI 16 75 C78, C84, C95, C102, C104, C105, C107, C109, C110, C113, C115, C118, C119, C120, C121, C122, C124, C126, C128, C129, C130, C131, C133, C140, C142, C144, C145, C147, C148, C151, C153, C154, C155, C156, C157, C160, C162, C164, C166, C167, C168, C169, C172, C174, C175, C183, C185, C186, C188, C189, C191, C193, C195, C197, C199, C201, C205, C210, C212, C213, C214, C215, C216, C218, C220, C222, C224, C225, C227, C230, C231, C232, C233, C238, C240 100NF-0603SMT Panasonic ECJ-1VF1C104Z CAP .1UF 16V CERAMIC Y5V 0603 17 2 C79, C80 12PF-0603SMT TDK Corporation C1608C0G1H120J CAP CER 12PF 50V C0G 5% 0603 18 2 C86, C87 100NFX5R-0402SMT Kemet C0402C104K8PACTU CAP .10UF 10V CERAMIC X5R 0402 19 18 C94, C101, C103, C106, C114, C116, C117, C123, C125, C132, C139, C141, C143, C152, C158, C159, C161, C163 10uF/6V3/X7R-0805SMT AVX 08056C106KAT2A CAP CER 10UF 6.3V X7R 10% 0805 20 4 C111, C112, C149, C150 27pF-0603SMT Kemet C0603C270J5GACTU CAP CERAMIC 27PF 50V NP0 0603 27 Part Number Description PCB fingers LatticeECP3 Versa Evaluation Board User’s Guide Table 12. LatticeECP3 Versa Evaluation Board Bill of Materials (Continued) Item Quantity 21 2 C127, C165 Reference 4_7UF-16V-0805SMT Part TDK Corporation Manufacturer C2012Y5V1C475Z/0.85 CAP CER 4.7UF 16V Y5V 0805 22 1 C170 47UF-16V-TANTBSMT Kemet B45196H2476K209 CAP TANTALUM 47UF 10V 10% SMD 23 1 C177 100UF-D3POSCAP Sanyo 6TPE100MI 100UF, 6.3V , D2E. POSCAP 24 1 C179 10UF-16V-TANTBSMT AVX TAJB106K016R CAP TANTALUM 10UF 16V 10% SMD 25 20 C182, C184, C187, C190, C192, C194, C196, C198, C200, C204, C209, C211, C217, C219, C221, C223, C226, C228, C234, C236 10NF-0603SMT Kemet C0603C103K5RACTU CAP .01UF 50V CERAMIC X7R 0603 26 1 C229 6.8UF-TANT-0805SMT Kemet T494R685K006AS CAP TANT 6.8UF 6.3V 10% SMD 27 1 C235 560PF-0603SMT Kemet C0603C561K5RACTU CAP 560PF 50V CERAMIC X7R 0603 28 4 D1, D2, D5, D6 1N4448W Fairchild 1N4448W DIODE 75V 200MA SOD523F 29 4 D3, D4, D7, D8 DFLS220L Diodes Inc DFLS220L DIODE SCHOTTKY 2A 20V PWRDI 123 30 12 D9, D10, D11, D12, D13, D15, D16, D20, D21, D22, D30, D31 LED_GREEN_0603 Kingbright APT1608SGC LED 1.6X0.8MM 568NM GRN CLR SMD 31 1 D14 SCHOTTKY/VISHAY-V12P10 Vishay V12P10-M3/86A DIODE SCHOTTKY 12A 100V SMPC TO-277A 32 5 D17, D18, D19, D26, D27 LED_RED_0603 Kingbright APT1608EC LED 1.6X0.8MM 625NM RED CLR SMD 33 1 D23 14-SEGMENT Kingbright ACPSA04-41SRWA LED Display 34 2 D24, D25 LED_YELLOW_0603 Kingbright APT1608YC LED 1.6X0.8MM 588NM YLW CLR SMD 35 2 D28, D29 LED_BLUE_0603 Kingbright APT1608QBC/D LED 1.6X0.8 470NM BL WTR CLR SMD 36 6 FB1, FB2, FB3, FB4, FB21, BLM41PG600SN1 FB22 Murata BLM41PG600SN1 FERRITE CHIP 60 OHM 6000MA 1806 37 5 FB5, FB6, FB23, FB24, FB25 MPZ1608Y600B TDK MPZ1608Y600B FERRITE CHIP 60 OHM 2.3A 0603 38 14 FB7, FB8, FB9, FB10, FB11, FB12, FB13, FB14, FB15, FB16, FB17, FB18, FB19, FB20 Z-600 ohm / 74279265 Wurth 74279265 FERRITE BEAD 600 OHM .2A 0603 39 1 F1 F1251CT-ND Littlefuse 0154010.DR FUSEBLOCK WITH 10A FUSE SMD 40 1 J1 PJ-032A CUI PJ-032A CON PWR JCK 2.0 X 6.5MM VERT 41 1 J2 USB_MINI_AB MOLEX 56579-0576 CONN RECEPT USB 5POS RT ANG SMD 42 2 J3, J14 HEADER 10 Samtec TSW-110-07-T-S 10x1-0.25 Header 43 1 J4 HEADER 3X2 Samtec TSW-103-07-T-D 3x2-0.25 Header 44 4 J5, J6, J7, J8 SMA Molex 73391-0060 CONN JACK SMA STR 50 OHM PCB 45 1 J9 0826-1X2T-23-F Bellfuse 0826-1X2T-23-F CONN MAGJACK 2PORT GIGABIT GO/Y 46 2 J10, J12 HEADER 2 Samtec TSW-102-07-T-S 2x1-0.25 Header 47 1 J13 HEADER 3(DNP) DNI TSW-103-07-T-S 3x1-0.25 Header 48 4 L1, L2, L3, L4 4.7uH-SPD62R-472M API Delavan SPD62R-472M 6.60mm x 6.20mm x 3.00mm, 4.7uH Power inductor 49 1 L5 1UH-1206SMT Murata LQM31PN1R0M00L INDUCTOR 1.0UH 1.2A 1206 50 1 PP1 PROBEPOINT DNI 51 4 Q1, Q2, Q3, Q4 2N2222/SOT23 Diodes Inc MMBT2222A-7 TRANS NPN 40V 350MW SMD SOT-23 52 2 Q5, Q6 BCP69-16 NXP Semiconductors BCP69-16 TRANSISTOR PNP 20V 1A SOT223 28 Part Number Description LatticeECP3 Versa Evaluation Board User’s Guide Table 12. LatticeECP3 Versa Evaluation Board Bill of Materials (Continued) Item Quantity 53 5 RN1, RN2, RN3, RN4, RN5 741X083-100R Reference Part CTS Manufacturer 741X083101JP RES ARRAY 100 OHM 8TERM 4RES SMD 54 2 RN6, RN8 EXB2HV151JV Panasonic EXB2HV151JV RES ARRAY 150 OHM 5% 8 RES SMD 55 1 RN7 EXB2HV471JV Panasonic EXB2HV471JV RES ARRAY 470 OHM 5% 8 RES SMD 56 1 RN9 EXB2HV472JV Panasonic EXB2HV472JV RES ARRAY 4.7K OHM 5% 8 RES SMD 57 1 RP1 CTS-RT1402B7 CTS Corporation RT2402B7 Resistor/Electrocomponents RES NET DDR SDRAM 50 OHM 3X9 BGA 58 14 R1, R2, R32, R33, R36, R38, R141, R145, R146, R169, R170, R175, R176, R177 0R-0603SMT Panasonic ERJ-3GEY0R00V RES 0.0 OHM 1/10W 0603 SMD 59 7 R3, R4, R143, R144, R148, OPEN-0603SMT R149, R178 DNI 60 16 R5, R9, R21, R41, R42, R43, R54, R63, R64, R66, R67, R68, R69, R70, R71, R157 10K-0402SMT Panasonic ERJ-2RKF1002X RES 10.0K OHM 1/10W 1% 0402 SMD 61 4 R6, R10, R12, R14 51K-0402SMT Panasonic ERJ-2RKF5102X RES 51.0K OHM 1/10W 1% 0402 SMD 62 1 R7 21_5K-0402SMT Panasonic ERJ-2RKF2152X RES 21.5K OHM 1/10W 1% 0402 SMD 63 1 R8 35_7K-0402SMT Panasonic ERJ-2RKF3572X RES 35.7K OHM 1/10W 1% 0402 SMD 64 1 R11 34K-0402SMT Panasonic ERJ-2RKF3402X RES 34.0K OHM 1/10W 1% 0402 SMD 65 1 R13 11_5K-0402SMT Panasonic ERJ-2RKF1152X RES 11.5K OHM 1/10W 1% 0402 SMD 66 1 R15 5_11K-0402SMT Panasonic ERJ-2RKF5111X RES 5.11K OHM 1/10W 1% 0402 SMD 67 1 R16 15K-0402SMT Panasonic ERJ-2RKF1502X RES 15.0K OHM 1/10W 1% 0402 SMD 68 1 R17 16_9K-0402SMT Panasonic ERJ-2RKF1692X RES 16.9K OHM 1/10W 1% 0402 SMD 69 1 R18 63_4K-0402SMT Panasonic ERJ-2RKF6342X RES 63.4K OHM 1/10W 1% 0402 SMD 70 4 R22, R23, R24, R25 1_8K-1206SMT Panasonic ERJ-8ENF1801V RES 1.80K OHM 1/4W 1% 1206 SMD 71 4 R26, R30, R31, R61, R179 220R-0603SMT Panasonic ERJ-3EKF2200V RES 220 OHM 1/10W 1% 0603 SMD 72 5 R27, R28, R29, R37, R65 10K-0603SMT Panasonic ERJ-3EKF1002V RES 10.0K OHM 1/10W 1% 0603 SMD 73 14 R34, R40, R51, R53, R100, 4_7K-0402SMT R101, R103, R134, R135, R137, R162, R171, R172, R173 Panasonic ERJ-2RKF4701X RES 4.70K OHM 1/10W 1% 0402 SMD 74 2 R35, R39 27R-0603SMT Panasonic ERJ-3EKF27R0V RES 27.0 OHM 1/10W 1% 0603 SMD 75 1 R44 12K-0603SMT Panasonic ERJ-3EKF1202V RES 12.0K OHM 1/10W 1% 0603 SMD 76 8 R45, R46, R47, R57, R58, R59, R72, R142 4_7K-0603SMT Panasonic ERJ-3EKF4701V RES 4.70K OHM 1/10W 1% 0603 SMD 77 1 R48 2_2K-0603SMT Panasonic ERJ-3EKF2201V RES 2.20K OHM 1/10W 1% 0603 SMD 78 2 R49, R174 1K-0603SMT Panasonic ERJ-3EKF1001V RES 1.00K OHM 1/10W 1% 0603 SMD 79 1 R50 1M-0603SMT Panasonic ERJ-3EKF1004V RES 1.00M OHM 1/10W 1% 0603 SMD 80 3 R55, R56, R60 680R-0603SMT Panasonic ERJ-3EKF6800V RES 680 OHM 1/10W 1% 0603 SMD 81 1 R62 OPEN-0402SMT DNI 82 5 R73, R74, R107, R108, R156 100R-0402SMT Panasonic ERJ-2RKF1000X RES 100 OHM 1/10W 1% 0402 SMD 29 Part Number Description LatticeECP3 Versa Evaluation Board User’s Guide Table 12. LatticeECP3 Versa Evaluation Board Bill of Materials (Continued) Item Quantity 83 47 R52, R75, R76, R77, R78, 0R-0402SMT R79, R80, R81, R82, R84, R85, R86, R87, R88, R89, R90, R91, R93, R94, R95, R96, R97, R98, R99, R104, R109, R110, R111, R112, R113, R114, R115, R116, R117, R118, R120, R121, R122, R123, R124, R125, R126, R127, R129, R130, R131, R160 Reference Part Panasonic Manufacturer ERJ-2GE0R00X Part Number RES 0.0 OHM 1/10W 0402 SMD Description 84 4 R83, R92, R119, R128 20R-0402SMT Vishay CRCW040220R0FKED RES 20.0 OHM 1/16W 1% 0402 SMD 85 2 R102, R136 1K-0402SMT Panasonic ERJ-2RKF1001X RES 1.00K OHM 1/10W 1% 0402 SMD 86 2 R105, R139 4_99K-0402SMT Panasonic ERJ-2RKF4991X RES 4.99K OHM 1/10W 1% 0402 SMD 87 2 R106, R140 4_75K-0603SMT Panasonic ERJ-3EKF4751V RES 4.75K OHM 1/10W 1% 0603 SMD 88 3 R132, R133, R138 33R-0402SMT Panasonic ERJ-2RKF33R0X RES 33.0 OHM 1/10W 1% 0402 SMD 89 1 R147 240R-0603SMT Panasonic ERJ-3EKF2400V RES 240 OHM 1/10W 1% 0603 SMD 90 6 R150, R151, R152, R153, R154, R155 50R-0402SMT Vishay FC0402E50R0FST1 RES 50 OHM 50MW +/1% 0402 SMD 91 5 R158, R161, R164, R165, R168 10R-0402SMT Panasonic ERJ-2RKF2200X RES 200 OHM 1/10W 1% 0402 SMD 92 2 R159, R166 220R-0402SMT Panasonic ERJ-2RKF10R0X RES 10.0 OHM 1/10W 1% 0402 SMD 93 1 R163 680R-0402SMT Panasonic ERJ-2RKF6800X RES 680 OHM 1/10W 1% 0402 SMD 94 1 R167 470R-0402SMT Panasonic ERJ-2RKF4700X RES 470 OHM 1/10W 1% 0402 SMD 95 2 SW1, SW2 PHP03T Panasonic EVQ-Q2K03W SPST SMD 96 1 SW3 TDA DIP-8 C&K TDA08H0SB1 8-DIP 97 14 TP1, TP2, TP3, TP4, TP5, TestPoint TP6, TP7, TP8, TP9, TP10, TP11, TP12, TP13, TP14 98 1 U1 LFE3-35E-FN484CES Lattice Semiconductor 99 1 U2 LT3029EDE Linear Tech 100 2 U3, U4 LT3508EUF 101 1 U5 FT2232HL FTDI FTD2232H USB-UART/JTAG 102 1 U6 93LC56-SO8 MicroChip 93LC56/SN IC EEPROM 2KBIT 2MHZ 8SOIC 103 1 U7 MAX6817 Maxim MAX6817-EUT+T debounce 104 1 U8 M25P64-FLASH STMicro M25P64-VMF6TP Serial Flash 105 2 U9, U10 88E1119R_72QFN Marvell-88E1119R GPHY 106 1 U11 ddr3-96bga Micron MT41J64M16JT-15E:G 64Mb/x16, 1.5V, 96-ball FBGA, 667 MHz, DDR31333 107 1 U12 LP2998-SO8 National Semiconductor LP2998MAX/NOPB Termination regulator 108 1 U13 ispClock5406D 109 1 X1 DSC-100_00MHz Discera DSC1123AE2-100.0000 Alternate: Abracon-ASVMPLV100.000MHZ-R-T 100MHz Low-Jitter LVDS Clock Oscillator, 7mm x 5mm, 50ppm 110 1 X2 156.25MHz Discera DSC1121Al1-156.2500 Alternate: Abracon-ASVMPC156.250MHZ-T 156.25MHz Single ended CMOS Clock Oscillator, 7mm x 5mm 111 2 EX3, EX4 HDR40 Samtec TSW-120-07-T-D HEADER 40POS .100" DL TIN 112 1 Y1 ATS120SM-1 HC-49/US-SM CTS ATS120SM-T CRYSTAL 12.0000MHZ 20PF SMD DNI Linear Tech Lattice Semiconductor 30 Table 12. LatticeECP3 Versa Evaluation Board Bill of Materials (Continued) Item Quantity 113 2 Y2, Y3 Reference 25MHZ CRYSTAL Part Citizen Manufacturer HC49US-25.000MABJUB Part Number CRYSTAL 25.000 MHZ 18PF HC49/US Description 114 1 R19 30_1K-0402SMT Panasonic ERJ-2RKF3012X RES 30.1K OHM 1/10W 1% 0402 SMD 115 1 R20 20K-0402SMT Panasonic ERJ-2RKF2002X RES 20.0K OHM 1/10W 1% 0402 SMD 115 2 C245, C246 100PF-0402SMT Panasonic ECJ-0EB1E102K CAP 100PF 25V CERAMIC X7R 0402 116 2 C10, C12 3_3UF-10V-0805SMT Panasonic ECJ-2FB1A335K CAP 3.3UF 10V CERAMIC X5R 0805
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Key Features
- Half-length PCI Express form-factor
- Electrical testing of one full-duplex SERDES channel via SMA connections
- USB-B connection for UART and device programming
- Two RJ45 interfaces to 10/100/1000 Ethernet to GMII
- DDR3-1333 memory components (64Mb/x16)
- Expansion mezzanine interconnection for prototyping
- 14-segment alpha-numeric display
- ispVM™ programming support
Frequently Answers and Questions
What are the power options for the board?
How do I program the board?
What is the purpose of the SPI Flash memory device?
What clock sources are available on the board?
How are the general purpose FPGA pins connected?
Related manuals
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Table of contents
- 2 Introduction
- 2 Features
- 3 LatticeECP3 Device
- 3 Applying Power to the Board
- 3 Programming/FPGA Configuration
- 4 Alternate ispVM Download Interface
- 4 ispVM Requirements
- 5 Board Programming
- 5 Configuration Status Indicators
- 5 PROGRAMN and GSRN
- 5 Programming Serial SPI Flash Memory
- 7 On-Board Clock Capabilities
- 8 General Purpose Clock Source
- 8 SERDES
- 8 FPGA Test Pins
- 8 General Purpose DIP Switches
- 9 General Purpose LEDs
- 10 Alpha-numeric LED Display
- 10 DDR3 Memory Device
- 11 Ethernet Interfaces
- 14 References
- 14 Ordering Information
- 15 Technical Support Assistance
- 15 Revision History
- 16 Appendix A. Schematics
- 27 Appendix B. Bill of Materials