DELPHI AUTOMOTIVE SYSTEMS CORPORATION

DELPHI AUTOMOTIVE SYSTEMS CORPORATION
DELPHI AUTOMOTIVE SYSTEMS CORPORATION
SPI to RS-232 Gateway
Systems Analysis INterface Tool (SAINT)
Users Guide
Document Number TBD
Version A, Draft 1
May 27, 2003
Copyright © Delphi Automotive Systems Corporation, 2003
Maintained by: Chris Spurrier
Delphi Delco Electronics Systems
1800 East Lincoln Road
Kokomo, IN 46904-9005
Phone: (765) 451-3645
[email protected]
SAINT
SPI to RS-232 Gateway
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Table of Contents
1
Introduction ..............................................................................................................................................................3
1.1
1.2
1.3
2
3
Overview....................................................................................................................................................................4
RS-232 Setup.............................................................................................................................................................5
3.1
4
6
Buffering and Flow Control .................................................................................................................................................6
Message Format........................................................................................................................................................7
4.1
4.2
4.3
4.4
5
Scope....................................................................................................................................................................................3
Precedence ...........................................................................................................................................................................3
Definitions and Nomenclature..............................................................................................................................................3
Data Stream..........................................................................................................................................................................7
Messages IDs .......................................................................................................................................................................8
Gateway Messages ...............................................................................................................................................................9
SPI Messages .....................................................................................................................................................................12
SPI Firmware and mode explanations and limitations ......................................................................................14
Connectors...............................................................................................................................................................16
6.1
6.2
6.3
RS-232 Connector (J3-DB9F)............................................................................................................................................16
Flash programming connector ............................................................................................................................................17
SPI interface connections ...................................................................................................................................................18
7
LEDs ........................................................................................................................................................................19
8
Software Packages..................................................................................................................................................20
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SPI to RS-232 Gateway
5/27/03
Revision Log
Revision A
Draft 1 – May 27, 2003
Initial release of the document.
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SPI to RS-232 Gateway
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1
1.1
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Introduction
Scope
This document describes the use and operation of SAINT Gateway with SPI firmware. This document is proprietary to Delphi
Automotive Systems Corporation and cannot be copied in whole or in part without the express written consent of Delphi Automotive
Systems Corporation.
1.2
Precedence
This document shall have precedence over any information in any other document. Between reference documents, the document with
the later revision date shall have precedence.
1.3
Definitions and Nomenclature
Gateway - abbreviation for SPI to RS-232 Gateway.
SAINT - acronym for the gateway (Systems Analysis INterface Tool).
Host
- The computer which communicates to the gateway via RS-232 or USB.
USB
- Universal Serial Bus
SPI
- Serial Peripheral Interface
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Overview
This document describes the operation of the SPI to RS-232 Gateway. The gateway is often referred to as the “SAINT gateway” or
simply “SAINT”.
The following is a synopsis of gateway features:
•
•
•
•
•
•
Allows host system to communicate on SPI bus.
Performs timing, access, and serialization.
Configuration via host to gateway messages.
LED status indicator array:
1. Power LED (flashing LED)
2. Bus Message LED (toggles during transmit of Gateway to Host message)
3. Message Trigger LED (1ms – 2ms active pulse upon receiving a specified byte pattern)
Gateway to host status / error messages.
Software is easily updated via a flash connector. Will eventually be done through the USB bus.
The following is a synopsis of requirements for use of the gateway:
Connection to power, ground, and busses to be monitored
RS-232 connection to host
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RS-232 Setup
The gateway uses the following RS-232 parameters:
- 8 Data Bits
- 1 Stop Bit
- No Parity
The gateway supported baud rate: 57600.
Baud Rate
57600
The supported baud rate is sufficient for communicating with the Class2, Keyword, ACP, BEAN, E&C, SPI and slower CAN bus’s.
However, USB connection is recommended for high speed CAN communications.
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SPI to RS-232 Gateway
3.1
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Buffering and Flow Control
Whenever the gateway receives a new message from the host, it will set the CTS line until the message can be processed. The host
should not send data to the gateway while the CTS line is set. Due to the speed of the gateway processor, it is unlikely that the host
will ever see the CTS line set.
The gateway buffers 32 bytes to send to the host. The gateway polls the RS-232 transmitter in the main loop to send data to the host.
In some cases, the RS-232 transmit buffer will overflow. This should occur only when receiving CAN or IIC messages at a very fast
rate. This will cause an ERc_RSFull error to be generated and the data to be lost.
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Message Format
To minimize latency with the RS-232 link, all data is sent in binary form. The same data format is used to send and receive messages.
The gateway supports bi-directional asynchronous communications.
4.1
Data Stream
The host data stream is broken into messages. A message consists of a Message ID and one or more data bytes.
The character FFh is used as an ESCAPE character to indicate the end of messages. There are three cases when an ESCAPE character
is received.
If the ESCAPE character is followed immediately by a second ESCAPE character, the following are true:
• The message is not yet complete.
• The pair of ESCAPE characters represents a single byte of message data of value FFh.
If the ESCAPE character is followed immediately by a byte of value 00h, the following are true.
• The message is complete.
• Neither the FFh nor the 00h are part of the message.
• No more messages are ready to be sent.
If the ESCAPE character is followed immediately by of any value other than FFh or 00h, the following are true:
• The message is complete.
• Neither the ESCAPE character nor the character following the ESCAPE character are part of the message.
• The value following the ESCAPE character is the message ID for a new message.
This data stream format was chosen to allow arbitrary long messages (i.e. 4K Class 2 data blocks), to minimize the overhead to two
bytes per message during peak traffic, and to immediately recognize the end of a message without having to wait for the next message
to start.
After a gateway reset, the gateway will ignore all data until it sees an ESCAPE character. Once it has received a valid EOM, it will
recognize the following message.
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SPI to RS-232 Gateway
4.2
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Messages IDs
Message IDs are one byte long and have the following general format:
Type (CAN, BEAN,
ACP,Class 2, IIC, etc)
Command
(Cmd=1)
Tx (1) / Rx (0)
Time Stamp (TS)
Bits 3 - 7
bit 2
bit 1
bit 0
The upper nibble indicates the type of message. The following types are defined:
•
Gateway (08)
•
Keyword 82 (10h)
•
Keyword 71 (18h)
•
IIC (20h)
•
Keyword 2000 (28h)
•
IDB (30)
•
ACP (38h)
•
E&C (40h)
•
J1708 (48h)
•
CAN (50h)
•
Class2 (60h)
•
Class2 Block (68h)
•
SPI (70h)
•
BEAN1 (90h)
•
BEAN2 (98h)
•
LIN (B8h)
Bits 3 to 7 identify the specific communication bus (i.e., Class 2, CAN bus, etc.). Bit 2 is used to designate a command or setup
message when set to 1. Bit 1 is the transmit/receive bit with 1 designating transmit and 0 designating receive. Bit 0 is used to
designate the Time Stamp. In general, report messages from the gateway use the same identifiers as commands to the gateway.
SAINT
SPI to RS-232 Gateway
4.3
4.3.1
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Gateway Messages
Gateway Commands (SPIxx Vx.x)
The SAINT - SPI Gateway supports the following commands:
4.3.1.1
Header
ID
Data
Description
08h
80h
None
Perform Reset
08h
86h
None
Turn Time Stamp Information OFF
08h
87h
None
Turn Time Stamp Information ON
08h
88h
None
Turn Transmit Echo ON
08h
89h
None
Turn Transmit Echo OFF
08h
90h
25 bytes
Send Periodic Messages
08h
91h
None
End Periodic Messages
08h
92h
None
Request Software Version
08h
F0h
10 bytes
Enable Gateway Trigger
08h
F1h
None
Disable Gateway Trigger
Reset
This command will cause the gateway to do a complete cold start. The gateway will ignore the next message.
4.3.1.2
Time Stamp
This command controls whether a 16-bit time stamp is appended to the end of the bus message reports.
4.3.1.3
Transmit Echo
This command controls whether transmitted messages are echoed back to the host when they are sent. Echoed back messages will
have their transmit bit set.
4.3.1.4
Send Periodic Messages (valid in master mode only!)
This command will transmit up to two SPI messages periodically in Master mode only. See example below.
Example for sending SPI Master periodic messages:
---Turn Periodic Message(s) ON (up to two (2 x 10 byte) messages)--Format: GH CM TT TT PR B# MSB-------LSB DC DC DC DC DC DC B# MSB-------LSB DC DC DC DC DC
e.g. - 08 90 01 F4 70 04 AA AA AA AA 00 00 00 00 00 00 04 55 55 55 55 00 00 00 00 00 00
SAINT
SPI to RS-232 Gateway
GH
= gateway header byte
CM
= command byte
TT TT
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= periodic time in msec (16 bit hex value)
PR
= protocol header byte 70h - SPI
B#
= number of bytes to transmit on single active chip select - if set to zero message is not transmitted
MSB - LSB = specific bytes (MSB first to LSB - up to 10 bytes)
DC
= do not care value
Place data starting right to left MSB first and pad with zeros or DC (“don’t cares”) for the remaining bytes.
4.3.1.5
Software Version Request
This command requests the gateway software version (ASCII) (SPIxx Vx.x).
4.3.1.6
Trigger (valid in master mode only!)
This command will cause the gateway to activate the trigger LED for 1ms –2 ms upon receiving a specified byte pattern.
---Enable Gateway Trigger (0 - 10 data bytes)--Format: GH CM 00 00 00 00 00 00 MSB-------LSB
e.g. - 08 F0 00 00 00 00 00 00 AA AA AA AA
GH
= gateway header byte
CM
= command byte
00
= zero padding value
MSB - LSB = specific bytes (MSB first to LSB - up to 10 bytes)
Place data starting left to right LSB first and pad with zeros for the remaining bytes.
4.3.2
Gateway Reports
The gateway will report a reset whenever one occurs. Most likely causes of reset are power on reset, host commanded reset, or
gateway micro watchdog error. The gateway does a cold start on all resets (all information is lost). The gateway will also report error
conditions with the Report Error message below. See section 4.3.2.1 for error code definitions.
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The gateway will also echo back all system commands.
4.3.2.1
Header
ID
Description
Data Bytes
08h
80h
Reset Occurred
None
08h
82h
Report Error
1 byte Error Code
08h
86h
Report Time Stamp Information OFF
None
08h
87h
Report Time Stamp Information ON
None
08h
88h
Report Transmit Echo ON
None
08h
90h
Report Periodic Messages ON
2 x SPI Messages
08h
91h
Report Periodic Messages OFF
None
08h
F0h
Report Gateway Trigger ON
10 bytes of Trigger Data
08h
F1h
Report Gateway Trigger OFF
None
Gateway Error Codes
Most error codes are related to sending data at the wrong rate (usually too fast).
Code
Description
80h
System - Invalid message ID or Invalid Message (incorrect data, length, etc.)
81h
System - RS-232 Transmit Buffer Full
82h
System - UART Error (Overrun, etc.)
83h
System – Received message is too long.
84h
System - Have not read previous message
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SPI to RS-232 Gateway
4.4
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SPI Messages
4.4.1
SPI Commands and Command Reports
SPI mode command – (MASTER = 00h) (MONITOR = 01h)
Byte 1
Byte 2
Byte 3
74h
01h
Mode
SPI mode command report – (MASTER = 00h) (MONITOR = 01h)
Byte 1
Byte 2
Byte 3
74h
01h
Mode
SPI clock polarity command – (idle low = 00h) (idle high = 01h) (!!!! MASTER MODE ONLY !!!!)
Byte 1
Byte 2
Byte 3
74h
02h
clk idle
SPI clock polarity command report – (idle low = 00h) (idle high = 01h) (!!!! MASTER MODE ONLY !!!!)
Byte 1
Byte 2
Byte 3
74h
02h
clk idle
SPI chip select polarity command – (idle low = 00h) (idle high = 01h) (!!!! MASTER MODE ONLY !!!!)
Byte 1
Byte 2
Byte 3
74h
03h
cs idle
SPI chip select polarity command report – (idle low = 00h) (idle high = 01h) (!!!! MASTER MODE ONLY !!!!)
Byte 1
Byte 2
Byte 3
74h
03h
cs idle
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SPI trigger polarity command – (idle low = 00h) (idle high = 01h) (!!!! MASTER MODE ONLY !!!!)
Byte 1
Byte 2
Byte 3
74h
04h
trig idle
SPI trigger polarity command report – (idle low = 00h) (idle high = 01h) (!!!! MASTER MODE ONLY !!!!)
Byte 1
Byte 2
Byte 3
74h
04h
trig idle
4.4.2
Transmitted SPI Messages (Master – mode only)
SPI Master transmit – (1 – 10 byte transmission on single chip select)
Byte 1
Byte 2 – Byte N
70h
Data
4.4.3
Received SPI Messages
SPI Gateway Transmit Echo – (1 – 10 byte echo if echo enabled)
Byte 1
Byte 2 – Byte N
Byte N + 1
72h
Data
Completion
Code (not used)
SPI Gateway Transmit Echo with Timestamp – (1 - 10 byte echo and 2 byte timestamp if echo and timestamp enabled)
Byte 1
Byte 2 – Byte N
Byte N + 1
Byte N + 2
Byte N + 3
73h
Data
Completion
Timestamp
MSB
Timestamp
LSB
Code (not used)
SPI Gateway Receive (1 – 10 byte received message)
Byte 1
Byte 2 – Byte N
Byte N + 1
70h
Data
Completion
Code (not used)
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SPI Gateway Receive with Timestamp – (1 –10 byte received message and 2 byte timestamp if timestamp enabled)
Byte 1
Byte 2 – Byte N
Byte N + 1
Byte N + 2
Byte N + 3
71h
Data
Completion
Timestamp
MSB
Timestamp
LSB
Code (not used)
5
SPI Firmware and mode explanations and limitations
The SPI firmware allows for a master MOSI transmit of (1 – 10) bytes and a MISO receive of (1 – 10) bytes on a single active chip
select. The clock rate for this transmission is fixed at 1.388MHz. The idle polarity for both chip select and master clock are
configurable through SPI firmware commands explained in (section 4.4.1). These are configurable in master mode only! The monitor
mode allows for monitoring both the MOSI and MISO SPI lines simultaneously. The firmware is capable of monitoring (1 – 10) bytes
for both MOSI and MISO on a single active chip select. Four different firmwares have been compiled in order to achieve the maximum
monitoring clock rate of 1.388MHz by hard coding the idle states of both the clock signal and chip select signal. This clock rate is
guaranteed but a higher clock rate may be monitored reliably depending on how quickly a clock signal is generated after the chip
select. Due to the nature of the interrupt handling on the SAINT micro, some messages may not be completely caught or caught at all.
The only difference between the firmwares are the default idle polarities of the clock signal and chip select signal respectfully. All
firmwares assume data is ready on first edge (chip select clocks first bit onto MISO). A diagram and explanation of each firmware are
listed below.
SPI configuration diagram
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Firmware definition
Note1: All firmware - default to master mode on reset.
Note2: All firmware - Master mode clock and chip select idle state configurable.
SPI_CLK0_CS0_vxx.hex
(Software Version Request will return SPI00 Vx.x)
MASTER MODE = IDLE LOW CLOCK, IDLE LOW CHIP SELECT (default on reset)
MONITOR MODE = IDLE LOW CLOCK, IDLE LOW CHIP SELECT
SPI_CLK0_CS1_vxx.hex
(Software Version Request will return SPI01 Vx.x)
MASTER MODE = IDLE LOW CLOCK, IDLE HIGH CHIP SELECT (default on reset)
MONITOR MODE = IDLE LOW CLOCK, IDLE HIGH CHIP SELECT
SPI_CLK1_CS0_vxx.hex
(Software Version Request will return SPI10 Vx.x)
MASTER MODE = IDLE HIGH CLOCK, IDLE LOW CHIP SELECT (default on reset)
MONITOR MODE = IDLE HIGH CLOCK, IDLE LOW CHIP SELECT
SPI_CLK1_CS1_vxx.hex
(Software Version Request will return SPI11 Vx.x)
MASTER MODE = IDLE HIGH CLOCK, IDLE HIGH CHIP SELECT (default on reset)
MONITOR MODE = IDLE HIGH CLOCK, IDLE HIGH CHIP SELECT
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Connectors
The gateway uses two connectors. One connector is for the RS-232 link and is DB9F. The second connector is a DB9M for the CAN
bus (low speed, medium speed, and high speed), Class 2 bus, Keyword, LIN, power, and ground. The following pin outs are used:
6.1
RS-232 Connector (J3-DB9F)
A straight pass cable should be used to connect the gateway to the host computer.
DE-9s Pin #
Use
2
TX to Host
3
RX from Host
8
CTS
6
DSR
5
GND
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SPI to RS-232 Gateway
6.2
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Flash programming connector
Note: the long-term goal is to Flash using the USB connector.
Connector J2 is used with an external connector – the intended application of this port is the flash programming of a product. The pin
out of the connector J2 – flash programming connector - is as follows:
Pin #
Mnemonic
Use / description
Line up the connector label with the
board pin label.
Osc1
External (to SAINT) oscillator
Osc2
External (to SAINT) oscillator
Vdd
Already connected
SAINT board
Vss
Already grounded
to
+5V
on
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SPI to RS-232 Gateway
6.3
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SPI interface connections
In order to interface a SAINT gateway with SPI firmware to another device certain header pins located inside the box must be accessed
or brought out to that device. These connections are listed in the table below:
Pin #
Mnemonic
Use / description
RB.2
CS
SPI chip select signal
RE.4
CLK
SPI clock signal
RE.3
MOSI
SPI master out slave in
RE.2
MISO
SPI master in slave out
RB.6
TRIG OUT
SPI trigger output
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LEDs
Four LEDs are used by the gateway. These LEDs are:
LED #
Purpose
4
NC (No Connection)
3
Trig (1ms – 2ms active on specified message)
2
Pow (SAINT powered up)
1
Bus (Toggles when transmitting an RS232 message)
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SPI to RS-232 Gateway
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Software Packages
The following table lists the latest firmware releases for the SAINT board.
Name
Hardware
Version
Date
Description
SPI_CLKx_CSx_V10.HEX
1.4 –1.5
05/27/2003
Initial Release
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