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TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
1 Overview
Quality Requirement Category: Automotive
Features
• Ultra Low Quiescent Current of 5.5 µA
• Wide Input Voltage Range of 2.75 V to 42 V
• Output Current Capacity up to 100 mA
• Off Mode Current Less than 1 µA
• Low Drop Out Voltage of typ. 250 mV @ 100 mA
• Output Current Limit Protection
• Overtemperature Shutdown
• Enable
• Available in PG-DSO-8 EP Package
• Available in PG-TSON-10 Package
• Wide Temperature Range
• Green Product (RoHS Compliant)
• AEC Qualified
Applications
• Applications with direct battery connection
• Automotive general ECUs
• Infotainment, alarm, dashboard
• RKE, immobilizer, gateway
Data Sheet
www.infineon.com/power
1 Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Overview
Description
The TLS810B1 is a linear voltage regulator featuring wide input voltage range, low drop out voltage and ultra low quiescent current.
With an input voltage range of 2.75 V to 42 V and ultra low quiescent of only 5.5 µA, the regulator is perfectly suitable for automotive or any other supply systems connected permanently to the battery.
The TLS810B1xxV33 is the fixed 3.3 V output version with an accuracy of 2 % and output current capability up to 100 mA.
The new regulation concept implemented in TLS810B1 combines fast regulation and very good stability while requiring only a small ceramic capacitor of 1 μF at the output.
The tracking region starts already at input voltages of 2.75 V (extended operating range). This makes the
TLS810B1 also suitable to supply automotive systems that need to operate during cranking condition.
Internal protection features like output current limitation and overtemperature shutdown are implemented to protect the device against immediate damage due to failures like output short circuit to GND, over-current and over-temperature.
The device can be switched on and off by the Enable feature. When the device is switched off, the current consumption is typically less than 1 µA.
Type
TLS810B1EJV33
TLS810B1LDV33
Package
PG-DSO-8 EP
PG-TSON-10
Marking
810B1V33
810B1V3
Data Sheet 2 Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Table of Contents
Data Sheet 3 Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Block Diagram
2 Block Diagram
I
EN
Enable
Current
Limitation
Temperature
Shutdown
GND
Bandgap
Reference
Figure 1 Block Diagram TLS810B1
Q
Data Sheet 4 Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Pin Configuration
3 Pin Configuration
3.1
Pin Assignment in PG-DSO-8 EP Package
N.C.
I
EN
GND
1
2
3
4
8
7
6
5
Q
N.C.
N.C.
N.C.
Figure 2 Pin Configuration TLS810B1 in PG-DSO-8 EP package
3.2
Pin Definitions and Functions in PG-DSO-8 EP Package
7
8
5
6
Pin Symbol Function
1
2
3
4
I
N.C.
EN
GND
Input
It is recommended to place a small ceramic capacitor (for example 100 nF) to GND, close to the IC terminals, in order to compensate line influences.
Not connected
Enable
Integrated pull-down resistor.
Enable the IC with high level input signal.
Disable the IC with low level input signal.
Ground
N.C.
N.C.
N.C.
Q
Pad –
Not connected
Not connected
Not connected
Output
Connect an output capacitor C
Exposed Pad
Connect to heatsink area.
Connect to GND.
Q
to GND close to the IC’s terminals, respecting the values
specified for its capacitance and ESR in
Table 2 “Functional Range” on Page 8
Data Sheet 5 Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Pin Configuration
3.3
Pin Assignment in PG-TSON-10 Package
I
N.C.
EN
N.C.
GND
1
TSON-10
10
2
9
3
8
4
7
5
6
N.C.
Q
N.C.
N.C.
N.C.
Figure 3 Pin Configuration TLS810B1 in PG-TSON-10 package
3.4
Pin Definitions and Functions in PG-TSON-10 Package
7
8
5
6
9
Pin Symbol Function
1
2
3
4
I
N.C.
EN
N.C.
Input
It is recommended to place a small ceramic capacitor (for example 100 nF) to GND, close to the IC terminals, in order to compensate line influences.
Not connected
Enable
Integrated pull-down resistor.
Enable the IC with high level input signal.
Disable the IC with low level input signal.
Not connected
10
GND
N.C.
N.C.
N.C.
Q
N.C.
Pad –
Ground
Not connected
Not connected
Not connected
Output
Connect an output capacitor C
Q
to GND close to the IC’s terminals, respecting the values
specified for its capacitance and ESR in
Table 2 “Functional Range” on Page 8
.
Not connected
Exposed Pad
Connect to heatsink area.
Connect to GND.
Data Sheet 6 Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
General Product Characteristics
4 General Product Characteristics
4.1
Absolute Maximum Ratings
Table 1 Absolute Maximum Ratings
1)
T
j
= -40°C to +150°C; all voltages with respect to ground (unless otherwise specified)
Parameter Symbol
Min.
Values
Typ.
Max.
Unit Note or
Test Condition
Voltage Input I, Enable EN
Voltage
Voltage Output Q
V
I
, V
EN
-0.3
– 45 V –
– Voltage
Temperatures
V
Q
-0.3
– 7 V
Junction Temperature
Storage Temperature
T
j
T
stg
-40 –
-55 –
150
150
°C
°C
ESD Absorption
ESD Susceptibility to GND
V
ESD,HBM
-2 – 2 kV
ESD Susceptibility to GND
V
ESD,CDM
-750
1) Not subject to production test, specified by design.
– 750 V
2) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF)
3) ESD susceptibility, Charged Device Model “CDM” according JEDEC JESD22-C101
–
–
HBM
2)
CDM
3)
at all pins
Number
Notes
1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation.
Data Sheet 7 Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
General Product Characteristics
4.2
Functional Range
Table 2 Functional Range
Parameter
Input Voltage Range
Extended Input Voltage
Range
Symbol
V
V
I
I,ext
Min.
V
Q,nom
2.75
+V dr
Values
Typ.
–
–
Max.
42
42
Unit Note or
V
V
Test Condition
–
–
1)
2)
Number
Enable Voltage Range
Output Capacitor
Output Capacitor’s ESR
V
EN
C
Q
0
1
–
–
ESR(C
Q
) – –
42
–
100
V
µF
Ω
–
–
–
4)
Junction temperature
T
j
-40 – 150 °C –
1) Output current is limited internally and depends on the input voltage, see Electrical Characteristics for more details.
2) When V
I
is between V
I,ext.min
and V
Q,nom
+ V dr
, V
Q
= V
I
- V dr
. When V
I
is below V
I,ext,min
, V
Q
can drop down to 0 V.
3) The minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30%.
4) Not subject to production testing, specified by design.
Note: Within the functional or operating range, the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the Electrical Characteristics table.
Data Sheet 8 Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
General Product Characteristics
4.3
Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to
www.jedec.org
.
Table 3 Thermal ResistanceTLS810B1 in PG-DSO-8 EP Package
1)
Parameter Symbol Values Unit Note or Test Condition Number
Min. Typ. Max.
Junction to Case
R
thJC
Junction to Ambient
R
thJA
Junction to Ambient
R
thJA
Junction to Ambient
R
thJA
–
–
–
19
51
167
–
–
–
K/W –
K/W 2s2p board
2)
K/W 1s0p board, footprint only
3)
Junction to Ambient
R
thJA
–
–
71
60
–
–
K/W 1s0p board, 300 mm
2 area on PCB
heatsink
K/W 1s0p board, 600 mm
2 area on PCB
heatsink
1) Not subject to production test, specified by design
2) Specified R thJA
value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm
Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
3) Specified R thJA
value is according to JEDEC JESD 51-3 at natural convection on FR4 1s0p board; The Product
(Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm
3
board with 1 copper layer (1 x 70µm Cu).
Table 4 Thermal Resistance TLS810B1 in PG-TSON-10 Package
1)
Parameter Symbol Values
Min. Typ. Max.
Unit Note or Test Condition Number
Junction to Case
Junction to Ambient
Junction to Ambient
R
thJC
R
thJA
R
Junction to Ambient
R
thJA thJA
–
–
–
–
13
60
184
75
–
–
–
–
K/W –
K/W 2s2p board
2)
K/W 1s0p board, footprint only
3)
K/W 1s0p board, 300 mm
2
heatsink
Junction to Ambient
R
thJA
– 64 – K/W 1s0p board, 600 mm
2
heatsink
1) Not subject to production test, specified by design
2) Specified R thJA
value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm
Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
3) Specified R thJA
value is according to JEDEC JESD 51-3 at natural convection on FR4 1s0p board; The Product
(Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm
3
board with 1 copper layer (1 x 70µm Cu).
Data Sheet 9 Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Block Description and Electrical Characteristics
5 Block Description and Electrical Characteristics
5.1
Voltage Regulation
The output voltage V
Q
is divided by a resistor network. This fractional voltage is compared to an internal voltage reference and the pass transistor is driven accordingly.
The control loop stability depends on the output capacitor C
Q
, the load current, the chip temperature and the internal circuit structure. To ensure stable operation, the output capacitor’s capacitance and its equivalent series resistor ESR requirements given in
“Functional Range” on Page 8
have to be maintained. For details see the typical performance graph
Output Capacitor Series Resistor ESR(C
) versus Output Current I
on
Page 14
. Since the output capacitor is used to buffer load steps, it should be sized according to the application’s needs.
An input capacitor C
I
is not required for stability, but is recommended to compensate line fluctuations. An additional reverse polarity protection diode and a combination of several capacitors for filtering should be used, in case the input is connected directly to the battery line. Connect the capacitors close to the regulator terminals.
In order to prevent overshoots during start-up, a smooth ramping up function is implemented. This ensures almost no overshoots during start-up, mostly independent from load and output capacitance.
Whenever the load current exceeds the specified limit, for example in case of a short circuit, the output current is limited and the output voltage decreases.
The overtemperature shutdown circuit prevents the IC from immediate destruction under fault conditions (for example output continuously short-circuit) by switching off the power stage. After the chip has cooled down, the regulator restarts. This oscillatory thermal behaviour causes the junction temperature to exceed the maximum rating of 150°C and can significantly reduce the IC’s lifetime.
Supply I
I
I
Q
I
Q
Regulated
Output Voltage
Current
Limitation
C
I
V
I
Temperature
Shutdown
Bandgap
Reference
C
Q
C
ESR
V
Q
LOAD
GND
Figure 4 Block Diagram Voltage Regulation
Data Sheet 10 Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Block Description and Electrical Characteristics
Table 5 Electrical Characteristics
T
j
= -40°C to +150°C, V
I
= 13.5 V, all voltages with respect to ground (unless otherwise specified).
Typical values are given at T j
= 25°C, V
I
= 13.5 V.
Parameter Symbol Values Unit Note or Test Condition Number
Output Voltage Precision
V
Q
Min.
Typ.
Max.
3.23
3.30
3.37
V 50 µA ≤ I
4 V ≤ V
I
Q
≤ 100 mA,
≤ 28 V
Output Voltage Precision
V
Q
Output Current Limitation
I
Q,lim
Line Regulation steady-state
ΔV
Q,line
ΔV
Q,load
Load Regulation steady-state
Dropout Voltage
1)
V
dr
= V
I
- V
Q
Ripple Rejection
2)
V
dr
PSRR
3.23
110
–
-20
–
–
3.30
190
1
-1
250
60
3.37
260
20
–
650
–
V mA 0 V ≤ V
Q
≤ V
Q,nom
- 0.1 V mV
I
Q
= 1 mA, 6 V ≤ V
I
≤ 32 V mV mV
I
dB
f
I
50 µA ≤ I
Q
4 V ≤ V
I
≤ 50 mA,
≤ 42 V
V
50 µA ≤ I
Q
Q
I
= 6 V,
Q
≤ 100 mA
= 100 mA
= 50 mA, ripple
V
ripple
= 100 Hz,
= 0.5 V p-p
Overtemperature
Shutdown Threshold
T
j,sd
151 175 – °C
T
j
increasing
Overtemperature
Shutdown Threshold
T
j,sdh
– 10 – K
T
j
decreasing
1) Measured when the output voltage V
Q
has dropped 100 mV from the nominal value obtained at V
I
= 13.5V
2) Not subject to production test, specified by design
Data Sheet 11 Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Block Description and Electrical Characteristics
5.2
Typical Performance Characteristics Voltage Regulation
200
150
100
50
0
400
350
300
250
Output Voltage V
Q
versus
Junction Temperature T j
3.5
3.45
3.4
3.35
3.3
3.25
3.2
3.15
3.1
0 50
T j
[
°
C]
Dropout Voltage V dr
versus
Junction Temperature T j
I
V
I
Q
= 13.5 V
= 50 mA
100 150
I
Q
= 10 mA
I
Q
= 50 mA
I
Q
= 100 mA
0 50
T j
[
°
C]
100 150
Output Current I
Q
versus
Input Voltage V
I
300
250
200
150
100
50
T j
= −40
°
C
T j
= 25
°
C
T j
= 150
°
C
0
0 10 20
V
I
[V]
Dropout Voltage V dr
versus
Output Current I
Q
30
200
150
100
50
0
0
400
350
300
250
T j
= −40
°
C
T j
= 25
°
C
T j
= 150
°
C
40
20 40
I
Q
[mA]
60 80 100
Data Sheet 12 Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Block Description and Electrical Characteristics
Load Regulation ∆V
Q,load
versus
Output Current I
Q
2
1.5
1
0.5
0
0
4
3.5
3
2.5
6
4
10
8
2
0
−2
−4
−6
−8
T j
= −40
°
C
T j
= 25
°
C
T j
= 150
°
C
−10
0 20 40
I
Q
[mA]
60
Output Voltage V
Q
versus
Input Voltage V
I
V
I
= 6 V
80 100
1 2
V
I
[V]
3
I
Q
T j
= 50 mA
= 25
°
C
4 5
Line Regulation ∆V
Q,load
versus
Input Voltage V
I
10
8
6
4
2
0
−2
−4
−6
T j
= −40
°
C
T j
= 25
°
C
T j
= 150
°
C
−8
I
Q
= 1 mA
−10
10 15 20 25
V
I
[V]
30 35 40
Power Supply Ripple Rejection PSRR versus ripple frequency f r
60
50
40
80
70
30
20
10
0
10
−2
I
Q
= 10 mA
C
Q
= 1
μ
F
= 13.5 V V
I
V ripple
T j
= 0.5 Vpp
= 25
°
C
10
−1
10
0 f [kHz]
10
1
10
2
10
3
Data Sheet 13 Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Block Description and Electrical Characteristics
Output Capacitor Series Resistor ESR(C
Q
) versus
Output Current I
Q
10
3
Unstable Region
10
2
10
1
10
0
Stable Region
10
−1
10
−2
0 20 40
I
Q
[mA]
60
C
Q
V
I
= 1
μ
F
= 3...28 V
80 100
Data Sheet 14 Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Block Description and Electrical Characteristics
5.3
Current Consumption
Table 6 Electrical Characteristics Current Consumption
T
j
= -40°C to +150°C, V
I
= 13.5 V (unless otherwise specified).
Parameter Symbol Values Unit Note or Test Condition Number
I
q,off
Min.
Typ. Max.
– – 1 µA
V
EN
≤ 0.4 V, T j
< 105°C
I
Current Consumption q
= I
I
I
Current Consumption q
= I
I
- I
Q
I
Current Consumption q
= I
I
- I
Q
I
Current Consumption q
= I
I
- I
Q
I
Current Consumption q
= I
I
- I
Q
I
I
I
I
q q q q
–
–
–
–
5.5
6.5
7
7
8
11
12
12
µA
µA
µA
µA
I
I
I
I
Q
Q
Q
Q
= 50 µA, T j
= 50 µA, T j
= 50 µA, T j
= 25°C
< 105°C
< 125°C
= 100 mA, T j
< 125°C
Data Sheet 15 Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Block Description and Electrical Characteristics
5.4
Typical Performance Characteristics Current Consumption
Current Consumption I q
versus
Output Current I
Q
16
14
12
10
8
6
4
2
0
16
14
12
10
8
6
4
T j
= −40
°
C
T j
= 25
°
C
T j
= 105
°
C
T j
= 125
°
C
2
0
0 20 40
I
Q
[mA]
60
Current Consumption I q
Junction Temperature T
versus j
V
I
= 13.5 V
80 100
0 50
T j
[
°
C]
I
V
I
Q
= 13.5 V
= 50
μ
A
100 150
Current Consumption I q
versus
Input Voltage V
I
40
35
30
25
20
15
10
T j
= −40
°
C
T j
= 25
°
C
T j
= 105
°
C
T j
= 125
°
C
5
0
5 10 15 20 25
V
I
[V]
30
I
Q
= 50
μ
A
35 40
Current Consumption in OFF mode I q,off
Junction Temperature T j
versus
2
1.5
1
0.5
0
4
3.5
V
I
= 13.5 V
V
EN
≤
0.4 V
3
2.5
0 50
T j
[
°
C]
100 150
Data Sheet 16 Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Block Description and Electrical Characteristics
5.5
Enable
The device can be switched on and off by the Enable feature. Connect a HIGH level as specified below (for example the battery voltage) to pin EN to enable the device; connect a LOW level as specified below (for example GND) to switch it off. The Enable function has a build-in hysteresis to avoid toggling between ON/OFF state, if signals with slow slopes are appiled to the EN input.
Table 7 Electrical Characteristics Enable
T
j
= -40°C to +150°C, V
I
= 13.5 V, all voltages with respect to ground (unless otherwise specified).
Typical values are given at T j
= 25°C, V
I
= 13.5 V.
Parameter Symbol Values Unit Note or Test Condition
Enable High Level Input
Voltage
V
EN,H
Min.
Typ.
Max.
2 – – V
V
Q
settled
Enable Low Level Input
Voltage
Enable High Level Input
Current
Enable Internal Pull-down
Resistor
I
V
EN,L
R
EN,H
EN
–
–
1.25
–
–
2
0.8
4
3.5
V
µA
MΩ
V
Q
≤ 0.1 V
V
–
EN
= 5 V
Number
Data Sheet 17 Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Block Description and Electrical Characteristics
5.6
Typical Performance Characteristics Enable
Enable Input Current I
EN
versus
Enable Input Voltage V
EN
25
20
15
10
5
0
0
40
35
30
T j
= −40
°
C
T j
= 25
°
C
T j
= 150
°
C
10 20
V
EN
[V]
30 40
Data Sheet 18 Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Application Information
6 Application Information
Note:
6.1
The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device.
Application Diagram
Supply
D
I1
I
I
I
D
I2
<45V
C
I2
C
I1
10μF 100nF
e.g. Ignition
EN
TLS810B1
GND
Q
I
Q
Regulated
Output Voltage
C
Q
1μF
Load
(e.g.
Micro
Controller)
GND
Figure 5 Application Diagram
6.2
Selection of External Components
6.2.1
Input Pin
The typical input circuitry for a linear voltage regulator is shown in the application diagram above.
A ceramic capacitor at the input, in the range of 100 nF to 470 nF, is recommended to filter out the high frequency disturbances imposed by the line for example ISO pulses 3a/b. This capacitor must be placed very close to the input pin of the linear voltage regulator on the PCB.
An aluminum electrolytic capacitor in the range of 10 µF to 470 µF is recommended as an input buffer to smooth out high energy pulses, such as ISO pulse 2a. This capacitor should be placed close to the input pin of the linear voltage regulator on the PCB.
An overvoltage suppressor diode can be used to further suppress any high voltage beyond the maximum rating of the linear voltage regulator and protect the device against any damage due to over-voltage.
The external components at the input are not mandatory for the operation of the voltage regulator, but they are recommended in case of possible external disturbances.
6.2.2
Output Pin
An output capacitor is mandatory for the stability of linear voltage regulators.
Data Sheet 19 Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Application Information
The requirement to the output capacitor is given in
“Functional Range” on Page 8
Output
Capacitor Series Resistor ESR(C
of the device.
) versus Output Current I
Page 14
shows the stable operation range
TLS810B1 is designed to be stable with extremely low ESR capacitors. According to the automotive environment, ceramic capacitors with X5R or X7R dielectrics are recommended.
The output capacitor should be placed as close as possible to the regulator’s output and GND pins and on the same side of the PCB as the regulator itself.
In case of rapid transients of input voltage or load current, the capacitance should be dimensioned in accordance and verified in the real application that the output stability requirements are fulfilled.
6.3
Thermal Considerations
Knowing the input voltage, the output voltage and the load profile of the application, the total power dissipation can be calculated:
P
D
=
(
V
I
–
V
Q
×
Q
+
V
I
×
I q
(6.1) with
• P
D
: continuous power dissipation
• V
I
: input voltage
• V
Q
: output voltage
• I
Q
: output current
• I q
: quiescent current
The maximum acceptable thermal resistance R thJA
can then be calculated:
R
=
T
P
D
–
T
---------------------------a with
• T j,max
: maximum allowed junction temperature
• T a
: ambient temperature
(6.2)
Based on the above calculation the proper PCB type and the necessary heat sink area can be determined with reference to the specification in
“Thermal Resistance” on Page 9
.
Example
Application conditions:
V
I
= 13.5 V
V
Q
= 3.3 V
I
Q
= 70 mA
T
a
= 105°C
Calculation of R thJA,max
:
P
D
= (V
I
– V
Q
) x I
Q
+ V
I
x I q
= (13.5 V – 3.3 V) x 70 mA + 13.5 V x 0.012 mA
Data Sheet 20 Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Application Information
= 0.714 W
R
thJA,max
= (T j,max
– T a
) / P
D
= (150°C – 105°C) / 0.714 W
= 63.03 K/W
As a result, the PCB design must ensure a thermal resistance R thJA
lower than 63.03 K/W. According to
“Thermal Resistance” on Page 9
, for both package variants PG-DSO-8 EP and PG-TSON-10 the FR4 2s2p
board can be used. Using the FR4 1s0p PCB with PG-DSO-8 EP at least 600 mm² heatsink is required.
6.4
Reverse Polarity Protection
TLS810B1 is not self protected against reverse polarity faults. To protect the device against negative supply
voltage, an external reverse polarity diode is needed, as shown in
Figure 5Figure 32
. The absolute maximum ratings of the device as specified in
“Absolute Maximum Ratings” on Page 7
must be kept.
6.5
Further Application Information
• For further information you may contact
http://www.infineon.com/
Data Sheet 21 Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Package Outlines
7 Package Outlines
+0 -0.1
0.41
±0.09
2)
1.27
C 0.0
8 C
S e a ting Pl a ne
0.2
M
C A-B D 8 x
3 .9
±0.1
1)
0.
3 5 x 45°
0.1
C D 2x
0.19
+0.06
D
6
±0.2
0.64
±0.25
0.2
M
D 8 x
8 5
A
Bottom View
3
±0.2
1 4
Index M a rking
B
1 4
4.9
±0.1
1)
0.1
C A-B 2x
8 5
1) Doe s not incl u de pl as tic or met a l protr us ion of 0.15 m a x. per s ide
2) D a m ba r protr us ion s h a ll b e m a xim u m 0.1 mm tot a l in exce ss of le a d width
3 ) JEDEC reference M S -012 v a ri a tion BA
Figure 6 PG-DSO-8 EP
Data Sheet
3 .
3
±0.1
Pin 1 M a rking
Z (4:1)
0.07 MIN.
0.05
0.1
±0.1
Z
22
0.
3 6
±0.1
2.5
8
±0.1
0.5
3
±0.1
0.5
±0.1
Pin 1 M a rking
0.25
±0.1
PG-T S ON-10-2-PO V02
Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Package Outlines
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant
(i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further information on alternative packages, please visit our website:
http://www.infineon.com/packages
.
Data Sheet 23
Dimensions in mm
Rev. 1.2
2016-12-20
TLS810B1xxV33
Ultra Low Quiescent Current Linear Voltage Regulator
Revision History
8 Revision History
Revision
1.2
1.1
1.0
Date Changes
2016-12-20 Template updated
2016-10-05 New variant TLS810B1EJV33 in PG-DSO-8 EP added
2016-03-10 Datasheet - Initial version
Data Sheet 24 Rev. 1.2
2016-12-20
Please read the Important Notice and Warnings at the end of this document
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Trademarks updated November 2015
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All referenced product or service names and trademarks are the property of their respective owners.
Edition 2016-12-20
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2016 Infineon Technologies AG.
All Rights Reserved.
Do you have a question about any aspect of this document?
Email: [email protected]
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With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party.
In addition, any information given in this document is subject to customer's compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer's products and any use of the product of
Infineon Technologies in customer's applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer's technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application.
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).
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