High-voltage high and low side driver

High-voltage high and low side driver
L6385E
High-voltage high and low side driver
Features
■
High voltage rail up to 600V
■
dV/dt immunity ±50V/nsec in full temperature
range
■
Driver current capability:
– 400mA source,
– 650mA sink
Switching times 50/30 nsec rise/fall with 1nF
load
■
CMOS/TTL Schmitt trigger inputs with
hysteresis and pull down
■
Under voltage lock out on lower and upper
driving section
■
Internal bootstrap diode
■
Outputs in phase with inputs
The L6385E is an high-voltage device,
manufactured with the BCD"OFF-LINE"
technology. It has an Half - Bridge Driver structure
that enables to drive independent referenced N
Channel Power MOS or IGBT. The High Side
(Floating) Section is enabled to work with voltage
Rail up to 600V. The Logic Inputs are CMOS/TTL
compatible for ease of interfacing with controlling
devices.
Block diagram
BOOTSTRAP DRIVER
VCC
3
UV
DETECTION
8
UV
DETECTION
2
LOGIC
LEVEL
SHIFTER
HVG
DRIVER
R
Cboot
HVG
7
S
OUT
VCC
LIN
Vboot
H.V.
R
HIN
SO-8
Description
■
Figure 1.
DIP-8
1
LVG
DRIVER
6
TO LOAD
5
LVG
4
GND
D97IN514B
October 2007
Rev 1
1/16
www.st.com
16
Contents
L6385E
Contents
1
Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4
3.1
AC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.2
DC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.3
Timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.1
CBOOT selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5
Typical characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
6
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2/16
L6385E
Electrical data
1
Electrical data
1.1
Absolute maximum ratings
Table 1.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
Vout
Output voltage
-3 to Vboot -18
V
Vcc
Supply voltage
- 0.3 to +18
V
Vboot
Floating supply voltage
-1 to 618
V
Vhvg
High sidegate output voltage
-1 to Vboot
V
Vlvg
Low side gate output voltage
-0.3 to Vcc +0.3
V
Logic input voltage
-0.3 to Vcc +0.3
V
Allowed output slew rate
50
V/ns
Total power dissipation (TJ = 85 °C)
750
mW
Tj
Junction temperature
150
°C
Ts
Storage temperature
-50 to 150
°C
Vi
dVout/dt
Ptot
Note:
ESD immunity for pins 6, 7 and 8 is guaranteed up to 900 V (Human Body Model)
1.2
Thermal data
Table 2.
Thermal data
Symbol
Rth(JA)
1.3
Parameter
Thermal Resistance Junction to ambient
SO-8
DIP-8
Unit
150
100
°C/W
Recommended operating conditions
Table 3.
Recommended operating conditions
Symbol
Pin
Vout
6
VBS
(2)
8
TJ
3
Test condition
Min
Typ
Max
Unit
Output voltage
(1)
580
V
Floating supply voltage
(1)
17
V
400
kHz
17
V
125
°C
Switching frequency
fsw
Vcc
Parameter
HVG,LVG load CL = 1nF
Supply voltage
Junction temperature
-45
1. If the condition Vboot - Vout < 18V is guaranteed, Vout can range from -3 to 580V
2. VBS = Vboot - Vout
3/16
Pin connection
2
L6385E
Pin connection
Figure 2.
Pin connection (Top view)
LIN
1
8
Vboot
HIN
2
7
HVG
VCC
3
6
OUT
GND
4
5
LVG
D97IN517A
Table 4.
Pin description
N°
Pin
Type
Function
1
LIN
I
Low side driver logic input
2
HIN
I
High side driver logic input
3
Vcc
4
GND
5
LVG (1)
O
Low side driver output
6
VOUT
O
High side driver floating reference
7
HVG (1)
O
High side driver output
8
Vboot
Low voltage power supply
Ground
Bootstrap supply voltage
1. The circuit guarantees 0.3V maximum on the pin (@ Isink = 10mA). This allows to omit the "bleeder"
resistor connected between the gate and the source of the external MOSFET normally used to hold the pin
low.
4/16
L6385E
Electrical characteristics
3
Electrical characteristics
3.1
AC operation
Table 5.
Symbol
3.2
AC operation electrical characteristcs (VCC = 15V; TJ = 25°C)
Pin
Parameter
Test condition
Min
Typ
Max
Unit
ton
1 vs 5 High/low side driver turn-on
2 vs 7 propagation delay
Vout = 0V
110
ns
toff
1 vs 5 High/low side driver turn-off
2 vs 7 propagation delay
Vout = 0V
105
ns
tr
5, 7
Rise time
CL = 1000pF
50
ns
tf
5, 7
Fall time
CL = 1000pF
30
ns
DC operation
Table 6.
Symbol
DC operation electrical characteristcs (VCC = 15V; TJ = 25°C)
Pin
Parameter
Test condition
Min
Typ
Max
Unit
17
V
Low supply voltage section
Vcc
Supply voltage
Vccth1
Vcc UV turn on threshold
9.1
9.6
10.1
V
Vccth2
Vcc UV turn off threshold
7.9
8.3
8.8
V
Vcchys
Vcc UV hysteresis
3
1.3
V
Iqccu
Undervoltage quiescent
supply current
Vcc ≤ 9V
150
220
µA
Iqcc
Quiescent current
Vin = 15V
250
320
µA
Rdson
Bootstrap driver on
resistance (1)
Vcc ≥12.5V
125
Ω
Bootstrapped supply voltage section
VBS
Bootstrap supply voltage
VBSth1
VBS UV turn on threshold
8.5
VBSth2
VBS UV turn off threshold
7.2
VBShys
8
IQBS
ILK
VBS UV hysteresis
17
V
9.5
10.5
V
8.2
9.2
V
1.3
V
VBS quiescent current
HVG ON
200
µA
High voltage leakage current
Vhvg = Vout =
Vboot = 600V
10
µA
High/low side driver
Iso
Isi
Source short circuit current
VIN = Vih (tp < 10µs)
300
400
mA
Sink short circuit current
VIN = Vil (tp < 10µs)
450
650
mA
5,7
5/16
Electrical characteristics
Table 6.
Symbol
L6385E
DC operation electrical characteristcs (continued)(VCC = 15V; TJ = 25°C)
Pin
Parameter
Test condition
Min
Typ
Max
Unit
1.5
V
Logic inputs
Low level logic threshold
voltage
Vil
1, 2
High level logic threshold
voltage
Vih
Iih
Iil
1, 2
3.6
High level logic input current VIN = 15V
Low level logic input current
50
VIN = 0V
1. RDS(on) is tested in the following way:
( V CC – V CBOOT1 ) – ( V CC – V CBOOT2 )
R DSON = -----------------------------------------------------------------------------------------------------I 1 ( V CC ,V CBOOT1 ) – I 2 ( V CC ,V CBOOT2 )
where I1 is pin 8 current when VCBOOT = VCBOOT1, I2 when VCBOOT = VCBOOT2
3.3
Timing diagram
Figure 3.
Input/output timing diagram
HIN
HVG
LIN
LVG
D99IN1053
6/16
V
70
µA
1
µA
L6385E
4
Bootstrap driver
Bootstrap driver
A bootstrap circuitry is needed to supply the high voltage section. This function is normally
accomplished by a high voltage fast recovery diode (Figure 4 a). In the L6385E a patented
integrated structure replaces the external diode. It is realized by a high voltage DMOS,
driven synchronously with the low side driver (LVG), with in series a diode, as shown in
Figure 4 b. An internal charge pump (Figure 4 b) provides the DMOS driving voltage. The
diode connected in series to the DMOS has been added to avoid undesirable turn on of it.
4.1
CBOOT selection and charging
To choose the proper CBOOT value the external MOS can be seen as an equivalent
capacitor. This capacitor CEXT is related to the MOS total gate charge:
Q gate
C EXT = -------------V gate
The ratio between the capacitors CEXT and CBOOT is proportional to the cyclical voltage loss.
It has to be:
CBOOT>>>CEXT
e.g.: if Qgate is 30nC and Vgate is 10V, CEXT is 3nF. With CBOOT = 100nF the drop would be
300mV.
If HVG has to be supplied for a long time, the CBOOT selection has to take into account also
the leakage losses.
e.g.: HVG steady state consumption is lower than 200µA, so if HVG TON is 5ms, CBOOT has
to supply 1µC to CEXT. This charge on a 1µF capacitor means a voltage drop of 1V.
The internal bootstrap driver gives great advantages: the external fast recovery diode can
be avoided (it usually has great leakage current).
This structure can work only if VOUT is close to GND (or lower) and in the meanwhile the
LVG is on. The charging time (Tcharge ) of the CBOOT is the time in which both conditions are
fulfilled and it has to be long enough to charge the capacitor.
The bootstrap driver introduces a voltage drop due to the DMOS RDSON (typical value: 125
Ω). At low frequency this drop can be neglected. Anyway increasing the frequency it must be
taken in to account.
The following equation is useful to compute the drop on the bootstrap DMOS:
Q gate
V drop = I ch arg e R dson → V drop = ------------------- R dson
T ch arg e
where Qgate is the gate charge of the external power MOS, Rdson is the on resistance of the
bootstrap DMOS, and Tcharge is the charging time of the bootstrap capacitor.
7/16
Bootstrap driver
L6385E
For example: using a power MOS with a total gate charge of 30nC the drop on the bootstrap
DMOS is about 1V, if the Tcharge is 5µs. In fact:
30nC
V drop = --------------- ⋅ 125Ω ∼ 0.8V
5µs
Vdrop has to be taken into account when the voltage drop on CBOOT is calculated: if this drop
is too high, or the circuit topology doesn’t allow a sufficient charging time, an external diode
can be used.
Figure 4.
Bootstrap driver
DBOOT
VS
VBOOT
VBOOT
VS
H.V.
HVG
H.V.
HVG
CBOOT
VOUT
VOUT
TO LOAD
TO LOAD
LVG
LVG
a
8/16
CBOOT
b
D99IN1056
L6385E
Typical characteristic
Figure 5.
Typical rise and fall times vs
load capacitance
time
(nsec)
D99IN1054
250
Figure 6.
Quiescent current vs supply
voltage
Iq
(µA)
104
D99IN1055
200
Tr
103
150
Tf
100
102
50
0
10
0
1
2
3
4
5 C (nF)
For both high and low side buffers @25˚C Tamb
Figure 7.
Turn on time vs temperature
6
8
10
12
14
16 VS(V)
Turn Off time vs temperature
250
@ Vcc = 15V
@ Vcc = 15V
200
150
150
Toff (ns)
Ton (ns)
4
Figure 8.
200
Typ.
100
Typ.
100
50
50
0
-45
-25
Figure 9.
0
25
50
Tj (°C)
75
100
0
125
-45
-25
0
25
50
Tj (°C)
75
100
125
VBOOT UV turn On threshold Figure 10. Vcc UV turn Off threshold vs
vs temperature
temperature
11
13
@ Vcc = 15V
12
10
11
Typ.
Vccth2(V)
10
2
0
250
Vbth1 (V)
5
Typical characteristic
9
8
7
9
Typ.
8
7
6
6
5
-45
-25
0
25
50
Tj (°C)
75
100
125
-45
-25
0
25
50
Tj (°C)
75
100 125
9/16
Typical characteristic
L6385E
Figure 11. VBOOT UV turn Off threshold
vs temperature
Figure 12. Output source current vs
temperature
1000
14
@ Vcc = 15V
@ Vcc = 15V
13
800
current (mA)
Vbth2 (V)
12
11
10
9
8
7
600
Typ.
400
200
Typ.
0
6
-45
-25
0
25
50
75
100
-45
125
-25
0
25
50
Tj (°C)
75
100
125
Figure 13. Vcc UV turn On threshold vs Figure 14. Output sink current vs
temperature
temperature
13
1000
@ Vcc = 15V
800
current (mA)
Vccth1(V)
12
11
10
9
Typ.
Typ.
400
200
8
0
7
-45
10/16
600
-25
0
25
50
Tj (°C)
75
100
125
-45
-25
0
25
50
Tj (°C)
75
100
125
L6385E
6
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
11/16
Package mechanical data
L6385E
Figure 15. DIP-8 mechanical data and package dimensions
mm
inch
DIM.
MIN.
A
TYP.
MIN.
3.32
TYP.
MAX.
0.51
B
1.15
1.65
0.045
0.065
b
0.356
0.55
0.014
0.022
b1
0.204
0.304
0.008
0.012
E
0.020
10.92
7.95
9.75
0.430
0.313
0.384
e
2.54
0.100
e3
7.62
0.300
e4
7.62
0.300
F
6.6
0.260
I
5.08
0.200
L
Z
3.18
OUTLINE AND
MECHANICAL DATA
0.131
a1
D
12/16
MAX.
3.81
1.52
0.125
0.150
0.060
DIP-8
L6385E
Package mechanical data
Figure 16. SO-8 mechanical data and package dimensions
mm
inch
DIM.
MIN.
TYP.
A
MAX.
MIN.
TYP.
1.750
MAX.
0.0689
A1
0.100
0.250 0.0039
A2
1.250
0.0492
b
0.280
0.480 0.0110
0.0189
c
0.170
0.0098
0.230 0.0067
0.0091
4.800
4.900
5.000 0.1890 0.1929 0.1969
E
5.800
6.000
6.200 0.2283 0.2362 0.2441
E1(2)
3.800
3.900
4.000 0.1496 0.1535 0.1575
D
(1)
e
1.270
0.0500
h
0.250
0.500 0.0098
0.0197
L
0.400
1.270 0.0157
0.0500
L1
k
ccc
1.040
0˚
OUTLINE AND
MECHANICAL DATA
0.0409
8˚
0.100
0˚
8˚
0.0039
Notes: 1. Dimensions D does not include mold flash,
protrusions or gate burrs.
Mold flash, potrusions or gate burrs shall not
exceed 0.15mm in total (both side).
2. Dimension “E1” does not include interlead flash
or protrusions. Interlead flash or protrusions shall
not exceed 0.25mm per side.
SO-8
0016023 D
13/16
Order codes
7
L6385E
Order codes
Table 7.
14/16
Order codes
Part number
Package
Packaging
L6385E
DIP-8
Tube
L6385ED
SO-8
Tube
L6385ED013TR
SO-8
Tape and reel
L6385E
8
Revision history
Revision history
Table 8.
Document revision history
Date
Revision
11-Oct-2007
1
Changes
First release
15/16
L6385E
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