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OPA188-Q1, OPA2188-Q1
ZHCSG98 – APRIL 2017
OPAx188-Q1 高精度、低噪声、轨至轨输出、36V、
、零漂移、汽车级
运算放大器
1 特性
•
•
1
•
•
•
•
•
•
•
•
•
•
•
2 应用
符合汽车应用 应用认证
具有符合 AEC-Q100 标准的下列结果:
– OPA188-Q1 器件温度等级 1:
–40°C 至 +125°C
– OPA2188-Q1 器件温度等级 2:
–40°C 至 +105°C
– 器件人体模型 (HBM) 静电放电 (ESD) 分类等级
1C
– 带电器件模型 (CDM) ESD 分类等级 C5
宽电源电压:±2V 至 ±18V
低偏移电压:25μV(最大值)
零漂移:0.03μV/°C
低噪声:8.8 nV/√Hz
– 0.1Hz 至 10Hz 噪声:0.25μVPP
出色的 DC 精度:
– 电源抑制比 (PSRR);142dB
– 共模抑制比 (CMRR):146dB
– 开环路增益:136dB
增益带宽:2MHz
静态电流:510μA(最大值)
宽电源电压:±2V 至 ±18V
轨至轨输出
输入包括负电源轨
已过滤射频干扰 (RFI) 的输入
•
•
•
HEV/EV 动力总成
– 直流/直流转换器
– 牵引逆变器
高精度安全和感应
(制动、位置和载客检测)
高精度监控和监视
3 说明
OPAx188-Q1 运算放大器系列采用 TI 的专有零漂移技
术,以提供低偏移电压(最大为 25μV)并随时间推移
和温度变化而实现接近零漂移的性能。此高精度低静态
电流微型放大器系列提供高输入阻抗和摆幅为电源轨
15mV 之内的轨到轨输出。输入共模范围包括负电源
轨。单电源或双电源可在 4V 至 36V(±2V 至 ±18V)
范围内使用。
OPA188-Q1 和 OPA2188-Q1 均采用 VSSOP-8 封
装。单通道版本
(OPA188-Q1) 的完整额定工作温度范围为 -40°C 至
+125°C,双通道版本 (OPA2188-Q1) 的完整额定工作
温度范围为 -40°C 至 +105°C。
器件信息(1)
器件型号
OPA188-Q1
OPA2188-Q1
封装
VSSOP (8)
封装尺寸(标称值)
3.00mm × 3.00mm
(1) 要了解所有可用封装,请参阅数据表末尾的封装选项附录。
偏移电压产品分布
20
Data Taken From 3 Unique Fab Lots
Percentage of Amplifiers (%)
18
16
14
12
10
8
6
4
2
-20
-18
-16
-14
-12
-10
-8
-6
-4
-2
0
2
4
6
8
10
12
14
16
18
20
0
Offset Voltage (mV)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SBOS860
OPA188-Q1, OPA2188-Q1
ZHCSG98 – APRIL 2017
www.ti.com.cn
目录
1
2
3
4
5
特性 ..........................................................................
应用 ..........................................................................
说明 ..........................................................................
修订历史记录 ...........................................................
Device Comparison Table.....................................
6
7
Pin Configuration and Functions ......................... 4
Specifications......................................................... 6
8.3 Feature Description................................................. 19
8.4 Device Functional Modes........................................ 22
1
1
1
2
3
9
9.1 Application Information............................................ 23
9.2 Typical Applications ................................................ 23
10 Power Supply Recommendations ..................... 27
11 Layout................................................................... 28
5.1 Portfolio Comparison................................................. 3
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
8
Application and Implementation ........................ 23
11.1 Layout Guidelines ................................................. 28
11.2 Layout Example .................................................... 28
Absolute Maximum Ratings ...................................... 6
ESD Ratings.............................................................. 6
Recommended Operating Conditions....................... 6
Thermal Information .................................................. 6
Electrical Characteristics: High-Voltage Operation .. 7
Electrical Characteristics: Low-Voltage Operation... 9
Typical Characteristics: Table of Graphs ................ 11
Typical Characteristics ............................................ 12
12 器件和文档支持 ..................................................... 29
12.1
12.2
12.3
12.4
12.5
12.6
12.7
12.8
Detailed Description ............................................ 18
8.1 Overview ................................................................. 18
8.2 Functional Block Diagram ....................................... 18
器件支持................................................................
文档支持................................................................
相关链接................................................................
接收文档更新通知 .................................................
社区资源................................................................
商标 .......................................................................
静电放电警告.........................................................
Glossary ................................................................
29
29
29
29
29
30
30
30
13 机械、封装和可订购信息 ....................................... 30
4 修订历史记录
2
日期
修订版本
注释
2017 年 4 月
*
最初发布版本
Copyright © 2017, Texas Instruments Incorporated
OPA188-Q1, OPA2188-Q1
www.ti.com.cn
ZHCSG98 – APRIL 2017
5 Device Comparison Table
5.1 Portfolio Comparison
Table 1. Zero-Drift Amplifier Portfolio
VERSION
Single
Dual
Quad
PRODUCT
OFFSET VOLTAGE
(µV, maximum)
OFFSET VOLTAGE DRIFT
(µV/°C, maximum)
BANDWIDTH
(MHz)
INPUT VOLTAGE NOISE
(µVPP, f = 0.1 Hz to 10 Hz)
OPA188-Q1 (4 V to 36 V)
±25
±0.085
2
0.25
OPA333 (5 V)
±10
±0.05
0.35
1.1
OPA378 (5 V)
±50
±0.25
0.9
0.4
OPA735 (12 V)
±5
±0.05
1.6
2.5
OPA2188-Q1 (4 V to 36 V)
±25
±0.085
2
0.25
OPA2333 (5 V)
±10
±0.05
0.35
1.1
OPA2378 (5 V)
±50
±0.25
0.9
0.4
OPA2735 (12 V)
±5
±0.05
1.6
2.5
OPA4330 (5 V)
±50
±0.25
0.35
1.1
Copyright © 2017, Texas Instruments Incorporated
3
OPA188-Q1, OPA2188-Q1
ZHCSG98 – APRIL 2017
www.ti.com.cn
6 Pin Configuration and Functions
OPA188-Q1 DGK Package
8-Pin VSSOP
Top View
(1)
NC = no connection.
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
+IN
3
I
Noninverting input
–IN
2
I
Inverting input
NC
1, 5, 8
—
No internal connection (can be left floating)
OUT
6
O
Output
V+
7
—
Positive (highest) power supply
V–
4
—
Negative (lowest) power supply
4
Copyright © 2017, Texas Instruments Incorporated
OPA188-Q1, OPA2188-Q1
www.ti.com.cn
ZHCSG98 – APRIL 2017
OPA2188-Q1 DGK Package
8-Pin VSSOP
Top View
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
+IN A
3
I
Noninverting input, channel A
+IN B
5
I
Noninverting input, channel B
–IN A
2
I
Inverting input, channel A
–IN B
6
I
Inverting input, channel B
OUT A
1
O
Output, channel A
OUT B
7
O
Output, channel B
V+
8
—
Positive (highest) power supply
V–
4
—
Negative (lowest) power supply
Copyright © 2017, Texas Instruments Incorporated
5
OPA188-Q1, OPA2188-Q1
ZHCSG98 – APRIL 2017
www.ti.com.cn
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
Supply
Signal input pins
(2)
Signal input pins
(2)
40
(V–) – 0.5
±0.7
±10
OPA2188-Q1, TJ
Storage, Tstg
(2)
(3)
mA
Continuous
OPA188-Q1, TJ
(1)
V
(V+) + 0.5
Differential
Output short-circuit (3)
Temperature
UNIT
±20
Single-supply
Voltage
Current
MAX
Split-supply
–65
150
°C
125
°C
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails should
be current-limited to 10 mA or less.
Short-circuit to ground, V– or V+.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
Electrostatic discharge
Human-body model (HBM), per AEC Q100-002
(1)
±1500
Charged-device model (CDM), per AEC Q100-011
±750
UNIT
V
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) RL = 10 kΩ connected to VS / 2
2 (1)
MIN
VS
TA
(1)
, and VCM = VOUT = VS /
NOM
MAX
±2
±18
4
36
OPA188-Q1 Temperature Grade 1: Specified temperature range
–40
125
OPA2188-Q1 Temperature Grade 2: Specified temperature range
–40
105
Operating voltage range
Split–supply
(1)
Single–supply
UNIT
V
°C
VS / 2 = midsupply.
7.4 Thermal Information
THERMAL METRIC (1)
OPA188-Q1
OPA2188-Q1
DGK (VSSOP)
DGK (VSSOP)
8 PINS
8 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
171.7
163.2
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
62.7
57.4
°C/W
RθJB
Junction-to-board thermal resistance
93.0
83.4
°C/W
ψJT
Junction-to-top characterization parameter
9.0
6.6
°C/W
ψJB
Junction-to-board characterization parameter
91.4
82.0
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
N/A
°C/W
(1)
6
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
Copyright © 2017, Texas Instruments Incorporated
OPA188-Q1, OPA2188-Q1
www.ti.com.cn
7.5
ZHCSG98 – APRIL 2017
Electrical Characteristics: High-Voltage Operation
at TA = 25°C, VS = ±4 V to ±18 V (VS = 8 V to 36 V), RL = 10 kΩ connected to VS / 2
(unless otherwise noted)
PARAMETER
CONDITIONS
(1)
, and VCM = VOUT = VS / 2 (1)
MIN
TYP
MAX
UNIT
μV
OFFSET VOLTAGE
VOS
Input offset voltage
dVIO/dT
PSRR
Input offset voltage drift
Power-supply rejection ratio
±6
±25
OPA188-Q1
TA = –40°C to 125°C
±0.03
±0.085
μV/°C
OPA2188-Q1
TA = –40°C to 105°C
±0.03
±0.085
μV/°C
OPA188-Q1
VS = 4 V to 36 V
TA = –40°C to 125°C
±0.075
±0.3
μV/V
OPA2188-Q1
VS = 4 V to 36 V
TA = –40°C to 105°C
±0.075
±0.3
μV/V
Long-term stability (2)
4
μV
INPUT BIAS CURRENT
VCM = VS / 2
IB
Input bias current
±1400
pA
OPA188-Q1
TA = –40°C to 125°C
±160
±18
nA
OPA2188-Q1
TA = –40°C to 105°C
±18
nA
VCM = VS / 2
IOS
Input offset current
±2800
pA
OPA188-Q1
TA = –40°C to 125°C
±320
±6
nA
OPA2188-Q1
TA = –40°C to 105°C
±6
nA
NOISE
en
f = 0.1 Hz to 10 Hz
250
nVPP
f = 0.1 Hz to 10 Hz
40
nVrms
Input voltage noise density
f = 1 kHz
8.8
nV/√Hz
Input current noise density
f = 1 kHz
7
fA/√Hz
Input voltage noise
in
INPUT VOLTAGE RANGE
VCM
Common-mode voltage range
CMRR
Common-mode rejection ratio
OPA188-Q1
TA = –40°C to 125°C
V–
(V+) – 1.5
V
OPA2188-Q1
TA = –40°C to 105°C
V–
(V+) – 1.5
V
(V–) < VCM < (V+) – 1.5 V
120
134
dB
(V–) + 0.5 V < VCM < (V+) – 1.5 V
VS = ±18 V
130
146
dB
OPA188-Q1
(V–) + 0.5 V < VCM < (V+) – 1.5 V
VS = ±18 V, TA = –40°C to 125°C
120
126
dB
OPA2188-Q1
(V–) + 0.5 V < VCM < (V+) – 1.5 V
VS = ±18 V, TA = –40°C to 105°C
120
126
dB
INPUT IMPEDANCE
ZID
Differential
100 || 6
MΩ || pF
ZIC
Common-mode
6 || 9.5
1012 Ω || pF
OPEN-LOOP GAIN
AOL
Open-loop voltage gain
(V–) + 0.5 V < VO < (V+) – 0.5 V
130
136
dB
OPA188-Q1
(V–) + 0.5 V < VO < (V+) – 0.5 V
TA = –40°C to 125°C
120
126
dB
OPA2188-Q1
(V–) + 0.5 V < VO < (V+) – 0.5 V
TA = –40°C to 105°C
120
126
dB
FREQUENCY RESPONSE
(1)
(2)
VS / 2 = midsupply.
1000-hour life test at 125°C demonstrated randomly distributed variation in the range of measurement limits at approximately 4 μV.
Copyright © 2017, Texas Instruments Incorporated
7
OPA188-Q1, OPA2188-Q1
ZHCSG98 – APRIL 2017
www.ti.com.cn
Electrical Characteristics: High-Voltage Operation (continued)
at TA = 25°C, VS = ±4 V to ±18 V (VS = 8 V to 36 V), RL = 10 kΩ connected to VS / 2
(unless otherwise noted)
PARAMETER
CONDITIONS
GBW
Gain-bandwidth product
SR
Slew rate
(1)
, and VCM = VOUT = VS / 2(1)
MIN
TYP
MAX
UNIT
2
MHz
G=1
0.8
V/μs
0.1%
VS = ±18 V, G = 1, 10-V step
20
μs
0.01%
VS = ±18 V, G = 1, 10-V step
27
μs
1
μs
tS
Settling time
tOR
Overload recovery time
VIN × G = VS
THD+N
Total harmonic distortion + noise
1 kHz, G = 1, VOUT = 1 VRMS
0.0001%
OUTPUT
No load
Voltage output swing from rail
ISC
Short-circuit current
RO
Open-loop output resistance
CLOAD
Capacitive load drive
6
15
mV
RL = 10 kΩ
220
250
mV
OPA188-Q1
RL = 10 kΩ, TA = –40°C to 125°C
310
350
mV
OPA2188-Q1
RL = 10 kΩ, TA = –40°C to 105°C
310
350
mV
Sinking
–18
mA
16
mA
Sourcing
f = 1 MHz, IO = 0 mA
120
Ω
1
nF
POWER SUPPLY
VS = ±4 V to VS = ±18 V
IQ
8
Quiescent current (per amplifier)
510
μA
OPA188-Q1
IO = 0 mA
TA = –40°C to 125°C
450
600
μA
OPA2188-Q1
IO = 0 mA
TA = –40°C to 105°C
600
μA
Copyright © 2017, Texas Instruments Incorporated
OPA188-Q1, OPA2188-Q1
www.ti.com.cn
7.6
ZHCSG98 – APRIL 2017
Electrical Characteristics: Low-Voltage Operation
at TA = 25°C, VS = ±2 V to < ±4 V (VS = 4 V to < 8 V), RL = 10 kΩ connected to VS / 2 (1), and VCM = VOUT = VS / 2 (1)
(unless otherwise noted)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
μV
OFFSET VOLTAGE
VOS
Input offset voltage
dVIO/dT
PSRR
Input offset voltage drift
Power-supply rejection ratio
±6
±25
OPA188-Q1
TA = –40°C to 125°C
±0.03
±0.085
μV/°C
OPA2188-Q1
TA = –40°C to 105°C
±0.03
±0.085
μV/°C
OPA188-Q1
VS = 4 V to 36 V
TA = –40°C to 125°C
0.075
0.3
μV/V
OPA2188-Q1
VS = 4 V to 36 V
TA = –40°C to 105°C
0.075
0.3
μV/V
Long-term stability (2)
4
μV
INPUT BIAS CURRENT
±160
IB
Input bias current
±1400
pA
OPA188-Q1
TA = –40°C to 125°C
±18
nA
OPA2188-Q1
TA = –40°C to 105°C
±18
nA
±320
IOS
Input offset current
±2800
pA
OPA188-Q1
TA = –40°C to 125°C
±6
nA
OPA2188-Q1
TA = –40°C to 105°C
±6
nA
NOISE
en
f = 0.1 Hz to 10 Hz
250
nVPP
f = 0.1 Hz to 10 Hz
40
nVrms
Input voltage noise density
f = 1 kHz
8.8
nV/√Hz
Input current noise density
f = 1 kHz
7
fA/√Hz
Input voltage noise
in
INPUT VOLTAGE RANGE
VCM
Common-mode voltage range
CMRR
Common-mode rejection ratio
OPA188-Q1
TA = –40°C to 125°C
V–
(V+) – 1.5
V
OPA2188-Q1
TA = –40°C to 105°C
V–
(V+) – 1.5
V
(V–) < VCM < (V+) – 1.5 V
106
114
dB
(V–) + 0.5 V < VCM < (V+) – 1.5 V
VS = ±2 V
114
120
dB
OPA188-Q1
(V–) + 0.5 V < VCM < (V+) – 1.5 V
VS = ±2 V, TA = –40°C to 125°C
110
120
dB
OPA2188-Q1
(V–) + 0.5 V < VCM < (V+) – 1.5 V
VS = ±2 V, TA = –40°C to 105°C
110
120
dB
INPUT IMPEDANCE
ZID
Differential
100 || 6
MΩ || pF
ZIC
Common-mode
6 || 9.5
1012 Ω || pF
OPEN-LOOP GAIN
(1)
(2)
VS / 2 = midsupply.
1000-hour life test at 125°C demonstrated randomly distributed variation in the range of measurement limits at approximately 4 μV.
Copyright © 2017, Texas Instruments Incorporated
9
OPA188-Q1, OPA2188-Q1
ZHCSG98 – APRIL 2017
www.ti.com.cn
Electrical Characteristics: Low-Voltage Operation (continued)
at TA = 25°C, VS = ±2 V to < ±4 V (VS = 4 V to < 8 V), RL = 10 kΩ connected to VS / 2(1), and VCM = VOUT = VS / 2(1)
(unless otherwise noted)
PARAMETER
AOL
Open-loop voltage gain
MIN
TYP
(V–) + 0.5 V < VO < (V+) – 0.5 V
RL = 5 kΩ
CONDITIONS
MAX
UNIT
110
120
dB
(V–) + 0.5 V < VO < (V+) – 0.5 V
120
130
dB
OPA188-Q1
(V–) + 0.5 V < VO < (V+) – 0.5 V
TA = –40°C to 125°C
110
120
dB
OPA2188-Q1
(V–) + 0.5 V < VO < (V+) – 0.5 V
TA = –40°C to 105°C
110
120
dB
FREQUENCY RESPONSE
GBW
Gain-bandwidth product
SR
Slew rate
G=1
tOR
Overload recovery time
VIN × G = VS
THD+N
Total harmonic distortion + noise
1 kHz, G = 1, VOUT = 1 VRMS
2
MHz
0.8
V/μs
1
μs
0.0001%
OUTPUT
No load
Voltage output swing from rail
ISC
Short-circuit current
RO
Open-loop output resistance
CLOAD
Capacitive load drive
6
15
mV
RL = 10 kΩ
220
250
mV
OPA188-Q1
RL = 10 kΩ, TA = –40°C to 125°C
310
350
mV
OPA2188-Q1
RL = 10 kΩ, TA = –40°C to 105°C
310
350
mV
Sinking
–18
mA
16
mA
Sourcing
f = 1 MHz, IO = 0 mA
120
Ω
1
nF
POWER SUPPLY
VS = ±2 V to VS = ±4 V
IQ
10
Quiescent current (per amplifier)
485
μA
OPA188-Q1
IO = 0 mA
TA = –40°C to 125°C
425
575
μA
OPA2188-Q1
IO = 0 mA
TA = –40°C to 105°C
575
μA
版权 © 2017, Texas Instruments Incorporated
OPA188-Q1, OPA2188-Q1
www.ti.com.cn
ZHCSG98 – APRIL 2017
7.7 Typical Characteristics: Table of Graphs
7.7.1 Table of Graphs
表 2. Typical Characteristic Graphs
DESCRIPTION
FIGURE
Offset Voltage Production Distribution
图1
Offset Voltage Drift Distribution
图2
Offset Voltage vs Temperature
Offset Voltage vs Common-Mode Voltage
图3
图 4, 图 5
Offset Voltage vs Power Supply
图6
Open-Loop Gain and Phase vs Frequency
图7
Closed-Loop Gain vs Frequency
图8
IB and IOS vs Common-Mode Voltage
图9
Input Bias Current vs Temperature
图 10
Output Voltage Swing vs Output Current (Maximum Supply)
图 11
CMRR and PSRR vs Frequency (Referred-to-Input)
图 12
CMRR vs Temperature
图 13, 图 14
PSRR vs Temperature
图 15
0.1-Hz to 10-Hz Noise
图 16
Input Voltage Noise Spectral Density vs Frequency
图 17
THD+N Ratio vs Frequency
图 18
THD+N vs Output Amplitude
图 19
Quiescent Current vs Supply Voltage
图 20
Quiescent Current vs Temperature
图 21
Open-Loop Gain vs Temperature
图 22
Open-Loop Output Impedance vs Frequency
图 23
Small-Signal Overshoot vs Capacitive Load (100-mV Output Step)
图 24, 图 25
No Phase Reversal
图 26
Positive Overload Recovery
图 27
Negative Overload Recovery
图 28
Small-Signal Step Response (100 mV)
图 29, 图 30
Large-Signal Step Response
图 31, 图 32
Large-Signal Settling Time (10-V Positive Step)
图 33
Large-Signal Settling Time (10-V Negative Step)
图 34
Short-Circuit Current vs Temperature
Maximum Output Voltage vs Frequency
图 35
EMIRR IN+ vs Frequency
图 36
版权 © 2017, Texas Instruments Incorporated
11
OPA188-Q1, OPA2188-Q1
ZHCSG98 – APRIL 2017
www.ti.com.cn
7.8 Typical Characteristics
at VS = ±18 V, VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2, and CL = 100 pF (unless otherwise noted)
40
Data Taken From 3 Unique Fab Lots
Data Taken From 3 Unique Fab Lots
Percentage of Amplifiers (%)
16
14
12
10
8
6
4
35
30
25
20
15
10
5
2
图 1. Offset Voltage Production Distribution
0.09
0.08
0.07
0.06
图 2. Offset Voltage Drift Distribution
15
5 Typical Units Shown
VS = ±18 V
5 Typical Units Shown
VS = ±2 V
10
5
VOS (mV)
5
VOS (mV)
0.05
Offset Voltage Drift (mV/°C)
15
10
0.04
0.01
-20
-18
-16
-14
-12
-10
-8
-6
-4
-2
0
2
4
6
8
10
12
14
16
18
20
Offset Voltage (mV)
0.1
0
0
0.03
Percentage of Amplifiers (%)
18
0.02
20
0
0
-5
-5
-10
-10
-15
-2.5
-15
-55
-35
-15
5
25
45
65
85
105
125
-2
-1.5
-1
-0.5
0
0.5
1
1.5
2
2.5
VCM (V)
Temperature (°C)
OPA188-Q1 is specified from TA = –40°C to +125°C
OPA2188-Q1 is specified from TA = –40°C to +105°C
图 3. Offset Voltage vs Temperature
15
10
图 4. Offset Voltage vs Common-Mode Voltage
15
5 Typical Units Shown
VS = ±18 V
5
VOS (mV)
VOS (mV)
5
0
0
-5
-5
-10
-10
-15
-15
-20
-15
-10
-5
0
5
10
15
VCM (V)
图 5. Offset Voltage vs Common-Mode Voltage
12
5 Typical Units Shown
VSUPPLY = ±2 V to ±18 V
10
20
0
2
4
6
8
10
12
14
16
18
20
VSUPPLY (V)
图 6. Offset Voltage vs Power Supply
版权 © 2017, Texas Instruments Incorporated
OPA188-Q1, OPA2188-Q1
www.ti.com.cn
ZHCSG98 – APRIL 2017
Typical Characteristics (接
接下页)
at VS = ±18 V, VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2, and CL = 100 pF (unless otherwise noted)
140
25
0
GBW = 2MHz
Dominant Pole @7mHz
120
Gain
20
Phase
90
60
40
10
Gain (dB)
80
Phase (ƒ)
Gain (dB)
15
45
100
5
0
-5
135
20
-10
0
180
10M
±20
1
10
100
1k
10k
100k
1M
G = 10
G = +1
G = -1
-15
-20
10k
C007
100k
1M
10M
Frequency (Hz)
图 7. Open-Loop Gain and Phase vs Frequency
图 8. Closed-Loop Gain vs Frequency
4000
500
IB+
IB-
300
IOS
IB-
3000
IOS
Input Bias Current (pA)
IB and IOS (pA)
IB+
400
200
100
0
-100
2000
1000
0
-1000
-200
-2000
-300
-20
-15
-10
0
-5
5
10
15
-55
20
-35
-15
5
25
45
65
85
105
125
Temperature (°C)
VCM (V)
OPA188-Q1 is specified from TA = –40°C to +125°C
OPA2188-Q1 is specified from TA = –40°C to +105°C
图 10. Input Bias Current vs Temperature
160
Common-Mode Rejection Ratio (dB),
Power-Supply Rejection Ratio (dB)
Output Voltage (V)
图 9. IB and IOS vs Common-Mode Voltage
(V+) + 2
(V+) + 1
(V+)
(V+) - 1
(V+) - 2
(V+) - 3
(V+) - 4
(V-) + 4
(V-) + 3
(V-) + 2
(V-) + 1
(V-)
(V-) - 1
(V-) - 2
-40°C
+25°C
+125°C
140
120
100
80
60
40
+PSRR
-PSRR
CMRR
20
0
0
2
4
6
8
10
12
14
16
18
20
22
Output Current (mA)
24
1
10
100
1k
10k
100k
1M
Frequency (Hz)
OPA188-Q1 is specified from TA = –40°C to +125°C
OPA2188-Q1 is specified from TA = –40°C to +105°C
图 11. Output Voltage Swing vs
Output Current (Maximum Supply)
版权 © 2017, Texas Instruments Incorporated
图 12. CMRR and PSRR vs Frequency
(Referred-to-Input)
13
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ZHCSG98 – APRIL 2017
www.ti.com.cn
Typical Characteristics (接
接下页)
40
(V-) < VCM < (V+) - 1.5 V
35
(V-) + 0.5 V < VCM < (V+) - 1.5 V
30
8
Common-Mode Rejection Ratio (mV/V)
Common-Mode Rejection Ratio (mV/V)
at VS = ±18 V, VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2, and CL = 100 pF (unless otherwise noted)
VSUPPLY = ±2 V
25
20
15
10
5
(V-) < VCM < (V+) - 1.5 V
7
(V-) + 0.5 V < VCM < (V+) - 1.5 V
6
VSUPPLY = ±18 V
5
4
3
2
1
0
0
-55
-35
-15
5
25
45
65
85
105
125
-55
-35
-15
Temperature (°C)
5
25
45
65
85
105
125
Temperature (°C)
OPA188-Q1 is specified from TA = –40°C to +125°C
OPA2188-Q1 is specified from TA = –40°C to +105°C
OPA188-Q1 is specified from TA = –40°C to +125°C
OPA2188-Q1 is specified from TA =–40°C to +105°C
图 13. CMRR vs Temperature
图 14. CMRR vs Temperature
5 Typical Units Shown
VSUPPLY = ±2 V to ±18 V
0.8
0.6
+3*sigma
0.4
50 nV/div
Power-Supply Rejection Ratio (mV/V)
1
0.2
0
-0.2
-0.4
-3*sigma
-0.6
3*Sigma Noise = 172 nVPP
Peak-to-Peak Noise = 250 nV
-0.8
-1
-55
-35
-15
5
25
45
65
85
105
Time (1 s/div)
125
C016
Temperature (°C)
OPA188-Q1 is specified from TA = –40°C to +125°C
OPA2188-Q1 is specified from TA = –40°C to +105°C
图 15. PSRR vs Temperature
图 16. 0.1-Hz to 10-Hz Noise
Total Harmonic Distortion + Noise (%)
0.01
10
-80
VOUT = 1 VRMS
BW = 80 kHz
0.001
-100
0.0001
-120
G = +1, RL = 10 kW
G = -1, RL = 10 kW
0.00001
1
0.1
1
10
100
1k
10k
100k
Frequency (Hz)
10
100
1k
10k
Total Harmonic Distortion + Noise (dB)
Voltage Noise Density (nV/ÖHz)
100
-140
20k
Frequency (Hz)
图 17. Input Voltage Noise Spectral Density vs Frequency
图 18. THD+N Ratio vs Frequency
14
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OPA188-Q1, OPA2188-Q1
www.ti.com.cn
ZHCSG98 – APRIL 2017
Typical Characteristics (接
接下页)
at VS = ±18 V, VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2, and CL = 100 pF (unless otherwise noted)
0.01
-80
0.001
-100
0.0001
-120
G = +1, RL = 10 kW
G = -1, RL = 10 kW
0.00001
0.01
0.5
0.48
0.46
0.44
IQ (mA)
Total Harmonic Distortion + Noise (%)
-60
BW = 80 kHz
Total Harmonic Distortion + Noise (dB)
0.1
1
10
0.4
0.38
0.36
0.34
0.32
-140
0.1
0.42
Specified Supply-Voltage Range
0.3
20
0
4
8
12
Output Amplitude (VRMS)
图 19. THD+N vs Output Amplitude
VS = ±2 V
28
32
36
VSUPPLY = 36 V, RL = 10 kW
2.5
0.44
2
AOL (mV/V)
IQ (mA)
24
VSUPPLY = 4 V, RL = 10 kW
VS = ±18 V
0.46
20
图 20. Quiescent Current vs Supply Voltage
3
0.5
0.48
16
Supply Voltage (V)
0.42
0.4
0.38
1.5
1
0.36
0.34
0.5
0.32
0
0.3
-55
-35
-15
5
25
45
65
85
105
125
-55
-35
-15
5
25
45
65
85
105
125
Temperature (°C)
Temperature (°C)
OPA188-Q1 is specified from TA = –40°C to +125°C
OPA2188-Q1 is specified from TA = –40°C to +105°C
OPA188-Q1 is specified from TA = –40°C to +125°C
OPA2188-Q1 is specified from TA = –40°C to +105°C
图 21. Quiescent Current vs Temperature
图 22. Open-Loop Gain vs Temperature
40
10k
RL = 10 kW
35
RISO = 0 W
30
Overshoot (%)
ZO (W)
1k
100
10
RISO = 25 W
25
RISO = 50 W
20
15
G = +1
+18 V
RISO
10
Device
1
-18 V
5
RL
CL
0
0.1
1
10
100
1k
10k
100k
1M
10M
Frequency (Hz)
图 23. Open-Loop Output Impedance vs Frequency
版权 © 2017, Texas Instruments Incorporated
0
100 200 300 400 500 600 700 800 900 1000
Capacitive Load (pF)
图 24. Small-Signal Overshoot vs
Capacitive Load (100-mV Output Step)
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ZHCSG98 – APRIL 2017
www.ti.com.cn
Typical Characteristics (接
接下页)
at VS = ±18 V, VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2, and CL = 100 pF (unless otherwise noted)
40
RISO = 0 W
35
Device
RISO = 50 W
30
25
-18 V
37 VPP
Sine Wave
(±18.5 V)
5 V/div
Overshoot (%)
+18 V
RISO = 25 W
20
15
RI = 10 kW
10
RF = 10 kW
G = -1
+18 V
VIN
VOUT
RISO
Device
5
CL
RL = RF = 10 kW
-18 V
0
0
Time (100 ms/div)
100 200 300 400 500 600 700 800 900 1000
Capacitive Load (pF)
图 25. Small-Signal Overshoot vs
Capacitive Load (100-mV Output Step)
图 26. No Phase Reversal
VIN
VOUT
20 kW
20 kW
+18 V
Device
5 V/div
5 V/div
2 kW
VOUT
VIN
TOR
-18 V
G = -10
2 kW
+18 V
TOR
VOUT
Device
VIN
-18 V
G = -10
VOUT
VIN
Time (5 ms/div)
Time (5 ms/div)
图 27. Positive Overload Recovery
图 28. Negative Overload Recovery
+18 V
G = +1
RL = RF = 2 kW
CL = 10 pF
20 mV/div
20 mV/div
RL = 10 kW
CL = 10 pF
RI
= 2 kW
RF
= 2 kW
+18 V
Device
Device
-18 V
RL
CL
CL
-18 V
G = -1
Time (1 ms/div)
图 29. Small-Signal Step Response
(100 mV)
16
Time (20 ms/div)
图 30. Small-Signal Step Response
(100 mV)
版权 © 2017, Texas Instruments Incorporated
OPA188-Q1, OPA2188-Q1
www.ti.com.cn
ZHCSG98 – APRIL 2017
Typical Characteristics (接
接下页)
at VS = ±18 V, VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2, and CL = 100 pF (unless otherwise noted)
G = +1
RL = 10 kW
CL = 10 pF
5 V/div
5 V/div
G = -1
RL = 10 kW
CL = 10 pF
Time (50 ms/div)
Time (50 ms/div)
图 31. Large-Signal Step Response
图 32. Large-Signal Step Response
10
G = -1
8
6
4
12-Bit Settling
2
0
-2
(±1/2 LSB = ±0.024%)
-4
-6
-8
Output D From Final Value (mV)
Output D From Final Value (mV)
10
-10
G = -1
8
6
4
12-Bit Settling
2
0
-2
(±1/2 LSB = ±0.024%)
-4
-6
-8
-10
0
10
20
30
40
50
60
0
10
20
30
Time (ms)
图 33. Large-Signal Settling Time
(10-V Positive Step)
50
60
图 34. Large-Signal Settling Time
(10-V Negative Step)
160
15
VS = ±15 V
140
12.5
120
10
EMIRR IN+ (dB)
Output Voltage (VPP)
40
Time (ms)
Maximum output voltage without
slew-rate induced distortion.
7.5
VS = ±5 V
5
100
80
60
40
2.5
VS = ±2.25 V
20
0
1k
10k
100k
1M
Frequency (Hz)
图 35. Maximum Output Voltage vs Frequency
版权 © 2017, Texas Instruments Incorporated
10M
0
10M
100M
1G
10G
Frequency (Hz)
图 36. EMIRR IN+ vs Frequency
17
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ZHCSG98 – APRIL 2017
www.ti.com.cn
8 Detailed Description
8.1 Overview
The OPAx188-Q1 operational amplifier series combines precision offset and drift with excellent overall
performance, making the device ideal for many precision applications. The precision offset drift of only 0.085
µV/°C provides stability over the entire temperature range. In addition, this device offers excellent overall
performance with high CMRR, PSRR, and AOL. As with all amplifiers, applications with noisy or high-impedance
power supplies require decoupling capacitors close to the device pins. In most cases, 0.1-µF capacitors are
adequate.
The OPAx188-Q1 device is part of a family of zero-drift, low-power, rail-to-rail output operational amplifiers.
These devices operate from 4 V to 36 V, are unity-gain stable, and are suitable for a wide range of generalpurpose applications. The zero-drift architecture provides ultra-low input offset voltage and near-zero input offset
voltage drift over temperature and time. This choice of architecture also offers outstanding ac performance, such
as ultra-low broadband noise and zero flicker noise.
8.2 Functional Block Diagram
图 37 shows a representation of the proprietary OPAx188-Q1 architecture. 表 3 lists the active and passive
component counts for this device. The component count allows for accurate reliability calculations.
V+
C2
CHOP1
GM1
Notch
Filter
CHOP2
GM2
GM3
OUT
+IN
-IN
C1
GM_FF
Copyright © 2017, Texas Instruments Incorporated
V-
图 37. Functional Block Diagram
表 3. Component Count
18
COMPONENT
COUNT
Transistors
636
Diodes
5
Resistors
41
Capacitors
72
版权 © 2017, Texas Instruments Incorporated
OPA188-Q1, OPA2188-Q1
www.ti.com.cn
ZHCSG98 – APRIL 2017
8.3 Feature Description
The OPAx188-Q1 series is unity-gain stable and free from unexpected output phase reversal. This device series
uses a proprietary, periodic zero-drift technique to provide low input offset voltage and very low input offset
voltage drift over temperature. For lowest offset voltage and precision performance, optimize circuit layout and
mechanical conditions. Avoid temperature gradients that create thermoelectric (Seebeck) effects in the
thermocouple junctions formed from connecting dissimilar conductors. Cancel these thermally-generated
potentials by ensuring the potentials are equal on both input pins. Other layout and design considerations
include:
• Use low thermoelectric-coefficient conditions (avoid dissimilar metals).
• Thermally isolate components from power supplies or other heat sources.
• Shield the operational amplifier and input circuitry from air currents, such as cooling fans.
Follow these guidelines to reduce the likelihood of junctions being at different temperatures, which may cause
thermoelectric voltages of 0.1 µV/°C or higher, depending on the materials used.
8.3.1 Operating Characteristics
The OPAx188-Q1 is specified for operation from 4 V to 36 V (±2 V to ±18 V). Many specifications apply from
–40°C to +125°C. Parameters that can exhibit significant variance with regard to operating voltage or
temperature are presented in Typical Characteristics.
8.3.2 Phase-Reversal Protection
The OPAx188-Q1 series has an internal phase-reversal protection. Many op amps exhibit a phase reversal when
the input is driven beyond the linear common-mode range. This condition is most often encountered in
noninverting circuits when the input is driven beyond the specified common-mode voltage range, causing the
output to reverse into the opposite rail. The OPAx188-Q1 series input prevents phase reversal with excessive
common-mode voltage. Instead, the output limits into the appropriate rail; 图 38 shows this performance.
+18 V
Device
5 V/div
-18 V
37 VPP
Sine Wave
(±18.5 V)
VIN
VOUT
Time (100 ms/div)
图 38. No Phase Reversal
8.3.3 Input Bias Current Clock Feedthrough
Zero-drift amplifiers (such as the OPAx188-Q1 series) use switching on the inputs to correct for the intrinsic
offset and drift of the amplifier. Charge injection from the integrated switches on the inputs can introduce very
short transients in the input bias current of the amplifier. The extremely short duration of these pulses prevents
the devices from being amplified. However, the devices may be coupled to the output of the amplifier through the
feedback network. The most effective method to prevent transients in the input bias current from producing
additional noise at the amplifier output is to use a low-pass filter such as an RC network.
8.3.4 Internal Offset Correction
The OPAx188-Q1 op amp series uses an auto-calibration technique with a time-continuous 750-kHz op amp in
the signal path. This amplifier is zero-corrected every 3 μs using a proprietary technique. Upon power up, the
amplifier requires approximately 100 μs to achieve the specified VOS accuracy. This design has no aliasing or
flicker noise.
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OPA188-Q1, OPA2188-Q1
ZHCSG98 – APRIL 2017
www.ti.com.cn
Feature Description (接
接下页)
8.3.5 EMI Rejection
The OPAx188-Q1 series uses integrated electromagnetic interference (EMI) filtering to reduce the effects of EMI
interference from sources such as wireless communications and densely-populated boards with a mix of analog
signal chain and digital components. EMI immunity can be improved with circuit design techniques; the
OPAx188-Q1 series benefits from these design improvements. Texas Instruments™ has developed the ability to
accurately measure and quantify the immunity of an operational amplifier over a broad frequency spectrum
extending from 10 MHz to 6 GHz. 图 39 shows the results of this testing on the OPAx188-Q1. 表 4 lists the
EMIRR IN+ values for the OPAx188-Q1 devices at particular frequencies commonly encountered in real-world
applications. Applications listed in 表 4 may be centered on or operated near the particular frequency shown.
Detailed information can also be found in EMI Rejection Ratio of Operational Amplifiers, available for download
from www.ti.com.
160
140
EMIRR IN+ (dB)
120
100
80
60
40
20
0
10M
100M
1G
10G
Frequency (Hz)
图 39. EMIRR Testing
表 4. OPAx188-Q1 EMIRR IN+ for Frequencies of Interest
FREQUENCY
APPLICATION OR ALLOCATION
EMIRR IN+
400 MHz
Mobile radio, mobile satellite, space operation, weather, radar, ultra-high frequency
(UHF) applications
62.2 dB
900 MHz
Global system for mobile communications (GSM) applications, radio
communication, navigation, GPS (to 1.6 GHz), GSM, aeronautical mobile, UHF
applications
74.7 dB
1.8 GHz
GSM applications, mobile personal communications, broadband, satellite, L-band
(1 GHz to 2 GHz)
100.7 dB
®
2.4 GHz
802.11b, 802.11g, 802.11n, Bluetooth , mobile personal communications,
industrial, scientific and medical (ISM) radio band, amateur radio and satellite, Sband (2 GHz to 4 GHz)
102.4 dB
3.6 GHz
Radiolocation, aero communication and navigation, satellite, mobile, S-band
104.8 dB
802.11a, 802.11n, aero communication and navigation, mobile communication,
space and satellite operation, C-band (4 GHz to 8 GHz)
100.3 dB
5 GHz
8.3.6 Capacitive Load and Stability
The device dynamic characteristics are optimized for a range of common operating conditions. The combination
of low closed-loop gain and high capacitive loads decreases the amplifier phase margin and can lead to gain
peaking or oscillations. As a result, larger capacitive loads must be isolated from the output. The simplest way to
achieve this isolation is to add a small resistor (for example, ROUT equal to 50 Ω) in series with the output. 图 40
and 图 41 show graphs of small-signal overshoot versus capacitive load for several values of ROUT. For details of
analysis techniques and application circuits, see Feedback Plots Define Op Amp AC Performance, available for
download from www.ti.com.
20
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OPA188-Q1, OPA2188-Q1
www.ti.com.cn
40
ZHCSG98 – APRIL 2017
40
RL = 10 kW
RISO = 0 W
35
35
RISO = 0 W
RISO = 25 W
25
RISO = 25 W
RISO = 50 W
30
RISO = 50 W
20
15
G = +1
+18 V
RISO
10
-18 V
25
20
15
RI = 10 kW
10
Device
5
Overshoot (%)
Overshoot (%)
30
RL
RF = 10 kW
G = -1
+18 V
RISO
CL
Device
5
CL
RL = RF = 10 kW
-18 V
0
0
0
100 200 300 400 500 600 700 800 900 1000
0
100 200 300 400 500 600 700 800 900 1000
Capacitive Load (pF)
G=1
RL = 10 kΩ
Capacitive Load (pF)
100-mV Output
Step
图 40. Small-Signal Overshoot Versus Capacitive Load
G = –1
RL = RF = 10 kΩ
100-mV Output
Step
图 41. Small-Signal Overshoot Versus Capacitive Load
8.3.7 Electrical Overstress
Designers often ask questions about the capability of an operational amplifier to withstand electrical overstress.
These questions tend to focus on the device inputs, but may involve the supply voltage pins or the output pin.
Each of these different pin functions have electrical stress limits determined by the voltage breakdown
characteristics of the particular semiconductor fabrication process and specific circuits connected to the pin.
Additionally, internal electrostatic discharge (ESD) protection is built into these circuits to protect them from
accidental ESD events both before and during product assembly.
Having a good understanding of this basic ESD circuitry and its relevance to an electrical overstress event is
helpful. See 图 42 for an illustration of the ESD circuits contained in the OPAx188-Q1 (indicated by the dashed
line area). The ESD protection circuitry involves several current-steering diodes connected from the input and
output pins and routed back to the internal power-supply lines, where the diodes meet at an internal absorption
device of the operational amplifier. This protection circuitry is intended to remain inactive during normal circuit
operation.
An ESD event produces a short-duration, high-voltage pulse that is transformed into a short-duration, highcurrent pulse while discharging through a semiconductor device. The ESD protection circuits are designed to
provide a current path around the operational amplifier core to prevent damage. The energy absorbed by the
protection circuitry is dissipated as heat.
When an ESD voltage develops across two or more amplifier device pins, current flows through one or more
steering diodes. Depending on the path that the current takes, the absorption device may activate. The
absorption device has a trigger, or threshold voltage, that is above the normal operating voltage of the
OPAx188-Q1 but below the device breakdown voltage level. When this threshold is exceeded, the absorption
device quickly activates and clamps the voltage across the supply rails to a safe level.
When the operational amplifier connects into a circuit (such as 图 42 shows), the ESD protection components are
intended to remain inactive and do not become involved in the operation of the application circuit. However,
circumstances may arise where an applied voltage exceeds the operating voltage range of a given pin. If this
condition occurs, there is a risk that some internal ESD protection circuits may be biased on and conduct current.
Any such current flow occurs through steering-diode paths and rarely involves the absorption device.
图 42 shows a specific example where the input voltage, VIN, exceeds the positive supply voltage (+VS) by 500
mV or more. Much of what happens in the circuit depends on the supply characteristics. If +VS can sink the
current, one of the upper-input steering diodes conducts and directs current to +VS. Excessively high current
levels can flow with increasingly higher VIN. As a result, the data sheet specifications recommend that
applications limit the input current to 10 mA.
If the supply is not capable of sinking the current, VIN may begin sourcing current to the operational amplifier, and
then take over as the source of positive supply voltage. The danger in this case is that the voltage can rise to
levels that exceed the absolute maximum ratings of the operational amplifier.
版权 © 2017, Texas Instruments Incorporated
21
OPA188-Q1, OPA2188-Q1
ZHCSG98 – APRIL 2017
www.ti.com.cn
Another common question involves what happens to the amplifier if an input signal is applied to the input while
the power supplies (+VS or –VS) are at 0 V. Again, this question depends on the supply characteristic while at 0
V, or at a level below the input signal amplitude. If the supplies appear as high impedance, then the operational
amplifier supply current may be supplied by the input source through the current-steering diodes. This state is not
a normal bias condition; the amplifier will not operate normally. If the supplies are low impedance, then the
current through the steering diodes can become quite high. The current level depends on the ability of the input
source to deliver current, and any resistance in the input path.
If there is any uncertainty about the ability of the supply to absorb this current, external zener diodes may be
added to the supply pins, as shown in 图 42. The zener voltage must be selected such that the diode does not
turn on during normal operation. However, the zener voltage must be low enough so that the zener diode
conducts if the supply pin begins to rise above the safe operating supply voltage level.
(2)
TVS
RF
V+
+VS
OPA188-Q1
RI
ESD CurrentSteering Diodes
IN
(3)
RS
+IN
Op Amp
Core
Edge-Triggered ESD
Absorption Circuit
ID
VIN
OUT
RL
(1)
V±
VS
(2)
TVS
Copyright © 2017, Texas Instruments Incorporated
(1)
VIN = +VS + 500 mV.
(2)
TVS: +VS(max) > VTVSBR(min) > +VS.
(3)
Suggested value is approximately 1 kΩ.
图 42. Equivalent Internal ESD Circuitry Relative to a Typical Circuit Application
The OPAx188-Q1 series input terminals are protected from excessive differential voltage with back-to-back
diodes, as shown in 图 42. In most circuit applications, the input protection circuitry has no consequence.
However, in low-gain and G = 1 circuits, fast-ramping input signals can forward-bias these diodes because the
output of the amplifier cannot respond rapidly enough to the input ramp. If the input signal is fast enough to
create this forward-bias condition, the input signal current must be limited to 10 mA or less. If the input signal
current is not inherently limited, an input series resistor can be used to limit the signal input current. This input
series resistor degrades the low-noise performance of the OPAx188-Q1 series. 图 42 shows an example
configuration that implements a current-limiting feedback resistor.
8.4 Device Functional Modes
The OPAx188-Q1 series has a single functional mode, and is operational when the power-supply voltage is
greater than 4.5 V (±2.25 V). The maximum power supply voltage for the OPAx188-Q1 family is 36 V (±18 V).
22
版权 © 2017, Texas Instruments Incorporated
OPA188-Q1, OPA2188-Q1
www.ti.com.cn
ZHCSG98 – APRIL 2017
9 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The OPAx188-Q1 operational amplifiers combine precision offset and drift with excellent overall performance,
making the series ideal for many precision applications. The precision offset drift of only 0.085 µV/°C provides
stability over the entire temperature range. In addition, the device pairs excellent CMRR, PSRR, and AOL dc
performance with outstanding low-noise operation. As with all amplifiers, applications with noisy or highimpedance power supplies require decoupling capacitors close to the device pins. In most cases, 0.1-µF
capacitors are adequate.
The following application examples highlight only a few of the circuits where the OPAx188-Q1 series can be
used.
9.2 Typical Applications
9.2.1 High-Side Voltage-to-Current (V-I) Converter
The circuit shown in 图 43 is a high-side voltage-to-current (V-I) converter. The converter translates an input
voltage of 0 V to 2 V to an output current of 0 mA to 100 mA. 图 44 shows the measured transfer function for this
circuit. The low offset voltage and offset drift of the OPA2188-Q1 facilitate excellent dc accuracy for the circuit.
V+
RS2
470
RS3
4.7
IRS2
IRS3
R4
10 k
VRS2
VRS3
C7
2200 pF
R5
330
Q2
+
R3
200
+
Q1
C6
1000 pF
VIN
+
R2
10
±
VRS1
RS1
2k
IRS1
VLOAD
RLOAD
ILOAD
Copyright © 2017, Texas Instruments Incorporated
图 43. High-Side Voltage-to-Current (V-I) Converter
版权 © 2017, Texas Instruments Incorporated
23
OPA188-Q1, OPA2188-Q1
ZHCSG98 – APRIL 2017
www.ti.com.cn
Typical Applications (接
接下页)
9.2.1.1 Design Requirements
The design requirements are:
• Supply voltage: 5 V dc
• Input: 0 V to 2 V dc
• Output: 0 mA to 100 mA dc
9.2.1.2 Detailed Design Procedure
The V-I transfer function of the circuit is based on the relationship between the input voltage, VIN, and the three
current sensing resistors, RS1, RS2, and RS3. The relationship between VIN and RS1 determines the current that
flows through the first stage of the design. The current gain from the first stage to the second stage is based on
the relationship between RS2 and RS3.
For a successful design, pay close attention to the dc characteristics of the operational amplifier chosen for the
application. To meet the performance goals, this application benefits from an operational amplifier with low offset
voltage, low temperature drift, and rail-to-rail output. The OPAx188-Q1 CMOS operational amplifier is a highprecision, ultra-low offset, ultra-low drift amplifier, optimized for low-voltage, single-supply operation, with an
output swing to within 15 mV of the positive rail. The devices in the OPAx188-Q1 family use chopping techniques
to provide low initial offset voltage and near-zero drift over time and temperature. Low offset voltage and low drift
reduce the offset error in the system, making this device appropriate for precise dc control. The rail-to-rail output
stage of the OPAx188-Q1 makes sure that the output swing of the operational amplifier is able to fully control the
gate of the MOSFET devices within the supply rails.
A detailed error analysis, design procedure, and additional measured results are given in reference design
TIPD102, a step-by-step process to design a High-Side Voltage-to-Current (V-I) Converter.
For step-by-step design procedure, circuit schematics, bill of materials, PCB files, simulation results, and test
results, refer to TI Precision Design TIPD102, High-Side Voltage-to-Current (V-I) Converter (SLAU502).
9.2.1.3 Application Curves
图 44 shows the measured transfer function for the high-side voltage-to-current converter shown in 图 43 .
0.1
Load
Output Current (A)
0.075
0.05
0.025
0
0
0.5
1
Input Voltage (V)
1.5
2
D001
图 44. Measured Transfer Function for High-Side V-I Converter
24
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OPA188-Q1, OPA2188-Q1
www.ti.com.cn
ZHCSG98 – APRIL 2017
9.2.2 Discrete INA + Attenuation for ADC With 3.3-V Supply
注
The TINA-TI files shown in the following sections require that either the TINA software
(from DesignSoft™) or TINA-TI software be installed. Download the free TINA-TI software
from the TINA-TI folder.
图 45 shows an example of how the OPA188-Q1 series is used as a high-voltage, high-impedance front-end for
a precision, discrete instrumentation amplifier with attenuation. The INA159 provides the attenuation that allows
this circuit to easily interface with 3.3-V or 5-V analog-to-digital converters (ADCs). Click the following link to
download the TINA-TI file: Discrete INA.
15 V
U2
VOUTP
OPA188-Q1
5V
VDIFF / 2
VCM
10
-15 V
Ref 1
Ref 2
RG
500 W
+
R5
10 kW
R7
10 kW
U1
INA159
(1)
VOUT
Sense
-15 V
-VDIFF / 2
U3
OPA188-Q1
15 V
(1)
VOUTN
Copyright © 2017, Texas Instruments Incorporated
VOUT = VDIFF × (41 / 5) + (Ref 1) / 2.
图 45. Discrete INA + Attenuation for ADC With 3.3-V Supply
9.2.3 Bridge Amplifier
图 46 shows the basic configuration for a bridge amplifier. Click the following link to download the TINA-TI file:
Bridge Amplifier Circuit.
15 V
R1
15 V
R
R
R
OPA188Q1
+
R
VOUT
R1
VREF
Copyright © 2017, Texas Instruments Incorporated
图 46. Bridge Amplifier
版权 © 2017, Texas Instruments Incorporated
25
OPA188-Q1, OPA2188-Q1
ZHCSG98 – APRIL 2017
www.ti.com.cn
9.2.4 Low-Side Current Monitor
图 47 shows the OPAx188-Q1 configured in a low-side current-sensing application. The load current (ILOAD)
creates a voltage drop across the shunt resistor (RSHUNT). This voltage is amplified by the OPAx188-Q1, with a
gain of 201. The load current is set from 0 A to 500 mA, which corresponds to an output voltage range from 0 V
to 10 V. The output range can be adjusted by changing the shunt resistor or gain of the configuration. Click the
following link to download the TINA-TI file: Current-Sensing Circuit.
V
Load
15 V
+
VOUT = ILOAD * RSHUNT(1 + RF / RIN)
OPA188-Q1
ILOAD
RSHUNT
100 m
VOUT
VOUT / ILOAD= 1 V / 49.75 mA
RIN
RF
100
20 k
CF
150 pF
Copyright © 2017, Texas Instruments Incorporated
图 47. Low-Side Current Monitor
9.2.5 Programmable Power Supply
图 48 shows the OPA188-Q1 configured as a precision programmable power supply using the 16-bit, voltage
output DAC8581 and the OPA548 high-current amplifier. This application amplifies the digital-to-analog converter
(DAC) voltage by a value of five, and handles a large variety of capacitive and current loads. The OPA188-Q1 in
the front-end provides precision and low drift across a wide range of inputs and conditions. Click the following
link to download the TINA-TI file: Programmable Power-Supply Circuit.
C1
150 pF
R1
10 kΩ
R2
1 kΩ
R4
20 kΩ
C2
1 µF
30 V
15 V
VOUT
+
DAC8831
OPA548
+
R3
10 kΩ
OPA188
-Q1
-15 V
-30 V
图 48. Programmable Power Supply
26
版权 © 2017, Texas Instruments Incorporated
OPA188-Q1, OPA2188-Q1
www.ti.com.cn
ZHCSG98 – APRIL 2017
9.2.6 RTD Amplifier With Linearization
See Analog Linearization Of Resistance Temperature Detectors for an in-depth analysis of 图 49. Click the
following link to download the TINA-TI file: RTD Amplifier with Linearization.
15 V
(5 V)
Out
REF5050
In
1 µF
1 µF
R2
49.1 kŸ
R3
60.4 kŸ
R1
4.99 kŸ
OPA188-Q1
V OUT
0°C = 0 V
200°C = 5 V
R5
(1)
105.8 kŸ
RTD
Pt100
R4
1 kŸ
Copyright © 2017, Texas Instruments Incorporated
(1)
R5 provides positive-varying excitation to linearize output.
图 49. RTD Amplifier With Linearization
10 Power Supply Recommendations
The OPAx188-Q1 series is specified for operation from 4 V to 36 V (±2 V to ±18 V); many specifications apply
from –40°C to +125°C. Typical Characteristics presents parameters that can exhibit significant variance with
regard to operating voltage or temperature.
CAUTION
Supply voltages larger than 40 V can permanently damage the device (see the
Absolute Maximum Ratings).
Place 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or highimpedance power supplies. For more detailed information on bypass capacitor placement, see Layout.
版权 © 2017, Texas Instruments Incorporated
27
OPA188-Q1, OPA2188-Q1
ZHCSG98 – APRIL 2017
www.ti.com.cn
11 Layout
11.1 Layout Guidelines
For best operational performance of the device, use good printed circuit board (PCB) layout practices, including:
• Low-ESR, 0.1-µF ceramic bypass capacitors must be connected between each supply pin and ground,
placed as close to the device as possible. A single bypass capacitor from V+ to ground is applicable to singlesupply applications.
• To reduce parasitic coupling, run the input traces as far away from the supply lines as possible.
• A ground plane helps distribute heat and reduces EMI noise pickup.
• Place the external components as close to the device as possible. This configuration prevents parasitic errors
(such as the Seebeck effect) from occurring.
• Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly reduce
leakage currents from nearby traces that are at different potentials.
11.2 Layout Example
+
VIN
VOUT
RG
RF
(Schematic Representation)
Run the input traces
as far away from
the supply lines
as possible
Place components
close to device and to
each other to reduce
parasitic errors
VS+
RF
N/C
N/C
GND
±IN
V+
VIN
+IN
OUT
V±
N/C
RG
Use low-ESR,
ceramic bypass
capacitor
GND
VS±
VOUT
GND
VOUT
Use low-ESR, ceramic
bypass capacitor
Ground (GND) plane on another layer
Copyright © 2017, Texas Instruments Incorporated
图 50. Layout Example
28
版权 © 2017, Texas Instruments Incorporated
OPA188-Q1, OPA2188-Q1
www.ti.com.cn
ZHCSG98 – APRIL 2017
12 器件和文档支持
12.1 器件支持
12.1.1 开发支持
12.1.1.1 TINA-TI™(免费下载软件)
TINA™是一款简单、功能强大且易于使用的电路仿真程序,此程序基于 SPICE 引擎。TINA-TI 是 TINA 软件的一
款免费全功能版本,除了一系列无源和有源模型外,此版本软件还预先载入了一个宏模型库。TINA-TI 提供所有传
统的 SPICE 直流、瞬态和频域分析,以及其他设计功能。
TINA-TI 可免费下载,它提供全面的后续处理能力,使得用户能够以多种方式形成结果。虚拟仪器为用户提供选择
输入波形和探测电路节点、电压和波形的功能,从而创建一个动态的快速入门工具。
12.2 文档支持
12.2.1 相关文档
请参阅如下相关文档:
• 《运算放大器的 EMI 抑制比》(文献编号:SBOA128)
• 《反馈曲线图定义运算放大器交流性能》(文献编号:SBOA015)
• 《电阻式温度检测器的模拟线性化》(SLYT442)
• 《高侧电压电流 (V-I) 转换器》(文献编号:SLAU502)
12.3 相关链接
表 5 列出了快速访问链接。类别包括技术文档、支持与社区资源、工具和软件,以及申请样片或购买产品的快速链
接。
表 5. 相关链接
器件
产品文件夹
立即订购
技术文档
工具和软件
支持和社区
OPA188-Q1
请单击此处
请单击此处
请单击此处
请单击此处
请单击此处
OPA2188-Q1
请单击此处
请单击此处
请单击此处
请单击此处
请单击此处
12.4 接收文档更新通知
如需接收文档更新通知,请访问 ti.com 上的器件产品文件夹。请单击右上角的通知我 进行注册,即可收到任意产
品信息更改每周摘要。有关更改的详细信息,请查看任意已修订文档中包含的修订历史记录。
12.5 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
版权 © 2017, Texas Instruments Incorporated
29
OPA188-Q1, OPA2188-Q1
ZHCSG98 – APRIL 2017
www.ti.com.cn
12.6 商标
Texas Instruments, E2E are trademarks of Texas Instruments.
TINA-TI is a trademark of Texas Instruments, Inc and DesignSoft, Inc.
Bluetooth is a registered trademark of Bluetooth SIG, Inc.
DesignSoft, TINA are trademarks of DesignSoft, Inc.
12.7 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
12.8 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 机械、封装和可订购信息
以下页面包括机械、封装和可订购信息。这些信息是指定器件的最新可用数据。这些数据发生变化时,我们可能不
会另行通知或修订此文档。如欲获取此产品说明书的浏览器版本,请参见左侧的导航栏。
30
版权 © 2017, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
2-Jun-2017
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
OPA188AQDGKRQ1
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
188
OPA2188AQDGKRQ1
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
2188
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
2-Jun-2017
Addendum-Page 2
IMPORTANT NOTICE
重要声明
德州仪器 (TI) 公司有权按照最新发布的 JESD46 对其半导体产品和服务进行纠正、增强、改进和其他修改,并不再按最新发布的 JESD48 提
供任何产品和服务。买方在下订单前应获取最新的相关信息,并验证这些信息是否完整且是最新的。
TI 公布的半导体产品销售条款 (http://www.ti.com/sc/docs/stdterms.htm) 适用于 TI 已认证和批准上市的已封装集成电路产品的销售。另有其
他条款可能适用于其他类型 TI 产品及服务的使用或销售。
复制 TI 数据表上 TI 信息的重要部分时,不得变更该等信息,且必须随附所有相关保证、条件、限制和通知,否则不得复制。TI 对该等复制文
件不承担任何责任。第三方信息可能受到其它限制条件的制约。在转售 TI 产品或服务时,如果存在对产品或服务参数的虚假陈述,则会失去
相关 TI 产品或服务的明示或暗示保证,且构成不公平的、欺诈性商业行为。TI 对此类虚假陈述不承担任何责任。
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人员就自己设计的 应用声明,其具备制订和实施下列保障措施所需的一切必要专业知识,能够 (1) 预见故障的危险后果,(2) 监视故障及其后
果,以及 (3) 降低可能导致危险的故障几率并采取适当措施。设计人员同意,在使用或分发包含 TI 产品的任何 应用前, 将彻底测试该等 应用
和 该等应用中所用 TI 产品的 功能。
TI 提供技术、应用或其他设计建议、质量特点、可靠性数据或其他服务或信息,包括但不限于与评估模块有关的参考设计和材料(总称“TI 资
源”),旨在帮助设计人员开发整合了 TI 产品的 应用, 如果设计人员(个人,或如果是代表公司,则为设计人员的公司)以任何方式下载、
访问或使用任何特定的 TI 资源,即表示其同意仅为该等目标,按照本通知的条款使用任何特定 TI 资源。
TI 所提供的 TI 资源,并未扩大或以其他方式修改 TI 对 TI 产品的公开适用的质保及质保免责声明;也未导致 TI 承担任何额外的义务或责任。
TI 有权对其 TI 资源进行纠正、增强、改进和其他修改。除特定 TI 资源的公开文档中明确列出的测试外,TI 未进行任何其他测试。
设计人员只有在开发包含该等 TI 资源所列 TI 产品的 应用时, 才被授权使用、复制和修改任何相关单项 TI 资源。但并未依据禁止反言原则或
其他法理授予您任何TI知识产权的任何其他明示或默示的许可,也未授予您 TI 或第三方的任何技术或知识产权的许可,该等产权包括但不限
于任何专利权、版权、屏蔽作品权或与使用TI产品或服务的任何整合、机器制作、流程相关的其他知识产权。涉及或参考了第三方产品或服务
的信息不构成使用此类产品或服务的许可或与其相关的保证或认可。使用 TI 资源可能需要您向第三方获得对该等第三方专利或其他知识产权
的许可。
TI 资源系“按原样”提供。TI 兹免除对资源及其使用作出所有其他明确或默认的保证或陈述,包括但不限于对准确性或完整性、产权保证、无屡
发故障保证,以及适销性、适合特定用途和不侵犯任何第三方知识产权的任何默认保证。TI 不负责任何申索,包括但不限于因组合产品所致或
与之有关的申索,也不为或对设计人员进行辩护或赔偿,即使该等产品组合已列于 TI 资源或其他地方。对因 TI 资源或其使用引起或与之有关
的任何实际的、直接的、特殊的、附带的、间接的、惩罚性的、偶发的、从属或惩戒性损害赔偿,不管 TI 是否获悉可能会产生上述损害赔
偿,TI 概不负责。
除 TI 已明确指出特定产品已达到特定行业标准(例如 ISO/TS 16949 和 ISO 26262)的要求外,TI 不对未达到任何该等行业标准要求而承担
任何责任。
如果 TI 明确宣称产品有助于功能安全或符合行业功能安全标准,则该等产品旨在帮助客户设计和创作自己的 符合 相关功能安全标准和要求的
应用。在应用内使用产品的行为本身不会 配有 任何安全特性。设计人员必须确保遵守适用于其应用的相关安全要求和 标准。设计人员不可将
任何 TI 产品用于关乎性命的医疗设备,除非已由各方获得授权的管理人员签署专门的合同对此类应用专门作出规定。关乎性命的医疗设备是
指出现故障会导致严重身体伤害或死亡的医疗设备(例如生命保障设备、心脏起搏器、心脏除颤器、人工心脏泵、神经刺激器以及植入设
备)。此类设备包括但不限于,美国食品药品监督管理局认定为 III 类设备的设备,以及在美国以外的其他国家或地区认定为同等类别设备的
所有医疗设备。
TI 可能明确指定某些产品具备某些特定资格(例如 Q100、军用级或增强型产品)。设计人员同意,其具备一切必要专业知识,可以为自己的
应用选择适合的 产品, 并且正确选择产品的风险由设计人员承担。设计人员单方面负责遵守与该等选择有关的所有法律或监管要求。
设计人员同意向 TI 及其代表全额赔偿因其不遵守本通知条款和条件而引起的任何损害、费用、损失和/或责任。
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