TPS65140-Q1 Triple Output LCD Supply With

TPS65140-Q1 Triple Output LCD Supply With
Order
Now
Product
Folder
Support &
Community
Tools &
Software
Technical
Documents
TPS65140-Q1
TPS65145-Q1
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
TPS65140/5-Q1 Triple Output LCD Supply with Linear Regulator and Power Good
1 Features
2 Applications
•
•
•
•
•
•
•
1
•
•
•
•
•
•
•
•
•
•
Qualified for Automotive Applications
AEC-Q100 Qualified With the Following Results:
– Device Temperature Grade 1
– Device HBM ESD Classification Level H2
– Device CDM ESD Classification Level C5
Input Voltage Range: 2.7 V to 5.8 V
VO1 Boost Converter
– Up to 15 V Output Voltage
– Virtual Synchronous Converter Topology
– < 1% Output Voltage Accuracy
– 1.6-MHz Fixed Switching Frequency
– 2.3-A Switch Current Limit
VO2 Negative Regulated Charge Pump
– Down to -12 V / 20 mA
VO3 Positive Regulated Charge Pump
– Up to 30 V / 20 mA
Three Independently Adjustable Outputs
Auxiliary 3.3-V Linear Regulator Controller
Internal Soft Start
Power Good
Protection Features
– Short-Circuit Detection of all Outputs
– Overvoltage Protection of all Outputs
– Thermal Shutdown
Available in TSSOP-24 PowerPAD™Package
Infotainment Systems
Automotive Displays
Instrument Clusters
Center Consoles
Rear Seat Entertainment
3 Description
The TPS65140-Q1 and TPS65145-Q1 devices offer a
compact and small power supply solution that
provides all three voltages required by thin-film
transistor (TFT) LCD displays. The auxiliary linear
regulator controller can be used to generate a 3.3-V
logic power rail for systems powered by a 5-V supply
rail only.
The main output, VO1 is a 1.6-MHz fixed-frequency
PWM boost converter providing the source-drive
voltage for the LCD display. The TPS65140-Q1
device has a typical switch current limit of 2.3 A and
the TPS65145-Q1 has a typical switch current limit of
1.37 A.
A fully integrated adjustable charge pump doubler
and provides the positive LCD gate-drive voltage. An
externally adjustable negative charge pump provides
the negative LCD gate-drive voltage.
Device Information(1)
PART NUMBER
PACKAGE
TPS65140-Q1
TPS65145-Q1
BODY SIZE (NOM)
TSSOP (24) with
PowerPAD
4.40 mm × 7.80 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
spacer
Device Block Diagram
Typical Application Circuit
TPS65140 / 45
VIN
2.7 V to 5.8 V
Boost
Converter
VO1
Up to 15 V / 400 mA
Positive Charge
Pump
VO3
Up to 30 V / 20 mA
Negative
Charge Pump
VO2
Up to –12 V / 20 mA
Power Good
Linear Regulator
Controller
VI
2.7 V to 5.8 V
L1
4.2 μH
C3
22 μF
C13
10 nF
C1
VO2
Up to 12 V/20 mA
D2
C12
Power Good
VO4
3.3 V
C6
0.22 μF
0.22 μF
D3
R3
0.22 μF
TPS65140-Q1
C5
VIN
SW
COMP
SW
GND
FB1
EN
ENR
SUP
C1+
C1−
C2−/MODE
DRV
FB3
FB2
PG
REF
FB4
PGND
BASE
VO1
Up to 15 V/350 mA
D1
C2+
C1
0.22 μF
C4
22 μF
R1
R2
VO3
Up to 30 V/20 mA
OUT3
C7
0.22 μF
R5
PGND
GND
R4
R6
C11
100 nF
Q1
BCP68
VI
C9
1 μF
VO4
3.3 V
C9
4.7 μF
VI
R7
33 kΩ
System Power
Good
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS65140-Q1
TPS65145-Q1
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Description (Continued) ........................................
Device Comparison ...............................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
3
4
8.1
8.2
8.3
8.4
8.5
4
4
4
5
5
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
9 Typical Characteristics.......................................... 8
10 Detailed Description ............................................. 9
10.1
10.2
10.3
10.4
Overview ................................................................. 9
Functional Block Diagram ..................................... 10
Feature Description............................................... 11
Device Functional Modes...................................... 11
11 Application and Implementation........................ 13
11.1 Application Information.......................................... 13
11.2 Typical Application ............................................... 13
11.3 System Examples ................................................ 21
12 Power Supply Recommendations ..................... 22
13 Layout................................................................... 22
13.1 Layout Guidelines ................................................. 22
13.2 Thermal Information .............................................. 22
13.3 Layout Example .................................................... 23
14 Device and Documentation Support ................. 24
14.1
14.2
14.3
14.4
14.5
14.6
14.7
14.8
Device Support ....................................................
Related Links ........................................................
Documentation Support .......................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
24
24
24
24
24
24
24
25
15 Mechanical, Packaging, and Orderable
Information ........................................................... 25
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (April 2008) to Revision B
Page
•
Added Device Information table, Pin Configuration and Functions section, Specifications section, Feature
Description section, Device Functional Modes section, Application and Implementation section, Power Supply
Recommendations section, Layout section, Device and Documentation Support section, and Mechanical,
Packaging, and Orderable Information section ...................................................................................................................... 1
•
Deleted Dissipation Ratings table and added Thermal Information and ESD Ratings tables................................................ 4
•
Changed from TA to TJ in the Conditions statement of Electrical Characteristics and changed temperature from 85°C
to 125°C.................................................................................................................................................................................. 5
•
Changed Changed the MAIN BOOST CONVERTER VREF spec from 1.205 MIN to 1.198, and MAX from 1.219 to
1.230 ...................................................................................................................................................................................... 5
•
Changed Changed VFB spec from 1.136 MIN to 1.126, and MAX from 1.154 to 1.161......................................................... 5
•
Changed Changed rDS(ON) for VO1 = 10 V, Isw = 500 mA condition, from 290 to 325 MAX; and, for the VO1 = 5 V,
Isw = 500 mA condition, changed from 420 to 455 MAX ....................................................................................................... 5
•
Changed ................................................................................................................................................................................ 5
•
Changed Changed fSW spec for 0°C ≤ TA ≤ 125°C condition from 1.295 MIN to 1.195 MIN; and, changed the MIN
from 1.191 to 1.091, for the –40°C ≤ TA ≤ 125°C condition .................................................................................................. 6
•
Changed Changed NEGATIVE CHARGE PUMP VO2 Vref spec from 1.205 MIN to 1.198, and MAX from 1.219 to
1.226 ...................................................................................................................................................................................... 6
•
Changed from TA to TJ in the Conditions statement of Electrical Characteristics and changed temperature from 85°C
to 125°C.................................................................................................................................................................................. 6
•
Changed Changed VFB spec from 1.136 MIN to 1.126, and MAX from 1.154 to 1.161 ........................................................ 6
•
Changed from TA to TJ in the Conditions statement of Electrical Characteristics and changed temperature from 85°C
to 125°C.................................................................................................................................................................................. 7
2
Submit Documentation Feedback
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
TPS65140-Q1
TPS65145-Q1
www.ti.com
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
5 Description (Continued)
For compensation of the devices please refer to Application Note: How to Compensate with the TPS6510x and
TPS6514x SLVA813.
6 Device Comparison
LINEAR REGULATOR
OUTPUT VOLTAGE
MINIMUM SWITCH
CURRENT LIMIT
TPS65140-Q1
3.3 V
1.6 A
TPS65145-Q1
3.3 V
0.96 A
PART NUMBER
7 Pin Configuration and Functions
FB1
1
24
EN
FB4
2
23
ENR
BASE
3
22
COMP
VIN
4
21
FB2
SW
5
20
REF
SW
6
19
GND
18
DRV
Thermal
Pad
PGND
7
PGND
8
17
C1–
SUP
9
16
C1+
PG
10
15
C2–/MODE
GND
11
14
C2+
FB3
12
13
OUT3
Pin Functions
TERMINAL
NAME
NO. (PWP)
I/O
DESCRIPTION
VIN
4
I
Input voltage pin of the device.
EN
24
I
Enable pin of the device. This pin should be terminated and not be left floating. A logic high
enables the device and a logic low shuts down the device.
COMP
22
PG
10
O
Open drain output indicating when all outputs Vo1, Vo2, Vo3 are within 10% of their nominal
output voltage. The output goes low when one of the outputs falls below 10% of their nominal
output voltage.
ENR
23
I
Enable pin of the linear regulator controller. This pin should be terminated and not be left
floating. Logic high enables the regulator and a logic low puts the regulator in shutdown.
C1+
16
C1-
17
DRV
18
O
External charge pump driver
FB2
21
I
Feedback pin of negative charge pump
REF
20
O
Internal reference output typically 1.23 V
FB4
2
I
Feedback pin of the linear regulator controller. The linear regulator controller is set to a fixed
output voltage of 3.3 V or 3 V depending on the version.
BASE
3
O
Base drive output for the external transistor
GND
11, 19
Compensation pin for the main boost converter. A small capacitor is connected to this pin.
Positive terminal of the charge pump flying capacitor
Negative terminal of the charge pump flying capacitor
Ground
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
Submit Documentation Feedback
3
TPS65140-Q1
TPS65145-Q1
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
www.ti.com
Pin Functions (continued)
TERMINAL
NAME
I/O
NO. (PWP)
DESCRIPTION
PGND
7, 8
FB3
12
I
Power ground
Feedback pin of positive charge pump
OUT3
13
O
Positive charge pump output
C2-/MODE
15
Negative terminal of the charge pump flying capacitor and charge pump MODE pin. If the flying
capacitor is connected to this pin, the converter operates in a voltage tripler mode. If the charge
pump needs to operate in a voltage doubler mode, the flying capacitor is removed and the C2/MODE pin needs to be connected to GND.
C2+
14
Positive terminal for the charge pump flying capacitor. If the device runs in voltage doubler
mode, this pin needs to be left open.
SUP
9
I
Supply pin of the positive, negative charge pump, boost converter, and gate drive circuit. This
pin needs to be connected to the output of the main boost converter and cannot be connected
to any other voltage source. For performance reasons, it is not recommended for a bypass
capacitor to be connected directly to this pin.
FB1
1
I
Feedback pin of the boost converter
SW
5, 6
I
Switch pin of the boost converter
PowerPAD™/
Thermal Die
The PowerPAD or exposed thermal die needs to be connected to the power ground pins
(PGND).
8 Specifications
8.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
Voltages on pin VIN (2)
Voltages on pin Vo1, SUP, PG
(2)
Voltages on pin EN, MODE, ENR
(2)
MIN
MAX
UNIT
–0.3
6
V
–0.3
15.5
V
–0.3
VI + 0.3 V
V
Voltage on pin SW (2)
20
V
Power good maximum sink current (PG)
1
mA
Continuous power dissipation
See Thermal Information
Operating junction temperature
–40
150
°C
Storage temperature, Tstg
–65
150
°C
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
8.2 ESD Ratings
VALUE
V(ESD)
(1)
Electrostatic discharge
Human-body model (HBM), per AEC Q100-002 (1)
±2000
Charged-device model (CDM), per AEC Q100-011
±1000
Machine model (MM)
±100
UNIT
V
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
8.3 Recommended Operating Conditions
MIN
VIN
Input voltage range
(1)
L
Inductor
TJ
Operating junction temperature
(1)
4
TYP
2.7
MAX
5.8
4.7
-40
UNIT
V
μH
125
°C
See the Application Information Section for further information.
Submit Documentation Feedback
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
TPS65140-Q1
TPS65145-Q1
www.ti.com
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
8.4 Thermal Information
TPS65140-Q1
TPS65145-Q1
PWP (TSSOP)
PWP (TSSOP)
24 PINS
24 PINS
32.3
32.3
°C/W
RθJC(top) Junction-to-case (top) thermal resistance
25.8
25.8
°C/W
RθJB
Junction-to-board thermal resistance
9.2
9.2
°C/W
ψJT
Junction-to-top characterization parameter
0.5
0.5
°C/W
ψJB
Junction-to-board characterization parameter
9.4
9.4
°C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance
2.7
2.7
°C/W
THERMAL METRIC (1)
RθJA
(1)
Junction-to-ambient thermal resistance
UNIT
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
8.5 Electrical Characteristics
VIN = 3.3 V, EN = VIN, Vo1 = 10 V, TJ= –40°C to 125°C, typical values are at TJ = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY CURRENT
VIN
Input voltage range
5.5
V
ENR = GND, Vo3 = 2 × Vo1,
Boost converter not switching
2.7
0.7
0.9
mA
IQIN
Quiescent current into VIN
IQCharge
Charge pump quiescent
current into SUP
Vo1 = SUP = 10 V, Vo3 = 2 × Vo1
1.7
2.7
Vo1 = SUP = 10 V, Vo3 = 3 × Vo1
3.9
6
IQEN
LDO controller quiescent
current into VIN
ENR = VIN, EN = GND
300
800
μA
ISD
Shutdown current into VIN
EN = ENR = GND
1
10
μA
VUVLO
Undervoltage lockout
threshold
VI falling
2.2
2.4
V
Thermal shutdown
Temperature rising
160
mA
°C
LOGIC SIGNALS EN, ENR
VIH
High level input voltage
VIL
Low level input voltage
II
Input leakage current
1.5
EN = GND or VIN
V
0.01
0.4
V
0.1
μA
15
V
MAIN BOOST CONVERTER
Vo1
Output voltage range
5
VO1-VIN
Minimum input to output
voltage difference
1
VREF
Reference voltage
1.198
1.213
1.230
VFB
Feedback regulation
voltage
1.126
1.146
1.161
IFB
Feedback input bias
current
10
100
rDS(on)
N-MOSFET on-resistance
(Q1)
Vo1 = 10 V, Isw = 500 mA
195
325
Vo1 = 5 V, Isw = 500 mA
285
455
ILIM
N-MOSFET switch current
limit (Q1)
TPS65140
1.6
2.3
2.8
A
TPS65145
0.96
1.37
1.7
A
rDS(on)
P-MOSFET on-resistance
(Q2)
Vo1 = 10 V, Isw = 100 mA
9
15
Vo1 = 5 V, Isw = 100 mA
14
22
IMAX
Maximum P-MOSFET peak
switch current
Ileak
Switch leakage current
V
V
V
nA
mΩ
1
Vsw = 15 V
1
10
Vsw = 0 V
1
10
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
Submit Documentation Feedback
Ω
A
μA
5
TPS65140-Q1
TPS65145-Q1
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
www.ti.com
Electrical Characteristics (continued)
VIN = 3.3 V, EN = VIN, Vo1 = 10 V, TJ= –40°C to 125°C, typical values are at TJ = 25°C (unless otherwise noted)
PARAMETER
fSW
Oscillator frequency
TEST CONDITIONS
MIN
TYP
MAX
0°C ≤ TJ≤ 125°C
1.195
1.6
2.1
-40°C ≤ TJ ≤ 125°C
1.091
1.6
2.1
Line regulation
2.7 V ≤ VI ≤ 5.7 V; Iload = 100 mA
Load regulation
0 mA ≤ IO ≤ 300 mA
UNIT
MHz
0.012
%/V
0.2
%/A
NEGATIVE CHARGE PUMP Vo2
Vo2
Output voltage range
Vref
Reference voltage
VFB
Feedback regulation
voltage
IFB
Feedback input bias
current
rDS(on)
IO
Q8 P-Channel switch
rDS(on)
Q9 N-Channel switch
rDS(on)
-2
V
1.198
1.213
1.226
-36
0
36
mV
10
100
nA
4.3
8
2.9
4.4
Ω
IO = 20 mA
Minimum output current
V
20
mA
Line regulation
7 V ≤ Vo1 ≤ 15 V, Iload = 10 mA,
Vo2 = -5 V
0.09
%/V
Load regulation
1 mA ≤ IO ≤ 20 mA, Vo2 = -5 V
0.126
%/mA
POSITIVE CHARGE PUMP Vo3
Vo3
Output voltage range
Vref
Reference voltage
1.198
VFB
Feedback regulation
voltage
1.180
IFB
rDS(on)
30
V
1.213
1.226
V
1.214
1.245
V
Feedback input bias
current
10
100
nA
Q3 P-Channel switch
rDS(on)
9.9
15.5
1.1
1.8
4.6
8.5
1.2
2.2
610
800
Q4 N-Channel switch
rDS(on)
Q5 P-Channel switch
rDS(on)
Ω
IO = 20 mA
Q6 N-Channel switch
rDS(on)
Vd
D1 – D4 Shottky diode
forward voltage
IO
Minimum output current
6
ID1-D4 = 40 mA
20
mV
mA
Line regulation
10 V ≤ Vo1 ≤ 15 V, Iload = 10 mA,
Vo3 = 27 V
0.56
%/V
Load regulation
1 mA ≤ IO ≤ 20 mA, Vo3 = 27 V
0.05
%/mA
Submit Documentation Feedback
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
TPS65140-Q1
TPS65145-Q1
www.ti.com
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
Electrical Characteristics (continued)
VIN = 3.3 V, EN = VIN, Vo1 = 10 V, TJ= –40°C to 125°C, typical values are at TJ = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
3.4
UNIT
LINEAR REGULATOR CONTROLLER Vo4
Vo4
IBASE
Output voltage
4.5 V ≤ VI ≤ 5.5 V; 10 mA ≤ IO ≤ 500 mA
Maximum base drive
current
VIN-Vo4-VBE≥ 0.5 V (1)
Line regulation
4.75 V ≤ VI ≤ 5.5 V, Iload = 500 mA
0.186
Load regulation
1 mA ≤ IO ≤ 500 mA, VI = 5 V
0.064
Start up current
Vo4 ≤ 0.8 V
VIN-Vo4-VBE≥ 0.75 V
(1)
3.2
3.3
13.5
19
20
27
V
mA
%/V
%/A
11
20
25
mA
-12
-8.75% Vo1
-6
V
-13
-9.5% Vo2
-5
V
-11
-8% Vo3
-5
V
SYSTEM POWER GOOD (PG)
V(PG,
VO1)
V(PG,
VO2)
V(PG,
VO3)
Power good threshold (2)
VOL
PG output low voltage
I(sink) = 500 µA
IL
PG output leakage current
VPG = 5 V
(1)
(2)
0.001
0.3
V
1
μA
With VIN = supply voltage of the TPS65140, Vo4 = output voltage of the regulator, VBE = basis emitter voltage of external transistor.
The power good goes high when all three outputs (Vo1, Vo2, Vo3) are above their threshold. The power good goes low as soon as one
of the outputs is below their threshold.
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
Submit Documentation Feedback
7
TPS65140-Q1
TPS65145-Q1
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
www.ti.com
9 Typical Characteristics
r
− N−Channel Main Switch − mΩ
DS(on)
350
300
Vo1 = 5 V
250
200
Vo1 = 10 V
150
Vo1 = 15 V
100
−40
−20
0
20
40
60
80
100
TA − Free-Air Temperature − °C
Figure 1. rDS(on) N-Channel Main Switch vs Free-air Temperature
8
Submit Documentation Feedback
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
TPS65140-Q1
TPS65145-Q1
www.ti.com
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
10 Detailed Description
10.1 Overview
The TPS65140-Q1 and TPS65145-Q1 devices consist of a main boost converter operating with a fixed switching
frequency of 1.6 MHz to allow for small external components. The boost converter output voltage Vo1 is also the
input voltage for the positive and negative charge pump, connected via the pin SUP. The linear regulator
controller is independent from this system with its own enable pin. This allows the linear regulator controller to
continue to operate while the other supply rails are disabled or in shutdown due to a fault condition on one of
their outputs. Refer to the functional block diagram for more information.
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
Submit Documentation Feedback
9
TPS65140-Q1
TPS65145-Q1
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
www.ti.com
10.2 Functional Block Diagram
VIN
SW
SW
Q2
Main boost
converter
EN
FB1
FB2
FB3
Bias Vref = 1.213 V
Thermal Shutdown
Start−Up Sequencing
Undervoltage Detection
Overvoltage Detection
Short Circuit Protection
D
S
Current Limit
and
Soft Start
1.6-MHz
Oscillator
SUP
Control Logic
Gate Drive Circuit
D
Q1
COMP
S
Comparator
Sawtooth
Generator
FB1
VFB
1.146 V
SUP
FB3
SUP
(VO)
Positive
Charge Pump
GM Amplifier
Low Gain
SUP
D
VFB
1.146 V
Current
Control
S
Gain Select
(Doubler or
Tripler Mode)
D
Vref
1.214 V
Q3
C1−
S
Q4
SUP
Negative
Charge Pump
SUP
Soft Start
D
S
DRV
D
Q7
S
D
Q9
C1+
Current
Control
Soft Start
Q8
SUP
Vo3
S
D2
D
S
D1
D4
Q5
C2+
FB2
D
Vref
0V
D3
Q6
S
C2−
Reference
Output
Vref
REF
1.213 V
Soft Start
Iref = 20 mA
Short Circuit
Detect
Vref
1.213 V
Vin
System Power
Good
PG
FB1
~1 V
D
FB2
FB4
D
Linear
Regulator
Controller
S
Vref
1.213 V
Q10
Logic and
1-ms Glitch
Filter
S
FB3
ENR
BASE
GND
GND
PGND
PGND
Copyright © 2016, Texas Instruments Incorporated
10
Submit Documentation Feedback
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
TPS65140-Q1
TPS65145-Q1
www.ti.com
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
10.3 Feature Description
10.3.1 Main Boost Converter
The main boost converter operates with PWM and a fixed switching frequency of 1.6 MHz. The converter uses a
unique fast response, voltage mode controller scheme with input voltage feedforward. This achieves excellent
line and load regulation (0.2% A load regulation typical) and allows the use of small external components. To add
higher flexibility to the selection of external component values, the device uses external loop compensation.
Although the boost converter looks like a nonsynchronous boost converter topology operating in discontinuous
mode at light load, both devices maintain continuous conduction even at light load currents.
This is achieved with a novel architecture using an external Schottky diode and an integrated MOSFET in parallel
connected between SW and SUP (see the functional block diagram). The integrated MOSFET Q2 allows the
inductor current to become negative at light load conditions. For this purpose, a small integrated P-channel
MOSFET with typically 10 Ω rDS(on) is sufficient. When the inductor current is positive, the external Schottky diode
with the lower forward voltage conducts the current. This causes the converter to operate with a fixed frequency
in continuous conduction mode over the entire load current range. This avoids the ringing on the switch pin as
seen with a standard nonsynchronous boost converter and allows a simpler compensation for the boost
converter.
10.3.2 Power-Good Output
The TPS65140-Q1 and TPS65145-Q1 have an open-drain power-good output with a maximum sink capability of
1 mA. The power-good output goes high as soon as the main boost converter Vo1 and the negative and the
positive charge pumps are within regulation. The power-good output goes low as soon as one of the outputs is
out of regulation. In this case, the device goes into shutdown at the same time. See the electrical characteristics
table for the power-good thresholds.
10.4 Device Functional Modes
10.4.1 Enable and Power-On Sequencing (EN, ENR)
The device has two enable pins. These pins should be terminated and not left floating to prevent faulty operation.
Pulling the enable pin (EN) high enables the device and starts the power-on sequencing with the main boost
converter Vo1 coming up first, then the negative and positive charge pumps. The linear regulator has an
independent enable pin (ENR). Pulling this pin low disables the regulator, and pulling this pin high enables this
regulator.
If the enable pin (EN) is pulled high, the device starts its power-on sequencing. The main boost converter starts
up first with its soft start. If the output voltage has reached 91.25% of its output voltage, the negative charge
pump comes up next. The negative charge pump starts with a soft start and when the output voltage has
reached 91% of the nominal value, the positive charge pump comes up with the soft start.
Pulling the enable pin low shuts down the device. Dependent on load current and output capacitance, each of
the outputs comes down.
10.4.2 Positive Charge Pump
The TPS65140-Q1 and TPS65145-Q1 has a fully regulated integrated positive charge pump generating Vo3. The
input voltage for the charge pump is applied to the SUP pin that is equal to the output of the main boost
converter Vo1. The charge pump is capable of supplying a minimum load current of 20 mA. Higher load currents
are possible depending on the voltage difference between Vo1 and Vo3. See Figure 13 and Figure 14.
10.4.3 Negative Charge Pump
The TPS65140-Q1 and TPS65145-Q1 has a regulated negative charge pump using two external Schottky
diodes. The input voltage for the charge pump is applied to the SUP pin that is connected to the output of the
main boost converter Vo1. The charge pump inverts the main boost converter output voltage and is capable of
supplying a minimum load current of 20 mA. Higher load currents are possible depending on the voltage
difference between Vo1 and Vo2. See Figure 12.
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
Submit Documentation Feedback
11
TPS65140-Q1
TPS65145-Q1
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
www.ti.com
Device Functional Modes (continued)
10.4.4 Linear Regulator Controller
The TPS65140-Q1 and TPS65145-Q1 includes a linear regulator controller to generate a 3.3-V rail which is
useful when the system is powered from a 5-V supply. The regulator is independent from the other voltage rails
of the device and has its own enable (ENR).
10.4.5 Soft Start
The main boost converter as well as the charge pumps and linear regulator have an internal soft start. This
avoids heavy voltage drops at the input voltage rail or at the output of the main boost converter Vo1 during startup caused by high inrush currents. See Figure 10 and Figure 11.
10.4.6 Fault Protection
All of the outputs of the TPS65140-Q1 and TPS65145-Q1 devices have short-circuit detection and cause the
device to go into shutdown. The main boost converter has overvoltage and undervoltage protection. If the output
voltage Vo1 rises above the overvoltage protection threshold of typically 5% of Vo1, then the device stops
switching, but remains operational.
When the output voltage falls below this threshold, the converter continues operation. When the output voltage
falls below the undervoltage protection threshold of typically 8.75% of Vo1, because of a short-circuit condition,
the devices go into shutdown. Because there is a direct pass from the input to the output through the diode, the
short-circuit condition remains. If this condition needs to be avoided, a fuse at the input or an output disconnect
using a single transistor and resistor is required. The negative and positive charge pumps have an undervoltage
lockout (UVLO) to protect the LCD panel of possible latch-up conditions due to a short-circuit condition or faulty
operation. When the negative output voltage is typically above 9.5% of its output voltage (closer to ground), then
the device enters shutdown. When the positive charge pump output voltage, Vo3, is below 8% typical of its
output voltage, the device goes into shutdown. See the fault protection thresholds in the electrical characteristics
table. The device is enabled by toggling the enable pin (EN) below 0.4 V or by cycling the input voltage below
the UVLO of 1.7 V. The linear regulator reduces the output current to 20 mA typical under a short-circuit
condition when the output voltage is typically < 1 V. See the Functional Block Diagram. The linear regulator does
not go into shutdown under a short-circuit condition.
10.4.7 Thermal Shutdown
A thermal shutdown is implemented to prevent damage due to excessive heat and power dissipation. Typically,
the thermal shutdown threshold is 160°C. If this temperature is reached, the device goes into shutdown. The
device can be enabled by toggling the enable pin to low and back to high or by cycling the input voltage to GND
and back to VI again.
12
Submit Documentation Feedback
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
TPS65140-Q1
TPS65145-Q1
www.ti.com
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
11 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
11.1 Application Information
This section describes the design of a boost converter example for a 3.3-V to 10-V conversion.
11.2 Typical Application
A typical application requirement is to boost a 3.3-V or 5-V input to a 10-V, 13.5-V, or 15-V output. The section
explains the step-by-step development.
L1
3.3 μH
Vin
3.3 V
C3
22 μF
C13
1 nF
TPS65140-Q1
R7
15 kΩ
VIN
C1
0.22 μF
D2
C12 0.22μF
Vo2
−5 V / 20 mA
C6
0.22 μF
Vo1
10 V / 150 mA
D1
COMP
GND
EN
ENR
C1+
C1−
DRV
C4
22 μF
R2
56kΩ
C2+
C2−/MODE
OUT3
FB2
REF
FB4
BASE
D3
R3
620 kΩ
R1
430 Ω
C5
6.8 pF
SW
SW
FB1
SUP
C2
0.22 μF
FB3
PG
PGND
PGND
GND
Vo3
up to 23 V/20 mA
R5
1 MΩ
C7
0.22 μF
R6
56 kΩ
R4
150 kΩ
C11
220 nF
Vin
R7 System Power
33 kΩ
Good
Copyright © 2016, Texas Instruments Incorporated
11.2.1 Design Requirements
Table 1 shows the design parameters for this example.
Table 1. Design Requirements
PARAMETER
Example Value
VALUE
VI
Input supply voltage
3.3 V
2.7 V to 5.8 V
VO1
Boost converter output voltage and current
10 V @ 300 mA
Up to 15 V at
350 mA
VO3
Positive charge pump output voltage and
current
23 V @ 20 mA
Up to 30 V at 20
mA
VO2
Negative charge pump output voltage and
current
–5 V @ 20 mA
Down to –12 V
at 20 mA
VO4
Linear regulator controller output voltage
and current
3.3 V
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
3.3 V at 500 mA
Submit Documentation Feedback
13
TPS65140-Q1
TPS65145-Q1
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
www.ti.com
Table 1. Design Requirements (continued)
PARAMETER
Example Value
VALUE
VSW
Switch voltage drop
0.5 V
—
VD
Schottky diode forward voltage
0.8 V
—
11.2.2 Detailed Design Procedure
11.2.2.1 Boost Converter Design Procedure
The first step in the design procedure is to calculate the maximum possible output current of the main boost
converter under certain input and output voltage conditions.
1. Duty cycle:
Vout ) V * V
D
in + 10 V ) 0.8 V * 3.3 V + 0.73
D+
V out ) V * V sw
10 V ) 0.8 V * 0.5 V
D
(1)
2. Average inductor current:
I
I + out + 300 mA + 1.11 A
L
1 * 0.73
1*D
(2)
3. Inductor peak-to-peak ripple current:
Di +
L
ƪVin * Vswƫ
fs
L
D
+
(3.3 V * 0.5 V) 0.73
+ 304 mA
1.6 MHz 4.2 mH
(3)
4. Peak switch current:
Di
I
+ I ) L + 1.11 A ) 304 mA + 1.26 A
swpeak
L
2
2
(4)
The integrated switch, the inductor, and the external Schottky diode must be able to handle the peak switch
current. The calculated peak switch current has to be equal or lower to the minimum N-MOSFET switch
current limit as specified in the electrical characteristics table (1.6 A for the TPS65140 and 0.96 A for the
TPS65145). If the peak switch current is higher, then the converter cannot support the required load current.
This calculation must be done for the minimum input voltage where the peak switch current is highest. The
calculation includes conduction losses like switch rDS(on) (0.5 V) and diode forward drop voltage losses (0.8
V). Additional switching losses, inductor core and winding losses, etc., require a slightly higher peak switch
current in the actual application. The above calculation still allows for a good design and component
selection.
11.2.2.1.1 Set the Output Voltage VO1 and Select the Feedforward Capacitor
The output voltage is set by the external resistor divider and is calculated as:
V out + 1.146 V
ƫ
ƪ1 ) R1
R2
(5)
Across the upper resistor, a bypass capacitor is required to speed up the circuit during load transients as shown
in Figure 2.
14
Submit Documentation Feedback
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
TPS65140-Q1
TPS65145-Q1
www.ti.com
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
VO1
Up to 10 V/150 mA
D1
C8
6.8 pF
SW
SW
FB1
SUP
C2+
C2−/MODE
C2
0.22 µF
C4
22 µF
R1
430 kΩ
R2
56 kΩ
Figure 2. Feed-forward Capacitor
Together with R1 the bypass capacitor C8 sets a zero in the control loop at approximately 50 kHz:
1
1
C8 +
+
2 p f z R1
2 p 50 kHz R1
(6)
A value closest to the calculated value should be used. Larger feedforward capacitor values reduce the load
regulation of the converter and cause load steps as shown in Figure 15.
11.2.2.1.2 Inductor Selection
Several inductors work with the TPS65140. Especially with the external compensation, the performance can be
adjusted to the specific application requirements. The main parameter for the inductor selection is the saturation
current of the inductor, which should be higher than the peak switch current as calculated above with additional
margin to cover for heavy load transients and extreme start-up conditions. Another method is to choose the
inductor with a saturation current at least as high as the minimum switch current limit of 1.6 A for the TPS65140
and 0.96 A for the TPS65145. The different switch current limits allow selection of a physically smaller inductor
when less output current is required. The second important parameter is the inductor dc resistance. Usually, the
lower the dc resistance, the higher the efficiency. However, the inductor dc resistance is not the only parameter
determining the efficiency. Especially for a boost converter where the inductor is the energy storage element, the
type and material of the inductor influences the efficiency as well. Especially at high switching frequencies of
1.6 MHz, inductor core losses, proximity effects, and skin effects become more important. Usually, an inductor
with a larger form factor yields higher efficiency. The efficiency difference between different inductors can vary
between 2% to 10%. For the TPS65140, inductor values between 3.3 µH and 6.8 µH are a good choice but other
values can be used as well. Possible inductors are shown in Table 2.
Table 2. Inductor Selection
DEVICE
TPS65140
TPS65145
(1)
INDUCTOR VALUE
COMPONENT SUPPLIER (1)
DIMENSIONS
ISAT/DCR
4.7 µH
Coilcraft DO1813P-472HC
8.89*6.1*5.0
2.6 A/54 mΩ
4.2 µH
Sumida CDRH5D28 4R2
5.7*5.7*3
2.2 A/23 mΩ
4.7 µH
Sumida CDC5D23 4R7
6*6*2.5
1.6 A/48 mΩ
3.3 µH
Wuerth Elektronik 744042003
4.8*4.8*2.0
1.8 A/65 mΩ
4.2 µH
Sumida CDRH6D12 4R2
6.5*6.5*1.5
1.8 A/60 mΩ
3.3 µH
Sumida CDRH6D12 3R3
6.5*6.5*1.5
1.9 A/50 mΩ
3.3 µH
Sumida CDPH4D19 3R3
5.1*5.1*2.0
1.5 A/26 mΩ
3.3 µH
Coilcraft DO1606T-332
6.5*5.2*2.0
1.4 A/120 mΩ
3.3 µH
Sumida CDRH2D18/HP 3R3
3.2*3.2*2.0
1.45 A/69 mΩ
4.7 µH
Wuerth Elektronik 744010004
5.5*3.5*1.0
1.0 A/260 mΩ
3.3 µH
Coilcraft LPO6610-332M
6.6*5.5*1.0
1.3 A/160 mΩ
See Third-party Products Disclaimer
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
Submit Documentation Feedback
15
TPS65140-Q1
TPS65145-Q1
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
www.ti.com
11.2.2.1.3 Output Capacitor Selection
For best output voltage filtering, a low ESR output capacitor is recommended. Ceramic capacitors have a low
ESR value but depending on the application, tantalum capacitors can be used as well. A 22-µF ceramic output
capacitor works for most of the applications. Higher capacitor values can be used to improve load transient
regulation. See Table 3 for the selection of the output capacitor. The output voltage ripple can be calculated as:
I
DV out + out
Cout
ƪ
ƫ
Ip L
1*
) Ip
f s Vout ) V * V
d
in
ESR
(7)
with:
Ip = Peak current as described in the previous section peak current control
L = Selected inductor value
Iout = Nominal load current
fs = Switching frequency
Vd = Rectifier diode forward voltage (typically 0.3 V)
Cout = Selected output capacitor
ESR = Output capacitor ESR value
11.2.2.1.4 Input Capacitor Selection
For good input voltage filtering, low ESR ceramic capacitors are recommended. A 22-µF ceramic input capacitor
is sufficient for most of applications. For better input voltage filtering, this value can be increased. See Table 3
and the Typical Applications section for input capacitor recommendations.
Table 3. Input and Output Capacitors Selection
(1)
CAPACITOR
VOLTAGE RATING
COMPONENT SUPPLIER (1)
COMMENTS
22 µF/1210
16 V
Taiyo Yuden EMK325BY226MM
COUT
22 µF/1206
6.3 V
Taiyo Yuden JMK316BJ226
CIN
See Third-party Products Disclaimer
11.2.2.1.5 Rectifier Diode Selection
To achieve high efficiency, a Schottky diode should be used. The voltage rating should be higher than the
maximum output voltage of the converter. The average forward current should be equal to the average inductor
current of the converter. The main parameter influencing the efficiency of the converter is the forward voltage and
the reverse leakage current of the diode; both should be as low as possible. Possible diodes are: On
Semiconductor MBRM120L, Microsemi UPS120E, and Fairchild Semiconductor MBRS130L.
11.2.2.1.6 Converter Loop Design and Stability
The TPS65140/45 converter loop can be externally compensated and allows access to the internal
transconductance error amplifier output at the COMP pin. A small feedforward capacitor across the upper
feedback resistor divider speeds up the circuit as well. To test the converter stability and load transient
performance of the converter, a load step from 50 mA to 250 mA is applied and the output voltage of the
converter is monitored. Applying load steps to the converter output is a good tool to judge the stability of such a
boost converter.
The following will provide quick steps how design the feedforward network:
1. Select the feedback resistor divider to set the output voltage.
2. Select the feedforward capacitor to place a zero at 50 kHz.
3. Select the compensation capacitor on pin COMP. The smaller the value, the higher the low frequency gain.
4. Use a 50-kΩ potentiometer in series to Cc and monitor Vout during load transients. Fine tune the load
transient by adjusting the potentiometer. Select a resistor value that comes closest to the potentiometer
resistor value. This needs to be done at the highest VIN and highest load current because stability is most
critical at these conditions.
16
Submit Documentation Feedback
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
TPS65140-Q1
TPS65145-Q1
www.ti.com
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
11.2.2.2 Negative Charge Pump
The negative charge pump provides a regulated output voltage by inverting the main output voltage, VO1. The
negative charge pump output voltage is limited by VO1 and set with external feedback resistors.
The maximum load current of the negative charge pump depends on the voltage drop across the external
Schottky diodes and the internal ON-resistance of the charge pump MOSFETS Q8 and Q9. When the voltage
drop across these components is larger than the voltage difference from VO1 to VO2, the charge pump is in drop
out, providing the maximum possible output current. Therefore, the higher the voltage difference between VO 1
and VO2, the higher the possible load current. See Figure 12 for the possible output current versus boost
converter voltage VO1 and the calculations below.
VOUTmin = –(VO1 – 2 VF – IO (2 × rDS(on)Q8 + 2 × rDS(on)Q9 ))
(8)
Setting the output voltage:
VOUT = -VREF x R3 = -1.213 V x R3
R4
R4
|VOUT|
|VOUT|
R3 = R4 x
= R4 x
VREF
1.213
(9)
(10)
The lower feedback resistor value, R4, must be in a range from 40 kΩ to 120 kΩ or the overall feedback
resistance must be within 500 kΩ to 1 MΩ. Smaller values load the reference too heavy and larger values may
cause stability problems. The negative charge pump requires two external Schottky diodes. The peak current
rating of the Schottky diode must be twice the load current of the output. For a 20-mA output current, the dual
Schottky diode BAT54 or similar is a good choice.
11.2.2.3 Positive Charge Pump
The positive charge pump can be operated in a voltage doubler mode or a voltage tripler mode.
The output voltage needs to be within the voltage ranges of the configuration, see Voltage Doubler Mode and
Voltage Tripler Mode. The output voltage within its limitation is set by the external resistor divider and is
calculated as:
æ R5 ö
VOUT = 1.214 ´ ç 1 +
÷
è R6 ø
(11)
æV
ö
æV
ö
R5 = R6 ´ ç OUT - 1÷ = R6 ´ ç OUT - 1÷
V
1.214
è
ø
è FB
ø
(12)
The maximum load current of the positive charge pump depends on the voltage drop across the internal Schottky
diodes, the internal ON-resistance of the charge pump MOSFETS, and the impedance of the flying capacitor.
When the voltage drop across these components is larger than the voltage difference VO1 × 2 to VO3 (doubler
mode) or VO1 × 3 to VO3 (tripler mode), then the charge pump is in dropout, providing the maximum possible
output current. Therefore, the higher the voltage difference between VO1 x 2 (doubler) or VO1 × 3 (tripler) to VO3,
the higher the possible load current. See Figure 13 and Figure 14 for output current versus boost converter
voltage, VO1, and the following calculations.
11.2.2.3.1 Voltage Doubler Mode
•
•
Leave C2+ pin open
Connect C2–/Mode to GND
The following shows first order formulas to calculate the minimum and maximum output voltages of the positive
charge pump in doubler mode
• Minimum: VO3min = VO1
• Maximum: VO3max = 2 × VO1 – (2 VF + 2 × IO × (2 × rDS(on)Q5 + rDS(on)Q3 + rDS(on)Q4))
For detailed information how to estimate the output voltage ranges refer to How to Estimate the Output Voltage
Range of the Charge Pumps in the TPS6510x and TPS6514x, SLVA918.
11.2.2.3.2 Voltage Tripler Mode
•
Connect flying capacitor to C2+ and C2–/MODE
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
Submit Documentation Feedback
17
TPS65140-Q1
TPS65145-Q1
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
www.ti.com
The following shows first order formulas to calculate the minimum and maximum output voltages of the positive
charge pump in doubler mode
• Minimum: VO3min = 2 × VO1 – (2 VF + 2 × IO × (2 × rDS(on)Q5 + rDS(on)Q3 + rDS(on)Q4))
• Maximum: VO3max = 3 × VO1 – (4 × VF + 2 × IO × (3 × rDS(on)Q5 + rDS(on)Q3 + rDS(on)Q4 ))
For detailed information how to estimate the output voltage ranges refer to How to Estimate the Output Voltage
Range of the Charge Pumps in the TPS6510x and TPS6514x, SLVA918.
11.2.2.4 Linear Regulator Controller
The TPS65140-Q1 and TPS65145-Q1 devices include a linear regulator controller to generate a 3.3-V rail when
the system is powered from a 5-V supply. Because an external NPN transistor is required, the input voltage
applied to VIN must be higher than the output voltage of the regulator. To provide a minimum base drive current
of 13.5 mA, a minimum internal voltage drop of 500 mV from VI to Vbase is required. This can be translated into a
minimum input voltage on VI for a certain output voltage as the following calculation shows:
VI(min) = VO4 + VBE + 0.5 V
(13)
The base drive current together with the hFE of the external transistor determines the possible output current.
Using a standard NPN transistor like the BCP68 allows an output current of 1 A and using the BCP54 allows a
load current of 337 mA for an input voltage of 5 V. Other transistors can be used as well, depending on the
required output current, power dissipation, and PCB space. The device is stable with a 4.7-µF ceramic output
capacitor. Larger output capacitor values can be used to improve the load transient response when higher load
currents are required.
11.2.3 Application Curves
Table 4. Table of Graphs
FIGURE
Main Boost Converter
η
Efficiency VO1
vs Load current
1
Efficiency VO1
vs Load current
2
Efficiency VO1
vs Input voltage
3
PWM operation continuous mode
3
PWM operation at light load
4
Load transient response, CO = 22 µF
6
Load transient response, CO = 2 x 22 µF
7
Power-up sequencing
8
Soft start Vo1
9
Negative Charge Pump
Imax
Vo2 maximum load current
vs Output voltage Vo1
10
Positive Charge Pump
Imax
Vo3 maximum load current
vs Output voltage Vo1 (doubler mode)
11
Imax
Vo3 Maximum load current
vs Output voltage Vo1 (tripler mode)
12
18
Submit Documentation Feedback
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
TPS65140-Q1
TPS65145-Q1
www.ti.com
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
100
100
90
90
Vo1 = 6 V
80
Vo1 = 10 V
70
Efficiency − %
Efficiency − %
80
60
50
Vo1 = 15 V
40
30
70
Vo1 = 10 V
60
50
Vo1 = 15 V
40
30
VI = 3.3 V
Vo2, Vo3 = No Load, Switching
20
10
VI = 5 V
Vo2, Vo3 = No Load, Switching
20
10
1
10
100
1k
1
10
IL − Load Current − mA
100
1k
IL − Load Current − mA
Figure 3. Efficiency VO1 vs Load Current
Figure 4. Efficiency VO1 vs Load Current
100
ILoad at Vo1 = 100 mA
Vo2, Vo3 = No Load, Switching
Efficiency − %
95
VSW
10 V/div
Vo1 = 6 V
90
Vo2 = 10 V
VO
50 mV/div
85
Vo3 = 15 V
80
75
70
2.5
IL
1 A/div
3
3.5
4
4.5
5
5.5
VI = 3.3 V
VO = 10 V/300 mA
6
VI − Input Voltage − V
250 ns/div
Figure 6. PWM Operation Continuous Mode
Figure 5. Efficiency VO1 vs Input Voltage
VSW
10 V/div
Vo1
200 mV/div
VO
50 mV/div
VI = 3.3 V
VO = 10 V/10 mA
IL
500 mA/div
IO
50 mA to 250 mA
VI = 3.3 V
Vo1 = 10 V, CO= 22 µF
100 µs/div
250 ns/div
Figure 7. PWM Operation at Light Load
Figure 8. Load Transient Response 1 x CO
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
Submit Documentation Feedback
19
TPS65140-Q1
TPS65145-Q1
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
www.ti.com
VI = 3.3 V
Vo1 = 10 V, CO= 2*22 µF
Vo1
100 mV/div
Vo1
5 V/div
Vo2
5 V/div
Vo3
10 V/div
VI = 3.3 V
VO = 10 V,
IO
50 mA to 250 mA
100 µs/div
500 µs/div
Figure 9. Load Transient Response 2 x CO
Figure 10. Power-up Sequencing
0.20
VI = 3.3 V
VO = 10 V,
IO = 300 mA
Vo2 = −8 V
0.18
TA = −40°C
I O − Output Current − A
0.16
Vo1
5 V/div
II
500
mA/div
0.14
TA = 85°C
0.12
0.10
TA = 25°C
0.08
0.06
0.04
0.02
0
8.8
500 µs/div
9.8
10.8
11.8
12.8
14.8
Figure 12. Vo2 Maximum Load Current
0.14
0.12
TA = −40°C
Vo3 = 18 V (Doubler Mode)
0.12
0.10
TA = −40°C
I O − Output Current − A
I O − Output Current − A
13.8
Vo1 − Output Voltage − V
Figure 11. Soft Start VO1
TA = 85°C
0.10
TA = 25°C
0.08
0.06
0.04
TA = 25°C
0.08
TA = 85°C
0.06
0.04
0.02
0.02
Vo3 = 28 V (Tripler Mode)
0
9
10
11
12
13
14
0
15
9
10
11
12
13
14
15
Vo1 − Output Voltage − V
Vo1 − Output Voltage − V
Figure 13. Vo3 Maximum Load Current (doubler mode)
Figure 14. Vo3 Maximum Load Current (tripler mode)
Load Step
Figure 15. Load Step Caused By A Too Large Feed-forward Capacitor Value
20
Submit Documentation Feedback
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
TPS65140-Q1
TPS65145-Q1
www.ti.com
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
11.3 System Examples
L1
3.3 μH
Vin
3.3 V
C3
22 μF
C13
1 nF
TPS65140-Q1
R7
15 kΩ
VIN
C1
0.22 μF
D2
C12 0.22μF
Vo2
−5 V / 20 mA
COMP
GND
EN
ENR
C1+
C1−
DRV
R3
620 kΩ
R1
430 Ω
C5
6.8 pF
SW
SW
FB1
SUP
C4
22 μF
R2
56kΩ
C2+
C2−/MODE
OUT3
C2
0.22 μF
Vo3
up to 23 V/20 mA
FB3
PG
PGND
PGND
GND
FB2
REF
FB4
BASE
D3
C6
0.22 μF
Vo1
10 V / 150 mA
D1
R5
1 MΩ
C7
0.22 μF
R6
56 kΩ
R4
150 kΩ
C11
220 nF
Vin
R7 System Power
33 kΩ
Good
Copyright © 2016, Texas Instruments Incorporated
Figure 16. Typical Application, Notebook Supply
L1
4.7 μH
Vin
5.0 V
C3
22 μF
C13
2.2 nF
TPS65140-Q1
R7
4.3 kΩ
VIN
COMP
GND
EN
C1
ENR
0.22 μF
C1+
C1−
C12 0.22 μF
DRV
D2
Vo2
−7 V / 20 mA
R3
750 kΩ
C5
3.3 pF
SW
SW
FB1
SUP
R1
820 Ω
Vo3
up to 23 V/20 mA
FB3
PG
PGND
PGND
GND
R5
1 MΩ
C7
0.22 μF
R6
56 kΩ
R4
130 kΩ
C11
220 nF
C4
22 μF
R2
75 kΩ
C2+
C2−/MODE
OUT3
FB2
REF
FB4
BASE
D3
C6
0.22
Vo1
13.5 V / 400 mA
D1
Q1
BCP68
Vin
C9
1 μF
Vo4
3.3 V/ 500 mA
Vin
R7 System Power
33 kΩ
Good
C10
4.7 μF
Copyright © 2016, Texas Instruments Incorporated
Figure 17. Typical Application, Monitor Supply
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
Submit Documentation Feedback
21
TPS65140-Q1
TPS65145-Q1
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
www.ti.com
12 Power Supply Recommendations
The TPS65140-Q1 and TPS65145-Q1 devices are designed to operate from an input voltage supply range from
2.7 V to 5.8 V. This input supply must be well regulated. The input capacitance shown in the application
schematics in this data sheet is sufficient for typical applications.
13 Layout
13.1 Layout Guidelines
For all switching power supplies, the layout is an important step in the design, especially at high-peak currents
and switching frequencies. If the layout is not carefully designed, the regulator might show stability and EMI
problems. TI recommends the following PCB layout guidelines for the devices:
• Connect PGND and AGND together on the same ground plane.
• Connect all capacitor grounds and PGND together on a common ground plane.
• Place the input filter capacitor as close as possible to the input pin of the IC.
• Route first the traces carrying high-switching currents with wide and short traces.
• Isolate analog signal paths from power paths.
• If vias are necessary, try to use more than one in parallel to decrease parasitics, especially for power traces.
• Solder the thermal pad to the PCB for good thermal performance
13.2 Thermal Information
An influential component of the thermal performance of a package is board design. To take full advantage of the
heat dissipation abilities of the PowerPAD or QFN package with exposed thermal die, a board that acts similar to
a heatsink and allows for the use of an exposed (and solderable) deep downset pad should be used. For further
information see Texas Instrumens application notes (SLMA002) PowerPAD Thermally Enhanced Package and
(SLMA004) Power Pad Made Easy. For the QFN package, see the application report (SLUA271) QFN/SON PCB
Attachement.
22
Submit Documentation Feedback
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
TPS65140-Q1
TPS65145-Q1
www.ti.com
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
13.3 Layout Example
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
Submit Documentation Feedback
23
TPS65140-Q1
TPS65145-Q1
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
www.ti.com
14 Device and Documentation Support
14.1 Device Support
14.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
14.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to order now.
Table 5. Related Links
PARTS
PRODUCT FOLDER
ORDER NOW
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TPS65140-Q1
Click here
Click here
Click here
Click here
Click here
TPS65145-Q1
Click here
Click here
Click here
Click here
Click here
14.3 Documentation Support
14.3.1 Related Documentation
For related documentation see the following Application Notes and Marketing Selection Guide:
How to Compensate with the TPS6510x and TPS6514x SLVA813.
Basic Calculation of a Boost Converter's Power Stage SLVA372
Customizing your TPS6510x/TPS6514x SLVA192
Power Management Guide 2016 at www.ti.com
14.4 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
14.5 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
14.6 Trademarks
PowerPAD, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
14.7 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
24
Submit Documentation Feedback
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
TPS65140-Q1
TPS65145-Q1
www.ti.com
SGLS277B – NOVEMBER 2004 – REVISED SEPTEMBER 2017
14.8 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
15 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: TPS65140-Q1 TPS65145-Q1
Submit Documentation Feedback
25
PACKAGE OPTION ADDENDUM
www.ti.com
1-Aug-2017
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPS65140IPWPRQ1
ACTIVE
HTSSOP
PWP
24
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
65140IQ1
TPS65145IPWPRQ1
ACTIVE
HTSSOP
PWP
24
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
65145IQ1
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
1-Aug-2017
OTHER QUALIFIED VERSIONS OF TPS65140-Q1, TPS65145-Q1 :
• Catalog: TPS65140, TPS65145
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
Addendum-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its
semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers
should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
TI’s published terms of sale for semiconductor products (http://www.ti.com/sc/docs/stdterms.htm) apply to the sale of packaged integrated
circuit products that TI has qualified and released to market. Additional terms may apply to the use or sale of other types of TI products and
services.
Reproduction of significant portions of TI information in TI data sheets is permissible only if reproduction is without alteration and is
accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such reproduced
documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements
different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the
associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Buyers and others who are developing systems that incorporate TI products (collectively, “Designers”) understand and agree that Designers
remain responsible for using their independent analysis, evaluation and judgment in designing their applications and that Designers have
full and exclusive responsibility to assure the safety of Designers' applications and compliance of their applications (and of all TI products
used in or for Designers’ applications) with all applicable regulations, laws and other applicable requirements. Designer represents that, with
respect to their applications, Designer has all the necessary expertise to create and implement safeguards that (1) anticipate dangerous
consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that might cause harm and
take appropriate actions. Designer agrees that prior to using or distributing any applications that include TI products, Designer will
thoroughly test such applications and the functionality of such TI products as used in such applications.
TI’s provision of technical, application or other design advice, quality characterization, reliability data or other services or information,
including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to
assist designers who are developing applications that incorporate TI products; by downloading, accessing or using TI Resources in any
way, Designer (individually or, if Designer is acting on behalf of a company, Designer’s company) agrees to use any particular TI Resource
solely for this purpose and subject to the terms of this Notice.
TI’s provision of TI Resources does not expand or otherwise alter TI’s applicable published warranties or warranty disclaimers for TI
products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections,
enhancements, improvements and other changes to its TI Resources. TI has not conducted any testing other than that specifically
described in the published documentation for a particular TI Resource.
Designer is authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that
include the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE
TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY
RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or
endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
TI RESOURCES ARE PROVIDED “AS IS” AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR
REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TO
ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL
PROPERTY RIGHTS. TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY DESIGNER AGAINST ANY CLAIM,
INCLUDING BUT NOT LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF
PRODUCTS EVEN IF DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL,
DIRECT, SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN
CONNECTION WITH OR ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN
ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Unless TI has explicitly designated an individual product as meeting the requirements of a particular industry standard (e.g., ISO/TS 16949
and ISO 26262), TI is not responsible for any failure to meet such industry standard requirements.
Where TI specifically promotes products as facilitating functional safety or as compliant with industry functional safety standards, such
products are intended to help enable customers to design and create their own applications that meet applicable functional safety standards
and requirements. Using products in an application does not by itself establish any safety features in the application. Designers must
ensure compliance with safety-related requirements and standards applicable to their applications. Designer may not use any TI products in
life-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use.
Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life
support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, all
medical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S.
TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product).
Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications
and that proper product selection is at Designers’ own risk. Designers are solely responsible for compliance with all legal and regulatory
requirements in connection with such selection.
Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s noncompliance with the terms and provisions of this Notice.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2017, Texas Instruments Incorporated
Was this manual useful for you? yes no
Thank you for your participation!

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project

Download PDF

advertisement