Memory Module Specifications
12GB (4GB 512M x 72-Bit x 3 pcs.) PC3L-10600
CL9 Registered w/Parity 240-Pin DIMM Kit
ValueRAM's KVR13LR9S4K3/12 is a kit of three 512M x 72-bit
9 cycles
(4GB) DDR3L-1333 CL9 SDRAM (Synchronous DRAM), low
Row Cycle Time (tRCmin)
49.5ns (min.)
voltage, registered w/parity, 1Rx4 ECC memory modules,
Refresh to Active/Refresh
Command Time (tRFCmin)
160ns (min.)
based on eighteen 512M x 4-bit FBGA components. Total kit
capacity is 12GB. The SPDs are programmed to JEDEC
Row Active Time (tRASmin)
36ns (min.)
standard latency DDR3-1333 timing of 9-9-9 at 1.35V and 1.5V.
Maximum Operating Power
(1.35V) = 5.040 W*
Each 240-pin DIMM uses gold contact fingers. The electrical
and mechanical specifications are as follows:
(1.50V) = 6.006 W*
UL Rating
94 V - 0
Operating Temperature
0o C to 85o C
Storage Temperature
-55o C to +100o C
JEDEC standard 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~
1.575V) Power Supply
*Power will vary depending on the SDRAM and
Register/PLL used.
VDDQ = 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~ 1.575V)
667MHz fCK for 1333Mb/sec/pin
8 independent internal bank
Programmable CAS Latency: 9, 8, 7, 6
Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
Programmable CAS Write Latency(CWL) = 7 (DDR3-1333)
8-bit pre-fetch
Burst Length: 8 (Interleave without any limit, sequential with
starting address “000” only), 4 with tCCD = 4 which does not
allow seamless read or write [either on the fly using A12 or
Bi-directional Differential Data Strobe
Internal(self) calibration : Internal self calibration through ZQ
pin (RZQ : 240 ohm ± 1%)
On Die Termination using ODT pin
On-DIMM thermal sensor (Grade B)
Average Refresh Period 7.8us at lower than TCASE 85°C,
3.9us at 85°C < TCASE < 95°C
Asynchronous Reset
PCB : Height 1.180” (30.00mm), double sided component
Continued >>
Document No. VALUERAM1221-001.B00
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(units = millimeters)
Document No. VALUERAM1221-001.B00
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