100Gb/s QSFP28 LR4 Optical Transceiver TR-FC13L

TR- FC13L-N00 Rev1.3
100Gb/s QSFP28 LR4 Optical Transceiver
TR-FC13L-N00
Product Specification
Features

Hot pluggable QSFP28 MSA form factor

Compliant to IEEE 802.3ba 100GBASE-LR4

Supports 103.1Gb/s aggregate bit rate

Up to 10km reach for G.652 SMF

Single +3.3V power supply

Operating case temperature: 0~70oC

Transmitter: cooled 4x25Gb/s LAN WDM EML
Module picture shown above is
that of InnoLight standard part
and is for reference.
TOSA (1295.56, 1300.05, 1304.58, 1309.14nm)

Receiver: 4x25Gb/s PIN ROSA

4x25G electrical interface (OIF CEI-28G-VSR)
Applications

Maximum power consumption 4.5W

100GBASE-LR4 Ethernet Links

Duplex LC receptacle

Infiniband QDR and DDR interconnects

RoHS-6 compliant

Client-side 100G Telecom connections
Part Number Ordering Information
TR-FC13L-N00
QSFP28 LR4 10km optical transceiver with full real-time digital
diagnostic monitoring and pull tab
Page 1
TR- FC13L-N00 Rev1.3
1. General Description
This product is a 100Gb/s transceiver module designed for optical communication
applications compliant to 100GBASE-LR4 of the IEEE 802.3ba standard. The module
converts 4 input channels of 25Gb/s electrical data to 4 channels of LAN WDM optical
signals and then multiplexes them into a single channel for 100Gb/s optical transmission.
Reversely on the receiver side, the module de-multiplexes a 100Gb/s optical input into 4
channels of LAN WDM optical signals and then converts them to 4 output channels of
electrical data.
The central wavelengths of the 4 LAN WDM channels are 1295.56, 1300.05, 1304.58 and
1309.14 nm as members of the LAN WDM wavelength grid defined in IEEE 802.3ba. The
high performance cooled LAN WDM EA-DFB transmitters and high sensitivity PIN receivers
provide superior performance for 100Gigabit Ethernet applications up to 10km links and
compliant to optical interface with 100GBASE-LR4 requirements specified in IEEE 802.3ba
Clause 88.
The product is designed with form factor, optical/electrical connection and digital diagnostic
interface according to the QSFP+ Multi-Source Agreement (MSA). It has been designed to
meet the harshest external operating conditions including temperature, humidity and EMI
interference.
2. Functional Description
The transceiver module receives 4 channels of 25Gb/s electrical data, which are processed
by a 4-channel Clock and Data Recovery (CDR) IC that reshapes and reduces the jitter of
each electrical signal. Subsequently, EML laser driver IC converts each one of the 4
channels of electrical signals to an optical signal that is transmitted from one of the 4 cooled
EML lasers which are packaged in the Transmitter Optical Sub-Assembly (TOSA). Each
laser launches the optical signal in specific wavelength specified in IEEE 802.3ba
100GBASE-LR4 requirements. These 4-lane optical signals will be optically multiplexed into
a single fiber by a 4-to-1 optical WDM MUX. The optical output power of each channel is
maintained constant by an automatic power control (APC) circuit. The transmitter output can
be turned off by TX_DIS hardware signal and/or 2-wire serial interface.
The receiver receives 4-lane LAN WDM optical signals. The optical signals are demultiplexed by a 1-to-4 optical DEMUX and each of the resulting 4 channels of optical
signals is fed into one of the 4 receivers that are packaged into the Receiver Optical SubAssembly (ROSA). Each receiver converts the optical signal to an electrical signal. The
regenerated electrical signals are retimed and de-jittered and amplified by the RX portion of
the 4-channel CDR. The retimed 4-lane output electrical signals are compliant with IEEE
Page 2
TR- FC13L-N00 Rev1.3
CAUI-4 interface requirements. In addition, each received optical signal is monitored by the
DOM section. The monitored value is reported through the 2-wire serial interface. If one or
more received optical signal is weaker than the threshold level, RX_LOS hardware alarm will
be triggered.
A single +3.3V power supply is required to power up this product. Both power supply pins
VccTx and VccRx are internally connected and should be applied concurrently. As per MSA
specifications the module offers 7 low speed hardware control pins (including the 2-wire
serial interface): ModSelL, SCL, SDA, ResetL, LPMode, ModPrsL and IntL.
Module Select (ModSelL) is an input pin. When held low by the host, this product responds
to 2-wire serial communication commands. The ModSelL allows the use of this product on a
single 2-wire interface bus – individual ModSelL lines must be used.
Serial Clock (SCL) and Serial Data (SDA) are required for the 2-wire serial bus
communication interface and enable the host to access the QSFP28 memory map.
The ResetL pin enables a complete reset, returning the settings to their default state, when a
low level on the ResetL pin is held for longer than the minimum pulse length. During the
execution of a reset the host shall disregard all status bits until it indicates a completion of
the reset interrupt. The product indicates this by posting an IntL (Interrupt) signal with the
Data_Not_Ready bit negated in the memory map. Note that on power up (including hot
insertion) the module should post this completion of reset interrupt without requiring a reset.
Low Power Mode (LPMode) pin is used to set the maximum power consumption for the
product in order to protect hosts that are not capable of cooling higher power modules,
should such modules be accidentally inserted.
Module Present (ModPrsL) is a signal local to the host board which, in the absence of a
product, is normally pulled up to the host Vcc. When the product is inserted into the
connector, it completes the path to ground through a resistor on the host board and asserts
the signal. ModPrsL then indicates its present by setting ModPrsL to a “Low” state.
Interrupt (IntL) is an output pin. “Low” indicates a possible operational fault or a status critical
to the host system. The host identifies the source of the interrupt using the 2-wire serial
interface. The IntL pin is an open collector output and must be pulled to the Host Vcc voltage
on the Host board.
Page 3
TR- FC13L-N00 Rev1.3
3. Transceiver Block Diagram
Figure 1. Transceiver Block Diagram
4. Pin Assignment and Description
Figure 2. MSA compliant Connector
Page 4
TR- FC13L-N00 Rev1.3
Pin Definition
PIN
Logic
1
Symbol
Name/Description
GND
Ground
2
CML-I
Tx2n
Transmitter Inverted Data Input
3
CML-I
Tx2p
Transmitter Non-Inverted Data output
GND
Ground
4
5
CML-I
Tx4n
Transmitter Inverted Data Input
6
CML-I
Tx4p
Transmitter Non-Inverted Data output
GND
Ground
7
8
LVTLL-I
ModSelL
Module Select
9
LVTLL-I
ResetL
Module Reset
VccRx
+3.3V Power Supply Receiver
10
11
LVCMOS-I/O
SCL
2-Wire Serial Interface Clock
12
LVCMOS-I/O
SDA
2-Wire Serial Interface Data
GND
Ground
13
14
CML-O
Rx3p
Receiver Non-Inverted Data Output
15
CML-O
Rx3n
Receiver Inverted Data Output
GND
Ground
16
Notes
1
1
1
2
1
17
CML-O
Rx1p
Receiver Non-Inverted Data Output
18
CML-O
Rx1n
Receiver Inverted Data Output
19
GND
Ground
1
20
GND
Ground
1
21
CML-O
Rx2n
Receiver Inverted Data Output
22
CML-O
Rx2p
Receiver Non-Inverted Data Output
GND
Ground
1
1
23
24
CML-O
Rx4n
Receiver Inverted Data Output
25
CML-O
Rx4p
Receiver Non-Inverted Data Output
GND
Ground
26
1
27
LVTTL-O
ModPrsL
Module Present
28
LVTTL-O
IntL
Interrupt
29
VccTx
+3.3 V Power Supply transmitter
2
30
Vcc1
+3.3 V Power Supply
2
LPMode
Low Power Mode
31
LVTTL-I
Page 5
TR- FC13L-N00 Rev1.3
32
GND
Ground
33
CML-I
Tx3p
Transmitter Non-Inverted Data Input
34
CML-I
Tx3n
Transmitter Inverted Data Output
GND
Ground
35
36
CML-I
Tx1p
Transmitter Non-Inverted Data Input
37
CML-I
Tx1n
Transmitter Inverted Data Output
GND
Ground
38
1
1
1
Notes:
1. GND is the symbol for signal and supply (power) common for the QSFP28 module. All
are common within the module and all module voltages are referenced to this potential
unless otherwise noted. Connect these directly to the host board signal common ground
plane.
2.
VccRx, Vcc1 and VccTx are the receiving and transmission power suppliers and shall be
applied concurrently. Recommended host board power supply filtering is shown in Figure
3 below. Vcc Rx, Vcc1 and Vcc Tx may be internally connected within the module in any
combination. The connector pins are each rated for a maximum current of 1000mA.
5. Recommended Power Supply Filter
Figure 3. Recommended Power Supply Filter
Page 6
TR- FC13L-N00 Rev1.3
6. Absolute Maximum Ratings
It has to be noted that the operation in excess of any individual absolute maximum ratings
might cause permanent damage to this module.
Parameter
Symbol
Min
Max
Units
Storage Temperature
Ts
-40
85
degC
Operating Case Temperature
TOP
0
70
degC
Power Supply Voltage
Vcc
-0.5
3.6
V
Relative Humidity (non-condensation)
RH
0
85
%
Damage Threshold, each Lane
THd
5.5
Notes
dBm
7. Recommended Operating Conditions and Power Supply Requirements
Parameter
Symbol
Min
Operating Case Temperature
TOP
0
Power Supply Voltage
Vcc
3.135
Data Rate, each Lane
Typical
3.3
Max
Units
70
degC
3.465
V
25.78125
Data Rate Accuracy
Gb/s
-100
100
ppm
Control Input Voltage High
2
Vcc
V
Control Input Voltage Low
0
0.8
V
0.002
10
km
Link Distance with G.652
D
8. Electrical Characteristics
The following electrical characteristics are defined over the Recommended Operating
Environment unless otherwise specified.
Parameter
Test
Point
Min
Typical
Power Consumption
Supply Current
Icc
Max
Units
4.5
W
1.36
A
Notes
Transmitter (each Lane)
Overload Differential Voltage
TP1a
900
TP1
-350
pk-pk
Common Mode Voltage
2850
mV
1
TP1
10
%
At 1MHz
TP1
See CEI-
dB
(Vcm)
Differential Termination
Resistance Mismatch
Differential Return Loss
mV
Page 7
TR- FC13L-N00 Rev1.3
(SDD11)
28G-VSR
Equation
13-19
Common Mode to Differential
conversion and Differential to
See CEI28G-VSR
TP1
Common Mode conversion
Equation
(SDC11, SCD11)
dB
13-20
See CEITP1a
Stressed Input Test
28G-VSR
Section
13.3.11.2.1
Receiver (each Lane)
Differential Voltage, pk-pk
Common Mode Voltage
TP4
900
mV
2850
mV
TP4
17.5
mV
TP4
10
%
TP4
(Vcm)
Common Mode Noise, RMS
Differential Termination
-350
Resistance Mismatch
1
At 1MHz
See CEIDifferential Return Loss
28G-VSR
TP4
(SDD22)
Equation
dB
13-19
Common Mode to Differential
conversion and Differential to
See CEI28G-VSR
TP4
Common Mode conversion
Equation
(SDC22, SCD22)
13-21
Common Mode Return Loss
TP4
-2
(SCC22)
Transition Time, 20 to 80%
TP4
Vertical Eye Closure (VEC)
TP4
-15
Eye Width at 10
probability
(EH15)
Notes:
-15
probability
9.5
dB
2
ps
5.5
dB
TP4
0.57
UI
TP4
228
mV
(EW15)
Eye Height at 10
dB
Page 8
TR- FC13L-N00 Rev1.3
1. Vcm is generated by the host. Specification includes effects of ground offset voltage.
2. From 250MHz to 30GHz.
9. Optical Characteristics
QSFP28 100GBASE-LR4
Parameter
Lane Wavelength
Symbol
Min
Typical
Max
Units
L0
1294.53
1295.56
1296.59
nm
L1
1299.02
1300.05
1301.09
nm
L2
1303.54
1304.58
1305.63
nm
L3
1308.09
1309.14
1310.19
nm
Notes
Transmitter
Side Mode Suppression Ratio
SMSR
Total Average Launch Power
PT
Average Launch Power,
each Lane
OMA, each Lane
30
dB
10.5
dBm
PAVG
-4.3
4.5
dBm
POMA
-1.3
4.5
dBm
1
Launch Power in OMA minus
Transmitter and Dispersion
-2.3
dBm
Penalty (TDP), each Lane
TDP, each Lane
TDP
Extinction Ratio
ER
Difference in Launch Power
2.2
4
dB
dB
Ptx,diff
5
dB
RIN20OMA
RIN
-130
dB/Hz
Optical Return Loss Tolerance
TOL
20
dB
RT
-12
dB
Poff
-30
dBm
between any Two Lanes (OMA)
Transmitter Reflectance
Average Launch Power OFF
Transmitter, each Lane
Eye Mask{X1, X2, X3, Y1, Y2,
{0.25, 0.4, 0.45, 0.25, 0.28,
Y3}
2
0.4}
Receiver
Damage Threshold, each Lane
Average Receive Power, each
Lane
THd
5.5
-10.6
dBm
4.5
3
dBm
Page 9
TR- FC13L-N00 Rev1.3
Receive Power (OMA), each
4.5
dBm
-8.6
dBm
-6.8
dBm
RR
-26
dB
Prx,diff
5.5
dB
Lane
Receiver Sensitivity (OMA), each
Lane
SEN
Stressed Receiver Sensitivity
(OMA), each Lane
Receiver Reflectance
Difference in Receive Power
between any Two Lanes (OMA)
LOS Assert
LOSA
LOS Deassert
LOSD
LOS Hysteresis
LOSH
Receiver Electrical 3 dB upper
Cutoff Frequency, each Lane
-30
4
dBm
-13
dBm
0.5
dB
Fc
31
GHz
Conditions of Stress Receiver Sensitivity Test (Note 5)
Vertical Eye Closure Penalty,
each Lane
Stressed Eye J2 Jitter, each
Lane
Stressed Eye J9 Jitter, each
Lane
1.8
dB
0.3
UI
0.47
UI
Notes:
1. Even if the TDP < 1 dB, the OMA min must exceed the minimum value specified here.
-5
2. Hit ratio 5x10 .
3. The receiver shall be able to tolerate, without damage, continuous exposure to a
modulated optical input signal having this power level on one lane. The receiver does not
have to operate correctly at this input power.
-12
4. Measured with conformance test signal at receiver input for BER = 1x10 .
5. Vertical eye closure penalty, stressed eye J2 jitter, and stressed eye J9 jitter are test
conditions for measuring stressed receiver sensitivity. They are not characteristics of the
receiver.
Page 10
TR- FC13L-N00 Rev1.3
10. Digital Diagnostic Functions
The following digital diagnostic characteristics are defined over the normal operating
conditions unless otherwise specified.
Parameter
Symbol
Min
Max
Units
Notes
Temperature monitor
absolute error
DMI_Temp
-3
+3
degC
Over operating
temperature range
Supply voltage monitor
absolute error
DMI _VCC
-0.1
0.1
V
Over full operating
range
Channel RX power
monitor absolute error
DMI_RX_Ch
-2
2
dB
1
DMI_Ibias_Ch
-10%
10%
mA
DMI_TX_Ch
-2
2
dB
Channel Bias current
monitor
Channel TX power
monitor absolute error
1
Notes:
1. Due to measurement accuracy of different single mode fibers, there could be an additional +/-1 dB
fluctuation, or a +/- 3 dB total accuracy.
11. Mechanical Dimensions
Figure 4. Mechanical Outline
Page 11
TR- FC13L-N00 Rev1.3
12. ESD
This transceiver is specified as ESD threshold 1kV for high speed data pins and 2kV for all
other electrical input pins, tested per MIL-STD-883, Method 3015.4 /JESD22-A114-A (HBM).
However, normal ESD precautions are still required during the handling of this module. This
transceiver is shipped in ESD protective packaging. It should be removed from the
packaging and handled only in an ESD protected environment.
13. Laser Safety
This is a Class 1 Laser Product according to EN 60825-1:2014. This product complies with
21 CFR 1040.10 and 1040.11 except for deviations pursuant to Laser Notice No. 50, dated
(June 24, 2007).
Caution: Use of controls or adjustments or performance of procedures other than those
specified herein may result in hazardous radiation exposure.
Contact Information
Vitex LLC
105 Challenger Road, Suite 401
Ridgefield Park, NJ 07760
USA
Ph: 201-296-0145
Email: info@vitextech.com
www.vitextech.com
December 5, 2016
InnoLight Technology Confidential
Page 12