L6388E
High voltage high and low-side driver
Datasheet − production data
Features
■
High voltage rail up to 600 V
■
dV/dt immunity ±50 V/nsec in full temperature
range
■
Driver current capability:
– 400 mA source
– 650 mA sink
Description
■
Switching times 70/40 nsec rise/fall with 1nF
load
The L6388E is a high voltage device,
manufactured with the BCD™ “offline” technology.
■
3.3 V, 5 V, 15 V CMOS/TTL input comparators
with hysteresis and pull-down
■
Internal bootstrap diode
■
Outputs in phase with inputs
It has a driver structure that enables the driving of
independent referenced N-channel Power
MOSFETs or IGBTs. The high-side (floating)
section is enabled to work with voltage rail up to
600 V.
■
Deadtime and interlocking function
Figure 1.
DIP-8
The logic inputs are CMOS/TTL compatible to
ease the interfacing with controlling devices.
Block diagram
BOOTSTRAP DRIVER
VCC
3
UV
DETECTION
8
UV
DETECTION
LOGIC
HIN
LIN
SO-8
2
SHOOT
THROUGH
PREVENTION
H.V.
HVG
DRIVER
R
R
LEVEL
SHIFTER
HVG
OUT
VCC
LVG
DRIVER
This is information on a product in full production.
Cboot
7
S
1
January 2013
Vboot
Doc ID 13991 Rev 3
6
TO LOAD
5
LVG
4
GND
1/19
www.st.com
19
Contents
L6388E
Contents
1
Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1
AC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.2
DC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4
Waveform definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5
Input logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
6
Bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
6.1
CBOOT selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
7
Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
9
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
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Doc ID 13991 Rev 3
L6388E
Electrical data
1
Electrical data
1.1
Absolute maximum ratings
Table 1.
Absolute maximum ratings
Value
Symbol
Parameter
Unit
Min.
Max.
Vout
Output voltage
Vboot -18
Vboot
V
Vcc
Supply voltage
- 0.3
18
V
Vboot
Floating supply voltage
- 0.3
618
V
Vhvg
High-side gate output voltage
Vout -0.3
Vboot
V
Vlvg
Low-side gate output voltage
-0.3
Vcc +0.3
V
Logic input voltage
-0.3
Vcc +0.3
V
50
V/ns
Vi
dVout/dt
Ptot
Allowed output slew rate
Total power dissipation (TJ = 85 °C)
750
750
mW
Tj
Junction temperature
150
150
°C
Ts
Storage temperature
-50
150
°C
SO-8
DIP-8
Unit
150
100
°C/W
Note:
ESD immunity, 1,5 kV for pins 6, 7, and 8; 2 kV for all other pins (HBM).
1.2
Thermal data
Table 2.
Thermal data
Symbol
Rth(JA)
1.3
Parameter
Thermal resistance junction-to-ambient
Recommended operating conditions
Table 3.
Recommended operating conditions
Symbol
Pin
Vout
6
VBS
(2)
8
fsw
Vcc
TJ
Parameter
Min.
Typ.
Max.
Unit
Output voltage
(1)
580
V
Floating supply voltage
(1)
17
V
400
kHz
17
V
125
°C
Switching frequency
3
Test condition
HVG, LVG load CL = 1 nF
Supply voltage
Junction temperature
-45
1. If the condition Vboot - Vout < 18 V is guaranteed, Vout can range from -3 to 580 V.
2. VBS = Vboot - Vout.
Doc ID 13991 Rev 3
3/19
Pin connection
2
L6388E
Pin connection
Figure 2.
Pin connection (top view)
LIN
1
8
Vboot
HIN
2
7
HVG
VCC
3
6
OUT
GND
4
5
LVG
D97IN517A
Table 4.
Pin description
N°
Pin
Type
Function
1
LIN
I
Low-side driver logic input
2
HIN
I
High-side driver logic input
3
Vcc
4
GND
5
LVG (1)
O
Low-side driver output
6
OUT
O
High-side driver floating reference
7
HVG (1)
O
High-side driver output
8
Vboot
Low-voltage power supply
Ground
Bootstrap supply voltage
1. The circuit guarantees 0.3 V maximum on the pin (@ Isink = 10 mA). This allows the omission of the
“bleeder” resistor connected between the gate and the source of the external MOSFET normally used to
hold the pin low.
4/19
Doc ID 13991 Rev 3
L6388E
3
Electrical characteristics
Electrical characteristics
(VCC = 15 V; TJ = 25 °C).
3.1
AC operation
Table 5.
Symbol
ton
toff
3.2
AC operation electrical characteristics
Pin
Parameter
Test condition
High/low-side driver turn-on
1 vs. 5 propagation delay
2 vs. 7 High/low-side driver turn-off
propagation delay
Min.
Typ.
Max.
Unit
Vout = 0 V
225
300
ns
Vout = 0 V
160
220
ns
tr
5, 7
Rise time
CL = 1000 pF
70
100
ns
tf
5, 7
Fall time
CL = 1000 pF
40
80
ns
DT
5, 7
Deadtime
220
320
420
ns
Min.
Typ.
Max.
Unit
DC operation
Table 6.
Symbol
DC operation electrical characteristics
Pin
Parameter
Test condition
Low supply voltage section
Vccth1
Vcc UV turn-on threshold
9.1
9.6
10.1
V
Vccth2
Vcc UV turn-off threshold
7.9
8.3
8.8
V
Vcchys
Vcc UV hysteresis
0.9
V
Undervoltage quiescent
supply current
Vcc ≤ 9 V
250
330
μA
Iqcc
Quiescent current
Vcc = 15 V
350
450
μA
RDS(on)
Bootstrap driver on
resistance (1)
Vcc ≥ 12.5 V
125
Iqccu
3
Ω
Bootstrapped supply voltage section
VBSth1
VBS UV turn-on threshold
8.5
9.5
10.5
V
VBSth2
VBS UV turn-off threshold
7.2
8.2
9.2
V
VBS UV hysteresis
0.9
VBShys
IQBS
ILK
8
HVG ON
250
μA
Vhvg = Vout =
Vboot = 600 V
10
μA
VBS quiescent current
High-voltage leakage current
V
High/low-side driver
Doc ID 13991 Rev 3
5/19
Electrical characteristics
Table 6.
Symbol
Iso
L6388E
DC operation electrical characteristics (continued)
Pin
Parameter
Test condition
Min.
Typ.
Source short-circuit current
VIN = Vih (tp < 10 μs)
300
400
mA
Sink short-circuit current
VIN = Vil (tp < 10 μs)
500
650
mA
5,7
Isi
Max.
Unit
Logic inputs
Low logic level input voltage
Vil
Vih
1.1
High logic level input voltage
1.8
High logic level input current
VIN = 15 V
Iil
Low logic level input current
VIN = 0 V
20
-1
1. RDS(on) is tested in the following way:
Equation 1
( V CC – VCBOOT1 ) – ( VCC – V CBOOT2 )
R DSON = -----------------------------------------------------------------------------------------------------I1 ( V CC ,V CBOOT1 ) – I 2 ( V CC ,V CBOOT2 )
where:
I1 is pin 8 current when VCBOOT = VCBOOT1, I2 when VCBOOT = VCBOOT2.
6/19
V
1, 2
Iih
Doc ID 13991 Rev 3
V
70
μA
μA
L6388E
Waveform definitions
Figure 3.
Dead time waveform definition
LIN
H IN
DT
DT
LVG
DT
Interlocking function
4
Waveform definitions
HVG
Figure 4.
Propagation delay waveform definition
Doc ID 13991 Rev 3
7/19
Input logic
5
L6388E
Input logic
Input logic is provided with an interlocking circuitry which avoids the two outputs (LVG, HVG)
being active at the same time when both the logic input pins (LIN, HIN) are at a high logic
level. In addition, to prevent cross conduction of the external MOSFETs, after each output is
turned off, the other output cannot be turned on before a certain amount of time (DT) (see
Figure 3).
6
Bootstrap driver
A bootstrap circuitry is needed to supply the high voltage section. This function is normally
accomplished by a high voltage fast recovery diode (Figure 5 a). In the L6388E, a patented
integrated structure replaces the external diode. It is realized by a high voltage DMOS,
driven synchronously with the low-side driver (LVG), with a diode in series, as shown in
Figure 5 b. An internal charge pump (Figure 5 b) provides the DMOS driving voltage. The
diode connected in series to the DMOS has been added to avoid an undesirable turn-on.
6.1
CBOOT selection and charging
To choose the proper CBOOT value, the external MOSFET can be seen as an equivalent
capacitor. This capacitor CEXT is related to the MOSFET total gate charge:
Equation 1
Q gate
C EXT = -------------V gate
The ratio between the capacitors CEXT and CBOOT is proportional to the cyclical voltage loss.
It must be:
CBOOT>>>CEXT
E.g.: if Qgate is 30 nC and Vgate is 10 V, CEXT is 3 nF. With CBOOT = 100 nF the drop is 300
mV.
If HVG must be supplied for a long period, the CBOOT selection must also take the leakage
losses into account.
E.g.: HVG steady-state consumption is typical 250 μA, so, if HVG TON is 5 ms, CBOOT must
supply 1.25 μC to CEXT. This charge on a 1 μF capacitor means a voltage drop of 1.25 V.
The internal bootstrap driver offers important advantages: the external fast recovery diode
can be avoided (it usually has a high leakage current).
This structure can work only if VOUT is close to GND (or lower) and, at the same time, the
LVG is on. The charging time (Tcharge) of the CBOOT is the time in which both conditions are
fulfilled and it must be long enough to charge the capacitor.
The bootstrap driver introduces a voltage drop due to the DMOS RDS(on) (typical value:
125 Ω). This drop can be neglected at low switching frequency, but it should be taken into
account when operating at high switching frequency.
8/19
Doc ID 13991 Rev 3
L6388E
Bootstrap driver
The following equation is useful to compute the drop on the bootstrap DMOS:
Equation 2
Q gate
V drop = Ich arg e R dson →V drop = ------------------- R dson
Tch arg e
where Qgate is the gate charge of the external Power MOSFET, RDS(on) is the on-resistance
of the bootstrap DMOS, and Tcharge is the charging time of the bootstrap capacitor.
For example: using a Power MOSFET with a total gate charge of 30 nC, the drop on the
bootstrap DMOS is about 1 V, if the Tcharge is 5 μs.
In fact:
Equation 3
30nC
V drop = --------------- ⋅ 125Ω ∼0.8V
5μs
Vdrop should be taken into account when the voltage drop on CBOOT is calculated: if this drop
is too high, or the circuit topology doesn’t allow a sufficient charging time, an external diode
can be used.
Doc ID 13991 Rev 3
9/19
Bootstrap driver
Figure 5.
L6388E
Bootstrap driver
DBOOT
VS
VBOOT
H.V.
HVG
CBOOT
VOUT
TO LOAD
LVG
a
VBOOT
VS
H.V.
HVG
CBOOT
VOUT
TO LOAD
LVG
b
10/19
Doc ID 13991 Rev 3
L6388E
Typical characteristics
Figure 6.
Typical rise and fall times vs. Figure 7.
load capacitance
time
(nsec)
D99IN1054
Quiescent current vs. supply
voltage
Iq
(μA)
104
250
D99IN1055
200
Tr
103
150
Tf
100
102
50
10
0
0
1
2
3
4
5 C (nF)
For both high and low side buffers @25˚C Tamb
Figure 8.
VBOOT UV turn-on threshold
vs. temperature
2
0
4
Figure 9.
6
8
10
12
14
16 VS(V)
VCC UV turn-off threshold vs.
temperature
11
13
@ Vcc = 15V
12
10
10
Typ.
Vccth2(V)
VBSth1(V)
11
9
8
7
9
Typ.
8
7
6
6
5
-45
-25
0
25
50
Tj (˚C)
75
100
-45
125
0
25
50
75
100
125
Figure 11. Output source current vs.
temperature
1000
14
@ Vcc = 15V
@ Vcc = 15V
13
800
current (mA)
12
11
10
9
600
Typ.
400
200
8
7
-25
Tj (˚C)
Figure 10. VBOOT UV turn-off threshold
vs. temperature
VBSth2(V)
7
Typical characteristics
Typ.
0
6
-45
-25
0
25
50
75
100
125
Doc ID 13991 Rev 3
-45
-25
0
25 50
Tj (˚C)
75
100 125
11/19
Typical characteristics
L6388E
Figure 12. VCC UV turn-on threshold vs. Figure 13. Output sink current vs.
temperature
temperature
13
1000
@ Vcc = 15V
800
11
current (mA)
Vccth1(V)
12
10
9
Typ.
Typ.
400
200
8
0
7
-45
12/19
600
-25
0
25
50
Tj (˚C)
75
100
125
Doc ID 13991 Rev 3
-45
-25
0
25
50
Tj (˚C)
75
100
125
L6388E
8
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Table 7.
DIP-8 mechanical data
mm
Dim.
Min.
A
Typ.
Max.
3.32
a1
0.51
B
1.15
1.65
b
0.356
0.55
b1
0.204
0.304
D
E
10.92
7.95
9.75
e
2.54
e3
7.62
e4
7.62
F
6.6
I
5.08
L
3.18
Z
3.81
1.52
Doc ID 13991 Rev 3
13/19
Package mechanical data
L6388E
Figure 14. DIP-8 package dimensions
!-V
14/19
Doc ID 13991 Rev 3
L6388E
Package mechanical data
Table 8.
SO-8 mechanical data
mm
Dim.
Min.
Typ.
A
Max.
1.75
A1
0.10
0.25
A2
1.25
b
0.28
0.48
c
0.17
0.23
D
4.80
4.90
5.00
E
5.80
6.00
6.20
E1
3.80
3.90
4.00
e
1.27
h
0.25
0.50
L
0.40
1.27
L1
k
1.04
0°
8°
ccc
0.10
Doc ID 13991 Rev 3
15/19
Package mechanical data
L6388E
Figure 15. SO-8 package dimensions
!-V
16/19
Doc ID 13991 Rev 3
L6388E
9
Ordering information
Ordering information
Table 9.
Order codes
Part number
Package
Packaging
L6388E
DIP-8
Tube
L6388ED
SO-8
Tube
L6388ED013TR
SO-8
Tape and reel
Doc ID 13991 Rev 3
17/19
Revision history
10
L6388E
Revision history
Table 10.
18/19
Document revision history
Date
Revision
Changes
11-Oct-2007
1
First release
29-Feb-2012
2
Updated Table 1, Table 6 and Section 6.1.
DIP-8 mechanical data and package dimensions have been updated.
SO-8 mechanical data and package dimensions have been updated.
31-Jan-2013
3
Update note in Section 1.1.
Doc ID 13991 Rev 3
L6388E
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19/19
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