ADMV1010 (Rev. A)

ADMV1010 (Rev. A)
12.6 GHz to 15.4 GHz,
GaAs, MMIC, I/Q Downconverter
ADMV1010
Data Sheet
FUNCTIONAL BLOCK DIAGRAM
RF input frequency range: 12.6 GHz to 15.4 GHz
IF output frequency range: 2.7 GHz to 3.5 GHz
LO input frequency range: 9 GHz to 12.6 GHz
Power conversion gain: 15 dB typical
Image rejection: 25 dB typical
SSB noise figure: 2 dB typical
Input IP3: 1 dBm typical
Input P1dB: −7 dBm typical
Single-ended, 50 Ω RF and LO input ports
4.9 mm × 4.9 mm, 32-terminal LCC with exposed pad
VDRF
28
RFIN 3
LOIN 10
19 IF1
VDLO 14
22 IF2
2
GND
4
GND
11 GND
ADMV1010
15788-001
FEATURES
Figure 1.
APPLICATIONS
Point to point microwave radios
Radars and electronic warfare systems
Instrumentation and automatic test equipment
Satellite communications
GENERAL DESCRIPTION
The ADMV1010 is a compact, gallium arsenide (GaAs) design,
monolithic microwave integrated circuit (MMIC), I/Q downconverter in a RoHS compliant package optimized for point to
point microwave radio designs that operates in the 12.6 GHz to
15.4 GHz frequency range. The ADMV1010 is optimized to work
as a low noise, upper sideband (low side local oscillator (LO)),
image reject downconverter.
amplifier drives the LO. IF1 and IF2 mixer outputs are
provided, and an external 90° hybrid is needed to select the
required sideband. The I/Q mixer topology reduces the need for
filtering the unwanted sideband. The ADMV1010 is a much
smaller alternative to hybrid style SSB downconverter
assemblies, and it eliminates the need for wire bonding by
allowing the use of surface-mount manufacturing assemblies.
The ADMV1010 provides 15 dB of conversion gain with 25 dB
of image rejection. The ADMV1010 uses a radio frequency
(RF), low noise amplifier (LNA) followed by an in-phase/
quadrature (I/Q) double balanced mixer, where a driver
The ADMV1010 downconverter comes in a compact, thermally
enhanced, 4.9 mm × 4.9 mm, 32-terminal LCC package. The
ADMV1010 operates over the −40°C to +85°C temperature range.
Rev. A
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ADMV1010
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Leakage Performance ................................................................. 13
Applications ....................................................................................... 1
Return Loss Performance .......................................................... 14
Functional Block Diagram .............................................................. 1
Spurious Performance ............................................................... 15
General Description ......................................................................... 1
M × N Spurious Performance ................................................... 15
Revision History ............................................................................... 2
Theory of Operation ...................................................................... 16
Specifications..................................................................................... 3
Mixer ............................................................................................ 16
Absolute Maximum Ratings ............................................................ 4
LNA .............................................................................................. 16
ESD Caution .................................................................................. 4
Applications Information .............................................................. 17
Pin Configuration and Function Descriptions ............................. 5
Typical Application Circuit ....................................................... 17
Typical Performance Characteristics ............................................. 6
Evaluation Board ........................................................................ 18
IF Frequency = 2.7 GHz .............................................................. 6
Bill of Materials ........................................................................... 20
IF Frequency = 3.1 GHz .............................................................. 8
Outline Dimensions ....................................................................... 21
IF Frequency = 3.5 GHz ............................................................ 10
Ordering Guide .......................................................................... 21
IF Bandwidth .............................................................................. 12
REVISION HISTORY
1/2018—Rev. 0 to Rev. A
Changes to General Description and Figure 1 ............................. 1
Changes to Table 1 ............................................................................ 3
Changes to Table 2 ............................................................................ 4
Added Thermal Resistance Section and Table 3; Renumbered
Sequentially ....................................................................................... 4
Changes to Figure 2 and Table 4 ..................................................... 5
Changes to Figure 4 .......................................................................... 6
Changes to Figure 11 and Figure 12............................................... 7
Changes to Figure 16 through Figure 18 ....................................... 8
Changes to Figure 21 and Figure 22............................................... 9
Changes to Figure 26 through Figure 28 ..................................... 10
Changes to Figure 31 and Figure 32............................................. 11
Changes to Figure 35 and Figure 36............................................. 12
Changes to Figure 37 through Figure 40 ..................................... 13
Changes to Figure 44 through Figure 46 ..................................... 14
Changes to M × N Spurious Performance Section and Table 5..... 15
Changes to Applications Information Section and Figure 47 ........ 17
Changes to Ordering Guide .......................................................... 21
10/2017—Revision 0: Initial Version
Rev. A | Page 2 of 21
Data Sheet
ADMV1010
SPECIFICATIONS
Data taken at VDRF = 4 V, VDLO = 4 V, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C; data taken using Mini-Circuits QCN-45+
power splitter as upper sideband (low-side LO), unless otherwise noted.
Table 1.
Parameter
RF INPUT FREQUENCY RANGE
LO
Input Frequency Range
Amplitude
IF OUTPUT FREQUENCY RANGE
RF PERFORMANCE
Conversion Gain
SSB Noise Figure
Input Third-Order Intercept
Input 1 dB Compression Point
Image Rejection
Leakage
LO to RF
LO to IF
IM3 at Input
−20 dBm Input Power
−25 dBm Input Power
−30 dBm Input Power
Return Loss
RF Input
IF Output
LO Input
POWER INTERFACE
Voltage
RF
LO
Current
RF
LO
Total Power
Symbol
Test Conditions/Comments
Min
12.6
9
−4
2.7
Typ
Max
15.4
Unit
GHz
12.6
+4
3.5
GHz
dBm
GHz
15
2
+1
−8
35
17
2.6
dB
dB
dBm
dBm
dB
−35
−20
−25
−15
dBm
dBm
0
With hybrid
11
SSB NF
IP3
P1dB
At −23 dBm/tone
−0.5
−10
20
46
52
56
49
55
59
−12
−15
−15
VDRF
VDLO
4
4
IDRF
IDLO
78
83
0.7
Rev. A | Page 3 of 21
dBc
dBc
dBc
−10
−10
−10
dB
dB
dB
V
V
100
100
0.8
mA
mA
W
ADMV1010
Data Sheet
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 2.
Parameter
Supply Voltage
VDRF
VDLO
RF Input Power
LO Input Power
Maximum Junction Temperature (TJ)
Maximum Power Dissipation
Lifetime at Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
Lead Temperature Range (Soldering, 60 sec)
Moisture Sensitivity Level (MSL) Rating
Electrostatic Discharge (ESD) Sensitivity
Human Body Model (HBM)
Field Induced Charged Device Model (FICDM)
θJC is thermal resistance, junction to ambient (°C/W),
Rating
5.5 V
5.5 V
15 dBm
15 dBm
175°C
1.7 W
>1 million hours
−40°C to +85°C
−65°C to +150°C
260°C
MSL3
Table 3.
Package Type
E-32-1
1
θJC1
51
Unit
°C/W
See JEDEC standard JESD51-2 for additional information on optimizing the
thermal impedance (printed circuit board (PCB) with 3 × 3 vias).
ESD CAUTION
250 V
500 V
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Rev. A | Page 4 of 21
Data Sheet
ADMV1010
32
31
30
29
28
27
26
25
NIC
NIC
NIC
NIC
VDRF
NIC
NIC
NIC
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
2
3
4
5
6
7
8
ADMV1010
TOP VIEW
(Not to Scale)
24
23
22
21
20
19
18
17
NIC
NIC
IF2
NIC
NIC
IF1
NIC
NIC
NOTES
1. NIC = NOT INTERNALLY CONNECTED. THESE
PINS ARE NOT INTERNALLY CONNECTED.
2. EXPOSED PAD. EXPOSED PAD MUST BE
CONNECTED TO GND. GOOD RF AND THERMAL
GROUNDING IS RECOMMENDED.
15788-002
NIC
LO_IN
GND
NIC
NIC
VDLO
NIC
NIC
9
10
11
12
13
14
15
16
NIC
GND
RFIN
GND
NIC
NIC
NIC
NIC
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
1, 5 to 9, 12, 13, 15 to 18,
20, 21, 23 to 27, 29 to 32
2, 4, 11
3
10
14
Mnemonic
NIC
Description
Not Internally Connected. It is recommended to ground these pins on the PCB.
GND
RFIN
LO_IN
VDLO
19
22
28
IF1
IF2
VDRF
Ground.
RF Input. This pin is ac-coupled internally and matched to 50 Ω, single-ended.
LO Input. This pin is ac-coupled internally and matched to 50 Ω single-ended.
Power Supply Voltage for the LO Amplifier. Refer to the Applications Information section for the
required external components and biasing.
Quadrature IF Output 1. Matched to 50 Ω and ac coupled. No external dc block required.
Quadrature IF Output 2. Matched to 50 Ω and ac coupled. No external dc block required.
Power Supply Voltage for the RF Amplifier. Refer to the Applications Information section for the
required external components and biasing.
Exposed Pad. The exposed pad must be connected to GND. Good RF and thermal grounding is
recommended.
EPAD
Rev. A | Page 5 of 21
ADMV1010
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
IF FREQUENCY = 2.7 GHz
Data taken at VDRF = 4 V, VDLO = 4 V, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C, data taken with Mini-Circuits QCN-45+
power splitter as upper sideband (low-side LO), unless otherwise noted.
16
15
14
13
12
16
15
14
13
12
13.5
14.0
14.5
15.0
15.5
RF FREQUENCY (GHz)
10
12.0
15788-003
13.0
40
35
30
25
15.0
15.5
16.0
45
40
35
30
13.5
14.0
14.5
15.0
15.5
16.0
20
12.0
10
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
Figure 7. Image Rejection vs. RF Frequency at Various LO Powers
10
–40°C
+25°C
+85°C
8
12.5
15788-007
13.0
15788-004
12.5
Figure 4. Image Rejection vs. RF Frequency at Various Temperatures
–4dBm
0dBm
+4dBm
8
6
INPUT IP3 (dBm)
6
4
2
0
4
2
0
–2
–2
–4
–4
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
–6
12.0
15788-005
INPUT IP3 (dBm)
14.5
25
RF FREQUENCY (GHz)
–6
12.0
14.0
–4dBm
0dBm
+4dBm
50
IMAGE REJECTION (dB)
IMAGE REJECTION (dB)
55
45
20
12.0
13.5
Figure 6. Conversion Gain vs. RF Frequency at Various LO Powers
–40°C
+25°C
+85°C
50
13.0
RF FREQUENCY (GHz)
Figure 3. Conversion Gain vs. RF Frequency at Various Temperatures
55
12.5
15788-006
11
11
10
12.5
–4dBm
0dBm
+4dBm
17
CONVERSION GAIN (dB)
CONVERSION GAIN (dB)
17
18
–40°C
+25°C
+85°C
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
Figure 8. Input IP3 vs. RF Frequency at Various LO Powers
Figure 5. Input IP3 vs. RF Frequency at Various Temperatures
Rev. A | Page 6 of 21
15788-008
18
Data Sheet
–2
INPUT P1dB (dBm)
INPUT P1dB (dBm)
–4
–6
–8
–10
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
–6
–8
–12
12.0
3.0
2.5
2.5
NOISE FIGURE (dB)
2.0
1.5
1.0
13.0
13.5
14.0
14.5
15.0
15.5
16.0
–4dBm
0dBm
+4dBm
2.0
1.5
1.0
0.5
–40°C
+25°C
+85°C
13.5
14.0
14.5
15.0
15.5
RF FREQUENCY (GHz)
15788-010
0
12.5
13.0
Figure 11. Input P1dB vs. RF Frequency at Various LO Powers
3.0
0.5
12.5
RF FREQUENCY (GHz)
Figure 9. Input P1dB vs. RF Frequency at Various Temperatures
NOISE FIGURE (dB)
–4
–10
15788-009
–12
12.0
–4dBm
0dBm
+4dBm
15788-011
–2
0
–40°C
+25°C
+85°C
Figure 10. Noise Figure vs. RF Frequency at Various Temperatures
0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
RF FREQUENCY (GHz)
Figure 12. Noise Figure vs. RF Frequency at Various LO Powers
Rev. A | Page 7 of 21
15788-012
0
ADMV1010
ADMV1010
Data Sheet
IF FREQUENCY = 3.1 GHz
Data taken at VDRF = 4 V, VDLO = 4 V, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C, data taken with Mini-Circuits QCN-45+
power splitter as upper sideband (low-side LO), unless otherwise noted.
17
16
CONVERSION GAIN (dB)
14
13
12
11
10
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
12.0
45
45
40
40
IMAGE REJECTION (dB)
IMAGE REJECTION (dB)
50
35
30
25
20
15
–40°C
+25°C
+85°C
15.0
15.5
16.0
35
30
25
20
15
12.8
13.2 13.6 14.0 14.4 14.8
RF FREQUENCY (GHz)
15.2
15.6
16.0
0
12.0
15788-014
12.4
5
20
20
18
16
16
14
14
INPUT IP3 (dBm)
12
10
8
6
12.4
12.8
13.2
13.6
14.0
14.4
14.8
15.2
15.6
16.0
Figure 17. Image Rejection vs. RF Frequency at Various LO Powers
–40°C
+25°C
+85°C
18
+4dBm
+0dBm
–4dBm
RF FREQUENCY (GHz)
Figure 14. Image Rejection vs. RF Frequency at Various Temperatures
10
8
6
4
2
2
0
–4dBm
0dBm
+4dBm
12
4
0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
–2
12.0
15788-015
INPUT IP3 (dBm)
14.5
10
10
–2
12.0
14.0
Figure 16. Conversion Gain vs. RF Frequency at Various LO Powers
50
0
12.0
13.5
RF FREQUENCY (GHz)
Figure 13. Conversion Gain vs. RF Frequency at Various Temperatures
5
13.0
12.5
15788-016
12.5
15788-017
8
12.0
–4dBm
0dBm
+4dBm
–40°C
+25°C
+85°C
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
Figure 15. Input IP3 vs. RF Frequency at Various Temperatures
Figure 18. Input IP3 vs. RF Frequency at Various LO Powers
Rev. A | Page 8 of 21
15788-018
9
15788-013
CONVERSION GAIN (dB)
15
Data Sheet
–2
–4
–6
–8
–10
–6
–8
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
–12
12.0
2.5
NOISE FIGURE (dB)
2.5
2.0
1.5
1.0
14.0
14.5
15.0
15.5
16.0
–4dBm
0dBm
+4dBm
2.0
1.5
1.0
0.5
–40°C
+25°C
+85°C
13.5
14.0
14.5
15.0
15.5
RF FREQUENCY (GHz)
15788-020
NOISE FIGUE (dB)
3.0
13.0
13.5
Figure 21. Input P1dB vs. RF Frequency at Various LO Powers
3.0
0
12.5
13.0
RF FREQUENCY (GHz)
Figure 19. Input P1dB vs. RF Frequency at Various Temperatures
0.5
12.5
15788-021
–10
15788-019
–12
12.0
–4dBm
0dBm
+4dBm
–4
INPUT P1dB (dB)
INPUT P1dB (dBm)
–2
0
–40°C
+25°C
+85°C
0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
RF FREQUENCY (GHz)
Figure 22. Noise Figure vs. RF Frequency at Various LO Powers
Figure 20. Noise Figure vs. RF Frequency at Various Temperatures
Rev. A | Page 9 of 21
15788-022
0
ADMV1010
ADMV1010
Data Sheet
IF FREQUENCY = 3.5 GHz
18
18
16
16
14
14
12
10
8
6
4
13.0
13.5
14.0
14.5
15.0
15.5
16.0
4
0
12.0
50
50
IMAGE REJECTION (dBc)
60
40
30
20
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
14
14.0
14.5
15.0
15.5
16.0
40
30
20
16
10
INPUT IP3 (dBm)
12
10
4
2
13.5
14.0
14.5
15.0
15.5
16.0
–4dBm
0dBm
+4dBm
14
6
13.0
Figure 27. Image Rejection vs. RF Frequency at Various LO Powers
–40°C
+25°C
+85°C
8
12.5
RF FREQUENCY (GHz)
12
8
6
4
2
0
–2
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
15788-025
0
–2
–4
12.0
13.5
–4dBm
0dBm
+4dBm
0
12.0
Figure 24. Image Rejection vs. RF Frequency at Various Temperatures
16
13.0
10
–40°C
+25°C
+85°C
15788-024
0
12.0
12.5
Figure 26. Conversion Gain vs. RF Frequency at Various LO Powers
60
10
–4dBm
0dBm
+4dBm
RF FREQUENCY (GHz)
Figure 23. Conversion Gain vs. RF Frequency at Various Temperatures
IMAGE REJECTION (dBc)
6
2
RF FREQUENCY (GHz)
INPUT IP3 (dBm)
8
15788-027
12.5
10
Figure 25. Input IP3 vs. RF Frequency at Various Temperatures
–4
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
Figure 28. Input IP3 vs. RF Frequency at Various LO Powers
Rev. A | Page 10 of 21
15788-028
0
12.0
–40°C
+25°C
+85°C
15788-023
2
12
15788-026
CONVERSION GAIN (dB)
CONVERSION GAIN (dB)
Data taken at VDRF = 4 V, VDLO = 4 V, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C, data taken with Mini-Circuits QCN-45+
power splitter as upper sideband (low-side LO), unless otherwise noted.
Data Sheet
–1
–2
–2
–3
–3
–4
–5
–6
–7
–5
–6
–7
–8
–9
–9
13.0
13.5
14.0
14.5
15.0
15.5
–10
12.0
15788-029
12.5
16.0
RF FREQUENCY (GHz)
2.5
2.5
NOISE FIGURE (dB)
3.0
2.0
1.5
1.0
13.0
13.5
14.0
14.5
15.0
15.5
16.0
–4dBm
0dBm
+4dBm
2.0
1.5
1.0
0.5
–40°C
+25°C
+85°C
13.5
14.0
14.5
RF FREQUENCY (GHz)
15.0
15.5
15788-030
0
12.5
13.0
Figure 31. Input P1dB vs. RF Frequency at Various LO Powers
3.0
0.5
12.5
RF FREQUENCY (GHz)
Figure 29. Input P1dB vs. RF Frequency at Various Temperatures
NOISE FIGURE (dB)
–4
–8
–10
12.0
–4dBm
0dBm
+4dBm
15788-031
INPUT P1dB (dBm)
INPUT P1dB (dBm)
–1
0
–40°C
+25°C
+85°C
Figure 30. Noise Figure vs. RF Frequency at Various Temperatures
0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
RF FREQUENCY (GHz)
Figure 32. Noise Figure vs. RF Frequency at Various LO Powers
Rev. A | Page 11 of 21
15788-032
0
ADMV1010
ADMV1010
Data Sheet
IF BANDWIDTH
Data taken at VDRF = 4 V, VDLO = 4 V, LO = −4 dBm ≤ LO ≤ +4 dBm at 9 GHz, −40°C ≤ TA ≤ +85°C, data taken with Mini-Circuits
QCN-45+ power splitter as upper sideband (low-side LO), unless otherwise noted.
16
14
CONVERSION GAIN (dB)
CONVERSION GAIN (dB)
14
12
10
8
6
4
2.4
2.6
2.8
3.0
3.0
3.4
3.6
3.8
4.0
8
6
0
2.0
15788-033
2.2
8
8
6
INPUT IP3 (dBm)
4
2
0
2.4
2.6
2.8
3.0
3.0
3.4
3.6
3.8
4.0
Figure 35. Conversion Gain vs. IF Frequency at Various LO Powers
–40°C
+25°C
+85°C
6
2.2
IF FREQUENCY (GHz)
Figure 33. Conversion Gain vs. IF Frequency at Various Temperatures
–2
+4dBm
+0dBm
–4dBm
4
2
0
–2
2.2
2.4
2.6
2.8
3.0
3.0
3.4
3.6
3.8
4.0
IF FREQUENCY (GHz)
15788-035
INPUT IP3 (dBm)
10
2
IF FREQUENCY (GHz)
–4
2.0
12
4
2
0
2.0
+4dBm
+0dBm
–4dBm
15788-036
16
18
–40°C
+25°C
+85°C
Figure 34. Input IP3 vs. IF Frequency at Various Temperatures
–4
2.0
2.2
2.4
2.6
2.8
3.0
3.0
3.4
3.6
3.8
IF FREQUENCY (GHz)
Figure 36. Input IP3 vs. IF Frequency at Various LO Powers
Rev. A | Page 12 of 21
4.0
15788-038
18
Data Sheet
ADMV1010
LEAKAGE PERFORMANCE
Data taken at VDRF = 4 V, VDLO = 4 V, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C, data taken with Mini-Circuits QCN-45+
power splitter as upper sideband (low-side LO), unless otherwise noted.
–24
–26
–26
LO LEAKAGE (dBm)
–24
–28
–30
–32
–34
–30
–32
–34
–36
–38
–38
9
10
11
12
13
14
Figure 37. LO Leakage at RFIN vs. LO Frequency at Various Temperatures
0
–40
15788-043
8
LO FREQUENCY (GHz)
0
–15
–15
LO LEAKAGE (dBm)
–10
–25
–30
–35
LO FREQUENCY (GHz)
13
14
–50
15788-044
12
Figure 38. LO Leakage at IF Output vs. LO Frequency at Various Temperatures
14
–35
–45
11
13
–30
–45
10
12
–25
–40
9
11
–20
–40
8
10
+4dBm
+0dBm
–4dBm
–5
–20
9
Figure 39. LO Leakage at RFIN vs. LO Frequency at Various LO Powers
–10
–50
8
LO FREQUENCY (GHz)
–40°C
+25°C
+85°C
–5
LO LEAKAGE (dBm)
–28
–36
–40
+4dBm
+0dBm
–4dBm
–22
15788-046
–22
LO LEAKAGE (dBm)
–20
–40°C
+25°C
+85°C
8
9
10
11
12
LO FREQUENCY (GHz)
13
14
15788-047
–20
Figure 40. LO Leakage at IF Output vs. LO Frequency at Various LO Powers
Rev. A | Page 13 of 21
ADMV1010
Data Sheet
RETURN LOSS PERFORMANCE
Data taken at VDRF = 4 V, VDLO = 4 V, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C, data taken with Mini-Circuits QCN-45+
power splitter as upper sideband (low-side LO), unless otherwise noted. Measurement includes trace loss and RF connector loss.
–12
–14
–16
–16
RETURN LOSS (dB)
–14
–18
–20
–22
–24
–22
–24
–28
–28
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
Figure 41. RF Input Return Loss vs. RF Frequency at Various Temperatures
–10
–30
12.0
13.0
13.5
14.0
14.5
15.5
15.0
16.0
Figure 44. RF Input Return Loss vs. RF Frequency at Various LO Powers
–10
–40°C
+25°C
+85°C
+4dBm
+0dBm
–4dBm
RETURN LOSS (dB)
–15
–20
–25
–20
–25
9
10
11
12
13
14
LO FREQUENCY (GHz)
Figure 42. LO Input Return Loss vs. LO Frequency at Various Temperatures
–8
–35
15788-050
8
10
11
12
13
+4dBm
+0dBm
–4dBm
–10
RETURN LOSS (dB)
–14
–16
–18
14
Figure 45. LO Input Return Loss vs. LO Frequency at Various LO Powers
–8
–12
–20
–12
–14
–16
–18
2.2
2.4
2.6
2.8
3.0
3.0
IF FREQUENCY (GHz)
3.4
3.6
3.8
4.0
–22
2.0
Figure 43. IF Output Return Loss vs. IF Frequency at Various Temperatures
2.2
2.4
2.6
2.8
3.0
3.0
IF FREQUENCY (GHz)
3.4
3.6
3.8
4.0
15788-054
–20
15788-051
–22
2.0
9
LO FREQUENCY (GHz)
–40°C
+25°C
+85°C
–10
8
15788-053
–30
–30
–35
12.5
RF FREQUENCY (GHz)
–15
RETURN LOSS (dB)
–20
–26
RF FREQUENCY (GHz)
RETURN LOSS (dB)
–18
–26
–30
12.0
+4dBm
+0dBm
–4dBm
–12
15788-049
RETURN LOSS (dB)
–10
–40°C
+25°C
+85°C
15788-052
–10
Figure 46. IF Output Return Loss vs. IF Frequency at Various LO Powers
Rev. A | Page 14 of 21
Data Sheet
ADMV1010
SPURIOUS PERFORMANCE
Data taken at VDRF = 4 V, VDLO = 4 V, LO = 0 dBm, −40°C ≤
TA ≤ +85°C; data taken with Mini-Circuits QCN-45+ power
splitter as upper sideband (low-side LO), unless otherwise noted.
IF = 3100 MHz, RF = 13.3 GHz at −20 dBm; all values in dBc
below the IF power level. N/A means not applicable.
Table 5. LO Harmonic Leakage (dBm) at IF Output
LO Frequency (MHz)1
9000
9500
10,000
10,500
11,000
11,500
12,000
12,600
1
Harmonics
2.0
3.0
−48
−47
−47
−45
−47
−43
−48
−42
−46
−41
−41
−38
−47
−35
−46
−32
1.0
−36
−22
−20
−18
−19
−28
−42
−43
M × RF
4.0
−49
−50
−60
−53
−50
−65
−60
−61
M × N SPURIOUS PERFORMANCE
LO = 4 dBm, Upper Sideband
IF = 2700 MHz, RF = 13.3 GHz at −20 dBm; all values in dBc
below the IF power level. N/A means not applicable.
M × RF
−1
0
+1
+2
−2
N/A
N/A
N/A
52
−1
N/A
N/A
0
86
N × LO
0
N/A
N/A
24
61
+1
N/A
13
51
65
−1
N/A
N/A
0
78
N × LO
0
N/A
N/A
24
61
+1
N/A
13
50
63
+2
25
40
40
72
IF = 3500 MHz, RF = 13.3 GHz at −20 dBm; all values in dBc
below the IF power level. N/A means not applicable.
M × RF
LO Input Power = 0 dBm.
−1
0
+1
+2
−2
N/A
N/A
N/A
55
+2
28
39
43
71
Rev. A | Page 15 of 21
−1
0
+1
+2
−2
N/A
N/A
N/A
54
−1
N/A
N/A
0
66
N × LO
0
N/A
N/A
24
60
+1
N/A
14
49
61
+2
24
38
44
70
ADMV1010
Data Sheet
THEORY OF OPERATION
The ADMV1010 is a compact GaAs, MMIC, single sideband
(SSB) downconverter in a RoHS compliant package optimized
for upper sideband point to point microwave radio applications
operating in the 12.6 GHz to 15.4 GHz input frequency range.
The ADMV1010 supports LO input frequencies of 9 GHz to
12.6 GHz and IF output frequencies of 2.7 GHz to 3.5 GHz.
MIXER
The ADMV1010 uses a RF LNA amplifier followed by an I/Q
double balanced mixer, where a driver amplifier drives the LO
(see Figure 1). The combination of design, process, and
packaging technology allows the functions of these subsystems
to be integrated into a single die, using mature packaging and
interconnection technologies to provide a high performance,
low cost design with excellent electrical, mechanical, and
thermal properties. In addition, the need for external
components is minimized, optimizing cost and size.
LNA
LO DRIVER AMPLIFIER
The LO driver amplifier takes a single LO input and amplifies it
to the desired LO signal level for the mixer to operate optimally.
The LO driver amplifier is self biased, and it only requires a
single dc bias voltage (VDLO) to operate. The bias current for
the LO amplifier is 100 mA at 4 V typically. The LO drive range
of −4 dBm to +4 dBm makes it compatible with Analog
Devices, Inc., wideband synthesizer portfolio without the need
for an external LO driver amplifier.
The mixer is an I/Q double balanced mixer, and this mixer
topology reduces the need for filtering the unwanted sideband.
An external 90° hybrid is required to select the upper sideband
of operation. The ADMV1010 has been optimized to work with
the Mini-Circuits QCN-45+ RF 90° hybrid.
The LNA is self biased, and it requires only a single dc bias
voltage (VDRF) to operate. The bias current for the LNA is
60 mA at 4 V typically.
The application circuit (see Figure 47) provided shows the
necessary external components on the bias lines to eliminate
any undesired stability problems for the RF amplifier and the
LO amplifier.
The ADMV1010 is a much smaller alternative to hybrid style
image reject converter assemblies, and it eliminates the need for
wire bonding by allowing the use of surface-mount manufacturing
assemblies.
The ADMV1010 downconverter comes in a compact, thermally
enhanced, 4.9 mm × 4.9 mm, 32-terminal ceramic leadless chip
carrier (LCC) package. The ADMV1010 operates over the
−40°C to +85°C temperature range.
Rev. A | Page 16 of 21
Data Sheet
ADMV1010
APPLICATIONS INFORMATION
TYPICAL APPLICATION CIRCUIT
The evaluation board and typical application circuit are
optimized for low-side LO (upper sideband) performance with
the Mini-Circuit QCN-45+ RF 90° hybrid. Because the I/Q
mixers are double balanced, the ADMV1010 can support IF
frequencies from 3.5 GHz to low frequency.
The typical applications circuit is shown in Figure 47. The
application circuit shown here has been replicated for the
evaluation board circuit.
VDLNA
VDLNA 1
C9
1µF
C8
0.01µF
C7
100pF
AGND
IF_OUTPUT
IF_OUTPUT
1
26
27
29
25
NIC
NIC
NIC
VDRF
30
31
28
NIC
NIC
NIC
NIC
GND
ADMV1010AEZ
NIC
GND
13/15 DC
NIC
IF1
15
9
10
SUM_PORT
PORT_2
AGND
6
23
22
4
21
PORT_1
50_OHM_TERM
GND GND
5
2
20
19
QCN-45+
18
3
R3
50Ω
17
AGND
NIC
NIC
VDLO
NIC
NIC
GND
NIC
NIC
X1
1
24
AGND
16
8
AGND
GND
14
7
IF2
NIC
6
NIC
13
5
NIC
RFIN
GND
3 2
DUT
GND
NIC
4
NIC
11
3
12
4
2
RF_INPUT
PAD
PAD
RF_INPUT
1
LO_IN
1
32
4 3 2
C1
AGND
AGND
100pF
C2
LO_INPUT
1
0.01µF
C3
3 2
1µF
AGND
1
AGND
15788-147
4
LO_INPUT
VDLO
VDLO
Figure 47. Typical Application Circuit
Rev. A | Page 17 of 21
ADMV1010
Data Sheet
EVALUATION BOARD
Layout
The circuit board used in the application must use RF circuit
design techniques. Signal lines must have 50 Ω impedance, and
the package ground leads and exposed pad must be connected
directly to the ground plane similarly to that shown in Figure 48
and Figure 49. Use a sufficient number of via holes to connect
the top and bottom ground planes. The evaluation circuit board
shown in Figure 50 is available from Analog Devices upon
request.
Solder the exposed pad on the underside of the ADMV1010 to
a low thermal and electrical impedance ground plane. This pad
is typically soldered to an exposed opening in the solder mask
on the evaluation board. Connect these ground vias to all other
ground layers on the evaluation board to maximize heat
dissipation from the device package. Figure 48 shows the
printed circuit board (PCB) land pattern footprint for the
ADMV1010-EVALZ, and Figure 49 shows the solder paste
stencil for the ADMV1010-EVALZ.
0.217" SQUARE
SOLDER MASK
0.004" MASK/METAL OVERLAP
0.010" MINIMUM MASK WIDTH
GROUND PAD
PAD SIZE
0.026" × 0.010"
PIN 1
0.197"
[0.50]
0.156"
MASK
OPENING
ø.034"
TYPICAL
VIA SPACING
ø.010"
TYPICAL VIA
0.030"
MASK OPENING
0.138" SQUARE MASK OPENING
0.02 × 45° CHAMFER FOR PIN 1
0.146" SQUARE
GROUND PAD
Figure 48. PCB Land Pattern Footprint of the ADMV1010-EVALZ
Rev. A | Page 18 of 21
15788-148
0.010" REF
Data Sheet
ADMV1010
0.017
0.0197
TYP
0.219
SQUARE
0.132
SQUARE
0.017
R0.0040 TYP
132 PLCS
0.010
TYP
15788-149
0.027
TYP
15788-150
Figure 49. Solder Paste Stencil of the ADMV1010-EVALZ
Figure 50. ADMV1010-EVALZ Evaluation Board, Top Layer
Rev. A | Page 19 of 21
ADMV1010
Data Sheet
BILL OF MATERIALS
Table 6.
Qty.
1
2
Reference Designator
Not applicable
C1, C7
2
2
C2, C8
C3, C9
4
3
GND, GND1, VDLO, VDLNA
LO_INPUT, RF_INPUT, IF_OUTPUT
1
1
R3
X1
1
1
Device Under Test (DUT)
Heatsink
Description
PCB
100 pF multilayer ceramic capacitors, high
temperature, 0402
0.01 µF ceramic capacitors, X7R, 0402
1 µF monolithic ceramic capacitors, SMD, X5R,
0402
Connection PCB SMT test points, CNKEY5016TP
Connection PCB SMA, K_SRI-NS,
CNSMAL460W295H156
50 Ω, high frequency chip resistor, 0402
XFMR power splitter/combiner, 2500 MHz to
4500 MHz, TSML126W63H42
GaAs, MMIC, I/Q downconverter
Heatsink
Rev. A | Page 20 of 21
Manufacturer/Part No.
Analog Devices/042361
Murata/GRM1555C1H101JA01D
Murata/GRM155R71E103KA01D
Taiyo Yuden/UMK107AB7105KA-T
Keystone Electronics Corporation/5016
SRI Connector Gage Co./25-146-1000-92
Vishay Precision Group/FC0402E50R0FST1
Mini-Circuits/QCN-45+
Analog Devices/ADMV1010AEZ
Analog Devices/111332
Data Sheet
ADMV1010
OUTLINE DIMENSIONS
0.36
0.30
0.24
0.08
REF
1
0.50
BSC
3.60
3.50 SQ
3.40
EXPOSED
PAD
17
TOP VIEW
1.10
1.00
0.90
PIN 1
32
25
24
0.38
0.32
0.26
8
16
SIDE VIEW
BOTTOM VIEW
9
0.20 MIN
3.50 REF
4.10 REF
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
PKG-004843
SEATING
PLANE
04-24-2017-D
PIN 1
INDICATOR
5.05
4.90 SQ
4.75
Figure 51. 32-Terminal Ceramic Leadless Chip Carrier [LCC]
(E-32-1)
Dimensions shown in millimeters.
ORDERING GUIDE
Model 1
ADMV1010AEZ
Temperature
Range
−40°C to +85°C
Package Body
Material
Alumina Ceramic
ADMV1010AEZ-R7
−40°C to +85°C
Alumina Ceramic
Lead Finish
Gold Over
Nickel
Gold Over
Nickel
ADMV1010-EVALZ
1
Z = RoHS Compliant Part.
©2017-2018 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D15788-0-1/18(A)
Rev. A | Page 21 of 21
Package Description
32-Terminal Ceramic Leadless Chip
Carrier [LCC]
32-Terminal Ceramic Leadless Chip
Carrier [LCC]
Evaluation Board
Package
Option
E-32-1
E-32-1
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