IP2716
USB TYPE-C PD3.0、QC3.0/2.0/MTK High Voltage Charger Protocol Controller
Feature
Applications










USB TYPE-C
 Integrate TYPE-C DRP protocol
 Auto detect TYPE-C device plug in or plug out
 Auto detect the capability of the sink and the
source
USB Power Delivery(PD3.0)
 Hardware BMC transmitter and receiver
 Full feature physical layer
 Hardware CRC protect the data integrity
 Integrate PD3.0 protocol engine
 Support E-MARK cable
 Support VCONN swap
 Hardware reset
Integrate QC3.0/2.0 Quick charge protocol
 QC3.0/2.0 High voltage output protocol
 CLASS A and CLASS B
 Including BC1.2/APPLE/SUMSAMG charging
protocol
 Provide feedback voltage to adjust the output
voltage dynamically
Support MTK PE+1.1 Fast charging technology
Power Manage
 Build in VCONN power path switch
 External P-MOSFET switch control
 Build in ADC to monitor the current of the
external MOSFET
 Build in power path manage.
 Power supply by VBUS or battery
 Support application with no battery supply
ADC
 Build 14bit ADC
 Monitoring Voltage and current of VBUS
 Monitoring Voltage of the battery
 Monitoring Voltage of the VCONN
 Support 3 general ADC input
Peripheral interface
 SPI、I2C、UART、PWM、GPIOs
Low power consume
 Standby current less than 100uA
Package
 5 mm × 5 mm QFN32
Version 1.0


AC power Adapter for cellphone, notebook, tablet, VR
box, UAV, robot
Power-Bank
Car charger
Description
IP2716 is a highly-integrated, flexible high voltage
charging protocol controller. It supports the most
popular high voltage charging protocol. Such as
TYPE-C PD3.0, QC3.0, MTK PE+1.1, DCP, BC1.2
etc.
The SOC could be a powerful protocol controller
used in AC adapter, power-bank, Car charger or other
power charging solution.
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IP2716
DCH_G
VBUS
CH_G
CH_V
SENSEP
Logic Block Diagram
SENSEN
1.
External Gate Control and Current Sense
VCON5V
600mA
VBUS
VSYS
VCC
VDD
+
-
3.3V
LDO2
1.8V
LDO1
3.1V
LDO3
ADC
PD
PHY
CC1
TYPE-C
+
-
CC2
FB
GPIOs
GPIO
DP
I2C
I2C
SPI
SPI
UART
UART
TEST1
TEST2
DEBUG
MCU
HVDCP
DM
GND
Figure 1 IP2716 Block Diagrams
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IP2716
2.
Typical Application
Figure 2 illustrates a Notebook DRP application diagram using IP2716. The Type-C port can be used as a power
provider or a power consumer.
PMOS
PMOS
10k
PMOS
DCDC
0.1uF
2R
DCH_G
2R
2R
SENCEN
CH_G
0.1uF
10mOhm
PMOS
10k
CH_V
0.1uF
CH_G
10uF
VBUS
CH_V
SENCEP
Charger
88.6364
External Gate Control and Current Sense
2.9~5.5V
for VSYS
VCON5V
CC1
VSYS
1uF
VCC
1uF
POWER
PD
PHY
ADC
TYPE-C
TYPE-C
Receptacle
CC2
VDD
1uF
330pF
330pF
1uF
FB
GPIOs
TEST1
TEST2
FB
IP2716
GPIO
I2C
SPI
UART
DP
HVDCP
MCU
DM
DEBUG
GND
GND
Figure 2 Dual Role Port (DRP) Application Diagram
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IP2716
Figure 3 illustrates the application diagram of power adapter using IP2716.
0.1uF
SENCEN
CH_G
2R
DCH_G
2R
2R
10uF
VBUS
10k
CH_V
0.1uF
10mOhm
PMOS
SENCEP
PMOS
DC-DC
AC-DC Secondary
5~20V
0.1uF
External Gate Control and Current Sense
2.9~5.5V
for VSYS
VCON5V
CC1
VSYS
1uF
VCC
1uF
POWER
PD
PHY
ADC
TYPE-C
TYPE-C
Receptacle
CC2
VDD
1uF
330pF
330pF
1uF
FB
GPIOs
TEST1
TEST2
FB
IP2716
GPIO
I2C
SPI
UART
DP
HVDCP
MCU
DM
DEBUG
GND
GND
Figure 3 Power Adapter Application Diagram
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IP2716
Figure 4 illustrates a power bank application diagram using IP2716. The Type-C receptacle is used for providing as
well as consuming power. Additionally, a Type-A receptacle can also be provided for providing power to the sinks
.
0.1uF
10mOhm
PMOS
2R
10k
DCH_G
Battery or
2.9V~5.5V
for VSYS
CH_V
CH_G
2R
2R
CC1
VSYS
VCC
1uF
POWER
PD
PHY
ADC
TYPE-C
330pF
TYPE-C
Receptacle
CC2
VDD
1uF
10uF
External Gate Control and Current Sense
VCON5V
1uF
0.1uF
VBUS
PMOS
SENCEP
Provider and Consumer Path
SENCEN
Battery
or
Power
Subsystem
0.1uF
330pF
1uF
FB
GPIOs
TEST1
TEST2
IP2716
FB
GPIO
I2C
SPI
UART
DP
HVDCP
MCU
DM
DEBUG
GND
GND
Figure 4 Power Bank Application Diagram
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IP2716
3. PINS
Table 1 IP2716 Pin Description for 32-QFN Devices
Pin Map
Description
Pin Name
32-QFN
connection point to the positive terminal of sense the VBUS current
1
SENSEP
2
SENSEN
connection point to the positive terminal of sense the VBUS current
3
CH_V
Used for voltage detection
4
CH_G
VBUS Gate Driver Control for Consumer Switch
5
DCH_G
VBUS Gate Driver Control for Producer Switch
6
VCON5V
5V supply for VCONN FETS
7
CC2
USB PD connector detect/Configuration Channel 2
8
CC1
USB PD connector detect/Configuration Channel 1
9
DM
USB DM
10
GPIO18
General Purpose Input / Output 18
11
GPIO17
General Purpose Input / Output 17
12
DP
USB DP
13
GPIO2
General Purpose Input / Output 2, ADC2, UART_RX
14
FB
Feedback loop drive output
15
GPIO8
General Purpose Input / Output 8, SPI_SS, UART_TX
16
GPIO7
General Purpose Input / Output 7, SPI_MOSI
17
GPIO9
General Purpose Input / Output 9, SPI_MISO
18
GPIO10
General Purpose Input / Output 10, SPI_CLK
19
TEST_1
Debug pin for programming the device and firmware update
20
GPIO5
General Purpose Input / Output 5, I2C_SDA
21
GPIO6
General Purpose Input / Output 6, I2C_SCL
22
TEST_2
Debug pin for programming the device and firmware update
23
GPIO4
General Purpose Input / Output 4, PWM6
24
GPIO1
General Purpose Input / Output 1, ADC1, PWM5
25
GPIO0
General Purpose Input / Output 0, ADC0
26
GND
Ground
27
GPIO15
General Purpose Input / Output 15
28
GPIO16
General Purpose Input / Output 16
29
VDD
VDD Supply Input / Output
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IP2716
30
VCC
VCC Supply Input / Output
31
VSYS
System Power Supply
32
VBUS
Input or output up to 20 V
33
EPAD
(PGND)
Power Ground
GPIO9
GPIO10
TEST_1
GPIO5
GPIO6
TEST_2
GPIO4
GPIO1
24 23 22 21 20 19 18 17
GPIO0
25
16
GPIO7
GND
26
15
GPIO8
GPIO15
27
14
FB
GPIO16
28
13
GPIO2
VDD
29
IP2716
12
DP
VCC
30
QFN32
11
GPIO17
VSYS
31
10
GPIO18
VBUS
32
33 EPAD
9
1
2
3
4
5
6
7
8
DM
SENSEP
SENSEN
CH_V
CH_G
DCH_G
VCON5V
CC2
CC1
Figure 5 Pinouts of 32-QFN Package (Top View)
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IP2716
4. Specifications
4.1 Absolute Maximum Ratings
Parameter
symbol
MIN
MAX
VBUS
-0.3
24
VCON5V
-0.3
6
VSYS
-0.3
6
VCC
-0.3
5
CH_V
-0.3
24
FB
-0.3
5
SENSEN
-0.3
24
SENSEP
-0.3
24
VCC
-0.3
3.3
VDD
-0.3
2.2
GPIOs
-0.3
VCC+0.3
TEST1, TEST2
-0.3
VCC+0.3
CC1, CC2
-0.3
6
DP, DM
-0.3
6
Junction temperature
TJ
-40
125
℃
Storage temperature
Tstg
-60
125
℃
Thermal resistance (from junction to
ambient air)
θJA
Input voltage range
Output voltage range
I/O voltage range
ESD
UNIT
V
V
V
18
℃/W
4000
V
*Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond those
indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated
conditions for extended periods may affect device reliability.
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IP2716
4.2 Recommend operation conditions
Parameter
symbol
MIN
Typical
MAX
VBUS
4.5
22
VCON5V
4.5
5.5
VSYS
2.9
7.4
VCC
2.8
3.3
GPIOs
GND-0.3V
VCC+0.3V
TEST1, TEST2
GND-0.3V
VCC+0.3V
CC1, CC2
GND-0.3V
5.5
DP, DM
GND-0.3V
5.5
Unit
Input voltage range
V
I/O voltage range
V
*Beyond these operation conditions, the device’s performance will not be guaranteed
4.3 Electrical Characteristics
DC Specifications
Parameter
Description
MIN
TYP
MAX
Unit
Details/Test condition
VSYS
0
7.4
V
UFP Mode
VSYS
2.8
7.4
V
DFP/DRP Mode
4.5
5.5
V
VCON5V
Power Supply Input
Voltage
VCC
3.1
V
VDD
1.8
V
VBUS
4.5
22
V
MAX
Unit
GPIO Specifications
Parameter
Description
MIN
VIH
Input voltage HIGH level
0.7x
VCC
VIL
Input voltage LOW level
TYP
Details/Test condition
V
0.3x
VCC
V
VOH
Output voltage HIGH
level
VCC
V
VOL
Output voltage HIGH
level
GND
V
Rpu
Pull–up resistor value
10
k
Pull–up resistor Enabled
TYPE-C DC Specifications
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IP2716
Parameter
Description
MIN
TYP
MAX
Unit
Rp_default
DFPCC termination for
default USB Power
80
µA
Rp_1.5A
DFP CC termination for
1.5A power
180
µA
Rp_3.0A
DFP CC termination for
1.5A power
330
µA
Rd
DFP CC termination for
1.5A power
5.1
kΩ
Details/Test condition
I2C Specifications
Parameter
Description
FI2C
MIN
TYP
Bit rate
MAX
Unit
400
KHz
MAX
Unit
2
MHz
MAX
Unit
384
KHz
MAX
Unit
100
KHz
MAX
Unit
Details/Test condition
SPI Specifications
Parameter
FSPI
Description
MIN
TYP
SPI Operating frequency
Details/Test condition
UART Specifications
Parameter
Description
FUART
MIN
TYP
Bit rate
Details/Test condition
PWM Specifications
Parameter
FPWM
Description
PWM
frequency
MIN
TYP
Operating
Details/Test condition
ADC Specifications
Parameter
Description
MIN
TYP
Resolution
ADC resolution
ADCVBUSV
VBUS Voltage ADC range
0
24
V
ADCVBUSI
VBUS Current ADC range
-6.28
6.28
A
ADCVSYS
VSYS Voltage ADC range
0
7.4
V
ADCVCON5V
VCON5V Voltage ADC range
0
7.4
V
ADC0~2
ADC0~2 range
0
3.7
V
Version 1.0
14
Details/Test condition
Bits
10mOhm
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IP2716
5. Function Description
5.1 Overview
USB-PD Controller
Mode Configuration for Source (Host), Sink (Device), or Source-Sink
Bi-Phase Marked Encoding/Decoding (BMC)
Physical Layer (PHY) Protocol
Policy Engine
USB TYPE-C Controller
Detect USB Cable Plug Attach
Cable Orientation and Role Detection
Assign CC and VCONN Pins
Advertise Default, 1.5A or 3A for TYPE-C Power
Power Switch
Gate Control and Current Sense for External 5-V to 20-V, 5A Bi-directional Switch
5-V, 600mA Switches for VCONN
Over-Current Limiter, Overvoltage Protector
Slew Rate Control
Hard Reset Support
Support Mainstream Fast Charge Mode
QC3.0, DCP, BC1.2, Pump Express Plus
Peripherals
I2C, SPI, UART, PWM
5.2 Power Delivery Over The USB Type-C Connector Using IP2716
Power delivery over the USB Type-C connector takes advantage of the existing USB methods as defined by: the
USB 2.0 and USB 3.1 specifications, the USB BC 1.2 Specification and the USB Power Delivery specification. The
USB Type-C Current mechanism allows the DFP to offer more current than defined by the USB BC 1.2 Specification.
Additionally, IP2716 integrate QC3.0/2.0 Quick charge output Protocol, include BC1.2/APPLE/SUMSAMG charging
protocol, Support MTK PE+ Fast charging technology.
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IP2716
5.3 USB Power Delivery Controller
The USB Power Delivery (PD) controller provides the physical layer (PHY) functionality of the USB-PD protocol. It is
comprised of the following:
- Mode Configuration for Source (Host), Sink (Device), or Source-Sink
- Physical Layer (PHY) Protocol
- Policy Engine
Physical Layer (PHY) Functions
The USB PD Physical Layer consists of a pair of transmitters and receivers that communicate across a single signal
wire (CC). All communication is half duplex. The PHY Layer practices collision avoidance to minimize
communication errors on the channel.
The transmitter performs the following functions:
- Receive packet data from the protocol layer
- Calculate and append a CRC
- Encode the packet data including the CRC (i.e. the payload)
- Transmit the Packet (Preamble, SOP*, payload, CRC and EOP) across the channel using Bi-Phase Mark
Coding (BMC) over CC
The receiver performs the following functions:
- Recover the clock and lock onto the Packet from the Preamble
- Detect the SOP*
- Decode the received data including the CRC
- Detect the EOP and validate the CRC
·If the CRC is valid, deliver the packet data to the protocol layer.
·If the CRC is not valid, flush the received data.
Policy Engine
Policy Engine interacts with the Device Policy Manager in order to implement the present Local Policy.
5.4 Detecting a Valid DFP-to-UFP Connection
For the USB TYPE-C solution, two pins on the connector, CC1 and CC2, are used to establish and manage the
DFP-to-UFP connection. Functionally, the configuration channel is used to serve the following purposes.
- DFP-to-UFP attach/detach detection
- Plug orientation/cable twist detection
- Initial DFP-to-UFP (host-to-device) and power relationships detection
- USB Type-C VBUS current detection and usage
- USB PD communication
- Configure VCONN
- Discover and configure optional Alternate and Accessory modes
The general concept for setting up a valid connection between a DFP and UFP is based on being able to detect
terminations residing in the product being attached.
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To aid in defining the functional behavior of CC, a pull-up (Rp) and pull-down (Rd) termination model is used –
actual implementation in hosts and devices may vary, for example, the pull-up termination could be replaced by a
current source. (see Figure 6)
Figure 6 Current Source/Pull-Down CC Model
Figure 7 shows the IP2716 plug and orientation detection block at each CC pin.
VCC
VRE
F1
IH_DF
IH_1P5
IH_3P0
VRE
F2
CC1/CC
2
Rd
VRE
F3
Figure 7 Plug and Orientation Detection Block
Configure as a DFP
When configured as a DFP, the IP2716 detects when a cable or a UFP is attached using the both CC pins. When in a
disconnected state, the IP2716 monitors the voltages on these pins to determine what is connected.
Configure as a UFP
When the IP2716 is configured as a UFP, the IP2716 presents a pull-down resistance Rd on both CC pins. When the
UFP senses VBUS, the UFP monitors both CC pins for a voltage greater than its local ground. The CC pin that is at a
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IP2716
higher voltage (i.e. pulled up by Rp in the DFP) indicates the orientation of the plug. Table 2 summarizes the port
state from the DFP’s perspective.
Table 2 Cable Detect States for a DFP
CC1
CC2
Open
Open
Rd
Open
Open
Rd
Open
Ra
Ra
Open
Rd
Ra
Ra
Rd
STATE
Source Behavior
Sink Behavior
- Sense CC pins for attach
- Do not apply VBUS or VCONN
- Sense CC for orientation
- Sense CC for detach
- Apply VBUS and VCONN
- Sense VBUS for attach
Powered cable
without Sink attached
- Sense CC pins for attach
- Do not apply VBUS or VCONN
- Sense VBUS for attach
Powered cable with
Sink or
VCONN-powered
Accessory attached
- Sense CC for orientation
- Sense CC for detach
- Apply VBUS and VCONN
- If accessories are supported,
see Source Behavior with
exception that VBUS is not
applied., otherwise, N/A.
- Sense CC pins for detach
- Reconfigure for debug
- If accessories are supported,
see Source Behavior,
otherwise, N/A
- Sense CC pins for detach
- Reconfigure for analog audio
- If accessories are supported,
see Source Behavior,
otherwise, N/A
Nothing attached
Sink attached
Rd
Rd
Debug Accessory
Mode attached
(Appendix B)
Ra
Ra
Audio Adapter
Accessory Mode
attached (Appendix A)
- Sense CC pins for orientation
- Sense loss of VBUS for detach
Dead Battery Detection support
A system that supports Dead Battery Detection shall apply Rd to both CC pins. When the system with a dead
battery has sufficient charge, it may use the USB PD DR_Swap message to become the DFP.
5.5 USB Type-C Current
The USB Type-C connector uses CC pins for configuration including an ability for a Source to advertise to its port
partner (Sink) the amount of current it can apply:
- Default values defined by the USB Specification (500 mA for USB 2.0 ports, 900 mA for USB 3.1 ports)
- 1.5A
- 3.0A
A Sink that takes advantage of the additional current offered shall monitor the CC pins and shall adjust its current
consumption to remain within the value advertised by the Source. While a USB PD contract is in place, a Sink is
not required to monitor USB Type-C current advertisements and shall not respond to USB Type-C current
advertisements.
The Source adjusts current source (or Rp) to advertise which of the three current levels it supports. (see Table 3)
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IP2716
Table 3 Source CC Termination (Rp) Requirements
Table 4, Table 5 and Table 6 provide the CC voltage values that a Source shall use to detect what is attached base
on what is attached based on the USB Type-C Current advertisement that the Source is offering.
Table 4 CC Voltages on Source Side – Default USB
Table 5 CC Voltages on Source Side – 1.5 A @ 5 V
Table 6 CC Voltages on Source Side – 3.0 A @ 5 V
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The voltage (Rd) on CC is used by the Sink to determine the maximum current it may draw. Table 7 provides the CC
voltage threshold on Sink side.
Table 7 Voltage on Sink CC pins (Multiple Source Current Advertisements)
5.6 Support Mainstream Fast Charge Mode
Quick Charge Interface
The IP2716 can automatically detects Quick Charge 2.0/3.0 capable devices with handshake by USB D+/D- data
line. It’s also complaint with BC1.2 / APPLE 2.4A mode / Samsung Mode.
 Apple Device: Applying 2.7V on D+ line and 2.7V on D- line.
 Samsung Smart-Phone: Applying 1.2V on D+ line and 1.2V on D- line.
 BC1.2: Shorting D+ Line to D- Line.
 Quick Charge 2.0/3.0: D+ and D- line configuration see Table 8.
Table 8 QC2.0/3.0 DP/DM configuration
DP
DM
Result(Class A)
Result(Class B)
0.6 V
GND
5V
5V
3.3 V
0.6 V
9V
9V
0.6 V
0.6 V
12 V
12 V
0.6 V
3.3 V
Continue Mode
Continue Mode
3.3 V
3.3 V
Keep
20V
Pump Express Plus Protocol
The IP2716 is compatible with Pump Express Plus fast charge protocol 1.1. The Pump Express Plus Fast Charge
protocol enables communication between devices.
5.7 Peripherals
IP2716 integrate Run-time reconfigurable serial communication block with reconfigurable I2C, SPI, UART and PWM
functionality.
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IP2716
6. Package information
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IP2716
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