X11DPi-N
X11DPi-NT
USER’S MANUAL
Revision 1.0
The information in this user’s manual has been carefully reviewed and is believed to be accurate. The vendor assumes
no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update
or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note:
For the most up-to-date version of this manual, please see our website at www.supermicro.com.
Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual
at any time and without notice. This product, including software and documentation, is the property of Supermicro and/
or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except
as expressly permitted by the terms of said license.
IN NO EVENT WILL Super Micro Computer, Inc. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL,
SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT
OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER
MICRO COMPUTER, INC. SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED
OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING,
INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the
State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution
of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.
FCC Statement: This equipment has been tested and found to comply with the limits for a Class A digital device
pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful
interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can
radiate radio frequency energy and, if not installed and used in accordance with the manufacturer’s instruction manual,
may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your own expense.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only
to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate Material-special handling may apply.
See www.dtsc.ca.gov/hazardouswaste/perchlorate”.
WARNING: Handling of lead solder materials used in this product may expose you to lead, a
chemical known to the State of California to cause birth defects and other reproductive harm.
The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment,
nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency communication devices or other critical
systems whose failure to perform be reasonably expected to result in significant injury or loss of life or catastrophic
property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products
for use in such ultra-hazardous applications, it does so entirely at its own risk. Furthermore, buyer agrees to fully
indemnify, defend and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and
proceedings of any kind arising out of or related to such ultra-hazardous use or sale.
Manual Revision 1.0
Release Date: July 25, 2017
Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this
document. Information in this document is subject to change without notice. Other products and companies referred
to herein are trademarks or registered trademarks of their respective companies or mark holders.
Copyright © 2017 by Super Micro Computer, Inc.
All rights reserved.
Printed in the United States of America
Preface
Preface
About This Manual
This manual is written for system integrators, IT technicians, and knowledgeable end users.
It provides information for the installation and use of the X11DPi-N(T) motherboard.
About This Motherboard
T h e S u p e r X 11 D P i - N ( T ) m o t h e r b o a r d s u p p o r t s d u a l I n t e l ® X e o n
81xx/61xx/51xx/41xx/31xx series processors (Socket P0) with a TDP (Thermal Design Power)
of up to 205W and a UPI (Ultra Path Interconnect) of up to 10.4 GT/s (Note below). With
the Intel C620 PCH built-in, this motherboard supports four PCI-E 3.0 x16 slots, two PCI-E
3.0 x8 slots, 14 SATA 3.0 connections, and 3DS LRDIMM/LRDIMM/RDIMM/NV-DIMM DDR4
ECC 2666/2400/2133 MHz memory in 16 memory slots. The X11DPi-N(T) provides maximum
performance, system cooling, and PCI-E capacity currently available on the market. This
motherboard is optimized for PCI-Express expansion with flexible IO support, and is ideal
for high-performance, general-purpose server platforms. Please note that this motherboard is
intended to be installed and serviced by professional technicians only. For processor/memory
updates, please refer to our website at http://www.supermicro.com/products/.
Note: UPI/memory speeds are dependent on the processors installed in your system.
Manual organization
Chapter 1 describes the features, specifications and performance of the motherboard, and
provides detailed information on the Intel C620 chipset.
Chapter 2 provides hardware installation instructions. Read this chapter when installing the
processor, memory modules, and other hardware components into the system.
If you encounter any problems, see Chapter 3, which describes troubleshooting procedures
for video, memory, and system setup stored in the CMOS.
Chapter 4 includes an introduction to the BIOS, and provides detailed information on running
the CMOS Setup utility.
Appendix A provides BIOS Error Beep Codes.
Appendix B lists software program installation instructions.
Appendix C lists standardized warning statements in various languages.
Appendix D provides UEFI BIOS Recovery instructions.
3
Super X11DPi-N(T) User's Manual
Contacting Supermicro
Headquarters
Address:
Super Micro Computer, Inc.
980 Rock Ave.
San Jose, CA 95131 U.S.A.
Tel:
+1 (408) 503-8000
Fax:
+1 (408) 503-8008
Email:
marketing@supermicro.com (General Information)
support@supermicro.com (Technical Support)
Website:
www.supermicro.com
Europe
Address:
Super Micro Computer B.V.
Het Sterrenbeeld 28, 5215 ML
's-Hertogenbosch, The Netherlands
Tel:
+31 (0) 73-6400390
Fax:
+31 (0) 73-6416525
Email:
sales@supermicro.nl (General Information)
support@supermicro.nl (Technical Support)
rma@supermicro.nl (Customer Support)
Website:
www.supermicro.nl
Asia-Pacific
Address:
Super Micro Computer, Inc.
3F, No. 150, Jian 1st Rd.
Zhonghe Dist., New Taipei City 235
Taiwan (R.O.C)
Tel:
+886-(2) 8226-3990
Fax:
+886-(2) 8226-3992
Email:
support@supermicro.com.tw
Website:
www.supermicro.com.tw
4
Table of Contents
Table of Contents
Chapter 1 Introduction
1.1 Checklist................................................................................................................................8
1.2 Processor and Chipset Overview........................................................................................18
1.3 Special Features.................................................................................................................19
Recovery from AC Power Loss..........................................................................................19
1.4 System Health Monitoring...................................................................................................19
1.5 ACPI Features.....................................................................................................................20
1.6 Power Supply......................................................................................................................20
1.7 Super I/O.............................................................................................................................20
1.8 Advanced Power Management...........................................................................................21
Intel® Intelligent Power Node Manager (IPNM).................................................................21
Management Engine (ME).................................................................................................21
Chapter 2 Installation
2.1 Static-Sensitive Devices......................................................................................................22
2.2 Motherboard Installation......................................................................................................23
Tools Needed.....................................................................................................................23
Location of Mounting Holes...............................................................................................23
Installing the Motherboard.................................................................................................24
2.3 Processor and Heatsink Installation....................................................................................25
The Intel 81xx/61xx/51xx/41xx/31xx Series Processors....................................................25
Overview of the Processor Socket Assembly....................................................................26
Overview of the Processor Heatsink Module (PHM).........................................................27
Attaching the Non-F Model Processor to the Narrow Processor Clip to Create the
Processor Package Assembly............................................................................................28
Attaching the F Model Processor to the Narrow Processor Clip to Create the Processor
Package Assembly.............................................................................................................29
Attaching the Non-F Model Processor Package Assembly to the Heatsink to Form the
Processor Heatsink Module (PHM)....................................................................................30
Attaching the F Model Processor Package Assembly to the Heatsink to Form the
Processor Heatsink Module (PHM)....................................................................................31
Preparing the CPU Socket for Installation.........................................................................32
Removing the Dust Cover from the CPU Socket..............................................................32
5
Super X11DPi-N(T) User's Manual
Installing the Processor Heatsink Module (PHM) .............................................................33
Installing an HFI Carrier Card for Host Fabric Interface (HFI) Support as Needed
(Available when an F Model CPU is Used).......................................................................34
Removing the Processor Heatsink Module (PHM) from the Motherboard........................35
2.4 Memory Support and Installation........................................................................................36
Memory Support.................................................................................................................36
DIMM Population Requirements for the 81xx/61xx/51xx/41xx/31xx Processors..............37
DIMM Installation...............................................................................................................40
DIMM Removal..................................................................................................................40
2.5 Rear I/O Ports.....................................................................................................................41
2.6 Front Control Panel.............................................................................................................45
2.7Connectors..........................................................................................................................50
Power Connector...............................................................................................................50
Headers..............................................................................................................................52
Host Fabric Interface (HFI) Carrier Card Sideband Header (for the F Model CPU Only).53
2.7 Jumper Settings..................................................................................................................61
How Jumpers Work............................................................................................................61
2.8 LED Indicators.....................................................................................................................67
Chapter 3 Troubleshooting
3.1 Troubleshooting Procedures...............................................................................................70
Before Power On...............................................................................................................70
No Power...........................................................................................................................70
No Video............................................................................................................................71
System Boot Failure ........................................................................................................71
Memory Errors...................................................................................................................71
Losing the System's Setup Configuration..........................................................................72
When the System Becomes Unstable...............................................................................72
3.2 Technical Support Procedures............................................................................................74
3.3 Frequently Asked Questions...............................................................................................75
3.4 Battery Removal and Installation........................................................................................76
Battery Removal.................................................................................................................76
Proper Battery Disposal.....................................................................................................76
Battery Installation..............................................................................................................76
6
Table of Contents
3.5 Returning Merchandise for Service.....................................................................................77
Chapter 4 BIOS
4.1Introduction..........................................................................................................................78
Starting the Setup Utility....................................................................................................78
4.2 Main Setup..........................................................................................................................79
4.3 Advanced Setup Configurations..........................................................................................81
4.4 Event Logs........................................................................................................................107
4.5 IPMI...................................................................................................................................109
4.6 Security Settings...............................................................................................................112
4.7 Boot Settings.....................................................................................................................115
4.8 Save & Exit........................................................................................................................118
Appendix A BIOS Codes
Appendix B Software Installation
B.1 Installing Software Programs............................................................................................122
B.2SuperDoctor® 5..................................................................................................................123
Appendix C Standardized Warning Statements
Battery Handling...............................................................................................................124
Product Disposal..............................................................................................................126
Appendix D UEFI BIOS Recovery
7
Super X11DPi-N(T) User's Manual
Chapter 1
Introduction
Congratulations on purchasing your computer motherboard from an industry leader.
Supermicro motherboards are designed to provide you with the highest standards in quality
and performance.
In addition to the motherboard, several important parts that are included with your shipment
are listed below. If anything listed is damaged or missing, please contact your retailer.
1.1 Checklist
Main Parts List
Description
Part Number
Quantity
Supermicro motherboard-X11DPi-N or X11DPi-NT
MNL-1773
1
SATA cables
CBL-0044L (x2)
2
Mini SAS to 4 SATA cable
CBL-0476L (x1)
1
I/O Backplane
MCP-260-00042-ON
1
Important Links
For your system to work properly, please follow the links below to download all necessary
drivers/utilities and the user’s manual for your server.
•Supermicro product manuals: http://www.supermicro.com/support/manuals/
•Product drivers and utilities: ftp://ftp.supermicro.com
•Product safety info: http://www.supermicro.com/about/policies/safety_information.cfm
•If you have any questions, please contact our support team at: support@supermicro.com
This manual may be periodically updated without notice. Please check the Supermicro website
for possible updates to the manual revision level.
8
Chapter 1: Introduction
Figure 1-1. X11DPi-N(T) Motherboard Image
Note: All graphics shown in this manual were based upon the latest PCB revision
available at the time of publication of the manual. The motherboard you received may
or may not look exactly the same as the graphics shown in this manual.
9
Super X11DPi-N(T) User's Manual
Figure 1-2. X11DPi-N(T) Motherboard Layout
(not drawn to scale)
JPG1
LE1
BMC
VGA
COM1
LAN CTRL
FAN5
FAN6
LAN2
LAN1
USB0/1
(2.0)
IPMI_LAN
USB4/5 (3.0)
JPCIE6
JPCIE5
BIOS
LICENSE
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE4
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE3
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
JVRM1
JVRM2
CPU2
BT1
JP4
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
JPI2C1
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JPWR1 JPWR2
CPU1
PCH
JPWR3
JF1
FAN3
FAN4
S-SATA5
JNVI2C1
LE2
JL1
P2-DIMMA2
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
BIOS
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMA1
JBT1
P2-DIMMB1
JP2
JTPM1
LE3
X11DPi-N(T)
Rev. 1.20
P2-DIMMC1
USB 7/8(3.0)
JHFI2
JM2_1
M.2-PCH
A
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
COM2 JIPMB1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
LEDM1
UID
A
S-SATA4 JNVME2
JNVME1
C
FAN2 FAN1
Notes:
1. Components not documented are for internal testing only.
2. The X11DPi-NT supports Intel X557-AT2 10G LAN controller, which provides dual
10GbE LAN connections.
3. The X11DPi-N supports Marvell 88E1512 1G LAN controller, which provides dual
1GbE LAN connections.
10
Chapter 1: Introduction
Quick Reference
IPMI LAN
SLOT2
FAN6
VGA
USB4/5
SLOT4
LAN1
FAN5
SLOT6 LE1UID
LEDM1 SLOT3BT1
COM1
LAN2 USB0/1
SLOT5
UID
SLOT1
JPG1
LE1
FAN5
FAN6
LAN2
LAN1
USB0/1
(2.0)
IPMI_LAN
USB4/5 (3.0)
JPCIE6
P2-DIMMD2
P2-DIMMD1
P2-DIMME1
P2-DIMMF1
CPU2
BIOS
LICENSE
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE4
JPCIE3
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
USB 2/3
(2.0)
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
JVRM1
JVRM2
CPU2
P2-DIMMC1
P2-DIMMB1
P2-DIMMA1
P2-DIMMA2
BT1
JP4
A
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P2-DIMMA2
JPI2C1
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JPWR1 JPWR2
CPU1
PCH
JF1
JPWR3
FAN3
FAN4
S-SATA5
JNVI2C1
LE2
JL1
P2-DIMMB1
BIOS
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMA1
JP2
LE3
X11DPi-N(T)
Rev. 1.20
JBT1
P2-DIMMC1
USB 7/8(3.0)
I-SATA4-7
JL1
FANB
FANA
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
I-SATA0-3
COM1
LAN CTRL
JHFI2
JM2_1
M.2-PCH
JTPM1
JM2_1
USB7/8
LE3
JTPM1
JBT1
JD1
JPME1
T-SGPIO3
JWD1
JRK1
S-SATA0-3
USB 6
(3.0)
JPME2
USB2/3
USB6
JPME2
JVRM1
JVRM2
LEDM1
CPU1 SLOT1 PCI-E 3.0 X8
JIPMB1
COM2 JIPMB1
COM2
JPL1
JPG1
JPL1
BMC
VGA
A
S-SATA4 JNVME2
JNVME1
JSTBY1
P1-DIMMD2
S-SATA4
P1-DIMMD1
FAN3
S-SATA5
P1-DIMME1
FAN4
JNVI2C1
P1-DIMMF1
JNVME2 JNVME1
CPU1
C
JPI2C1
JPWR1
JPWR2
P1-DIMMA2
P1-DIMMA1
P1-DIMMB1
P1-DIMMC1
JPWR3
JF1
LE2
FAN2 FAN1
FAN2 FAN1
= mounting hole
Notes:
•See
Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front panel connections.
•" " indicates the location of Pin 1.
•Jumpers/components/LED indicators not indicated are used for internal testing only.
•Use only the correct type of onboard CMOS battery as specified by the manufacturer. Do
not install the onboard battery upside down to avoid possible explosion.
11
Super X11DPi-N(T) User's Manual
Quick Reference Table
Jumper
Description
Default Setting
JBT1
CMOS Clear
Open (Normal)
JPG1
Audio Enable
Pins 1-2 (Enabled)
JPL1
LAN1/LAN2 Enable
Pins 1-2 (Enabled)
JPME1
ME Recovery
Pins 1-2 (Normal)
JPME2
Manufacturing Mode Select
Pins 1-2 (Normal)
JVRM1/ JVRM2
VRM SMB Clock (to BMC or PCH)
Pins 1-2 (BMC, Normal)
JWD1
Watch Dog Timer Enable
Pins 1-2 (Reset to System)
Connector
Description
BT1
Onboard CMOS battery socket
COM1/COM2
Back panel COM port/COM header for front access
FAN1-6, FANA/FANB
System cooling fan headers (FAN1-FAN6, FAN A, FAN B)
IPMI_LAN
Dedicated IPMI_LAN port
I-SATA0~3, I-SATA4~7
SATA 3.0 connection header supported by the Intel PCH
JD1
Power LED header
JF1
Front Panel Control header
JHFI1
(*Notes below)
Host Fabric Interface (HFI) sideband connection header used for the HFI carrier card (when the F
model processor is installed on CPU Socket#1.) (See Notes below.)
JIPMB1
4-pin BMC External I2C header (for an IPMI-supported card)
JL1
Chassis Intrusion header
JM2_1
PCI-E M.2 slot
JNVI2C1
NVMe I2C header
JNVME1
NVMe Slot1
JNVME2
NVMe Slot2
JPI C1
Power Supply SMBbus I2C header
JPWR1/JPWR2
8-pin Power Supply connectors
JPWR3
24-pin ATX main power supply connector
JRK1
RAID Key for onboard SATA devices
JSTBY1
Standby power header
JTPM1
Trusted Platform Module (TPM)/Port 80 connector
LAN1/LAN2
Gigabit LAN/10G LAN Ethernet Ports on the IO back panel (10G LAN ports on X11DPi-NTonly)
2
Notes: 1. For the HFI sideband carrier card to function properly, please install the HFI
card to an appropriate PCI-E slot of your choice, and install an F model processor
in CPU Socket#1. 2. Connect an HFI cable from the HFI card to JHFI (HFI header)
and connect an IFP cable from HFI card to the processor. (See Pages 34 and 53 in
Chapter 2 for more info.)
12
Chapter 1: Introduction
Connector
Description
S-SATA0-3
S-SATA 3.0 connection Header supported by the Intel SCU
S-SATA4/S-SATA5
S-SATA Ports with built-in power pins and with support of Supermicro SuperDOM (Disk On Module)
devices
SLOT1/SLOT3
PCI-Express 3.0 X8 Slots supported by CPU1
SLOT2
PCI-Express 3.0 X16 Slot supported by CPU1
SLOT4/SLOT5/SLOT6
PCI-Express 3.0 X16 Slots supported by CPU2
T-SGPIO3
General Purpose Serial I/O Port
UID
Unit Identifier (UID) Switch
USB0/1
Back panel USB 2.0 Ports
USB2/3
Front Accessible USB 2.0 Header
USB4/5
Back panel USB 3.0 Ports
USB6
Type A USB 3.0 Header
USB7/8
Front Accessible USB 3.0 Header
VGA
VGA Port
LED
Description
Status
LE1
UID (Unit Identifier) LED
Solid Blue: Unit identified
LE2
Onboard Power LED
On: Onboard power on
LEDM1
BMC Heartbeat LED
Blinking Green: BMC normal
Notes:
1. The X11DPi-NT supports Intel X557-AT2 10G LAN controller, which provides dual
10GbE LAN connections.
2. The X11DPi-N supports Marvell 88E1512 GLAN controller, which provides dual
1GbE LAN connections.
13
Super X11DPi-N(T) User's Manual
Motherboard Features
Motherboard Features
CPU
• This
motherboard supports dual 81xx/61xx/51xx/41xx/31xx series (Socket P0) processors which offer Intel® UltraPath
Interconnect (UPI) of up to 10.4 GT/s
Note: Both CPUs need to be installed for full access to the PCI-E slots, DIMM slots, and onboard controllers. Refer
to the block diagram on page 18 to determine which slots or devices may be affected.
Memory
• Integrated memory controller embedded in the processor supports up to 2TB of
3DS Load Reduced DIMM (3DS LRDIMM),
Load Reduced DIMM (LRDIMM), Registered DIMM (RDIMM), Non-Volatile DIMM (NV-DIMM) DDR4 (288-pin) ECC
2666/2400/2133 MHz modules in 16 slots.
DIMM Size
• Up to 256GB at 1.2V
Note 1: Memory speed support depends on the processors used in the system.
Note 2: For the latest CPU/memory updates, please refer to our website at http://www.supermicro.com/products/
motherboard.
Chipset
•
Intel C620
Expansion Slots
• One (1) PCI-Express 3.0 X8 slot supported by CPU1 for use of S-SATA 0-5 devices (SXB1)
• One (1) PCI-Express 3.0 X16 slot supported by CPU2 for use of I-SATA 0-3 devices (SXB2)
• One (1) PCI-Express 3.0 X16 slot supported by CPU1 (SXB3_1)
• One (1) PCI-Express 3.0 X8 slot supported by CPU2 (SXB3_2)
• One (1) PCI-E 3.0 X16 slot supported by CPU2 (SXB4)
BaseBoard Management Controller (BMC)
• ASpeed AST 2500 Baseboard Controller (BMC) supports IPMI 2.0
• One (1) Dedicated IPMI LAN located on the rear IO back panel
Graphics
• Graphics controller via AST 2500 BMC (BaseBoard Management Controller)
Network Connection
• One Marvell 88E1512 Gigabit (10/100/1000 Mb/s) Ethernet Dual-Channel Controller for GLAN 1/GLAN 2 ports (X11DPi-N)
• One Intel X557-AT2 10-Gigabit Ethernet Dual-Channel Controller for 10G-LAN (TLAN) 1/10G-LAN (TLAN) 2 ports
(X11DPi-NT)
• One IPMI-dedicated LAN supported by the AST2500 BMC
I/O Devices
• Serial (COM) Port
• One (1) Fast UART 16550 port on the I/O back panel
14
Chapter 1: Introduction
Motherboard Features
• SATA 3.0
• Eight (8) SATA 3.0 ports supported by Intel PCH (I-SATA 0-3, I-SATA 4-7)
• Four (4) S-SATA 3.0 ports supported by Intel SCU
• Two (2) SATA 3.0 ports with power-pins built-in, w/support of Supermicro
SuperDOM (S-SATA4/S-SATA5)
•RAID (PCH)
• RAID 0, 1, 5, and 10
Peripheral Devices
• Two (2) USB 3.0 ports on the rear I/O panel (USB 0/1)
BIOS
• 32 MB SPI AMI BIOS® SM Flash UEFI BIOS
• ACPI 3.0/4.0, USB keyboard, Plug-and-Play (PnP), SPI dual/quad speed support, riser-card auto detection support, and
SMBIOS 2.7 or later
Power Management
• Main switch override mechanism
• Power-on mode for AC power recovery
• Intel® Intelligent Power Node Manager
4.0 (available when the Supermicro Power Manager [SPM] is installed and a
special power supply is used)
• Management Engine (ME)
System Health Monitoring
• Onboard voltage monitoring for +3.3V, 3.3V standby, +5V, +5V standby, +12V, CPU core, memory, chipset, BMC, PCH,
and battery voltages
• CPU System LED and control
• CPU Thermal Trip support
• Status monitor for speed control
• Status monitor for on/off control
• CPU Thermal Design Power (TDP) support of up to 205W (See Note 1 on next page.)
Fan Control
• Fan status monitoring via IPMI connections
• Dual cooling zone
• Low-noise fan speed control
• Pulse Width Modulation (PWM) fan control
System Management
• Trusted Platform Module (TPM) support
• PECI (Platform Environment Control Interface) 2.0 support
• UID (Unit Identification)/Remote UID
• System resource alert via SuperDoctor® 5
• SuperDoctor® 5, Watch Dog, NMI
• Chassis intrusion header and detection
LED Indicators
• CPU/Overheating
• Fan Failure
• UID/remote UID.
• LAN activity.
15
Super X11DPi-N(T) User's Manual
Motherboard Features
Dimensions
• 12" (L) x 13" (W) (304.8 mm x 330.2 mm)
Note 1: The CPU maximum thermal design power (TDP) is subject to chassis and
heatsink cooling restrictions. For proper thermal management, please check the chassis and heatsink specifications for proper CPU TDP sizing.
Note 2: For IPMI configuration instructions, please refer to the Embedded IPMI Configuration User's Guide available at http://www.supermicro.com/support/manuals/.
Note 3: It is strongly recommended that you change BMC log-in information upon initial system power-on. The manufacture default username is ADMIN and the password
is ADMIN. For proper BMC configuration, please refer to http://www.supermicro.com.
16
Chapter 1: Introduction
#2
PECI : 3 1
SOCKET I D: 1
#3
DMI 2
PCI-E X16 G3
PCI-E X8 G3
PCI-E X16 G3
2 x NVME
PCI-E X16 G3
PCI-E X8 G3
(LANE REVERSE)
DMI3
LAN 10G/1G
X557/88E1512
(QAT NOT SUPPORT)
KR/KX
(*X11DPi-N supports GLAN ports)
(*X11DPi-NT supports 10G LAN
ports)
#3
PCI-E
M.2 Slot
#9
#8
#7
#6
#5
#4
#3
#2
#1
#0
PCH
6.0 Gb/S
P2-DIMMA1
P2-DIMMA2
P2-DIMMB1
P2-DIMMC1
P2-DIMMD1
P2-DIMMD2
P2-DIMME1
P2-DIMMF1
#1
DDR4 2133/2666
P0
VCCP1
SNB CORE
DDR4
PCI-E X16
PCI-E X8
UPI
P1
PCI-E X16
PECI : 3 0 P1
SOCKET I D: 0
DMI 3
UPI
#1A #1B #3A #3B
PCI-E X8 G3
SLOT 3
P0
PCI-E X16
#2
VR13
5+1 PHASE
SLOT 4
SLOT 6
SLOT 5
#13
#12
#11
#10
SATA
VCCP0
SNB CORE
DDR4
PCI-E X16 G3 (LANE REVERSE)
SLOT 1
VCCP1 12v
VR13
5+1 PHASE
SATA
DDR4 2133/2666
VCCP0 12v
PCI-E X8 G3
PCI-E X16
SLOT 2
PCI-E X8
P1-DIMMA1
P1-DIMMA2
P1-DIMMB1
P1-DIMMC1
P1-DIMMD1
P1-DIMMD2
P1-DIMME1
P1-DIMMF1
Figure 1-3.
System Block Diagram
#2
RMII/NCSI
USB 2.0
RTL8211E-VB-CG
PCI-E X1 G2
DDR4
BMC
Boot Flash
SPI
BMC
AST2500
USB 2.0
ESPI
USB
RGRMII
#5
#12 USB2.0
USB 3.0
LBG-1G X1 UPLINK NO QAT (15W)
LBG-2 X8 UPLINK NO QAT (17W)
LBG-4 X16 UPLINK NO QAT (19W)
LBG-E X16 UPLINK QAT (21W)
LBG-M X16 UPLINK QAT (26W)
LBG-L X16 UPLINK QAT (21W)
LBG-T X16 UPLINK QAT (29W)
USB
LAN3
RJ45
LBG-2 X8 UPLINK NO QAT (14W)
SPI
VGA CONN
COM1
Connector
COM2
Header
TPM HEADER
Debug Card
BIOS
Temp Sensor
W83773 at SMBUS
Note: This is a general block diagram and may not exactly represent the features on
your motherboard. See the previous pages for the actual specifications of your motherboard.
17
Super X11DPi-N(T) User's Manual
1.2Processor and Chipset Overview
Built upon the functionality and capability of the Intel Xeon 81xx/61xx/51xx/41xx/31xx series
processors (Socket P0) and the Intel C620 chipset, this motherboard provides superb system
performance, efficient power management, and a rich feature set based on cutting edge
technology to address the needs of next-generation computer users. With support of Intel®
UltraPath Interconnect (UPI) of up to 10.4 GT/s, Intel® AVX-512 new instructions, and Intel®
QuickAssist Technology, this motherboard offers an innovative solution with maximum system
performance to meet the ongoing demands of High Performance Computing (HPC) platforms.
This motherboard is optimized for general purpose server use.
The Intel Xeon 81xx/61xx/51xx/41xx/31xx series processor and the Intel C620 chipset support
the following features:
•Intel®
AVX-512 support with memory bandwidth increase to 6 channels (x1.5 from the
previous generation)
•High availability interconnect between multiple nodes
•Rich set of available IOs, full flexibility in usage model, and software stack
•Dedicated subsystems for customer innovation
•Increased platform security with Intel® Boot Guard for hardware-based boot integrity protection; prevention of buffer overflow class security threads
•Integrated
solution for real-time compression, streaming write & read performance increases from gen-to-gen
•Hot plug and enclosure management with Intel Volume Management Device (Intel VMD)
•Single standard server development (Accelerate NFV transition) consolidating application,
control, and data plane workloads, reducing total platform investment needs
•Intel QuickAssist Technology off-loads compute-intensive tasks from cores
18
Chapter 1: Introduction
1.3Special Features
This section describes the health monitoring features of the X11DPi-N(T) motherboard. The
motherboard has an onboard ASpeed 2500 Baseboard Management Controller (BMC) that
supports system health monitoring.
Recovery from AC Power Loss
The Basic I/O System (BIOS) provides a setting that determines how the system will respond
when AC power is lost and then restored to the system. You can choose for the system to
remain powered off (in which case you must press the power switch to turn it back on), or
for it to automatically return to the power-on state. See the Advanced BIOS Setup section
for this setting. The default setting is Last State.
1.4System Health Monitoring
This section describes the health monitoring features of the X11DPi-N(T) motherboard. The
motherboard has an onboard Baseboard Management Controller (BMC) chip that supports
system health monitoring. Once a voltage becomes unstable, a warning is given or an error
message is sent to the screen. The user can adjust the voltage thresholds to define the
sensitivity of the voltage monitor.
Onboard Voltage Monitors
The onboard voltage monitor will continuously scan crucial voltage levels. Once a voltage
becomes unstable, it will give a warning or send an error message to the screen. The user
can adjust the voltage thresholds to define the sensitivity of the voltage monitor. Real time
readings of these voltage levels are all displayed in BIOS.
Fan Status Monitor with Firmware Control
The system health monitor embedded in the BMC chip can check the RPM status of the
cooling fans. The CPU and chassis fans are controlled via lPMI.
Environmental Temperature Control
System Health sensors in the BMC monitor the temperatures and voltage settings of onboard
processors and the system in real time via the IPMI interface. Whenever the temperature of
the CPU or the system exceeds a user-defined threshold, system/CPU cooling fans will be
turned on to prevent the CPU or the system from overheating.
Note: To avoid possible system overheating, please be sure to provide adequate airflow to your system.
19
Super X11DPi-N(T) User's Manual
System Resource Alert
This feature is available when used with SuperDoctor 5®. SuperDoctor 5 is used to notify the
user of certain system events. For example, you can configure SuperDoctor 5 to provide you
with warnings when the system temperature, CPU temperatures, voltages and fan speeds
go beyond a predefined range.
1.5ACPI Features
ACPI stands for Advanced Configuration and Power Interface. The ACPI specification defines
a flexible and abstract hardware interface that provides a standard way to integrate power
management features throughout a computer system including its hardware, operating system
and application software. This enables the system to automatically turn on and off peripherals
such as network cards, hard disk drives and printers.
In addition to enabling operating system-directed power management, ACPI also provides a
generic system event mechanism for Plug and Play and an operating system-independent
interface for configuration control. ACPI leverages the Plug and Play BIOS data structures
while providing a processor architecture-independent implementation that is compatible with
Windows 10, and Windows 2012 operating systems.
1.6Power Supply
As with all computer products, a stable power source is necessary for proper and reliable
operation. It is even more important for processors that have high CPU clock rates. In areas
where noisy power transmission is present, you may choose to install a line filter to shield
the computer from noise. It is recommended that you also install a power surge protector to
help avoid problems caused by power surges.
1.7Super I/O
The Super I/O (ASpeed AST2500 chip) provides a high-speed, 16550 compatible serial
communication port (UART), which supports serial infrared communication. The UART
includes send/receive FIFO, a programmable baud rate generator, complete modem control
capability, and a processor interrupt system. The UART provides legacy speed with baud
rate of up to 115.2 Kbps as well as an advanced speed with baud rates of 250 K, 500 K, or
1 Mb/s, supporting higher speed modems.
The Super I/O provides functions that comply with ACPI (Advanced Configuration and Power
Interface), which includes support of legacy and ACPI power management through a SMI
or SCI function pin. It also features auto power management to reduce power consumption.
20
Chapter 1: Introduction
1.8Advanced Power Management
The following new advanced power management features are supported by the motherboard.
Intel® Intelligent Power Node Manager (IPNM)
Available when the Supermicro Power Manager (SPM) is installed, Intel's Intelligent Power
Node Manager (IPNM) provides your system with real-time thermal control and power
management for maximum energy efficiency. Although IPNM Specification Version 2.0/3.0
is supported by the BMC (Baseboard Management Controller), your system must also have
IPNM-compatible Management Engine (ME) firmware installed to use this feature.
Note: Support for IPNM 2.0/3.0 support is dependent on the power supply used in
the system.
Management Engine (ME)
The Management Engine, which is an ARC controller embedded in the IOH (I/O Hub), provides
Server Platform Services (SPS) to your system. The services provided by SPS are different
from those provided by the ME on client platforms.
21
Super X11DPi-N(T) User's Manual
Chapter 2
Installation
2.1Static-Sensitive Devices
Electrostatic Discharge (ESD) can damage electronic com­
ponents. To avoid damaging
your motherboard and your system, it is important to handle it very carefully. The following
measures are generally sufficient to protect your equipment from ESD.
Precautions
•Use a grounded wrist strap designed to prevent static discharge.
•Touch a grounded metal object before removing the board from the antistatic bag.
•Handle the board by its edges only; do not touch its components, peripheral chips, memory
modules or gold contacts.
•When handling chips or modules, avoid touching their pins.
•Put the motherboard and peripherals back into their antistatic bags when not in use.
•For grounding purposes, make sure that your chassis provides excellent conductivity between the power supply, the case, the mounting fasteners and the motherboard.
•Use only the correct type of CMOS onboard battery as specified by the manufacturer. Do
not install the CMOS battery upside down, which may result in a possible explosion.
Unpacking
The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking
the motherboard, make sure that the person handling it is static protected.
22
Chapter 2: Installation
2.2Motherboard Installation
All motherboards have standard mounting holes to fit different types of chassis. Make sure
that the locations of all the mounting holes for both the motherboard and the chassis match.
Although a chassis may have both plastic and metal mounting fasteners, metal ones are
highly recommended because they ground the motherboard to the chassis. Make sure that
the metal standoffs click in or are screwed in tightly.
Philips
Screwdriver
(1)
Philips Screws
(10)
Standoffs (10)
Only if Needed
Tools Needed
JPG1
LE1
BMC
VGA
COM1
LAN CTRL
FAN5
FAN6
LAN2
LAN1
USB0/1
(2.0)
IPMI_LAN
USB4/5 (3.0)
JPCIE6
BIOS
LICENSE
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE4
JPCIE3
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
JVRM1
JVRM2
CPU2
BT1
JP4
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
JPI2C1
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JPWR1 JPWR2
CPU1
PCH
JF1
JPWR3
FAN3
FAN4
S-SATA5
JNVI2C1
LE2
JL1
P2-DIMMA2
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
BIOS
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMB1
JBT1
P2-DIMMA1
JP2
JTPM1
LE3
X11DPi-N(T)
Rev. 1.20
P2-DIMMC1
USB 7/8(3.0)
JHFI2
JM2_1
M.2-PCH
A
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
COM2 JIPMB1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
LEDM1
UID
A
S-SATA4 JNVME2
JNVME1
C
FAN2 FAN1
Location of Mounting Holes
Notes: 1) To avoid damaging the motherboard and its components, please do not use
a force greater than 8 lb/inch on each mounting screw during motherboard installation.
2) Some components are very close to the mounting holes. Please take precautionary
measures to avoid damaging these components when installing the motherboard to
the chassis.
23
Super X11DPi-N(T) User's Manual
Installing the Motherboard
1. Install the I/O shield into the back of the chassis.
2. Locate the mounting holes on the motherboard. See the previous page for the location.
3. Locate the matching mounting holes on the chassis. Align the mounting holes on the
motherboard against the mounting holes on the chassis.
4. Install standoffs in the chassis as needed.
5. Install the motherboard into the chassis carefully to avoid damaging other motherboard
components.
6. Using the Phillips screwdriver, insert a Phillips head #6 screw into a mounting hole on
the motherboard and its matching mounting hole on the chassis.
7. Repeat Step 5 to insert #6 screws into all mounting holes.
8. Make sure that the motherboard is securely placed in the chassis.
Note: Images displayed in this manual are for illustration only. Your chassis or
components might look different from those shown in this manual.
24
Chapter 2: Installation
2.3 Processor and Heatsink Installation
Warning: When handling the processor package, avoid placing direct pressure on the label
area of the CPU or CPU socket. Also, improper CPU installation or socket misalignment can
cause serious damage to the CPU or motherboard which may result in RMA repairs. Please
read and follow all instructions thoroughly before installing your CPU and heatsink.
Notes:
•Always
connect the power cord last, and always remove it before adding, removing, or
changing any hardware components. Please note that the processor and heatsink should
be assembled together first to form the Processor Heatsink Module (PHM), and then install
the entire PHM into the CPU socket.
•When
you receive a motherboard without a processor pre-installed, make sure that the
plastic CPU socket cap is in place and that none of the socket pins are bent; otherwise,
contact your retailer immediately.
•Refer to the Supermicro website for updates on CPU support.
•Please follow the instructions given in the ESD Warning section on the first page of this
chapter before handling, installing, or removing system components.
The Intel 81xx/61xx/51xx/41xx/31xx Series Processors
Note: The 81xx/61xx/51xx/41xx/31xx processors contain two models-the F model processors and the Non-F model processors. The installation instructions for the F model
processors differ from the installation instructions for the Non-F model processors. For
this reason, two sets of instructions (one for the F model, and the other, for the NonF model) are provided in this section.
Intel Processor (Non-F Model)
Intel Processor (F Model)
Note: All graphics, drawings, and pictures shown in this manual are for illustration only.
The components that came with your machine may or may not look exactly the same
as those shown in this manual.
25
Super X11DPi-N(T) User's Manual
Overview of the Processor Socket Assembly
The processor socket assembly contains 1) the Intel 81xx/61xx/51xx/41xx/31xx processor,
2) the narrow processor clip, 3) the dust cover, and 4) the CPU socket.
1. The 81xx/61xx/51xx/41xx/31xx
Processor
(The
81xx/61xx/51xx/41xx/31xx Processor)
2. Narrow processor clip (the plastic processor package carrier used for the CPU)
(for the non-F Model)
3. Dust Cover
4. CPU Socket
Note: Be sure to cover the CPU socket with the dust cover when the CPU is not installed.
26
Chapter 2: Installation
Overview of the Processor Heatsink Module (PHM)
The Processor Heatsink Module (PHM) contains 1) a heatsink, 2) a narrow processor clip,
and 3) the 81xx/61xx/51xx/41xx/31xx processor.
1. Heatsink
2. Narrow processor clip
3. Intel Processor
Processor Heatsink Module (PHM)
(Bottom View for the non-F Model)
(Bottom View for the F Model)
27
Super X11DPi-N(T) User's Manual
Attaching the Non-F Model Processor to the Narrow Processor
Clip to Create the Processor Package Assembly
To properly install the CPU into the narrow processor clip, please follow the steps below.
1. Locate pin 1 (notch A), which is the triangle located on the top of the narrow processor
clip. Also locate notch B and notch C on the processor clip.
2. Locate pin 1 (notch A), which is the triangle on the substrate of the CPU. Also, locate
notch B and notch C on the CPU as shown below.
3. Align pin 1 (the triangle on the substrate) of the CPU with pin 1 (the triangle) of
the narrow processor clip. Once they are aligned, carefully insert the CPU into the
processor clip by sliding notch B of the CPU into notch B of the processor clip, and
sliding notch C of the CPU into notch C of the processor clip.
4. Examine all corners of the CPU to ensure that it is properly seated on the processor
clip. Once the CPU is securely attached to the processor clip, the processor package
assembly is created.
Note: Please exercise extreme caution when handling the CPU. Do not touch the
CPU LGA-lands to avoid damaging the LGA-lands or the CPU. Be sure to wear ESD
gloves when handling components.
C
CPU (Upside Down)
w/CPU LGA Lands up
Align Notch C of the CPU
and Notch C of the Processor Clip
B
Allow Notch C to
latch on to CPU
A
Pin 1
C
C
Align Notch B of the CPU
and Notch B of the Processor Clip
CPU/Heatsink Package
(Upside Down)
B
B
Align CPU Pin 1
Allow Notch B to
latch on to CPU
A
A
Processor Package Carrier (w/CPU mounted
on the Processor Clip)
28
Chapter 2: Installation
Attaching the F Model Processor to the Narrow Processor Clip
to Create the Processor Package Assembly
To properly install the CPU into the narrow processor clip, please follow the steps below.
1. Locate pin 1 (notch A), which is the triangle located on the top of the narrow processor
clip. Also locate notch B and notch C on the processor clip.
2. Locate pin 1 (notch A), which is the triangle on the substrate of the CPU. Also, locate
notch B and notch C on the CPU as shown below.
3. Align pin 1 (the triangle on the substrate) of the CPU with pin 1 (the triangle) of
the narrow processor clip. Once they are aligned, carefully insert the CPU into the
processor clip by sliding notch B of the CPU into notch B of the processor clip, and
sliding notch C of the CPU into notch C of the processor clip.
4. Examine all corners of the CPU to ensure that it is properly seated on the processor
clip. Once the CPU is securely attached to the processor clip, the processor package
assembly is created.
Note: Please exercise extreme caution when handling the CPU. Do not touch the
CPU LGA-lands to avoid damaging the LGA-lands or the CPU. Be sure to wear ESD
gloves when handling components.
D
CPU (Upside Down)
w/CPU LGA Lands up
Align Notch D of the CPU
and Notch D of the Processor Clip
C
B
Align Notch C of the CPU
and Notch C of the Processor Clip
Align Notch B of the CPU
and Notch B of the Processor Clip
A
Pin 1
D
C
CPU/Heatsink Package
(Upside Down)
B
Align CPU Pin 1
A
Allow Notch D to
latch on to CPU
D
C
B
Allow Notch C to
latch on to CPU
Processor Package Carrier (w/CPU mounted on the
Processor Clip)
Allow Notch B to
latch on to CPU
29
A
Super X11DPi-N(T) User's Manual
Attaching the Non-F Model Processor Package Assembly to the
Heatsink to Form the Processor Heatsink Module (PHM)
After you have made a processor package assembly by following the instructions on the
previous page, please follow the steps below to mount the processor package assembly onto
the heatsink to create the Processor Heatsink Module (PHM).
1. Locate "1" on the heatsink label and the triangular corner next to it on the heatsink.
With your index finger pressing against the screw at this triangular corner, carefully hold
and turn the heatsink upside down with the thermal-grease side facing up. Remove the
protective thermal film if present, and apply the proper amount of the thermal grease
as needed. (Skip this step if you have a new heatsink because the necessary thermal
grease is pre-applied in the factory.)
2. Holding the processor package assembly at the center edge, turn it upside down. With
the thermal-grease side facing up, locate the hollow triangle located at the corner of the
processor carrier assembly ("a" in the graphic). Note a larger hole and plastic mounting
clicks located next to the hollow triangle. Also locate another set of mounting clicks and
a larger hole at the diagonal corner
of the same (reverse) side of the
processor carrier assembly ("b" in
Non-Fabric CPU and Processor Clip
the graphic).
(Upside Down)
b
3. With the back of heatsink and
the reverse side of the processor
Triangle on the CPU
c
package assembly facing up, align
d
the triangular corner on the heatsink
("A" in the graphic) against the
B
a
mounting clips next to the hollow
C
triangle ("a") on the processor
D
package assembly.
4. Also align the triangular corner ("B")
at the diagonal side of the heatsink
with the corresponding clips on the
processor package assembly ("b").
Triangle on the
Processor Clip
Heatsink
(Upside Down)
A
On Locations of (C, D), the notches
snap onto the heat sink’s
B
mounting holes
5. Once the mounting clips on the
processor package assembly
are properly aligned with the
corresponding holes on the back
of heatsink, securely attach the
heatsink to the processor package
assembly by snapping the mounting
clips at the proper places on the
heatsink to create the processor
heatsink module (PHM).
C
D
A
On Locations (A, B), the notches
snap onto the heatsink’s sides
30
Make sure Mounting
Notches snap into place
Chapter 2: Installation
Attaching the F Model Processor Package Assembly to the
Heatsink to Form the Processor Heatsink Module (PHM)
After you have made a processor package assembly by following the instructions on the
previous page, please follow the steps below to mount the processor package assembly onto
the heatsink to create the Processor Heatsink Module (PHM).
1. Locate "1" on the heatsink label and the triangular corner next to it on the heatsink.
With your index finger pressing against the screw at this triangular corner, carefully hold
and turn the heatsink upside down with the thermal-grease side facing up. Remove the
protective thermal film if present, and apply the proper amount of the thermal grease
as needed. (Skip this step if you have a new heatsink because the necessary thermal
grease is pre-applied in the factory.)
2. Holding the processor package assembly at the center edge, turn it upside down. With
the thermal-grease side facing up, locate the hollow triangle located at the corner of the
processor carrier assembly ("a" in the graphic). Note a larger hole and plastic mounting
clicks located next to the hollow triangle. Also locate another set of mounting clicks and
a larger hole at the diagonal corner
of the same (reverse) side of the
processor carrier assembly ("b" in
Fabric CPU and Processor Clip
(Upside Down)
the graphic).
b
3. With the back of heatsink and
the reverse side of the processor
package assembly facing up, align
the triangular corner on the heatsink
("A" in the graphic) against the
mounting clips next to the hollow
triangle ("a") on the processor
package assembly.
Triangle on the CPU
c
d
B
a
C
D
Triangle on the
Processor Clip
4. Also align the triangular corner ("B")
at the diagonal side of the heatsink
with the corresponding clips on the
processor package assembly ("b").
Heatsink
5. Once the mounting clips on the
processor package assembly
are properly aligned with the
corresponding holes on the back
of heatsink, securely attach the
heatsink to the processor package
assembly by snapping the mounting
clips at the proper places on the
heatsink to create the processor
heatsink module (PHM).
D
(Upside Down)
A
On Locations of (C, D), the notches
snap onto the heat sink’s
B
mounting holes
C
A
On Locations (A, B), the notches
Make sure Mounting
snap onto the heatsink’s sides
Notches snap into place
31
Super X11DPi-N(T) User's Manual
Preparing the CPU Socket for Installation
This motherboard comes with the CPU socket pre-assembled in the factory. The CPU socket
contains 1) a dust cover, 2) a socket bracket, 3) the CPU (P0) socket, and 4) a back plate.
These components are pre-installed on the motherboard before shipping.
CPU Socket w/Dust Cover On
Removing the Dust Cover from the CPU Socket
Remove the dust cover from the CPU socket, exposing the CPU socket and socket pins as
shown on the illustration below.
Note: Do not touch the socket pins to avoid damaging them, causing the CPU to
malfunction.
Dusk Cover
Remove the dust cover from
the CPU socket. Do not
touch the socket pins!
Socket Pins
CPU Socket
32
Chapter 2: Installation
Installing the Processor Heatsink Module (PHM)
1. Once you have assembled the processor heatsink module (PHM) by following the
instructions listed on page 30 or page 31, you are ready to install the processor heatsink
module (PHM) into the CPU socket on the motherboard. To install the PHM into the
CPU socket, follow the instructions below.
2. Locate the triangle (pin 1) on the CPU socket, and locate the triangle (pin 1) at the
corner of the PHM that is closest to "1." (If you have difficulty locating pin 1 of the PHM,
turn the PHM upside down. With the LGA-lands side facing up, you will note the hollow
triangle located next to a screw at the corner. Turn the PHM right side up, and you will
see a triangle marked on the processor clip at the same corner of hollow triangle.)
3. Carefully align pin 1 (the triangle) on the the PHM against pin 1 (the triangle) on the
CPU socket.
4. Once they are properly aligned, insert the two diagonal oval holes on the heatsink into
the guiding posts.
5. Using a T30 Torx-bit screwdriver, install four screws into the mounting holes on the
socket to securely attach the PHM onto the motherboard starting with the screw marked
"1" (in the sequence of 1, 2, 3, and 4).
Note: Do not use excessive force when tightening the screws to avoid damaging the
LGA-lands and the processor.
Oval C
Oval D
Use a torque
of 12 lbf
Large Guiding Post
T30 Torx Driver
#4
#2
#1
Small Guiding Post
#3
Printed Triangle
Mounting the Processor Heatsink Module
into the CPU socket (on the motherboard)
Tighten the screws in the
sequence of 1, 2, 3, 4 (top 3 quarter view)
33
Super X11DPi-N(T) User's Manual
Installing an HFI Carrier Card for Host Fabric Interface (HFI)
Support as Needed (Available when an F Model CPU is Used)
Note: A host fabric interface carrier card header (JHFI1) is located on the motherboard.
Install an HFI card on an appropriate PCI-E slot of your choice on the motherboard
and an F model CPU on CPU Socket#1 to use this feature. (For more information on
the JHFI1 header, please refer to page 53.)
Installation Instructions
1. Locate CPU Socket#1 on the motherboard. Install an F model CPU on this socket as
shown below (marked 1) if you have not done so.
2. Locate the PCI-E slots the motherboard. Install an Host Fabric Interface (HFI) card on
an appropriate PCI-E slot of your choice as shown below (marked 2).
3. Connect the HFI connector on the HFI cable to the onboard JHFI1 header as show
below (marked 3 below.)
4. Connect the other end of the HFI cable to the connector (marked
shown below. (Marked 4 below.)
A)
on the HFI card as
5. Connect the plug (marked 5) on one end of the Internal_Faceplate_to_the_Processor
(IFP) cable to the connector (marked B ) on the HFI card as shown below.
6. Connect the other end of IFP cable (marked 6) to the F model CPU installed in CPU
Socket 1 as shown below.
IFP Cable (Optional)
6
5
A
HFI Carrier
Card
B
5. Connect one end of
the IFP cable to the
connector (B)
of the HFI card.
2. Install an FHI card to a PCI-E slot
2
JHFI1 Header
(for CPU1)
3
3. Connect the HFI connector
on the HFI cable to the
onboard JHFI1 header.
34
Install an F model CPU
1 on CPU Socket#1
BIOS
LICENSE
HFI (Host Fabric
Interface) Sideband
Cable
F Model
Processor
MAC CODE BAR CODE
4. Connect another end of
4
the HFI cable to the
connector (A)
of the HFI card.
6. Connect the other end of
the IFP cable to the
F model CPU.
X11DPi(-T)
Rev. 1.10
JHFI1
Chapter 2: Installation
Removing the Processor Heatsink Module (PHM) from the
Motherboard
Before removing the processor heatsink module (PHM), unplug power cord from the power
outlet.
1. Using a T30 Torx-bit screwdriver, turn the screws on the PHM counterclockwise to
loosen them from the socket, starting with screw marked #4 (in the sequence of 4, 3, 2,
1).
2. After all four screws are removed, wiggle the PHM gently and pull it up to remove it
from the socket.
Note: To properly remove the processor heatsink module, be sure to loosen and remove the screws on the PHM in the sequence of 4, 3, 2, 1 as shown below.
Removing the screws in
the sequence of 4, 3, 2, 1
#4
#1
#2
#3
CPU Socket
Printed Triangle on Motherboard
35
After removing the screws,
lift the Processor Heatsink
Module off the CPU socket.
Super X11DPi-N(T) User's Manual
2.4 Memory Support and Installation
Notes: Check the Supermicro website for recommended memory modules. Exercise
extreme care when installing or removing DIMM modules to prevent any damage.
Memory Support
The motherboard supports up to 2TB of 3DS Load Reduced DIMM (3DS LRDIMM), Load
Reduced DIMM (LRDIMM), Registered DIMM (RDIMM), Non-Volatile DIMM (NV-DIMM) DDR4
(288-pin) ECC 2666/2400/2133 MHz memory modules in 16 slots. The black DIMM slots are
reserved for future NVDIMM support. Populating the DDR4 memory module in 2DPC system
configuration on this MBD will affect memory bandwidth performance. Populating these DIMM
modules with a pair of memory modules of the same type and size will result in interleaved
memory, which will improve memory performance.
Notes: 1. Be sure to use the memory modules of the same type and speed on the
motherboard. Mixing of memory modules of different types and speeds is not allowed.
2. When installing memory modules, be sure to populate the first DIMM module on
the blue memory slot, which is the first memory slot of a memory channel, and then
populate the second DIMM in the black slot if 2DPC memory configuration is used. 3.
Using unbalanced memory topology by populating two DIMMs in one channel while
populating one DIMM in another channel will result in reduced memory performance.
4. Memory speed is dependent on the type of processors used in your system. 5.
Using unbalanced memory topology such as populating two DIMMs in one channel
while populating one DIMM in another channel on the same motherboard will result in
reduced memory performance.
DDR4 Memory Support (for 2-Slot Per-Channel Configuration)
Type
Ranks
Per
DIMM
and Data
Width
Speed (MT/s); Voltage (V); Slots per Channel (SPC) and DIMMs per Channel (DPC)
DIMM Capacity
(GB)
2 Slots per Channel
1DPC (1-DIMM per Channel)
2DPC (2-DIMM per Channel)
4 Gb
8 Gb
1.2 V
1.2 V
RDIMM
SRx4
8 GB
16 GB
2666
2666
RDIMM
SRx8
4 GB
8 GB
2666
2666
RDIMM
DRx8
8 GB
16 GB
2666
2666
RDIMM
DRx4
16 GB
32 GB
2666
2666
RDIMM 3Ds
QRX4
N/A
2H-64GB
2666
2666
RDIMM 3Ds
8RX4
N/A
4H-128GB
2666
2666
LRDIMM
QRx4
32 GB
64 GB
2666
2666
QRX4
N/A
2H-64GB
2666
2666
8Rx4
N/A
4H-128 GB
2666
2666
LRDIMM 3Ds
DDR4 Memory Support (for 1-Slot Per-Channel Configuration)
Speed (MT/s); Voltage (V); Slots per Channel (SPC) and DIMMs per Channel (DPC)
Type
Ranks
Per
DIMM
and Data
Width
4 Gb
8 Gb
1.2 V
RDIMM
SRx4
8 GB
16 GB
2666
RDIMM
SRx8
4 GB
8 GB
2666
RDIMM
DRx8
8 GB
16 GB
2666
RDIMM
DRx4
16 GB
32 GB
2666
RDIMM 3Ds
QRX4
N/A
2H-64GB
2666
RDIMM 3Ds
8RX4
N/A
4H-128GB
2666
LRDIMM
QRx4
32 GB
64 GB
2666
QRX4
N/A
2H-64GB
2666
8Rx4
N/A
4H-128 GB
2666
LRDIMM 3Ds
DIMM Capacity
(GB)
1 Slot per Channel
1DPC (1-DIMM per Channel)
36
Chapter 2: Installation
DIMM Population Requirements for the 81xx/61xx/51xx/41xx/31xx
Processors
For optimal memory performance, follow the tables below when populating memory modules.
Key Parameters for DIMM Configurations
Parameters
Possible Values
Number of Channels
1, 2, 3, 4, 5, or 6
Number of DIMMs per Channel
1DPC (1 DIMM Per Channel) or 2DPC (2 DIMMs Per Channel)
DIMM Type
RDIMM (w/ECC), LRDIMM, 3DS-LRDIMM
•non-3DS RDIMM Raw Cards: A/B (2RX4), C (1RX4),
DIMM Construction
D (1RX8), E (2RX8)
•3DS RDIMM Raw Cards: A/B (4RX4)
•non-3DS LRDIMM Raw Cards: D/E (4RX4)
•3DS LRDIMM Raw Cards: A/B (8RX4)
General Population Requirements
DIMM Mixing Rules
•Please populate all memory modules with DDR4 DIMMs only.
•X4 and X8 DIMMs can be mixed in the same channel.
•Mixing of LRDIMMs and RDIMMs is not allowed in the same channel, across different channels, and across
different sockets.
•Mixing of non-3DS and 3DS LRDIMM is not allowed in the same channel, across different channels, and across
different sockets.
Mixing of DIMM Types within a Channel
DIMM Types
RDIMM
LRDIMM
3DS LRDIMM
RDIMM
Allowed
Not Allowed
Not Allowed
LRDIMM
Not Allowed
Allowed
Not Allowed
3DS LRDIMM
Not Allowed
NotAllowed
Allowed
37
Super X11DPi-N(T) User's Manual
(DDR4 Only) Socket Level Population Requirements
DDR4 Socket Level Minimum Population Requirements
•There should be at least one DDR4 DIMM per socket.
•If only one DIMM is populated in a channel, then populate it in the slot furthest away from CPU.
•Always populate DIMMs with a higher electrical loading in DIMM0 followed by DIMM1.
(DDR4 Only) Memory Populations with Possible Mixes
DDR4 RDIMM
Within
IMC
DIMM
Population
DIMM0/DIMM1
Config. Set A
DIMM0/DIMM1
Config. Set B
DIMM0/DIMM1 Config. Set C
Possible Mixes
DIMM0/DIMM1
Single Rank, None
Single Rank, Single Rank
Dual Rank, Single Rank,
Dual Rank, None
Dual Rank, Dual Rank,
Single Rank, Single Rank
DDR0
x8, None, x8, x8
x4, None, x4, x4
x8, x4, or x4, x8
DDR1
None or same as
DDR0
None or same as
DDR0
None or same as
DDR0
DDR2
None or same as
DDR1 (excludes
DIMM 1 in 5DIMM
configurations)
None or same as
DDR1 (excludes
DIMM 1 in 5DIMM
configurations)
None or same as
DDR1 (excludes DIMM
1 in 5DIMM configurations)
(DDR4 Only) Memory Populations with Possible Mixes
3DS LRDIMM or 3DS RDIMM
Within IMC
DIMM Population
DIMM0/DIMM1 Config. Set A
Possible Mixes
DIMM0/DIMM1
DDR0
x4, None, x4, x4
DDR1
None or same as DDR0
Quad Rank, None
Quad Rank, Quad Rank
Cannot mix 3DS LRDIMM and RDIMM
DDR2
None or same as DDR1
(DDR4 Only) Memory Populations with Possible Mixes
LRDIMMs
Within IMC
DIMM Population
DIMM0/DIMM1
DDR0
x4, None, x4, x4
DDR1
None or same as DDR0
DDR2
None or same as DDR1
Possible Mixes
DIMM0/DIMM1
Quad Rank, None
Quad Rank, Quad Rank
Note: Requirements
*Match DIMM types installed across DDR
channels within an IMC
*Always populate iMC0 first
(DDR4 Only) 2SPC Memory Configuration with x8 DIMMs
DIMM Population
within an IMC
(Note: Uniformly
populate with x8
DRAMs DIMMs)
DIMM Population
within an IMC
(Note: Non-equal
in rank pair of x8
DIMMs)
Total # of
DIMMs
DDR Channel
1 x8 DIMM
Must be installed on iMC0 DDR Channel 0
2 x8 DIMMs
DDR0: Populate with 1 DIMM
DDR1: Populate identically as DDR0
3 x8 DIMMs
DDR0: Populate with 1 DIMM
DDR1: Populate identically as DDR0
DDR2: Populate identically as DDR1
Number
of Ranks
Virtual
Lock Step
1
N/A
>1
SVLS
1
N/A
>1
SVLS
1
N/A
>1
SVLS
4 x8 DIMMs
DDR0: Populate with 2 DIMMs
DDR1: Populate identically as DDR0
x
SVLS
5 x8 DIMMs
DDR Channel 0, 1, 2: DIMM0 is populated with identical DIMMs,
DDR Channel 0, 1: DIMM1 is populated with identical
DIMMs
>1
SVLS
6 x8 DIMMs
Populate 2 DIMMs per DDR channel
x
SVLS
1 pair of
DIMMs
DDR0: Populate with 1 DIMM
DDR1: Populate the second DIMM (for best performance)
1
N/A
>1
SVLS
2 pairs of
DIMMs
DDR0: Populate with 1 pair of non-equal rank DIMMs
DDR1: Populate identically as DDR0
3 pairs of
DIMMs
2 pairs+1
(5DIMMs)
1
N/A
>1
SVLS
DDR0: Populate with 1 pair of non-equal rank DIMMs
DDR1: Populate identically as DDR0
DDR2: Populate identically as DDR1
x
SVLS
DDR0: Populate with 1 pair of non-equal rank DIMMs
DDR1: Populate with identical DIMMs as DDR0
DDR2: DIMM0 is populated with identical DIMM as
DDR1
>1
SVLS
38
Chapter 2: Installation
(DDR4 Only) 2SPC Memory Configuration with x4 DIMMs
DIMM Population within an
IMC
Note: Uniformly
populate with x4
DRAMs/DIMMs
Total # of
DIMMs
DDR Channel
Number
of Ranks
Adaptive Virtual
Lock Step
1 x4 DIMM
Must be installed on iMC0 DDR Channel 0
1
Y, only Bank VLS
2 x4 DIMMs
DDR0: Populate with 1 DIMM
DDR1: Populate identically as DDR0
3 x4 DIMMs
DIMM Population within an
IMC
Note: Nonequal in rank
pair of x4
DIMMs)
DDR0: Populate with 1 DIMM
DDR1: Populate identically as DDR0
DDR2: Populate identically as DDR1
>1
Y
1
Y, only Bank VLS
>1
Y
1
Y, only Bank VLS
>1
Y
4 x4 DIMMs
DDR0: Populate with 2 DIMMs
DDR1: Populate identically as DDR0
x
Y
5 x4 DIMMs
DDR Channel 0, 1, 2: DIMM0 is populated with identical DIMMs,
DDR Channel 0, 1: DIMM1 is populated with identical
DIMMs
>1
Y
6 x4 DIMMs
Populate 2 DIMMs per DDR channel
x
Y
1 pair of
DIMMs
DDR0: Populate with 1 DIMM
DDR1: Populate the second DIMM (for best performance)
>1
Y
2 pairs of
DIMMs
DDR0: Populate with 1 pair of non-equal rank DIMMs
DDR1: Populate identically as DDR0
>1
Y
3 pairs of
DIMMs
DDR0: Populate with 1 pair of non-equal rank DIMMs
DDR1: Populate identically as DDR0
DDR2: Populate identically as DDR1
x
Y
2 pairs+1
(5DIMMs)
DDR0: Populate with 1 pair of non-equal rank DIMMs
DDR1: Populate with identical DIMMs as DDR0
DDR2: DIMM0 is populated with identical DIMM as
DDR1
>1
Y
(DDR4 Only) 2SPC Memory Configuration with x8/x4 DIMMs Mixed
DDR4 RDIMM
Total # of DIMMs
DDR Channel
ADDC/SDDC
Features
DIMM Population within an
IMC
1 pair of x8, x4
DDR0: Populate with 1 DIMM
DDR1: Populate the second DIMM (for best performance)
No
2 pairs of x8, x4
Populate with 1 pair of DIMMs on DDR0,
and identical pair on DDR1
No
3 pairs of x8, x4
A pair of DIMMs on DDR0, and identical pair on
DDR1, and DDR2
No
39
Super X11DPi-N(T) User's Manual
LE1
JPG1
DIMM Installation
BMC
LAN2
LAN1
USB0/1
(2.0)
IPMI_LAN
USB4/5 (3.0)
JPCIE6
JPCIE5
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE4
JPCIE3
BIOS
LICENSE
CPU2
BT1
JP4
JPI2C1
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JPWR1 JPWR2
CPU1
PCH
JPWR3
JF1
LE2
FAN3
FAN4
S-SATA5
JNVI2C1
A
S-SATA4 JNVME2
JNVME1
C
FAN2 FAN1
4. Align the notches on both ends of the
module against the receptive points on the
ends of the slot.
5. Use two thumbs together to press the
notches on both ends of the module
straight down into the slot until the module
snaps into place.
Notches
6. Press the release tabs to the lock positions
to secure the DIMM module into the slot.
Release Tabs
DIMM Removal
Reverse the steps above to remove the DIMM
modules from the motherboard.
40
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P2-DIMMB1
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
JL1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMA2
X11DPi-N(T)
Rev. 1.20
JBT1
P2-DIMMC1
JP2
JTPM1
LE3
P2-DIMMA1
USB 7/8(3.0)
JHFI2
JM2_1
M.2-PCH
A
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
JVRM1
JVRM2
3. Align the key of the DIMM module with the
receptive point on the memory slot.
COM1
FAN5
FAN6
BIOS
2. Push the release tabs outwards on both
ends of the DIMM slot to unlock it.
VGA
LAN CTRL
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
COM2 JIPMB1
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
LEDM1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
1. Insert DIMM modules in the following
order: P1-DIMMA1, P1-DIMMD1, P1DIMMB1, DIMME1. For the system to work
properly, please use memory modules
of the same type and speed on the
motherboard.
UID
Press both notches
straight down into
the memory slot.
Chapter 2: Installation
2.5Rear I/O Ports
See the layout below for the locations and descriptions of the various I/O ports on the rear
of the motherboard.
BIOS
LICENSE
MAC CODE BAR CODE
X11DPi-N(T)
Rev. 1.20
Back panel I/O Port Locations and Definitions
4
6
1
3
5
7
8
9
2
Back Panel I/O Ports
No.
Description
No.
Description
1.
COM1
6.
USB 1 (USB 2.0)
2.
USB 4 (USB 3.0)
7.
GLAN1 (X11DPi-N), 10G_LAN1 (X11DPi-NT)
3.
USB 5 (USB 3.0)
8.
GLAN2 (X11DPi-N), 10G_LAN2 (X11DPi-NT)
4.
IPMI LAN
9.
VGA
5.
USB 0 (USB 2.0)
10.
Unit Identifier Switch (UID)
41
10
Super X11DPi-N(T) User's Manual
VGA Port
The onboard VGA port is located next to IPMI LAN port on the I/O back panel. Use this
connection for VGA display.
Serial Port
There is one COM port (COM1) on the I/O back panel and one COM header (COM2) on
the motherboard. The COM port and header provide serial communication support. See the
table below for pin definitions.
COM Port
Pin Definitions
Pin#
Definition
Pin#
Definition
1
DCD
6
DSR
2
RXD
7
RTS
3
TXD
8
CTS
4
DTR
9
RI
5
Ground
10
N/A
2
1
JPG1
LE1
BMC
VGA
1. VGA Port
COM1
LAN CTRL
FAN5
FAN6
LAN2
LAN1
USB0/1
(2.0)
2. COM1
IPMI_LAN
USB4/5 (3.0)
3. COM2
JPCIE6
BIOS
LICENSE
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
JPCIE4
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE3
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
JVRM1
JVRM2
CPU2
BT1
JP4
JPI2C1
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JPWR1 JPWR2
CPU1
PCH
JPWR3
JF1
LE2
FAN3
FAN4
S-SATA5
JNVI2C1
A
S-SATA4 JNVME2
JNVME1
C
FAN2 FAN1
42
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P2-DIMMA2
JL1
P2-DIMMB1
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
BIOS
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMA1
JP2
JTPM1
LE3
X11DPi-N(T)
Rev. 1.20
JBT1
P2-DIMMC1
USB 7/8(3.0)
JHFI2
JM2_1
M.2-PCH
A
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
COM2 JIPMB1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
3
LEDM1
UID
Chapter 2: Installation
Universal Serial Bus (USB) Ports
There are two USB 2.0 ports (USB0/1) and two USB 3.0 port (USB4/5) on the I/O back
panel. There is one USB 2.0 header (USB2/3) and one USB 3.0 header (USB7/8) on the
motherboard to provide front access USB connection. USB6 is a Type A USB 3.0 header. The
onboard headers can be used to provide front side USB access with a cable (not included).
Front Panel USB 7/8 (3.0)
Pin Definitions
Back Panel USB 4/5 (3.0)
Pin Definitions
Pin#
Definition
Pin#
Definition
Power
1
VBUS
19
Power
USB_N
2
Stda_SSRX-
18
USB3_RN
Pin#
Definition
Pin#
Definition
A1
VBUS
B1
A2
D-
B2
A3
D+
B3
USB_P
3
Stda_SSRX+
17
USB3_RP
A4
GND
B4
GND
4
GND
16
GND
A5
Stda_SSRX-
B5
USB3_RN
5
Stda_SSTX-
15
USB3_TN
A6
Stda_SSRX+
B6
USB3_RP
6
Stda_SSTX+
14
USB3_TP
A7
GND
B7
GND
7
GND
13
GND
A8
Stda_SSTX-
B8
USB3_TN
A9
Stda_SSTX+
B9
USB3_TP
8
D-
12
USB_N
9
D+
11
USB_P
10
Back Panel USB 0/1 (2.0)
Pin Definitions
Front Panel USB 2/3 (2.0)
Pin Definitions
Pin#
Definition
Pin#
Definition
1
+5V
5
+5V
Pin#
Definition
Pin#
Definition
2
USB_N
6
USB_N
1
+5V
2
+5V
3
USB_P
7
USB_P
3
USB_N
4
USB_N
4
Ground
8
Ground
5
USB_P
6
USB_P
7
Ground
8
Ground
9
Key
10
NC
1
JPG1
LE1
BMC
3
UID
VGA
COM1
LAN CTRL
FAN5
FAN6
LAN2
LAN1
USB0/1
(2.0)
Type A USB 6 (3.0)
Pin Definitions
IPMI_LAN
USB4/5 (3.0)
JPCIE6
BIOS
LICENSE
CPU2
BT1
Pin#
Definition
Pin#
Definition
1
VBUS
5
SSRX-
2
USB_N
6
SSRX+
3
USB_P
7
GND
4
Ground
8
SSTX-
9
SSTX+
JP4
JPI2C1
JPWR1 JPWR2
CPU1
PCH
JPWR3
JF1
LE2
FAN3
FAN4
S-SATA5
JNVI2C1
S-SATA4 JNVME2
JNVME1
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
JL1
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
BIOS
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMB1
Rev. 1.20
JBT1
P2-DIMMA2
JP2
JTPM1
LE3
P2-DIMMA1
5
X11DPi-N(T)
P2-DIMMC1
USB 7/8(3.0)
JHFI2
JM2_1
M.2-PCH
A
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
JVRM1
JVRM2
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
JPCIE4
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE3
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
COM2 JIPMB1
2
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
LEDM1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
4
x
A
C
FAN2 FAN1
43
1. USB0/1 (2.0)
2. USB2/3 (2.0)
3. USB4/5 (3.0)
4. USB6 (3.0)
5. USB7/8 (3.0)
Super X11DPi-N(T) User's Manual
Unit Identifier Switch/UID LED Indicator
A Unit Identifier (UID) switch and a rear UID LED (LE1) are located on the I/O back panel.
A front UID switch is located on pins 7 & 8 of the front panel control (JF1). When you press
the front or the rear UID switch, both front and rear UID LEDs will be turned on. Press the
UID switch again to turn off the LED indicators. The UID indicators provide easy identification
of a system that may be in need of service. (Note: UID can also be triggered via IPMI on
the motherboard. For more information, please refer to the IPMI User's Guide posted on our
1
2
website at http://www.supermicro.com.)
PWR Power Button
Ground
Reset
UID Switch
Pin Definitions
Pin#
Definition
1
Ground
2
Ground
3
4
Ground
Reset Button
UID LED
Pin Definitions
Power Fail LED
3.3V
Status
UID LED
OH/Fan Fail LED
Color
3.3V Stby
NIC2 Active LED
Blue: On
Unit Identified
3.3V Stby
NIC1 Active LED
Button In
3.3V Stby
HDD LED
Button In
3.3V
PWR LED
X
X
Ethernet Ports
Ground
NMI
19
20
Two Ethernet ports (LAN1, LAN2) are located on the I/O backplane. These Ethernet ports
support 10GbE LAN connections on the X11DPi-NT, and 1 GbE LAN connections on the
X11DPi-N. In addition, an IPMI-dedicated LAN that supports GbE LAN is located next to USB
0/1 ports on the backplane. All Ethernet ports accept RJ45 type cables. Please refer to the
LED Indicator Section for LAN LED information.
2
1
JPG1
LE1
BMC
3
4
VGA
LAN Ports
Pin Definition
COM1
LAN CTRL
FAN5
FAN6
LAN2
LAN1
USB0/1
(2.0)
IPMI_LAN
USB4/5 (3.0)
JPCIE6
BIOS
LICENSE
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
JPCIE4
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE3
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
JVRM1
JVRM2
CPU2
BT1
JP4
JPI2C1
JPWR1 JPWR2
CPU1
PCH
JPWR3
JF1
LE2
FAN3
FAN4
S-SATA5
JNVI2C1
A
S-SATA4 JNVME2
JNVME1
C
FAN2 FAN1
44
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JL1
P2-DIMMA2
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
BIOS
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMB1
Rev. 1.20
JBT1
P2-DIMMA1
JP2
JTPM1
LE3
X11DPi-N(T)
P2-DIMMC1
USB 7/8(3.0)
JHFI2
JM2_1
M.2-PCH
A
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
COM2 JIPMB1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
LEDM1
5
UID
Pin#
Definition
Pin#
Definition
1
P2V5SB
10
SGND
2
TD0+
11
Act LED
3
TD0-
12
P3V3SB
4
TD1+
13
Link 100 LED
(Yellow, +3V3SB)
5
TD1-
14
Link 1000 LED
(Yellow, +3V3SB)
6
TD2+
15
Ground
7
TD2-
16
Ground
8
TD3+
17
Ground
9
TD3-
18
Ground
(NC: No Connection)
1. UID
2. UID LED
3. IPMI LAN
4. GLAN1 (10G LAN for X11DPi-NT)
5. GLAN2 (10G LAN for X11DPi-NT)
Chapter 2: Installation
2.6Front Control Panel
JF1 contains header pins for various buttons and indicators that are normally located on a
control panel at the front of the chassis. These connectors are designed specifically for use
with Supermicro chassis. See the figure below for the descriptions of the front control panel
buttons and LED indicators.
JPG1
LE1
BMC
VGA
COM1
LAN CTRL
FAN5
FAN6
LAN2
LAN1
USB0/1
(2.0)
IPMI_LAN
USB4/5 (3.0)
JPCIE6
BIOS
LICENSE
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
JPCIE4
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE3
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
JVRM1
JVRM2
CPU2
BT1
JP4
JPI2C1
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JPWR1 JPWR2
CPU1
PCH
JPWR3
JF1
LE2
FAN3
FAN4
S-SATA5
JNVI2C1
A
A
S-SATA4 JNVME2
JNVME1
C
FAN2 FAN1
Figure 2-3. JF1 Header Pins
1
2
PWR
Power Button
Ground
Reset
Reset Button
Ground
Power Fail LED
3.3V
UID LED
OH/Fan Fail LED
3.3V Stby
NIC2 Active LED
3.3V Stby
NIC1 Active LED
3.3V Stby
HDD LED
3.3V
PWR LED
X
Ground
NMI
19
20
45
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P2-DIMMA2
BIOS
JL1
P2-DIMMB1
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMA1
JP2
JTPM1
LE3
X11DPi-N(T)
Rev. 1.20
JBT1
P2-DIMMC1
USB 7/8(3.0)
JHFI2
JM2_1
M.2-PCH
X
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
COM2 JIPMB1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
LEDM1
UID
Super X11DPi-N(T) User's Manual
Power Button
The Power Button connection is located on pins 1 and 2 of JF1. Momentarily contacting both
pins will power on/off the system. This button can also be configured to function as a suspend
button (with a setting in the BIOS - see Chapter 4). To turn off the power when the system
is in suspend mode, press the button for 4 seconds or longer. Refer to the table below for
pin definitions.
Power Button
Pin Definitions (JF1)
Pins
Definition
1
Signal
2
Ground
Reset Button
The Reset Button connection is located on pins 3 and 4 of JF1. Attach it to a hardware reset
switch on the computer case to reset the system. Refer to the table below for pin definitions.
Reset Button
Pin Definitions (JF1)
1
Pins
Definition
3
Reset
4
Ground
1. PWR Button
2
1
PWR
Power Button
Ground
2
Reset
Reset Button
Ground
2. Reset Button
Power Fail LED
3.3V
UID LED
OH/Fan Fail LED
3.3V Stby
NIC2 Active LED
3.3V Stby
NIC1 Active LED
3.3V Stby
HDD LED
3.3V
PWR LED
X
X
Ground
NMI
19
20
46
Chapter 2: Installation
Power Fail LED
The Power Fail LED connection is located on pins 5 and 6 of JF1. Refer to the table below
for pin definitions.
Power Fail LED
Pin Definitions (JF1)
Pin#
Definition
5
3.3V
6
PWR Supply Fail
Fan Fail and UID LED
Connect an LED cable to pins 7 and 8 of the Front Control Panel to use the Overheat/Fan
Fail LED connections. The LED on pin 8 provides warnings of overheat or fan failure. Refer
to the tables below for pin definitions.
OH/Fan Fail Indicator
Status
OH/Fan Fail LED
Pin Definitions (JF1)
State
Definition
Pin#
Definition
Off
Normal
7
Blue LED
On
Overheat
Flashing
Fan Fail
8
OH/Fan Fail LED
1
1. Power Fail LED
2
PWR
Power Button
Ground
Reset
Reset Button
Ground
Power Fail LED
3.3V
UID LED
OH/Fan Fail LED
3.3V Stby
NIC2 Active LED
3.3V Stby
NIC1 Active LED
3.3V Stby
HDD LED
3.3V
PWR LED
2. UID/OH/Fan Fail LED
1
2
X
X
Ground
NMI
19
20
47
Super X11DPi-N(T) User's Manual
NIC1/NIC2 (LAN1/LAN2)
The NIC (Network Interface Controller) LED connection for LAN port 1 is located on pins
11 and 12 of JF1, and LAN port 2 is on pins 9 and 10. Attach the NIC LED cables here to
display network activity. Refer to the table below for pin definitions.
LAN1/LAN2 LED
Pin Definitions (JF1)
Pin#
Definition
9
NIC 2 Activity LED
11
NIC 1 Activity LED
HDD LED
The HDD LED connection is located on pins 13 and 14 of JF1. Attach a cable to pin 14 to
show hard drive activity status. Refer to the table below for pin definitions.
HDD LED
Pin Definitions (JF1)
1
13
3.3V Stdby
14
HDD Active
1. NIC2 LED
2
Power Button
Ground
2. NIC1 LED
Reset Button
Ground
3. HDD LED
Power Fail LED
3.3V
UID LED
OH/Fan Fail LED
3.3V Stby
NIC2 Active LED
1
3.3V Stby
NIC1 Active LED
2
3.3V Stby
HDD LED
3.3V
PWR LED
X
Reset
Definition
3
X
PWR
Pins
Ground
NMI
19
20
48
Chapter 2: Installation
Power LED
The Power LED connection is located on pins 15 and 16 of JF1. Refer to the table below
for pin definitions.
Power LED
Pin Definitions (JF1)
Pins
Definition
15
3.3V
16
PWR LED
NMI Button
The non-maskable interrupt (NMI) button header is located on pins 19 and 20 of JF1. Refer
to the table below for pin definitions.
NMI Button
Pin Definitions (JF1)
1
Pins
Definition
19
Control
20
Ground
1. PWR LED
2
PWR
Power Button
Ground
Reset
Reset Button
Ground
2. NMI
Power Fail LED
3.3V
UID LED
OH/Fan Fail LED
3.3V Stby
NIC2 Active LED
3.3V Stby
NIC1 Active LED
3.3V Stby
HDD LED
3.3V
PWR LED
X
X
2
1
Ground
NMI
19
20
49
Super X11DPi-N(T) User's Manual
2.7Connectors
Power Connector
ATX and CPU Power Connectors
JPWR3 is the 24-pin ATX main power supply connector. This primary power supply connector
meets the ATX SSI EPS 24-pin specification. You must also connect the 8-pin (JPWR1/
JPWR2) CPU power connectors to your power supply.
ATX Power 24-pin Connector
Pin Definitions
JPG1
LE1
BMC
Definition
Pin#
Definition
13
+3.3V
1
+3.3V
14
NC
2
+3.3V
15
Ground
3
Ground
16
PS_ON
4
+5V
17
Ground
5
Ground
18
Ground
6
+5V
19
Ground
7
Ground
20
Res (NC)
8
PWR_OK
21
+5V
9
5VSB
22
+5V
10
+12V
23
+5V
11
+12V
24
Ground
12
+3.3V
1. ATX Power Supply
UID
VGA
COM1
LAN CTRL
FAN5
FAN6
LAN2
LAN1
USB0/1
(2.0)
IPMI_LAN
USB4/5 (3.0)
JPCIE6
BIOS
LICENSE
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
JPCIE4
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE3
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
JVRM1
JVRM2
CPU2
BT1
JP4
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
JPI2C1
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JPWR1 JPWR2
CPU1
PCH
JF1
JPWR3
FAN3
FAN4
S-SATA5
JNVI2C1
LE2
JL1
P2-DIMMA2
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
BIOS
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMB1
X11DPi-N(T)
Rev. 1.20
JBT1
P2-DIMMA1
JP2
JTPM1
LE3
P2-DIMMC1
USB 7/8(3.0)
JHFI2
JM2_1
M.2-PCH
A
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
COM2 JIPMB1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
LEDM1
Pin#
A
S-SATA4 JNVME2
JNVME1
C
FAN2 FAN1
50
1
JPCIE6
BIOS
LICENSE
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
CPU2
JVRM1
JVRM2
JP4
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
Ground
5-8
+12V
JPI2C1
JPWR3
LE2
FAN3
FAN4
S-SATA5
51
P2-DIMMF1
JPWR1 JPWR2
JF1
2
PCH
1
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
CPU1
P2-DIMME1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JP2
FAN2 FAN1
S-SATA4 JNVME2
JNVME1
C
A
P2-DIMMD1
P2-DIMMD2
P2-DIMMA2
P2-DIMMB1
P2-DIMMA1
P2-DIMMC1
USB 7/8(3.0)
JTPM1
BIOS
JPCIE4
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE3
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
BT1
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
COM2 JIPMB1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
JHFI1
Definition
1-4
2. JPWR2
COM1
VGA
JPG1
JNVI2C1
JL1
X11DPi-N(T)
Rev. 1.20
JHFI2
JM2_1
M.2-PCH
Pin#
IPMI_LAN
USB4/5 (3.0)
USB0/1
(2.0)
LAN1
LAN2
LAN CTRL
BMC
1. JPWR1
UID
LE1
FAN5
FAN6
LEDM1
JBT1
LE3
A
Chapter 2: Installation
12V 8-pin CPU Power Connectors
JPWR1 and JPWR2 are the 8-pin 12V DC power input for the CPU or alternative single
power source for a special enclosure when the 24-pin ATX power is not in use. Refer to the
table below for pin definitions.
12V 8-pin Power
Pin Definitions
Super X11DPi-N(T) User's Manual
Headers
Onboard Fan Header
This motherboard has eight fan headers (FAN1~6, FANA, FANB) on the motherboard. This
is a 4-pin fan header, which is backward compatible with a traditional 3-pin fan. The onboard
fan speed is controlled by Thermal Management (via Hardware Monitoring) in the BIOS. When
using Thermal Management setting, please use all 3-pin fans or all 4-pin fans.
Fan Header
Pin Definitions
JPG1
LE1
BMC
Ground (Black)
2
+12V (Red)
3
Tachometer
4
PWM Control
1. FAN1
UID
VGA
COM1
FAN5
6
5
JPCIE6
LAN2
LAN1
2. FAN2
USB0/1
(2.0)
IPMI_LAN
USB4/5 (3.0)
3. FAN3
4. FAN4
5. FAN5
BIOS
LICENSE
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
JPCIE4
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE3
FAN6
6. FAN6
CPU2
8. FANB
JP4
JPI2C1
JPWR1 JPWR2
PCH
JPWR3
JF1
LE2
FAN3
FAN4
S-SATA5
JNVI2C1
4
A
C
FAN2 FAN1
3
2
52
P2-DIMMF1
P2-DIMME1
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
CPU1
S-SATA4 JNVME2
JNVME1
7
P2-DIMMD1
P2-DIMMD2
P2-DIMMA2
P2-DIMMB1
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
JL1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMA1
JP2
JTPM1
LE3
X11DPi-N(T)
Rev. 1.20
JBT1
P2-DIMMC1
USB 7/8(3.0)
JHFI2
JM2_1
M.2-PCH
A
USB 6
(3.0)
USB 2/3
(2.0)
7. FANA
BT1
BIOS
8
Definition
1
LAN CTRL
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
JVRM1
JVRM2
JPME2
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
COM2 JIPMB1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
LEDM1
Pin#
1
Chapter 2: Installation
Host Fabric Interface (HFI) Carrier Card Sideband Header (for the
F Model CPU Only)
A Host Fabric Interface (HFI) carrier card header is located at JHFI1 on the motherboard.
The JHFI1 header is used when an F model processor is installed on CPU Socket #1 on
the motherboard. Use an HFI sideband cable to connect the carrier card to the JHFI header,
and use an appropriate IFP (Internal-Faceplate-to-Processor) cable (optional) to connect
the carrier card to the F model processor (installed in CPU Socket #1) to enhance system
performance (See Note below). See page 34 for the installation instructions.
Note: For the HFI carrier card to function properly, please purchase the appropriate
IFP cable from Supermicro. Please refer to Supermicro's website at www.supermicro.
com for the part number of the IFP cable specified for your system.
IFP Cable (*See Note above)
IFP Cable (Optional)
A. JHFI1 Header
6
5
A
HFI Carrier
Card
B
5. Connect one end of
the IFP cable to the
connector (B)
of the HFI card.
2. Install an FHI card to a PCI-E slot
2
JHFI1 Header
(for CPU1)
3
Install an F model CPU
1 on CPU Socket#1
BIOS
LICENSE
HFI (Host Fabric
Interface) Sideband
Cable
F Model
Processor
MAC CODE BAR CODE
4. Connect another end of
4
the HFI cable to the
connector (A)
of the HFI card.
6. Connect the other end of
the IFP cable to the
F model CPU.
X11DPi(-T)
Rev. 1.10
JHFI1
3. Connect the HFI connector
on the HFI cable to the
onboard JHFI1 header.
CPU Socket #1
53
Super X11DPi-N(T) User's Manual
TPM Header
The JTPM1 header is used to connect a Trusted Platform Module (TPM)/Port 80, which is
available from a third-party vendor. A TPM/Port 80 connector is a security device that supports
encryption and authentication in hard drives. It allows the motherboard to deny access if the
TPM associated with the hard drive is not installed in the system. See the layout below for
the location of the TPM header..
JPG1
LE1
BMC
VGA
COM1
LAN CTRL
FAN5
FAN6
LAN2
LAN1
USB0/1
(2.0)
IPMI_LAN
USB4/5 (3.0)
JPCIE6
BIOS
LICENSE
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE4
JPCIE3
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
JVRM1
JVRM2
CPU2
BT1
JP4
JPI2C1
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JPWR1 JPWR2
CPU1
PCH
JPWR3
JF1
LE2
FAN3
FAN4
S-SATA5
JNVI2C1
A
S-SATA4 JNVME2
JNVME1
C
FAN2 FAN1
54
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P2-DIMMA2
JL1
P2-DIMMB1
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
BIOS
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMA1
JP2
JTPM1
LE3
X11DPi-N(T)
Rev. 1.20
JBT1
P2-DIMMC1
USB 7/8(3.0)
JHFI2
JM2_1
M.2-PCH
A
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
COM2 JIPMB1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
1
LEDM1
1. TPM/Port 80 Header
UID
Chapter 2: Installation
RAID Key Header
A RAID Key header is located at JRK1 on the motherboard. The RAID key is used to support
onboard S-SATA connections.
SGPIO Header
The T-SGPIO3 (Serial General Purpose Input/Output) header is used to communicate with
the enclosure management chip on the backplane.
SGPIO Header
Pin Definitions
Pin#
Definition
Pin#
Definition
1
NC
2
NC
3
Ground
4
DATA Out
5
Load
6
Ground
7
Clock
8
NC
NC = No Connection
JPG1
LE1
BMC
COM1
FAN5
FAN6
LAN2
LAN1
IPMI_LAN
USB4/5 (3.0)
JPCIE6
BIOS
LICENSE
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
JPCIE4
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE3
2. Serial General Purpose
Header
USB0/1
(2.0)
CPU2
BT1
USB 2/3
(2.0)
JP4
JPI2C1
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JPWR1 JPWR2
CPU1
PCH
JPWR3
JF1
LE2
FAN3
FAN4
S-SATA5
JNVI2C1
A
S-SATA4 JNVME2
JNVME1
C
FAN2 FAN1
55
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P2-DIMMA2
P2-DIMMB1
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
JL1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMA1
JP2
LE3
X11DPi-N(T)
Rev. 1.20
JBT1
P2-DIMMC1
USB 7/8(3.0)
JTPM1
A
USB 6
(3.0)
JHFI2
JM2_1
M.2-PCH
BIOS
1
VGA
LAN CTRL
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
JVRM1
JVRM2
JPME2
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
COM2 JIPMB1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
LEDM1
1. RAID Key
UID
Super X11DPi-N(T) User's Manual
Standby Power
The Standby Power header is located at JSTBY1 on the motherboard. You must have a card
with a Standby Power connector and a cable to use this feature. Refer to the table below
for pin definitions.
Standby Power
Pin Definitions
Pin#
Definition
1
+5V Standby
2
Ground
3
No Connection
Power SMB (I2C) Header
The Power System Management Bus (I2C) connector (JPI2C1) monitors the power supply,
fan, and system temperatures. Refer to the table below for pin definitions.
Power SMB Header
Pin Definitions
JPG1
LE1
BMC
Definition
1
Clock
2
Data
3
PMBUS_Alert
4
Ground
5
+3.3V
1. Standby Power
UID
VGA
COM1
LAN CTRL
FAN5
FAN6
LAN2
LAN1
2. Power SMB Header
USB0/1
(2.0)
IPMI_LAN
USB4/5 (3.0)
JPCIE6
BIOS
LICENSE
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
JPCIE4
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE3
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
JVRM1
JVRM2
CPU2
BT1
JP4
JPI2C1
JPWR1 JPWR2
CPU1
PCH
JPWR3
JF1
LE2
FAN3
FAN4
S-SATA5
JNVI2C1
A
S-SATA4 JNVME2
JNVME1
C
FAN2 FAN1
1
56
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JL1
P2-DIMMA2
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
BIOS
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMB1
X11DPi-N(T)
Rev. 1.20
JBT1
P2-DIMMA1
JP2
JTPM1
LE3
P2-DIMMC1
USB 7/8(3.0)
JHFI2
JM2_1
M.2-PCH
A
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
COM2 JIPMB1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
LEDM1
Pin#
2
Chapter 2: Installation
4-pin BMC External I2C Header
A System Management Bus header for IPMI 2.0 is located at JIPMB1. Connect the appropriate
cable here to use the IPMB I2C connection on your system. Refer to the table below for pin
definitions.
External I2C Header
Pin Definitions
Pin#
Definition
1
Data
2
Ground
3
Clock
4
No Connection
Chassis Intrusion
A Chassis Intrusion header is located at JL1 on the motherboard. Attach the appropriate cable
from the chassis to inform you of a chassis intrusion when the chassis is opened. Refer to
the table below for pin definitions.
Chassis Intrusion
Pin Definitions
JPG1
LE1
BMC
Definition
1
Intrusion Input
2
Ground
1. BMC External I2C Header
UID
VGA
COM1
LAN CTRL
FAN5
FAN6
LAN2
LAN1
2. Chassis Intrusion
USB0/1
(2.0)
IPMI_LAN
USB4/5 (3.0)
JPCIE6
BIOS
LICENSE
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
JPCIE4
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE3
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
JVRM1
JVRM2
CPU2
BT1
JP4
JPI2C1
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JPWR1 JPWR2
CPU1
PCH
2
JPWR3
JF1
LE2
FAN3
FAN4
S-SATA5
JNVI2C1
A
S-SATA4 JNVME2
JNVME1
C
FAN2 FAN1
57
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P2-DIMMA2
JL1
P2-DIMMB1
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
BIOS
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMA1
JP2
JTPM1
LE3
X11DPi-N(T)
Rev. 1.20
JBT1
P2-DIMMC1
USB 7/8(3.0)
JHFI2
JM2_1
M.2-PCH
A
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
COM2 JIPMB1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
1
LEDM1
Pin#
Super X11DPi-N(T) User's Manual
NVMe I2C Header
Connector JNVI2C1 is a management header for the Supermicro AOC NVMe PCI-E peripheral
cards. Please connect the I2C cable to this connector.
NVMe Slots
Use the two NVMe slots (NVME1 and NVME2) to attach high-speed PCI-E storage devices.
Speaker Header
A speaker header is located on JD1. Close pins 1-2 of JD1 to use the onboard speaker. See
the layout below for JD1 location.
JPG1
LE1
BMC
COM1
FAN5
FAN6
LAN2
LAN1
2. NVMe Slot 1
USB0/1
(2.0)
IPMI_LAN
USB4/5 (3.0)
JPCIE6
4. Speaker Header
BIOS
LICENSE
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
JPCIE4
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE3
3. NVMe Slot 2
CPU2
BT1
JP4
JPI2C1
JPWR1 JPWR2
CPU1
PCH
1
JPWR3
JF1
LE2
S-SATA5
FAN3
FAN4
JNVI2C1
A
A
S-SATA4 JNVME2
JNVME1
3
C
FAN2 FAN1
2
58
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JL1
P2-DIMMA2
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
BIOS
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMB1
JP2
LE3
P2-DIMMA1
X11DPi-N(T)
Rev. 1.20
JBT1
P2-DIMMC1
USB 7/8(3.0)
JHFI2
JM2_1
M.2-PCH
JTPM1
4
VGA
LAN CTRL
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
JVRM1
JVRM2
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
COM2 JIPMB1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
LEDM1
1. NVMe I2C Header
UID
Chapter 2: Installation
PCI-E M.2 Slot
The X11DPi-N(T) motherboard has one PCI-E M.2 slot. M.2 was formerly Next Generation
Form Factor (NGFF) and serves to replace mini PCI-E. M.2 allows for a variety of card sizes,
increased functionality, and spatial efficiency. The M.2 socket on the motherboard supports
PCI-E 3.0 X4 (32 Gb/s) SSD cards in the 2260, 2280 and 22110 form factors.
B Holder Mount
A Holder
Turn 90 degrees
Locked position
to lock
Locked position
C Card Holder Mount
Turn 90 degrees
to lock
D Plastic screw
STOP
Locked position
with M.2 card
Hole Location on the MB
Press in here
Rectangle hole
on MB
42
M.2 Card 60
A+B+C
M.2 Card 80
A+B+C
M.2 Card 110
A+B+D
A+B+C
A+B+D
D
B
B
C
A
A
Copyright © 2017 by Super Micro Computer, Inc. All rights reserved.
JPG1
LE1
BMC
VGA
1. M.2 Slot
COM1
LAN CTRL
FAN5
FAN6
LAN2
LAN1
USB0/1
(2.0)
IPMI_LAN
USB4/5 (3.0)
JPCIE6
BIOS
LICENSE
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
JPCIE4
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE3
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
JVRM1
JVRM2
CPU2
BT1
JP4
JPI2C1
JPWR1 JPWR2
CPU1
PCH
JPWR3
JF1
LE2
FAN3
FAN4
S-SATA5
JNVI2C1
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JL1
P2-DIMMA2
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
BIOS
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMB1
X11DPi-N(T)
Rev. 1.20
JBT1
P2-DIMMA1
JP2
JTPM1
LE3
P2-DIMMC1
USB 7/8(3.0)
JHFI2
JM2_1
M.2-PCH
1
A
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
COM2 JIPMB1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
LEDM1
UID
A
S-SATA4 JNVME2
JNVME1
C
FAN2 FAN1
59
Super X11DPi-N(T) User's Manual
I-SATA 3.0 and S-SATA 3.0 Ports
The X11DPi(-T) has eight I-SATA 3.0 ports (I-SATA0-3, I-SATA4-7) and six S-SATA (S-SATA0-3,
S-SATA4, S-SATA5) on the motherboard. These SATA ports are supported by the Intel C620
chipset. I-SATA0-3 are supported by CPU2 PCI-E 3.0 x16 slot on SXB2, and S-SATA0-5 are
supported by the CPU1 PCI-E 3.0 x8 slot on SXB1. S-SATA4/S-SATA5 can be used with
Supermicro SuperDOMs which are yellow SATA DOM connectors with power pins built in, and
do not require external power cables. Supermicro SuperDOMs are backward-compatible with
regular SATA HDDs or SATA DOMs that need external power cables. All these SATA ports
provide serial-link signal connections, which are faster than the connections of Parallel ATA.
SATA 3.0 Port
Pin Definitions
JPG1
LE1
BMC
SATA_TXP
3
SATA_TXN
4
Ground
5
SATA_RXN
6
SATA_RXP
7
Ground
1. I-SATA0-3
VGA
COM1
FAN5
LAN2
LAN1
2. I-SATA4-7
USB0/1
(2.0)
IPMI_LAN
USB4/5 (3.0)
JPCIE6
4. S-SATA4
5. S-SATA5
BIOS
LICENSE
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
JPCIE4
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE3
3. S-SATA0-3
CPU2
JP4
JPI2C1
JPWR1 JPWR2
A
PCH
JPWR3
JF1
LE2
FAN3
FAN4
S-SATA5
JNVI2C1
A
C
FAN2 FAN1
5
60
P2-DIMMF1
P2-DIMME1
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
CPU1
S-SATA4 JNVME2
JNVME1
4
P2-DIMMD1
P2-DIMMD2
P2-DIMMA2
JL1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMB1
X11DPi-N(T)
Rev. 1.20
JBT1
P2-DIMMA1
JP2
LE3
P2-DIMMC1
USB 7/8(3.0)
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
2
Ground
2
BT1
JHFI2
JM2_1
M.2-PCH
JTPM1
1
1
UID
FAN6
BIOS
3
Signal
LAN CTRL
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
JVRM1
JVRM2
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
COM2 JIPMB1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
LEDM1
Pin#
Chapter 2: Installation
2.7Jumper Settings
How Jumpers Work
To modify the operation of the motherboard, jumpers can be used to choose between optional
settings. Jumpers create shorts between two pins to change the function of the connector.
Pin 1 is identified with a square solder pad on the printed circuit board. See the diagram
at right for an example of jumping pins 1 and 2. Refer to the motherboard layout page for
jumper locations.
Note: On two-pin jumpers, "Closed" means the jumper is on and "Open" means the
jumper is off the pins.
Connector
Pins
3
2
1
3
2
1
Jumper
Setting
61
Super X11DPi-N(T) User's Manual
CMOS Clear
JBT1 is used to clear CMOS, which will also clear any passwords. Instead of pins, this jumper
consists of contact pads to prevent accidentally clearing the contents of CMOS.
To Clear CMOS
1. First power down the system and unplug the power cord(s).
2. Remove the cover of the chassis to access the motherboard.
3. Remove the onboard battery from the motherboard.
4. Short the CMOS pads with a metal object such as a small screwdriver for at least four
seconds.
5. Remove the screwdriver (or shorting device).
6. Replace the cover, reconnect the power cord(s), and power on the system.
Note: Clearing CMOS will also clear all passwords.
Do not use the PW_ON connector to clear CMOS.
JBT1 contact pads
JPG1
LE1
BMC
VGA
COM1
LAN CTRL
FAN5
FAN6
LAN2
LAN1
USB0/1
(2.0)
1. Clear CMOS
IPMI_LAN
USB4/5 (3.0)
JPCIE6
BIOS
LICENSE
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
JPCIE4
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE3
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
JVRM1
JVRM2
CPU2
BT1
JP4
JPI2C1
JPWR1 JPWR2
CPU1
PCH
JPWR3
JF1
LE2
FAN3
FAN4
S-SATA5
JNVI2C1
A
S-SATA4 JNVME2
JNVME1
C
FAN2 FAN1
62
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JL1
P2-DIMMA2
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
BIOS
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMB1
X11DPi-N(T)
Rev. 1.20
P2-DIMMA1
JP2
JTPM1
LE3
1
JBT1
P2-DIMMC1
USB 7/8(3.0)
JHFI2
JM2_1
M.2-PCH
A
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
COM2 JIPMB1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
LEDM1
UID
Chapter 2: Installation
LAN Port Enable/Disable
Change the setting of jumper JPL1 to enable or disable LAN ports 1 and 2. Please note
that LAN1/LAN2 ports support GbE LAN connections on the X11DPi-N, and 10GbE LAN
connections on the X11DPi-NT. The default setting is Enabled.
LAN Port Enable/Disable
Jumper Settings
BMC
Definition
Pins 1-2
Enabled
Pins 2-3
Disabled
1. LAN Enable/Disable
UID
VGA
COM1
LAN CTRL
FAN5
FAN6
LAN2
LAN1
USB0/1
(2.0)
IPMI_LAN
USB4/5 (3.0)
JPCIE6
BIOS
LICENSE
CPU2
BT1
JP4
JPI2C1
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JPWR1 JPWR2
CPU1
PCH
JPWR3
JF1
LE2
FAN3
FAN4
S-SATA5
JNVI2C1
A
S-SATA4 JNVME2
JNVME1
C
FAN2 FAN1
63
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P2-DIMMA2
JL1
P2-DIMMB1
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
BIOS
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMA1
JP2
JTPM1
LE3
X11DPi-N(T)
Rev. 1.20
JBT1
P2-DIMMC1
USB 7/8(3.0)
JHFI2
JM2_1
M.2-PCH
A
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
JVRM1
JVRM2
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE4
JPCIE3
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
COM2 JIPMB1
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
LEDM1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
2
JPG1
1
LE1
Jumper Setting
Super X11DPi-N(T) User's Manual
Management Engine (ME) Recovery
Use jumper JPME1 to select ME Firmware Recovery mode, which will limit resource
allocation for essential system operation only in order to maintain normal power operation
and management. In the single operation mode, online upgrade will be available via Recovery
mode. See the table below for jumper settings.
Manufacturer Mode
Jumper Settings
Jumper Setting
Definition
Pins 1-2
Normal
Pins 2-3
ME Recovery
Manufacturing Mode Select
Close JPME2 to bypass SPI flash security and force the system to use the Manufacturing
Mode, which will allow you to flash the system firmware from a host server to modify system
settings. See the table below for jumper settings.
Manufacturing Mode Select
Jumper Settings
JPG1
Pins 1-2
Normal (Default)
Pins 2-3
Manufacturing Mode
1. ME Recovery
UID
VGA
COM1
LAN CTRL
FAN5
FAN6
LAN2
2. Manufacturing Mode Select
USB0/1
(2.0)
LAN1
IPMI_LAN
USB4/5 (3.0)
JPCIE6
BIOS
LICENSE
CPU2
BT1
JP4
JPI2C1
JPWR1 JPWR2
CPU1
PCH
JPWR3
JF1
LE2
FAN3
FAN4
S-SATA5
JNVI2C1
A
S-SATA4 JNVME2
JNVME1
C
FAN2 FAN1
64
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JL1
P2-DIMMA2
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
BIOS
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMB1
X11DPi-N(T)
Rev. 1.20
JBT1
P2-DIMMA1
JP2
JTPM1
LE3
P2-DIMMC1
USB 7/8(3.0)
JHFI2
JM2_1
M.2-PCH
A
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
JVRM1
JVRM2
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
JPCIE4
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE3
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
COM2 JIPMB1
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
LEDM1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
1
Definition
LE1
BMC
2
Jumper Setting
Chapter 2: Installation
Watch Dog
JWD1 controls the Watch Dog function. Watch Dog is a monitor that can reboot the system
when a software application hangs. Jumping pins 1-2 will cause Watch Dog to reset the
system if an application hangs. Jumping pins 2-3 will generate a non-maskable interrupt
signal for the application that hangs. Watch Dog must also be enabled in BIOS. The default
setting is Reset.
Note: When Watch Dog is enabled, the user needs to write their own application
software to disable it.
Watch Dog
Jumper Settings
Jumper Setting
Definition
Pins 1-2
Reset
Pins 2-3
NMI
Open
Disabled
1. Watch Dog
JPG1
LE1
BMC
VGA
COM1
LAN CTRL
FAN5
FAN6
LAN2
LAN1
USB0/1
(2.0)
IPMI_LAN
USB4/5 (3.0)
JPCIE6
BIOS
LICENSE
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
JPCIE4
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE3
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
JVRM1
JVRM2
CPU2
BT1
JP4
JPI2C1
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JPWR1 JPWR2
CPU1
PCH
JPWR3
JF1
LE2
FAN3
FAN4
S-SATA5
JNVI2C1
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P2-DIMMB1
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
JL1
1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
BIOS
P2-DIMMA2
X11DPi-N(T)
Rev. 1.20
JBT1
P2-DIMMA1
JP2
JTPM1
LE3
P2-DIMMC1
USB 7/8(3.0)
JHFI2
JM2_1
M.2-PCH
A
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
COM2 JIPMB1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
LEDM1
UID
A
S-SATA4 JNVME2
JNVME1
C
FAN2 FAN1
65
JPCIE6
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
BIOS
LICENSE
USB 2/3
(2.0)
JP4
USB 6
(3.0)
Definition
Pins 1-2
BMC (Normal)
Pins 2-3
PCH
COM1
VGA
JPWR3
LE2
FAN3
FAN4
S-SATA5
66
JPI2C1
JPWR1 JPWR2
JF1
P2-DIMMF1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JP2
PCH
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
CPU1
P2-DIMME1
USB 7/8(3.0)
JTPM1
FAN2 FAN1
S-SATA4 JNVME2
JNVME1
C
A
P2-DIMMD1
P2-DIMMD2
P2-DIMMA2
P2-DIMMB1
P2-DIMMA1
P2-DIMMC1
X11DPi-N(T)
CPU2
JVRM1
JVRM2
JPME2
BIOS
JPCIE4
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE3
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
BT1
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
COM2 JIPMB1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
JNVI2C1
JL1
JHFI1
LE3
JBT1
IPMI_LAN
USB4/5 (3.0)
FAN6
LEDM1
Rev. 1.20
JHFI2
JM2_1
M.2-PCH
USB0/1
(2.0)
LAN1
FAN5
LAN2
LAN CTRL
BMC
Jumper Setting
1. JVRM1
2. JVRM2
UID
LE1
JPG1
1
2
A
Super X11DPi-N(T) User's Manual
I2C Bus for VRM
Jumpers JVRM1 and JVRM2 allow the BMC or the PCH to access CPU and memory VRM
controllers. See the table below for jumper settings.
VRM
Jumper Settings
Chapter 2: Installation
2.8LED Indicators
LAN LEDs
The LAN ports are located on the IO
Backplane on the motherboard. Each
Ethernet LAN port has two LEDs. The
yellow LED indicates activity. Link LED,
located on the left side of the LAN port,
may be green, amber or off indicating the
speed of the connection. See the tables at
right for more information.
JPG1
BMC
Color
State
Yellow
Flashing
Definition
Active
LAN Link Indicator
LED Settings
LED Color
Definition
Off
No Connection, 10 or 100 Mbps
Green
10 Gbps (X11DPi-NT Only)
Amber
1 Gbps
IPMI LAN
In addition to LAN 1/LAN 2, an IPMIdedicated LAN is located on the I/O
Backplane of the motherboard. The amber
LED on the right indicates activity, while the
green LED on the left indicates the speed
of the connection. See the tables at right
for more information.
1
LE1
Activity LED
GLAN Activity Indicator (Left)
LED Settings
IPMI-Dedicated LAN LEDs
Link LED
Activity LED
IPMI LAN Link LED (Left) &
Activity LED (Right)
Color
State
Green: Solid
100 Mbps
Activity (Right)
Amber:
Blinking
Active
2
VGA
1. LAN1/LAN2 LEDs
COM1
FAN5
FAN6
LAN2
LAN1
Definition
Link (Left)
UID
LAN CTRL
USB0/1
(2.0)
2. IPMI LAN LEDs
IPMI_LAN
USB4/5 (3.0)
JPCIE6
BIOS
LICENSE
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
JPCIE4
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE3
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
JVRM1
JVRM2
CPU2
BT1
JP4
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P2-DIMMA2
JPI2C1
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JPWR1 JPWR2
CPU1
PCH
JF1
JPWR3
FAN3
FAN4
S-SATA5
JNVI2C1
LE2
JL1
P2-DIMMB1
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
BIOS
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMA1
JP2
JTPM1
LE3
X11DPi-N(T)
Rev. 1.20
JBT1
P2-DIMMC1
USB 7/8(3.0)
JHFI2
JM2_1
M.2-PCH
A
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
COM2 JIPMB1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
LEDM1
LAN 1/2
Link LED
A
S-SATA4 JNVME2
JNVME1
C
FAN2 FAN1
67
2
1
Super X11DPi-N(T) User's Manual
BMC Heartbeat LED
LEDM1 is the BMC heartbeat LED. When the LED is blinking green, BMC is functioning
normally. See the table below for the LED status.
Onboard Power LED Indicator
LED Color
Definition
Green:
Blinking
BMC Normal
Onboard Power LED
The Onboard Power LED is located at LE2 on the motherboard. When this LED is on, the
system is on. Be sure to turn off the system and unplug the power cord before removing or
installing components. Refer to the table below for more information.
Onboard Power LED Indicator
LED Color
Definition
Off
System Off
(power cable not
connected)
Green
System On
JPG1
LE1
1
BMC
VGA
COM1
LAN CTRL
FAN5
FAN6
LAN2
LAN1
2. Onboard Power LED
USB0/1
(2.0)
IPMI_LAN
USB4/5 (3.0)
JPCIE6
BIOS
LICENSE
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
JPCIE4
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE3
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
JVRM1
JVRM2
CPU2
BT1
JP4
JPI2C1
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JPWR1 JPWR2
CPU1
PCH
JPWR3
2 JF1
LE2
FAN3
FAN4
S-SATA5
JNVI2C1
A
S-SATA4 JNVME2
JNVME1
C
FAN2 FAN1
68
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P2-DIMMA2
JL1
P2-DIMMB1
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
BIOS
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
P2-DIMMA1
JP2
JTPM1
LE3
X11DPi-N(T)
Rev. 1.20
JBT1
P2-DIMMC1
USB 7/8(3.0)
JHFI2
JM2_1
M.2-PCH
A
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
COM2 JIPMB1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
LEDM1
1. BMC Heartbeat LED
UID
Chapter 2: Installation
Unit ID LED
A rear UID LED indicator at LE1 is located near the UID switch on the I/O back panel. This
UID indicator provides easy identification of a system.unit that may need service.
UID LED
LED Indicator
LED Color
Definition
Blue: On
Unit Identified
LED3
A power LED indicator is located at LED3. When this LED is on, system power is on. See
the layout below for the location of LED3
1
JPG1
LE1
BMC
VGA
COM1
LAN CTRL
FAN5
FAN6
LAN2
LAN1
2. Power LED (LED3)
USB0/1
(2.0)
IPMI_LAN
USB4/5 (3.0)
JPCIE6
BIOS
LICENSE
JNVI2C2
CPU2 SLOT6 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X16
JPCIE5
JPCIE4
CPU2 SLOT4 PCI-E 3.0 X16
JPCIE3
CPU1 SLOT3 PCI-E 3.0 X8
JPCIE2
JVRM1
JVRM2
CPU2
BT1
JP4
JPI2C1
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
JPWR1 JPWR2
CPU1
PCH
JPWR3
JF1
LE2
FAN3
FAN4
JNVI2C1
A
S-SATA4 JNVME2
JNVME1
C
FAN2 FAN1
69
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P2-DIMMA2
P2-DIMMB1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
JHFI1
2
S-SATA5
JSTBY1
JPME1 JWD1
JRK1
JD1
S-SATA 0~3 I-SATA 0~3 I-SATA 4~7 FANA
T-SGPIO3
FANB
JL1
JBT1
LE3
P2-DIMMA1
JP2
JTPM1
BIOS
X11DPi-N(T)
Rev. 1.20
P2-DIMMC1
USB 7/8(3.0)
JHFI2
JM2_1
M.2-PCH
A
USB 6
(3.0)
USB 2/3
(2.0)
JPME2
CPU1 SLOT2 PCI-E 3.0 X16 MAC CODE
BAR CODE
JPCIE1
COM2 JIPMB1
CPU1 SLOT1 PCI-E 3.0 X8
JPL1
LEDM1
1. UID LED
UID
Super X11DPi-N(T) User's Manual
Chapter 3
Troubleshooting
3.1Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have followed all of the
procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/
or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC
power cord before adding, changing or installing any non hot-swap hardware components.
Before Power On
1. Check that the power LED on the motherboard is on.
2. Make sure that the power connector is connected to your power supply.
3. Make sure that no short circuits exist between the motherboard and chassis.
4. Disconnect all cables from the motherboard, including those for the keyboard and
mouse.
5. Remove all add-on cards.
6. Install a CPU, a heatsink*, and connect the internal speaker and the power LED to the
motherboard. Check all jumper settings as well. (Make sure that the heatsink is fully
seated.)
7. Use the correct type of onboard CMOS battery as recommended by the manufacturer.
To avoid possible explosion, do not install the CMOS battery upside down.
No Power
1. Make sure that no short circuits exist between the motherboard and the chassis.
2. Verify that all jumpers are set to their default positions.
3. Check that the 115V/230V switch on the power supply is properly set.
4. Turn the power switch on and off to test the system.
5. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.
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Chapter 3: Troubleshooting
No Video
1. If the power is on but you have no video, remove all the add-on cards and cables.
2. Use the speaker to determine if any beep codes exist. Refer to Appendix A for details on
beep codes.
System Boot Failure
If the system does not display POST (Power-On-Self-Test) or does not respond after the
power is turned on, check the following:
1. Check for any error beep from the motherboard speaker.
•If there is no error beep, try to turn on the system without DIMM modules installed. If there
is still no error beep, replace the motherboard.
•If
there are error beeps, clear the CMOS settings by unplugging the power cord and
contacting both pads on the CMOS Clear Jumper (JBT1). Refer to chapter 2.
2. Remove all components from the motherboard, especially the DIMM modules. Make
sure that system power is on and that memory error beeps are activated.
3. Turn on the system with only one DIMM module installed. If the system boots, check for
bad DIMM modules or slots by following the Memory Errors Troubleshooting procedure
in this Chapter.
Memory Errors
1. Make sure that the DIMM modules are properly and fully installed.
2. Confirm that you are using the correct memory. Also, it is recommended that you use
the same memory type and speed for all DIMMs in the system. See Section 2.4 for
memory details.
3. Check for bad DIMM modules or slots by swapping modules between slots and noting
the results.
4. Check the power supply voltage 115V/230V switch.
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Super X11DPi-N(T) User's Manual
Losing the System's Setup Configuration
1. Make sure that you are using a high quality power supply. A poor quality power supply
may cause the system to lose the CMOS setup information. Refer to Section 1.6 for
details on recommended power supplies.
2. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.
3. If the above steps do not fix the setup configuration problem, contact your vendor for
repairs.
When the System Becomes Unstable
A. If the system becomes unstable during or after OS installation, check the following:
1. CPU/BIOS support: Make sure that your CPU is supported and that you have the latest
BIOS installed in your system.
2. Memory support: Make sure that the memory modules are supported by testing the
modules using memtest86 or a similar utility.
Note: Refer to the product page on our website at http:\\www.supermicro.com for
memory and CPU support and updates.
3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Replace the
bad HDDs with good ones.
4. System cooling: Check the system cooling to make sure that all heatsink fans and CPU/
system fans, etc., work properly. Check the hardware monitoring settings in the IPMI
to make sure that the CPU and system temperatures are within the normal range. Also
check the front panel Overheat LED and make sure that it is not on.
5. Adequate power supply: Make sure that the power supply provides adequate power to
the system. Make sure that all power connectors are connected. Please refer to our
website for more information on the minimum power requirements.
6. Proper software support: Make sure that the correct drivers are used.
B. If the system becomes unstable before or during OS installation, check the following:
1. Source of installation: Make sure that the devices used for installation are working
properly, including boot devices such as CD.
2. Cable connection: Check to make sure that all cables are connected and working
properly.
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Chapter 3: Troubleshooting
3. Using the minimum configuration for troubleshooting: Remove all unnecessary
components (starting with add-on cards first), and use the minimum configuration (but
with a CPU and a memory module installed) to identify the trouble areas. Refer to the
steps listed in Section A above for proper troubleshooting procedures.
4. Identifying bad components by isolating them: If necessary, remove a component in
question from the chassis, and test it in isolation to make sure that it works properly.
Replace a bad component with a good one.
5. Check and change one component at a time instead of changing several items at the
same time. This will help isolate and identify the problem.
6. To find out if a component is good, swap this component with a new one to see if the
system will work properly. If so, then the old component is bad. You can also install the
component in question in another system. If the new system works, the component is
good and the old system has problems.
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Super X11DPi-N(T) User's Manual
3.2Technical Support Procedures
Before contacting Technical Support, please take the following steps. Also, note that as a
motherboard manufacturer, we do not sell directly to end-users, so it is best to first check with
your distributor or reseller for troubleshooting services. They should know of any possible
problem(s) with the specific system configuration that was sold to you.
1. Please review the ‘Troubleshooting Procedures’ and 'Frequently Asked Questions'
(FAQs) sections in this chapter or see the FAQs on our website before contacting
Technical Support.
2. BIOS upgrades can be downloaded from our website. Note: Not all BIOS can be
flashed depending on the modifications to the boot block code.
3. If you still cannot resolve the problem, include the following information when contacting
us for technical support:
•Motherboard model and PCB revision number
•BIOS release date/version (this can be seen on the initial display when your system first
boots up)
•System configuration
An example of a Technical Support form is posted on our website.
Distributors: For immediate assistance, please have your account number ready when
contacting our technical support department by e-mail.
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Chapter 3: Troubleshooting
3.3Frequently Asked Questions
Question: What type of memory does my motherboard support?
Answer: The X11DPi-N(T) motherboard supports up to 2TB of 3DS Load Reduced DIMM
(3DS LRDIMM), Load Reduced DIMM (LRDIMM), Registered DIMM (RDIMM), Non-Volatile
DIMM (NV-DIMM) DDR4 (288-pin) ECC 2666/2400/2133 MHz modules in 16 slots. See
Section 2.4 for details on installing memory.
Question: How do I update my BIOS?
Answer: It is recommended that you do not upgrade your BIOS if you are not experiencing
any problems with your system. Updated BIOS files are located on our website at http://www.
supermicro.com. Please check our BIOS warning message and the information on how to
update your BIOS on our website. Select your motherboard model and download the BIOS
file to your computer. Also, check the current BIOS revision to make sure that it is newer
than your BIOS before downloading. You can choose from the zip file and the .exe file. If
you choose the zip BIOS file, please unzip the BIOS file onto a bootable USB device. Run
the batch file using the format FLASH.BAT filename.rom from your bootable USB device to
flash the BIOS. Then, your system will automatically reboot.
Question: Why can't I turn off the power using the momentary power on/off switch?
Answer: The instant power off function is controlled in BIOS by the Power Button Mode
setting. When the On/Off feature is enabled, the motherboard will have instant off capabilities
as long as the BIOS has control of the system. When the Standby or Suspend feature is
enabled or when the BIOS is not in control such as during memory count (the first screen
that appears when the system is turned on), the momentary on/off switch must be held for
more than four seconds to shut down the system. This feature is required to implement the
ACPI features on the motherboard.
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Super X11DPi-N(T) User's Manual
3.4Battery Removal and Installation
Battery Removal
To remove the onboard battery, follow the steps below:
1. Power off your system and unplug your power cable.
2. Using a tool such as a pen or a small screwdriver, push the battery lock outwards to
unlock it. Once unlocked, the battery will pop out from the holder.
3. Remove the battery.
Proper Battery Disposal
Please handle used batteries carefully. Do not damage the battery in any way; a damaged
battery may release hazardous materials into the environment. Do not discard a used battery
in the garbage or a public landfill. Please comply with the regulations set up by your local
hazardous waste management agency to dispose of your used battery properly.
Battery Installation
1. To install an onboard battery, follow the steps 1 & 2 above and continue below:
2. Identify the battery's polarity. The positive (+) side should be facing up.
3. Insert the battery into the battery holder and push it down until you hear a click to
ensure that the battery is securely locked.
Note: When replacing a battery, be sure to only replace it with the same type.
OR
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Chapter 3: Troubleshooting
3.5Returning Merchandise for Service
A receipt or copy of your invoice marked with the date of purchase is required before any
warranty service will be rendered. You can obtain service by calling your vendor for a Returned
Merchandise Authorization (RMA) number. When returning to the manufacturer, the RMA
number should be prominently displayed on the outside of the shipping carton and mailed
prepaid or hand-carried. Shipping and handling charges will be applied for all orders that
must be mailed when service is complete.
For faster service, RMA authorizations may be requested online (http://www.supermicro.com/
support/rma/).
This warranty only covers normal consumer use and does not cover damages incurred in
shipping or from failure due to the alteration, misuse, abuse or improper maintenance of
products.
During the warranty period, contact your distributor first for any product problems.
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Super X11DPi-N(T) User's Manual
Chapter 4
BIOS
4.1Introduction
This chapter describes the AMIBIOS™ Setup utility for the X11DPi-N(T) motherboards. The
BIOS is stored on a chip and can be easily upgraded using a flash program.
Note: Due to periodic changes to the BIOS, some settings may have been added
or deleted and might not yet be recorded in this manual. Please refer to the Manual
Download area of our website for any changes to BIOS that may not be reflected in
this manual.
Starting the Setup Utility
To enter the BIOS setup utility, press the <Delete> key while the system is booting-up. (In
most cases, the <Delete> key is used to invoke the BIOS setup screen. There are a few
cases when other keys are used, such as <F1>, <F2>, etc.) Each main BIOS menu option
is described in this manual.
The Main BIOS screen has two main frames. The left frame displays all the options that can
be configured. “Grayed-out” options cannot be configured. The right frame displays the key
legend. Above the key legend is an area reserved for a text message. When an option is
selected in the left frame, it is highlighted in white. Often a text message will accompany it.
(Note that BIOS has default text messages built in. We retain the option to include, omit, or
change any of these text messages.) Settings printed in Bold are the default values.
A " " indicates a submenu. Highlighting such an item and pressing the <Enter> key will
open the list of settings within that submenu.
The BIOS setup utility uses a key-based navigation system called hot keys. Most of these
hot keys (<F1>, <F10>, <Enter>, <ESC>, <Arrow> keys, etc.) can be used at any time during
the setup navigation process.
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4.2 Main Setup
When you first enter the AMI BIOS setup utility, you will enter the Main setup screen. You can
always return to the Main setup screen by selecting the Main tab on the top of the screen. The
Main BIOS setup screen is shown below. The following Main menu items will be displayed:
System Date/System Time
Use this item to change the system date and time. Highlight System Date or System Time
using the arrow keys. Enter new values using the keyboard. Press the <Tab> key or the arrow
keys to move between fields. The date must be entered in Day MM/DD/YYYY format. The
time is entered in HH:MM:SS format.
Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00.
The date's default value is 01/01/2014 after RTC reset.
Supermicro X11DPi-N/X11DPi-NT
BIOS Version
This item displays the version of the BIOS ROM used in the system.
Build Date
This item displays the date when the version of the BIOS ROM used in the system was built.
CPLD Version
This item displays the version of the CPLD (Complex-Programmable Logical Device) used
in the system.
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Memory Information
Total Memory
This item displays the total size of memory available in the system.
Memory Speed
This item displays the default speed of the memory modules installed in the system.
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4.3 Advanced Setup Configurations
Use the arrow keys to select the Advanced submenu and press <Enter> to access the
submenu items:
Warning: Take Caution when changing the Advanced settings. An incorrect value, an incorrect
DRAM frequency, or an incorrect BIOS timing setting may cause the system to malfunction.
When this occurs, restore the setting to the manufacture default setting.
Boot
Configuration
Quiet Boot
Use this feature to select the screen between displaying POST messages or the OEM logo
at bootup. Select Disabled to display the POST messages. Select Enabled to display the
OEM logo instead of the normal POST messages. The options are Enabled and Disabled.
Note: POST message is always displayed regardless of the item setting.
CSM (Compatibility Support Module) Support
Select Enabled to enable CSM booting support which will allow a UEFI (Unified Expansible
Firmware Interface)-compatible device to boot from a system that uses a legacy BIOS ROM.
The options are Enabled and Disabled.
Option ROM Messages
Use this feature to set the display mode for the Option ROM. Select Keep Current to use
the current AddOn ROM display setting. Select Force BIOS to use the Option ROM display
mode set by the system BIOS. The options are Force BIOS and Keep Current.
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Bootup NumLock State
Use this feature to set the Power-on state for the Numlock key. The options are Off and On.
Wait For 'F1' If Error
Select Enabled to force the system to wait until the 'F1' key is pressed if an error occurs. The
options are Disabled and Enabled.
Interrupt 19 Capture
Interrupt 19 is the software interrupt that handles the boot disk function. When this item is
set to Immediate, the ROM BIOS of the host adaptors will "capture" Interrupt 19 at bootup
immediately and allow the drives that are attached to these host adaptors to function as
bootable disks. If this item is set to Postponed, the ROM BIOS of the host adaptors will not
capture Interrupt 19 immediately and allow the drives attached to these adaptors to function
as bootable devices at bootup. The options are Immediate and Postponed.
Re-try Boot
When EFI (Expansible Firmware Interface) Boot is selected, the system BIOS will automatically
reboot the system from an EFI boot device after an initial boot failure. Select Legacy Boot to
allow the BIOS to automatically reboot the system from a Legacy boot device after an initial
boot failure. The options are Disabled, Legacy Boot, and EFI Boot.
Power Configuration
Watch Dog Function
Select Enabled to allow the Watch Dog timer to reboot the system when it is inactive for more
than 5 minutes. The options are Enabled and Disabled.
Power Button Function
This feature controls how the system shuts down when the power button is pressed. Select 4
Seconds Override for the user to power off the system after pressing and holding the power
button for 4 seconds or longer. Select Instant Off to instantly power off the system as soon
as the user presses the power button. The options are 4 Seconds Override and Instant Off.
Restore on AC Power Loss
Use this feature to set the power state after a power outage. Select Power-Off for
the system power to remain off after a power loss. Select Power-On for the system
power to be turned on after a power loss. Select Last State to allow the system
to resume its last power state before a power loss. The options are Power-On,
Stay-Off and Last State.
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CPU
Configuration
Warning: Setting the wrong values in the following sections may cause the system to malfunction.
Processor
Configuration
The following CPU information will be displayed:
•Processor BSP Revision
•Processor Socket
•Processor ID
•Processor Frequency
•Processor Max Ratio
•Processor Min Ratio
•Microcode Revision
•L1 Cache RAM
•L2 Cache RAM
•L3 Cache RAM
•Processor 0 Version
•Processor 1 Version
Hyper-Threading (ALL)
Select Enable to use Intel Hyper-Threading Technology to enhance CPU performance. The
options are Enable and Disable.
Execute Disable Bit (Available if supported by the OS & the CPU)
Select Enable to enable Execute Disable Bit support which will allow the processor to
designate areas in the system memory where an application code can execute and where
it cannot, thus preventing a worm or a virus from flooding illegal codes to overwhelm the
processor, damaging the system during a virus attack. The options are Enable and Disable.
(Refer to Intel and Microsoft websites for more information.)
Intel Virtualization Technology
Select Enable to use Intel Virtualization Technology which will allow the I/O device assignments
to be directly reported to the VMM (Virtual Memory Management) through the DMAR ACPI
tables. This feature offers fully-protected I/O resource-sharing across the Intel platforms,
providing the user with greater reliability, security and availability in networking and datasharing. The settings are Enable and Disable.
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PPIN Control
Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN) in the system.
The options are Unlock/Enable and Unlock/Disable.
Hardware Prefetcher (Available when supported by the CPU)
If this feature is set to Enable, the hardware prefetcher will prefetch streams of data and
instructions from the main memory to the Level 2 (L2) cache to improve CPU performance.
The options are Disable and Enable.
Adjacent Cache Prefetch (Available when supported by the CPU)
Select Enable for the CPU to prefetch both cache lines for 128 bytes as comprised. Select
Disable for the CPU to prefetch both cache lines for 64 bytes. The options are Disable and
Enable.
Note: Please power off and reboot the system for the changes you've made to take
effect. Please refer to Intel’s website for detailed information.
DCU Streamer Prefetcher (Available when supported by the CPU)
If this item is set to Enable, the DCU (Data Cache Unit) streamer prefetcher will prefetch data
streams from the cache memory to the DCU (Data Cache Unit) to speed up data accessing
and processing for CPU performance enhancement. The options are Disable and Enable.
DCU IP Prefetcher
If this item is set to Enable, the IP prefetcher in the DCU (Data Cache Unit) will prefetch IP
addresses to improve network connectivity and system performance. The options are Enable
and Disable.
LLC Prefetch
If this feature is set to Enable, LLC (hardware cache) prefetching on all threads will be
supported. The options are Disable and Enable.
Extended APIC (Extended Advanced Programmable Interrupt Controller)
Based on the Intel Hyper-Threading technology, each logical processor (thread) is assigned
256 APIC IDs (APIDs) in 8-bit bandwidth. When this feature is set to Enable, the APIC ID
will be expanded from 8 bits to 16 bits to provide 512 APIDs to each thread to enhance CPU
performance. The options are Disable and Enable.
AES-NI
Select Enable to use the Intel Advanced Encryption Standard (AES) New Instructions (NI) to
ensure data security. The options are Enable and Disable.
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Advanced
Power Management Configuration
CPU P State Control
SpeedStep (PStates)
EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically adjust
processor voltage and core frequency in an effort to reduce power consumption and heat
dissipation. Please refer to Intel’s website for detailed information. The options are Disable
and Enable.
EIST PSD Function (Available when SpeedStep is set to Enable)
Use this item to configure the processor's P-State coordination settings. During a P-State,
the voltage and frequency of the processor will be reduced when it is in operation. This
makes the processor more energy efficient, resulting in further energy gains. The options
are HW_ALL, SW_ALL and SW-ANY.
Turbo Mode (Available when SpeedStep is set to Enable)
Select Enable for processor cores to run faster than the frequency specified by the
manufacturer. The options are Disable and Enable.
Hardware PM (Power Management) State Control
Hardware P-States
If this feature is set to Disable, hardware will choose a P-state setting for the system based
on an OS request. If this feature is set to Native Mode, hardware will choose a P-state
setting based on OS guidance. If this feature is set to Native Mode with No Legacy Support,
hardware will choose a P-state setting independently without OS guidance. The options
are Disable, Native Mode, Out of Band Mode, and Native Mode with No Legacy Support.
CPU C State Control
Autonomous Core C-State
Select Enable to support Autonomous Core C-State control which will allow the processor
core to control its C-State setting automatically and independently. The options are Enable
and Disable.
CPU C6 Report
Select Enable to allow the BIOS to report the CPU C6 state (ACPI C3) to the operating
system. During the CPU C6 state, power to all caches is turned off. The options are Auto,
Enable, and Disable.
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Enhanced Halt State (C1E)
Select Enable to enable "Enhanced Halt State" support, which will significantly reduce the
CPU's power consumption by minimizing CPU's clock cycles and reduce voltage during a
"Halt State." The options are Disable and Enable.
Package C State Control
Package C State
Use this feature to set the limit on the C-State package register. The options are C0/1 state,
C2 state, C6 (non-Retention) state, C6 (Retention) state, No Limit, and Auto.
Chipset
Configuration
Warning: Setting the wrong values in the following sections may cause the system to malfunction.
North
Bridge
This feature allows the user to configure the settings for the Intel North Bridge.
UPI (Ultra Path Interconnect) Configuration
This section displays the following UPI General Configuration information:
•Number of CPU
•Number of IIO
•Current UPI Link Speed
•Current UPI Link Frequency
•UPI Global MMIO Low Base/Limit
•UPI Global MMIO High Base/Limit
•UPI PCI-E Configuration Base/Size
Degrade Precedence
Use this feature to select the degrading precedence option for Ultra Path Interconnect
connections. Select Topology Precedent to degrade UPI features if system options are in
conflict. Select Feature Precedent to degrade UPI topology if system options are in conflict.
The options are Topology Precedence and Feature Precedence.
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Link L0p Enable
Select Enable to enable Link L0p. The options are Disable, Enable, and Auto.
Link L1 Enable
Select Enable to enable Link L1 (Level 1 link). The options are Disable, Enable, and Auto.
IO Directory Cache
Select Enable for the IODC (I/O Directory Cache) to generate snoops instead of generating
memory lockups for remote IIO (InvIToM) and/or WCiLF (Cores). Select Auto for the IODC to
generate snoops (instead of memory lockups) for WCiLF (Cores). The options are Disable,
Auto, Enable for Remote InvItoM Hybrid Push, InvItoM AllocFlow, Enable for Remote
InvItoM Hybrid AllocNonAlloc, and Enable for Remote InvItoM and Remote WViLF.
Isoc Mode
Select Enable to enable Isochronous support to meet QoS (Quality of Service) requirements.
This feature is especially important for Virtualization Technology. The options are Disable,
Enable, and Auto.
Memory Configuration
Enforce POR
Select POR to enforce POR restrictions for DDR4 memory frequency and voltage
programming. The options are POR and Disable.
Memory Frequency
Use this feature to set the maximum memory frequency for onboard memory modules. The
options are Auto, 1866, 2000, 2133, 2200, 2400, 2600, and 2666.
Data Scrambling for NVDIMM
Select Enable to enable data scrambling for onboard NVDIMM memory to enhance system
performance and security. The options are Auto, Disable, and Enable.
Data Scrambling for DDR4
Select Enable to enable data scrambling for DDR4 memory to enhance system performance
and security. The options are Auto, Disable, and Enable.
tCCD_L Relaxation
If this feature is set to Enable, SPD (Serial Presence Detect) will override tCCD_L ("Column
to Column Delay-Long", or “Command to Command Delay-Long” on the column side.) If
this feature is set to Disable, tCCD_L will be enforced based on the memory frequency.
The options are Enable and Disable.
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Enable ADR
Select Enable for ADR (Automatic Diagnostic Repository) support to enhance memory
performance. The options are Enable and Disable.
Memory Topology
This item displays the information of onboard memory modules as detected by the
BIOS.
•P1 DIMMA1
•P1 DIMMB1
•P2 DIMMA1
•P2 DIMMB1
Memory RAS (Reliability_Availability_Serviceability) Configuration
Use this submenu to configure the following Memory RAS settings.
Static Virtual Lockstep Mode
Select Enable to support Static Virtual Lockstep mode to enhance memory performance.
The options are Enable and Disable.
Mirror Mode
Select Enable to set all 1LM/2LM memory installed in the system on the mirror mode, which
will create a duplicate copy of data stored in the memory to increase memory security, but
it will reduce the memory capacity into half. The options are Enable and Disable.
Memory Rank Sparing
Select Enable to support memory-rank sparing to optimize memory performance. The
options are Enable and Disable.
Note: This item will not be available when memory mirror mode is enabled.
Memory Correctable Error Threshold
Use this item to enter the threshold value for correctable memory errors. The default setting
is 10.
SDDC
Select Enable for SDDC (Single Device Data Correction) support, which will increase the
reliability and serviceability of your system memory. The options are Enable and Disable.
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ADDDC (Adaptive Double Device Data Correction) Sparing
Select Enable for ADDDC sparing support to enhance memory performance. The options
are Enable and Disable.
Patrol Scrub
Patrol Scrubbing is a process that allows the CPU to correct correctable memory errors
detected in a memory module and send the corrections to the requestor (the original
source). When this item is set to Enable, the IO hub will read and write back one cache line
every 16K cycles if there is no delay caused by internal processing. By using this method,
roughly 64 GB of memory behind the IO hub will be scrubbed every day. The options are
Enable and Disable.
Patrol Scrub Interval
Use this item to specify the number of hours (between 0 to 24) required for the system to
complete a full patrol scrubbing. Enter 0 for patrol scrubbing to be performed automatically.
The default setting is 24.
Note: This item is hidden when Patrol Scrub item is set to Disable.
IIO Configuration
EV DFX (Device Function On-Hide) Features
When this feature is set to Enable, the EV_DFX Lock Bits that are located in a processor
will always remain clear during electric tuning. The options are Disable and Enable.
CPU1 Configuration/CPU2 Configuration
IOU0 (IIO PCIe Br1)
This item configures the PCI-E Bifuraction setting for a PCI-E port specified by the user.
The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU1 (IIO PCIe Br2)
This item configures the PCI-E Bifuraction setting for a PCI-E port specified by the user.
The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU2 (IIO PCIe Br3)
This item configures the PCI-E Bifuraction setting for a PCI-E port specified by the user.
The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
MCP0 (IIO PCIe Br4)
This item configures the PCI-E Bifuraction setting for a PCI-E port specified by the user.
The options are x16 and Auto.
MCP1 (IIO PCIe Br5)
This item configures the PCI-E Bifuraction setting for a PCI-E port specified by the user.
The options are x16 and Auto.
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Socket 0 PCI-E Br0D00F0 - Port 0/DMI (Available for CPU 1 Configuration
only)
Link Speed
This item configures the link speed of a PCI-E port specified by the user. The options
are Auto, Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3
(Generation 3) (8 GT/s)
The following information will be displayed as well:
•PCI-E Port Link Status
•PCI-E Port Link Max
•PCI-E Port Link Speed
PCI-E Port Max (Maximum) Payload Size (Available for CPU 1 Configuration only)
Select Auto for the system BIOS to automatically set the maximum payload value for a
PCI-E device specified by to user to enhance system performance. The options are Auto,
128B, and 256B.
IOAT Configuration
Disable TPH (TLP Processing Hint)
TPH is used for data-tagging with a destination ID and a few important attributes. It can
send critical data to a particular cache without writing through to memory. Select No in this
item for TLP Processing Hint support, which will allow a "TPL request" to provide "hints"
to help optimize the processing of each transaction occurred in the target memory space.
The options are Yes and No.
Prioritize TPH (TLP Processing Hint)
Select Yes to prioritize the TPL requests that will allow the "hints" to be sent to help facilitate
and optimize the processing of certain transactions in the system memory. The options are
Enable and Disable.
Relaxed Ordering
Select Enable to enable Relaxed Ordering support which will allow certain transactions to
violate the strict-ordering rules of PCI and to be completed prior to other transactions that
have already been enqueued. The options are Disable and Enable.
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Intel VT for Directed I/O (VT-d)
Intel® VT for Directed I/O (VT-d)
Intel® VT for Directed I/O (VT-d)
Select Enable to use Intel Virtualization Technology support for Direct I/O VT-d by reporting
the I/O device assignments to the VMM (Virtual Machine Monitor) through the DMAR
ACPI tables. This feature offers fully-protected I/O resource sharing across Intel platforms,
providing greater reliability, security and availability in networking and data-sharing. The
options are Enable and Disable.
Interrupt Remapping
Select Enable for Interrupt Remapping support to enhance system performance. The
options are Enable and Disable.
PassThrough DMA
Select Enable for the Non-Iscoh VT-d engine to pass through DMA (Direct Memory Access)
to enhance system performance. The options are Enable and Disable.
ATS
Select Enable to enable ATS (Address Translation Services) support for the Non-Iscoh VT-d
engine to enhance system performance. The options are Enable and Disable.
Posted Interrupt
Select Enable to support VT_D Posted Interrupt which will allow external interrupts to be
sent directly from a direct-assigned device to a client machine in non-root mode to improve
virtualization efficiency by simplifying interrupt migration and lessening the need of physical
interrupts. The options are Enable and Disable.
Coherency Support (Non-Isoch)
Select Enable for the Non-Iscoh VT-d engine to pass through DMA (Direct Memory Access)
to enhance system performance. The options are Enable and Disable.
Intel® VMD Technology
Intel® VMD for Onboard NVMe
VMD Configuration Onboard NVMe\
Onboard NVMe Mode
Select Legacy Mode for the onboard NVMe devices to support Legacy Mode. The options
are Legacy Mode and the VMD Mode.
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IIO-PCIE Express Global Options
The section allows the user to configure the following PCI-E global options:
PCE-E Hot Plug
Select Enable to support Hot-plugging for the selected PCI-E slots which will allow the user
to replace the devices installed in the slots without shutting down the system. The options
are Enable and Disabled.
PCI-E Completion Timeout (Global)
Use this item to select the PCI-E Completion Time-out settings. The options are Yes, No,
and Per-Port.
South Bridge
The following South Bridge information will display:
•USB Module Version
•USB Devices
Legacy USB Support
Select Enabled to support onboard legacy USB devices. Select Auto to disable legacy support
if there are no legacy USB devices present. Select Disable to have all USB devices available
for EFI applications only. The options are Enabled, Disabled and Auto.
XHCI Hand-Off
This is a work-around solution for operating systems that do not support XHCI (Extensible
Host Controller Interface) hand-off. The XHCI ownership change should be claimed by the
XHCI driver. The options are Enabled and Disabled.
Port 60/64 Emulation
Select Enabled for I/O port 60h/64h emulation support, which in turn, will provide complete
legacy USB keyboard support for the operating systems that do not support legacy USB
devices. The options are Enabled and Disabled.
Port 61h Bit-4 Emulation
Select Enabled for I/O Port 61h-Bit 4 emulation support to enhance system performance. The
options are Enabled and Disabled.
Install Windows 7 USB Support
Select Enabled to install the Windows 7 USB utility to support legacy USB devices for Windows
7 systems. The options are Enabled and Disabled.
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Server
ME (Management Engine) Configuration
This feature displays the following system ME configuration settings.
Operational Firmware Version
Backup Firmware Version
Recovery Firmware Version
ME Firmware Status #1
ME Firmware Status #2
Current State
Error Code
SATA
Configuration
When this submenu is selected, the AMI BIOS automatically detects the presence of the SATA
devices that are supported by the Intel PCH chip and displays the following items:
SATA Controller
This item enables or disables the onboard SATA controller supported by the Intel PCH chip.
The options are Enable and Disable.
Configure SATA as (Available when the item above: SATA Controller is set to
enabled)
Select AHCI to configure a SATA drive specified by the user as an AHCI drive. Select RAID
to configure a SATA drive specified by the user as a RAID drive. The options are AHCI and
RAID. (Note: This item is hidden when the SATA Controller item is set to Disabled.)
SATA HDD Unlock
Select Enable to unlock SATA HDD password in the OS. The options are Enable and Disable.
SATA/sSATA RAID Boot Select (Available when the item "Configure SATA as" is set
to "RAID")
This feature allows the user to decide which controller should be used for system boot. The
options are None, SATA Controller, sSATA Controller, and Both.
Aggressive Link Power Management
When this item is set to Enabled, the SATA AHCI controller manages the power use of the
SATA link. The controller will put the link in a low power mode during an extended period of
I/O inactivity, and will return the link to an active state when I/O activity resumes. The options
are Enable and Disable.
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SATA RAID Option ROM/UEFI Driver (Available when the item "Configure SATA as"
is set to "RAID")
Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for
system boot. The options are Disable, EFI, and Legacy.
SATA Port 0 - SATA Port 7
Hot Plug
Select Enable to support Hot-plugging for the device installed on a selected SATA port
which will allow the user to replace the device installed in the slot without shutting down
the system. The options are Enable and Disable.
Spin Up Device
On an edge detect from 0 to 1, set this item to allow the SATA device installed on the SATA
port specified by the user to start a COMRESET initialization. The options are Enable and
Disable.
SATA Device Type
Use this item to specify if the device installed on the SATA port selected by the user should
be connected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk Drive
and Solid State Drive.
sSATA
Configuration
When this submenu is selected, AMI BIOS automatically detects the presence of the sSATA
devices that are supported by the sSATA controller and displays the following items:
sSATA Controller
This item enables or disables the onboard sSATA controller supported by the Intel SCU. The
options are Enable and Disable.
Configure sSATA as
Select AHCI to configure an sSATA drive specified by the user as an AHCI drive. Select RAID
to configure an sSATA drive specified by the user as a RAID drive. The options are AHCI
and RAID. (Note: This item is hidden when the sSATA Controller item is set to Disabled.)
SATA HDD Unlock
Select Enable to unlock sSATA HDD password in the OS. The options are Enable and Disable.
SATA/sSATA RAID Boot Select (Available when the item "Configure SATA as" is set
to "RAID")
This feature allows the user to decide which controller should be used for system boot. The
options are None, SATA Controller, sSATA Controller, and Both.
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Support Aggressive Link Power Management
When this item is set to Enable, the sSATA AHCI controller manages the power use of the
SATA link. The controller will put the link in a low power mode during an extended period of
I/O inactivity, and will return the link to an active state when I/O activity resumes. The options
are Disable and Enable.
sSATA RAID Option ROM/UEFI Driver (Available when the item "Configure SATA as"
is set to "RAID")
Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for
system boot. The options are Disable, EFI, and Legacy.
sSATA Port 0 - sSATA Port 5
Hot Plug
Select Enable to support Hot-plugging for the device installed on an sSATA port selected by
the user which will allow the user to replace the device installed in the slot without shutting
down the system. The options are Disable and Enabled.
Spin Up Device
On an edge detect from 0 to 1, set this item to allow the sSATA device installed on the
sSATA port specified by the user to start a COMRESET initialization. The options are
Enable and Disable.
sSATA Device Type
Use this item to specify if the device installed on the sSATA port specified by the user
should be connected to a Solid State drive or a Hard Disk Drive. The options are Hard
Disk Drive and Solid State Drive.
PCIe/PCI/PnP
Configuration
The following PCI information will be displayed:
•PCI Bus Driver Version
•PCI Devices Common Settings:
Above 4G Decoding (Available if the system supports 64-bit PCI decoding)
Select Enabled to decode a PCI device that supports 64-bit in the space above 4G Address.
The options are Enabled and Disabled.
SR-IOV Support (Available if the system supports Single-Root Virtualization)
Select Enabled for Single-Root IO Virtualization support. The options are Enabled and
Disabled.
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MMIOHBase
Use this item to select the base memory size according to memory-address mapping for the
IO hub. The base memory size must be between 4032G to 4078G. The options are 56T,
48T, 24T, 16T, 4T, and 1T.
MMIO High Granularity Size
Use this item to select the high memory size according to memory-address mapping for the
IO hub. The options are 1G, 4G, 16G, 64G, 256G, and 1024G.
PCI PERR/SERR Support
Use this feature to enable or disable the runtime event for SERR (System Error)/ PERR (PCI/
PCI-E Parity Error). The options are Disabled and Enabled.
Maximum Read Request
Select Auto for the system BIOS to automatically set the maximum size for a read request
for a PCI-E device to enhance system performance. The options are Auto, 128 Bytes, 256
Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.
MMCFG Base
This feature determines the lowest MMCFG (Memory-Mapped Configuration) base assigned
to PCI devices. The options are 1G, 1.5G, 1.75G. 2G, 2.25G, and 3G.
VGA Priority
Use this item to select the graphics device to be used as the primary video display for system
boot. The options are Auto, Onboard and Offboard.
PCI Devices Option ROM Settings
Onboard NVME1/NVME2 OPROM
Select EFI to allow the user to boot the computer using an EFI (Expansible Firmware Interface)
device installed on the NVME connector specified by the user. Select Legacy to allow the
user to boot the computer using a legacy device installed on the NVME connector specified
by the user. The options are Disabled, Legacy and EFI.
CPU1 Slot 1 PCI-E x8 OPROM/CPU1 Slot 2 PCI-E x16 OPROM/CPU1 Slot 3 PCI-E x8
OPROM/CPU2 Slot 4 PCI-E x16 OPROM/CPU2 Slot 5 PCI-E x16 OPROM/CPU2 Slot 6
PCI-E x16 OPROM/
Select EFI to allow the user to boot the computer using an EFI (Expansible Firmware Interface)
device installed on the PCI-E slot specified by the user. Select Legacy to allow the user to
boot the computer using a legacy device installed on the PCI-E slot specified by the user. The
options are Disabled, Legacy and EFI. (Note: Riser card names may differ in each system.)
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Onboard Video Option ROM
Use this feature to select the Onboard Video Option ROM type. The options are Disabled,
Legacy and EFI.
Onboard LAN1 Option ROM
Use this feature to select the type of device installed in LAN Port1 used for system boot. The
options are Legacy, EFI and Disabled.
Onboard LAN2 Option ROM
Use this feature to select the type of device installed in LAN Port2 used for system boot. The
options are Legacy, EFI and Disabled.
Network Stack Configuration
Network Stack
Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Unified Extensible
Firmware Interface) for network stack support. The options are Enabled and Disabled.
*If "Network Stack" is set to Enabled, the following items will display:
Ipv4 PXE Support
Select Enabled to enable Ipv4 PXE boot support. If this feature is disabled, it will not create
the Ipv4 PXE boot option. The options are Disabled and Enabled.
Ipv4 HTTP Support
Select Enabled to enable Ipv4 HTTP boot support. If this feature is disabled, it will not create
the Ipv4 HTTP boot option. The options are Enabled and Disabled.
Ipv6 PXE Support
Select Enabled to enable Ipv6 PXE boot support. If this feature is disabled, it will not create
the Ipv6 PXE boot option. The options are Disabled and Enabled.
Ipv6 HTTP Support
Select Enabled to enable Ipv6 HTTP boot support. If this feature is disabled, it will not create
the Ipv6 HTTP boot option. The options are Enabled and Disabled.
PXE Boot Wait Time
Use this feature to select the wait time to press the <ESC> key to abort the PXE boot. The
default is 0.
Media Detect Time
Use this feature to select the wait time in seconds for the BIOS ROM to detect the LAN media
(Internet connection or LAN port). The default is 1.
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Super IO Configuration
Super IO Chip AST2500
Serial Port 1 Configuration
Serial Port
Select Enabled to enable the onboard serial port specified by the user. The options are
Enabled and Disabled.
Device Settings
This item displays the base I/O port address and the Interrupt Request address of a serial
port specified by the user.
Note: This item is hidden when Serial Port 1 is set to Disabled.
Change Settings
This feature specifies the base I/O port address and the Interrupt Request address of Serial
Port 1. Select Auto for the BIOS to automatically assign the base I/O and IRQ address to a
serial port specified.
The options for Serial Port 1 are Auto, (IO=3F8h; IRQ=4), (IO=3F8h; IRQ=3, 4, 5, 6, 7, 9,
10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3, 4, 5, 6, 7, 9, 10,
11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).
Serial Port 2 Configuration
Serial Port
Select Enabled to enable the onboard serial port specified by the user. The options are
Enabled and Disabled.
Device Settings
This item displays the base I/O port address and the Interrupt Request address of a serial
port specified by the user.
Note: This item is hidden when Serial Port 1 is set to Disabled.
Change Settings
This feature specifies the base I/O port address and the Interrupt Request address of Serial
Port 2. Select Auto for the BIOS to automatically assign the base I/O and IRQ address to a
serial port specified. The options for Serial Port 2 are Auto, (IO=2F8h; IRQ=3), (IO=3F8h;
IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3,
4, 5, 6, 7, 9, 10, 11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).
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Serial Port 2 Attribute
Select SOL to use COM Port 2 as a Serial_Over_LAN (SOL) port for console redirection.
The options are COM and SOL.
Serial
Port Console Redirection
COM 1 Console Redirection
Select Enabled to enable COM Port 1 for Console Redirection, which will allow a client
machine to be connected to a host machine at a remote site for networking. The options are
Enabled and Disabled.
*If the item above set to Enabled, the following items will become available for configuration:
Console Redirection Settings (for COM1)
Terminal Type
Use thid feature to select the target terminal emulation type for Console Redirection.
Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key
support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use
UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI,
VT100, VT100+, and VT-UTF8.
Bits Per second
Use this feature to set the transmission speed for a serial port used in Console Redirection.
Make sure that the same speed is used in the host computer and the client computer. A
lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 38400, 57600 and 115200 (bits per second).
Data Bits
Use this feature to set the data transmission size for Console Redirection. The options are
7 (Bits) and 8 (Bits).
Parity
A parity bit can be sent along with regular data bits to detect data transmission errors.
Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select
Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you
do not want to send a parity bit with your data bits in transmission. Select Mark to add a
mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a
parity bit to be sent with your data bits. The options are None, Even, Odd, Mark and Space.
Stop Bits
A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial
data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.
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Flow Control
Use this feature to set the flow control for Console Redirection to prevent data loss caused
by buffer overflow. Send a "Stop" signal to stop sending data when the receiving buffer
is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The
options are None and Hardware RTS/CTS.
VT-UTF8 Combo Key Support
Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals.
The options are Enabled and Disabled.
Recorder Mode
Select Enabled to capture the data displayed on a terminal and send it as text messages
to a remote server. The options are Disabled and Enabled.
Resolution 100x31
Select Enabled for extended-terminal resolution support. The options are Disabled and
Enabled.
Legacy OS Redirection Resolution
Use this feature to select the number of rows and columns used in Console Redirection
for legacy OS support. The options are 80x24 and 80x25.
Putty KeyPad
This feature selects Function Keys and KeyPad settings for Putty, which is a terminal
emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO,
ESCN, and VT400.
Redirection After BIOS Post
Use this feature to enable or disable legacy Console Redirection after BIOS POST. When
the option-Bootloader is selected, legacy Console Redirection is disabled before booting
the OS. When the option-Always Enable is selected, legacy Console Redirection remains
enabled upon OS bootup. The options are Always Enable and Bootloader.
SOL (Serial-Over-LAN)/COM2
Console Redirection (for SOL/COM2)
Select Enabled to use the SOL port for Console Redirection. The options are Enabled and
Disabled.
*If the item above set to Enabled, the following items will become available for user's
configuration:
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Console Redirection Settings (for SOL/COM2)
Use this feature to specify how the host computer will exchange data with the client
computer, which is the remote computer used by the user.
Terminal Type
Use this feature to select the target terminal emulation type for Console Redirection.
Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key
support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use
UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI,
VT100, VT100+, and VT-UTF8.
Bits Per second
Use this feature to set the transmission speed for a serial port used in Console Redirection.
Make sure that the same speed is used in the host computer and the client computer. A
lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 38400, 57600 and 115200 (bits per second).
Data Bits
Use this feature to set the data transmission size for Console Redirection. The options are
7 (Bits) and 8 (Bits).
Parity
A parity bit can be sent along with regular data bits to detect data transmission errors.
Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select
Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you
do not want to send a parity bit with your data bits in transmission. Select Mark to add a
mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a
parity bit to be sent with your data bits. The options are None, Even, Odd, Mark and Space.
Stop Bits
A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial
data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.
Flow Control
Use this feature to set the flow control for Console Redirection to prevent data loss caused
by buffer overflow. Send a "Stop" signal to stop sending data when the receiving buffer
is full. Send a "Start" signal to start data-sending when the receiving buffer is empty. The
options are None and Hardware RTS/CTS.
VT-UTF8 Combo Key Support
Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals.
The options are Enabled and Disabled.
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Recorder Mode
Select Enabled to capture the data displayed on a terminal and send it as text messages
to a remote server. The options are Disabled and Enabled.
Resolution 100x31
Select Enabled for extended-terminal resolution support. The options are Disabled and
Enabled.
Legacy OS Redirection Resolution
Use this feature to select the number of rows and columns used in Console Redirection
for legacy OS support. The options are 80x24 and 80x25.
Putty KeyPad
This feature selects Function Keys and KeyPad settings for Putty, which is a terminal
emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO,
ESCN, and VT400.
Redirection After BIOS Post
Use this feature to enable or disable legacy Console Redirection after BIOS POST
(Power-On Self-Test). When this feature is set to Bootloader, legacy Console Redirection
is disabled before booting the OS. When this feature is set to Always Enable, legacy
Console Redirection remains enabled upon OS boot. The options are Always Enable and
Bootloader.
Legacy
Console Redirection Settings
Legacy Console Redirection Settings
Use the feature to select the COM port to display redirection of Legacy OS and Legacy
OPROM messages. The default setting is COM1.
Serial Port for Out-of-Band Management/Windows Emergency Management
Services (EMS)
The submenu allows the user to configure Console Redirection settings to support Out-ofBand Serial Port management.
Console Redirection (for EMS)
Select Enabled to use a COM port selected by the user for EMS Console Redirection. The
options are Disabled and Enabled.
*If the item above set to Enabled, the following items will become available for user's
configuration:
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EMS Console Redirection Settings
Out-of-Band Management Port
The feature selects a serial port in a client server to be used by the Windows Emergency
Management Services (EMS) to communicate with a remote host server. The options are
COM1 (Console Redirection) and COM2/SOL (Console Redirection).
Terminal Type
Use this feature to select the target terminal emulation type for Console Redirection.
Select VT100 to use the ASCII character set. Select VT100+ to add color and function
key support. Select ANSI to use the extended ASCII character set. Select VT-UTF8 to use
UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI,
VT100, VT100+, and VT-UTF8.
Bits Per Second
This feature sets the transmission speed for a serial port used in Console Redirection.
Make sure that the same speed is used in both host computer and the client computer. A
lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 57600, and 115200 (bits per second).
Flow Control
Use this feature to set the flow control for Console Redirection to prevent data loss caused
by buffer overflow. Send a "Stop" signal to stop data-sending when the receiving buffer
is full. Send a "Start" signal to start data-sending when the receiving buffer is empty. The
options are None, Hardware RTS/CTS, and Software Xon/Xoff.
The setting for each these features is displayed:
Data Bits, Parity, Stop Bits
ACPI
Settings
Use this feature to configure Advanced Configuration and Power Interface (ACPI) power
management settings for your system.
NUMA Support (Available when the OS supports this feature)
Select Enabled to enable Non-Uniform Memory Access support to enhance system performance. The options are Enabled and Disabled.
WHEA Support
Select Enabled to support the Windows Hardware Error Architecture (WHEA) platform and
provide a common infrastructure for the system to handle hardware errors within the Windows
OS environment to reduce system crashes and to enhance system recovery and health
monitoring. The options are Enabled and Disabled.
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High Precision Timer
Select Enabled to activate the High Precision Event Timer (HPET) that produces periodic
interrupts at a much higher frequency than a Real-time Clock (RTC) does in synchronizing
multimedia streams, providing smooth playback and reducing the dependency on other
timestamp calculation devices, such as an x86 RDTSC Instruction embedded in the CPU.
The High Performance Event Timer is used to replace the 8254 Programmable Interval Timer.
The options are Enabled and Disabled.
Trusted
Computing (Available when a TPM device is installed
and detected by the BIOS)
When a TPM (Trusted-Platform Module) device is detected in your machine, the following
information will be displayed.
•TPM2.0 Device Found
•Vendor
•Firmware Version
Security Device Support
If this feature and the TPM jumper (JPT1) on the motherboard are both enabled, the onboard
security (TPM) device will be enabled in the BIOS to enhance data integrity and system
security. Please note that the OS will not show the security device. Neither TCG EFI protocol
nor INT1A interaction will be made available for use. If you have made changes on the setting
on this item, be sure to reboot the system for the change to take effect. The options are
Disable and Enable. If this option is set to Enable, the following screen and items will display:
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•Active PCR Banks
•Available PCR Banks
Pending Operation
Use this feature to schedule a TPM-related operation to be performed by a security (TPM)
device at the next system boot to enhance system data integrity. Your system will reboot to
carry out a pending TPM operation. The options are None and TPM Clear.
Note: Your system will reboot to carry out a pending TPM operation.
Platform Hierarchy (for TPM Version 2.0 and above)
Select Enabled for TPM Platform Hierarchy support which will allow the manufacturer to utilize
the cryptographic algorithm to define a constant key or a fixed set of keys to be used for
initial system boot. This early boot code is shipped with the platform and is included in the
list of "public keys". During system boot, the platform firmware uses this trusted public key
to verify a digital signature in an attempt to manage and control the security of the platform
firmware used in a host system via a TPM device. The options are Enabled and Disabled.
Storage Hierarchy
Select Enabled for TPM Storage Hierarchy support that is intended to be used for non-privacysensitive operations by the platform owner such as an IT professional or the end user. Storage
Hierarchy has an owner policy and an authorization value, both of which can be set and are
held constant (-rarely changed) through reboots. This hierarchy can be cleared or changed
independently of the other hierarchies. The options are Enabled and Disabled.
Endorsement Hierarchy
Select Enabled for Endorsement Hierarchy support, which contains separate controls to
address the user's privacy concerns because the primary keys in this hierarchy are certified
by the TPM or a manufacturer to be constrained to an authentic TPM device that is attached
to an authentic platform. A primary key can be an encrypted, and a certificate can be created
using TPM2_ ActivateCredential. It allows the user to independently enable "flag, policy, and
authorization value" without involving other hierarchies. A user with privacy concerns can
disable the endorsement hierarchy while still using the storage hierarchy for TPM applications
and permitting the platform software to use the TPM. The options are Enabled and Disabled.
PH (Platform Hierarchy) Randomization (for TPM Version 2.0 and above)
Select Enabled for Platform Hierarchy Randomization support, which is used only during the
platform developmental stage. This feature cannot be enabled in the production platforms.
The options are Disabled and Enabled.
TXT Support
Select Enabled to enable Intel Trusted Execution Technology (TXT) support to enhance
system security and data integrity. The options are Disabled and Enabled.
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Note 1: If the option for this item (TXT Support) is set to Enabled, be sure to disable
EV DFX (Device Function On-Hide) support for the system to work properly. (EV DFX
is under "IIO Configuration" in the "Chipset/North Bridge" submenu).
Note 2: For more information on TPM, please refer to the TPM manual at http://www.
supermicro.com/manuals/other.
Intel® Virtual RAID on CPU
When this submenu is selected and the RAID devices are detected, the BIOS screen displays
the following items:
Intel® VROC with VMD Technology 5.0.0.1205
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4.4 Event Logs
Use this feature to configure Event Log settings.
Change SMBIOS Event Log Settings
Enabling/Disabling Options
SMBIOS Event Log
Select Enabled to enable SMBIOS (System Management BIOS) Event Logging during system
boot. The options are Enabled and Disabled.
Erasing Settings
Erase Event Log
Select Enabled to erase all error events in the SMBIOS (System Management BIOS) log
before an event logging is initialized at bootup. The options are No, Yes, Next Reset, and
Yes, Next Reset.
When Log is Full
Select Erase Immediately to immediately erase all errors in the SMBIOS event log when the
event log is full. Select Do Nothing for the system to do nothing when the SMBIOS event log
is full. The options are Do Nothing and Erase Immediately.
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SMBIOS Event Log Standard Settings
Log System Boot Event
Select Enabled to log system boot events. The options are Enabled and Disabled.
MECI (Multiple Event Count Increment)
Enter the increment value for the multiple event counter. Enter a number between 1 to 255.
The default setting is 1.
METW (Multiple Event Count Time Window)
This item is used to determine how long (in minutes) should the multiple event counter wait
before generating a new event log. Enter a number between 0 to 99. The default setting is 60.
Note: Please reboot the system for the changes to take effect.
Customer Options
Log OEM Codes
Select Enabled to log the EFI Status codes as OEM codes if these codes have not been
converted to Legacy. The options are Enabled and Disabled.
Convert OEM Codes
Select Enabled to convert the EFI Status codes to standard SMBIOS codes. Please note that
this option is not available for all EFI Status codes. The options are Enabled and Disabled.
Note: Please reboot the system for the changes to take effect.
View System Event Log
This item allows the user to view the event in the system event log. Select this item and press
<Enter> to view the status of an event in the log. The following categories are displayed:
Date/Time/Error Code/Severity
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4.5 IPMI
Use this feature to configure Intelligent Platform Management Interface (IPMI) settings.
When you select this submenu and press the <Enter> key, the following information will
display:
•IPMI Firmware Revision: This item indicates the IPMI firmware revision used in your system.
•Status of BMC: This item indicates the status of the BMC (Baseboard Management Controller) installed in your system.
System Event Log
Enabling/Disabling Options
SEL Components
Select Enabled for all system event logging at bootup. The options are Enabled and Disabled.
Erasing Settings
Erase SEL
Select Yes, On next reset to erase all system event logs upon next system reboot. Select
Yes, On every reset to erase all system event logs upon each system reboot. Select No to
keep all system event logs after each system reboot. The options are No, Yes, On next reset,
and Yes, On every reset.
When SEL is Full
This feature allows the user to determine what the BIOS should do when the system event
log is full. Select Erase Immediately to erase all events in the log when the system event log
is full. The options are Do Nothing and Erase Immediately.
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Custom EFI Logging Options
Log EFI Status Codes
Select EFI (Extensible Firmware Interface) Status Codes to log EFI status codes. Select Error
Codes to log EFI error codes. Select Progress Code to log the EFI progress code. Select
both to log both EFI error codes and progress codes. The options are Disabled, Both, Error
code and Progress code.
Note: After making changes on a setting, be sure to reboot the system for the changes
to take effect.
BMC Network Configuration
The following items will be displayed:
•IPMI LAN Selection: This item displays the IPMI LAN setting. The default setting is Failover.
•IPMI
Network Link Status: This item displays the IPMI Network Link status. The default
setting is Shared LAN.
•Current Configuration Address Source: This item displays the source of the current IPMI
LAN address. The default setting is CHCP (Dynamic Host Configuration Protocol).
•Station IP Address: This item displays the Station IP address for this computer. This should
be in decimal and in dotted quad form (i.e., 192.168.10.253).
•Subnet Mask: This item displays the sub-network that this computer belongs to. The value
of each three-digit number separated by dots should not exceed 255.
•Station MAC Address: This item displays the Station MAC address for this computer. Mac
addresses are 6 two-digit hexadecimal numbers.
•Gateway
IP Address: This item displays the Gateway IP address for this computer. This
should be in decimal and in dotted quad form (i.e., 192.168.10.253).
•VLAN: This item displays the status of VLAN support.
Update IPMI LAN Configuration
Select Yes for the BIOS to implement all IP/MAC address changes at the next system boot.
The options are No and Yes. If this option is set to Yes, the following items will display:
IPMI LAN Selection
Use this feature to select the type of the IPMI LAN. The options are Dedicated, Shared,
and Failover.
VLAN
Select Enabled to enable IPMI VLAN function support. The options are Enabled and Disabled.
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Configuration Address Source
Use this item to select the IP address source for this computer. If Static is selected, you will
need to know the IP address of this computer and enter it to the system manually in the field.
If DHCP is selected, AMI BIOS will search for a DHCP (Dynamic Host Configuration Protocol)
server attached to the network and request the next available IP address for this computer.
The options are DHCP and Static.
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4.6Security Settings
This menu allows the user to configure the following security settings for the system.
Administrator Password
Use this feature to set the administrator password which is required to enter the BIOS setup
utility. The length of the password should be from 3 characters to 20 characters long.
User Password
Use this feature to set the user password which is required to enter the BIOS setup utility.
The length of the password should be from 3 characters to 20 characters long.
Password Check
Select Setup for the system to check for a password at Setup. Select Always for the system
to check for a password at bootup or upon entering the BIOS Setup utility. The options are
Setup and Always.
Secure
Boot
When you select this submenu and press the <Enter> key, the following items will display:
•System Mode
•Secure Boot
•Vendor Keys
Attempt Secure Boot
If this item is set to Enabled, Secure Boot will be activated when a Platform Key (PK) is
entered. A Platform Key is a security key used to manage the security settings of the platform
firmware used in your system. The options are Enabled and Disabled.
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Secure Boot Mode
Use this feature to select the desired secure boot mode for the system. The options are
Standard and Custom.
Key
Management
Provision Factory Default Keys
Select Enabled to install all manufacturer default keys for the following system security
settings. The options are Enabled and Disabled.
Install
Factor Default Keys
Select Yes to install all manufacturer defaults for the following system security settings. The
options are Yes and No.
Enroll
EFI Image
Select this item and press <Enter> to select an EFI (Extensible Firmware Interface) image
for the system to operate in Secure Boot mode.
Save
All Secure Boot Variables
This feature allows the user to set and save the secure boot key variables specified by the
user.
Secure Boot Variables
Secure Boot Variable/Size/Key#/Key Sources
Platform
Key (PK)
This feature allows the user to enter and configure a set of values to be used as a platform
firmware key for the system. This set of values also indicate the size, the keys numbers,
and the key source of the Platform Key. The options are Save to File, Set New, and Erase.
Key
Exchange Keys
This feature allows the user to enter and configure a set of values to be used as a KeyExchange-Keys for the system. This set of values also indicate the size, the keys numbers,
and the key source of the Key-Exchange-Keys. The options are Save to File, Set New, and
Erase.
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Authorized
Signatures
This feature allows the user to enter and configure a set of values to be used as Authorized
Signatures for the system. This set of values also indicate the size, the keys numbers, and
the key source of the Authorized Signatures. The options are Set New and Append.
Secure Boot Variable/Size/Key#/Key Sources The options are Save to File, Set New, and
Erase.
Forbidden
Signatures
This feature allows the user to enter and configure a set of values to be used as Forbidden
Signatures for the system. This set of values also indicate the size, the keys numbers, and the
key source of the Forbidden Signatures. The options are Save to File, Set New, and Erase.
Authorized
TimeStamps
This feature allows the user to set and save the timestamps for Authorized Signatures to
indicate when these signatures were entered into the system. The options are Save to File,
Set New, and Erase.
OsRecovery
Signatures
This feature allows the user to set and save the Authorized Signatures used for OS recovery.
The options are Save to File, Set New, and Erase.
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4.7Boot Settings
Use this feature to configure Boot Settings:
Boot Mode Select
Use this feature to select the type of devices that the system is going to boot from. The options
are Legacy, UEFI (Unified Extensible Firmware Interface), and Dual.
Fixed Boot Order Priorities
This feature prioritizes the order of a bootable device from which the system will boot. Press
<Enter> on each entry from top to bottom to select devices.
When the item above -"Boot Mode Select" is set to Dual (default), the following items will be
displayed for configuration:
•Boot Option #1 - Boot Option #15
When the item above -"Boot Mode Select" is set to Legacy, the following items will be display
for configuration:
•Boot Option
#1 - Boot Option #7
When the item above -"Boot Mode Select" is set to UEFI, the following items will be display
for configuration:
•Boot Option #1 - Boot Option #8
Add New Boot Option
This feature allows the user to add a new boot option to the boot priority features for your
system.
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Add Boot Option
Use this item to specify the name for the new boot option.
Path for Boot Option
Use this feature to enter the path for the new boot option in the format fsx:\path\filename.efi.
Boot Option File Path
Use this feature to specify the file path for the new boot option.
Create
After the name and the file path for the boot option are set, press <Enter> to create the
new boot option in the boot priority list.
Delete Boot Option
Use this feature to select a boot device to delete from the boot priority list.
Delete Boot Option
Use this feature to remove an EFI boot option from the boot priority list.
Add New Driver Option
Use this feature to select a new driver to add to the boot priority list.
Add Driver Option
Use this feature to specify the name of the driver that the new boot option is added to.
Path for Drover Option
Use this feature to specify the path to the driver that the new boot option is added to.
Driver Option File Path
Use this feature to specify the file path of the driver that the new boot option is added to.
Create
After the driver option name and the file path are set, press <Enter> to enter to submenu
and click OK to create the new boot option drive.
Delete Driver Option
Use this item to select a boot driver to delete from the boot priority list.
Delete Drive Option
Select the target boot driver to delete from the boot priority list.
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Hard Disk Drive BBS Priorities
•Boot Option #1 - #5
Network Drive BBS Priorities
•Boot Option #1
USB Key Drive BBS Priorities
•Boot Option #1
UEFI Hard Disk Drive BBS Priorities
•Boot Option #1
UEFI USB Key Drive BBS Priorities
•Boot Option #1
UEFI Application Boot Priorities
•Boot Option #1
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4.8 Save & Exit
Select the Save & Exit tab from the BIOS setup screen to configure the settings below.
Save Options
Discard Changes and Exit
Select this option to quit the BIOS setup without making any permanent changes to the
system configuration and reboot the computer. Select Discard Changes and Exit from the
Exit menu and press <Enter>.
Save Changes and Reset
When you have completed the system configuration changes, select this option to leave the
BIOS setup utility and reboot the computer for the new system configuration parameters to
take effect. Select Save Changes and Exit from the Exit menu and press <Enter>.
Save Changes
When you have completed the system configuration changes, select this option to save all
changes made. This will not reset (reboot) the system.
Discard Changes
Select this option and press <Enter> to discard all the changes and return to the AMI BIOS
setup utility.
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Default Options
Restore Optimized Defaults
To set this feature, select Restore Defaults from the Exit menu and press <Enter> to load
manufacturer default settings which are intended for maximum system performance but not
for maximum stability.
Save As User Defaults
To set this feature, select Save as User Defaults from the Exit menu and press <Enter>. This
enables the user to save any changes to the BIOS setup for future use.
Restore User Defaults
To set this feature, select Restore User Defaults from the Exit menu and press <Enter>. Use
this feature to retrieve user-defined settings that were saved previously.
Boot Override
This feature allows the user to override the Boot priorities sequence in the Boot menu, and
immediately boot the system with a device specified by the user instead of the one specified
in the boot list. This is a one-time override.
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Appendix A
BIOS Codes
A.1BIOS Error POST (Beep) Codes
During the POST (Power-On Self-Test) routines, which are performed each time the system
is powered on, errors may occur.
Non-fatal errors are those which, in most cases, allow the system to continue the boot-up
process. The error messages normally appear on the screen.
Fatal errors are those which will not allow the system to continue the boot-up procedure. If
a fatal error occurs, you should consult with your system manufacturer for possible repairs.
These fatal errors are usually communicated through a series of audible beeps. The numbers
on the fatal error list (on the following page) correspond to the number of beeps for the
corresponding error. All errors listed, with the exception of Beep Code 8, are fatal errors.
BIOS Beep (POST) Codes
Beep Code
Error Message
Description
1 beep
Refresh
Circuits have been reset (Ready to power up)
5 short, 1 long
Memory error
No memory detected in system
5 long, 2 short
Display memory read/write error
Video adapter missing or with faulty memory
1 long continuous
System OH
System overheat condition
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Appendix A: BIOS Codes
A.2Additional BIOS POST Codes
The AMI BIOS supplies additional checkpoint codes, which are documented online at http://
www.supermicro.com/support/manuals/ ("AMI BIOS POST Codes User's Guide").
When BIOS performs the Power On Self Test, it writes checkpoint codes to I/O port 0080h.
If the computer cannot complete the boot process, a diagnostic card can be attached to the
computer to read I/O port 0080h (Supermicro p/n AOC-LPC80-20).
For information on AMI updates, please refer to http://www.ami.com/products/.
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Appendix B
Software Installation
B.1Installing Software Programs
The Supermicro FTP site contains drivers and utilities for your system at ftp://ftp.supermicro.
com. Some of these must be installed, such as the chipset driver.
After accessing the FTP site, go into the CDR_Images directory and locate the ISO file for
your motherboard. Download this file to create a CD/DVD of the drivers and utilities it contains.
(You may also use a utility to extract the ISO file if preferred.)
After creating a CD/DVD with the ISO files, insert the disk into the CD/DVD drive on your
system and the display shown in Figure B-1 should appear.
Another option is to go to the Supermicro website at http://www.supermicro.com/products/.
Find the product page for your motherboard here, where you may download individual drivers
and utilities to your hard drive or a USB flash drive and install from there.
Note: To install the Windows OS, please refer to the instructions posted on our website
at http://www.supermicro.com/support/manuals/.
Figure B-1. Driver/Tool Installation Display Screen
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Appendix B: Software Installation
Click the icons showing a hand writing on the paper to view the readme files for each item.
Click a computer icon to the right of an item to install an item (from top to the bottom) one
at a time. After installing each item, you must reboot the system before proceeding with the
next item on the list. The bottom icon with a CD on it allows you to view the entire contents
of the CD.
When making a storage driver diskette by booting into a driver CD, please set the SATA
Configuration to "Compatible Mode" and configure SATA as IDE in the BIOS Setup. After
making the driver diskette, be sure to change the SATA settings back to your original settings.
B.2SuperDoctor® 5
The Supermicro SuperDoctor 5 is a hardware monitoring program that functions in a
command-line or web-based interface in Windows and Linux operating systems. The program
monitors system health information such as CPU temperature, system voltages, system
power consumption, fan speed, and provides alerts via email or Simple Network Management
Protocol (SNMP).
SuperDoctor 5 comes in local and remote management versions and can be used with
Nagios to maximize your system monitoring needs. With SuperDoctor 5 Management Server
(SSM Server), you can remotely control power on/off and reset chassis intrusion for multiple
systems with SuperDoctor 5 or IPMI. SD5 Management Server monitors HTTP, FTP, and
SMTP services to optimize the efficiency of your operation.
Note: The default Username and Password for SuperDoctor 5 is ADMIN / ADMIN.
Figure B-2. SuperDoctor 5 Interface Display Screen (Health Information)
Note: The SuperDoctor 5 program and user’s manual can be downloaded from the
Supermicro website at http://www.supermicro.com/products/nfo/sms_sd5.cfm.
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Appendix C
Standardized Warning Statements
The following statements are industry standard warnings, provided to warn the user of
situations which have the potential for bodily injury. Should you have questions or experience
difficulty, contact Supermicro's Technical Support department for assistance. Only certified
technicians should attempt to install or configure components.
Read this section in its entirety before installing or configuring components.
These warnings may also be found on our website at http://www.supermicro.com/about/
policies/safety_information.cfm.
Battery Handling
Warning! There is the danger of explosion if the battery is replaced incorrectly. Replace
the battery only with the same or equivalent type recommended by the manufacturer.
Dispose of used batteries according to the manufacturer's instructions
電池の取り扱い
電池交換が正しく行われなかった場合、破裂の危険性があります。 交換する電池はメーカーが推
奨する型、
または同等のものを使用下さい。使用済電池は製造元の指示に従って処分して下さい。
警告
电池更换不当会有爆炸危险。请只使用同类电池或制造商推荐的功能相当的电池更换原有电
池。请按制造商的说明处理废旧电池。
警告
電池更換不當會有爆炸危險。請使用製造商建議之相同或功能相當的電池更換原有電池。請按
照製造商的說明指示處理廢棄舊電池。
Warnung
Bei Einsetzen einer falschen Batterie besteht Explosionsgefahr. Ersetzen Sie die Batterie nur
durch den gleichen oder vom Hersteller empfohlenen Batterietyp. Entsorgen Sie die benutzten
Batterien nach den Anweisungen des Herstellers.
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Appendix C: Warning Statements
Attention
Danger d'explosion si la pile n'est pas remplacée correctement. Ne la remplacer que par une
pile de type semblable ou équivalent, recommandée par le fabricant. Jeter les piles usagées
conformément aux instructions du fabricant.
¡Advertencia!
Existe peligro de explosión si la batería se reemplaza de manera incorrecta. Reemplazar la
batería exclusivamente con el mismo tipo o el equivalente recomendado por el fabricante.
Desechar las baterías gastadas según las instrucciones del fabricante.
!‫אזהרה‬
‫ יש להחליף‬.‫קיימת סכנת פיצוץ של הסוללה במידה והוחלפה בדרך לא תקינה‬
.‫את הסוללה בסוג התואם מחברת יצרן מומלצת‬
.‫סילוק הסוללות המשומשות יש לבצע לפי הוראות היצרן‬
‫هناك خطر من انفجار في حالة اسحبذال البطارية بطريقة غير صحيحة فعليل‬
‫اسحبذال البطارية‬
‫فقط بنفس النىع أو ما يعادلها مما أوصث به الشرمة المصنعة‬
‫جخلص من البطاريات المسحعملة وفقا لحعليمات الشرمة الصانعة‬
경고!
배터리가 올바르게 교체되지 않으면 폭발의 위험이 있습니다. 기존 배터리와 동일하거나
제조사에서 권장하는 동등한 종류의 배터리로만 교체해야 합니다. 제조사의 안내에 따라
사용된 배터리를 처리하여 주십시오.
Waarschuwing
Er is ontploffingsgevaar indien de batterij verkeerd vervangen wordt. Vervang de batterij
slechts met hetzelfde of een equivalent type die door de fabrikant aanbevolen wordt. Gebruikte
batterijen dienen overeenkomstig fabrieksvoorschriften afgevoerd te worden.
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Product Disposal
Warning! Ultimate disposal of this product should be handled according to all national
laws and regulations.
製品の廃棄
この製品を廃棄処分する場合、国の関係する全ての法律・条例に従い処理する必要があります。
警告
本产品的废弃处理应根据所有国家的法律和规章进行。
警告
本產品的廢棄處理應根據所有國家的法律和規章進行。
Warnung
Die Entsorgung dieses Produkts sollte gemäß allen Bestimmungen und Gesetzen des Landes
erfolgen.
¡Advertencia!
Al deshacerse por completo de este producto debe seguir todas las leyes y reglamentos
nacionales.
Attention
La mise au rebut ou le recyclage de ce produit sont généralement soumis à des lois et/ou
directives de respect de l'environnement. Renseignez-vous auprès de l'organisme compétent.
‫סילוק המוצר‬
!‫אזהרה‬
.‫סילוק סופי של מוצר זה חייב להיות בהתאם להנחיות וחוקי המדינה‬
‫عند التخلص النهائي من هذا المنتج ينبغي التعامل معه وفقا لجميع القىانين واللىائح الىطنية‬
경고!
이 제품은 해당 국가의 관련 법규 및 규정에 따라 폐기되어야 합니다.
Waarschuwing
De uiteindelijke verwijdering van dit product dient te geschieden in overeenstemming met alle
nationale wetten en reglementen.
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Appendix C: Warning Statements
Notes
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Appendix D
UEFI BIOS Recovery
Warning: Do not upgrade the BIOS unless your system has a BIOS-related issue. Flashing
the wrong BIOS can cause irreparable damage to the system. In no event shall Supermicro
be liable for direct, indirect, special, incidental, or consequential damages arising from a BIOS
update. If you need to update the BIOS, do not shut down or reset the system while the BIOS
is updating to avoid possible boot failure.
D.1Overview
The Unified Extensible Firmware Interface (UEFI) provides a software-based interface
between the operating system and the platform firmware in the pre-boot environment. The
UEFI specification supports an architecture-independent mechanism that will allow the UEFI
OS loader stored in an add-on card to boot the system. The UEFI offers clean, hands-off
management to a computer during system boot.
D.2Recovering the UEFI BIOS Image
A UEFI BIOS flash chip consists of a recovery BIOS block and a main BIOS block (a main
BIOS image). The recovery block contains critical BIOS codes, including memory detection
and recovery codes for the user to flash a healthy BIOS image if the original main BIOS image
is corrupted. When the system power is turned on, the recovery block codes execute first.
Once this process is complete, the main BIOS code will continue with system initialization
and the remaining POST (Power-On Self-Test) routines.
Note 1: Follow the BIOS recovery instructions below for BIOS recovery when the main
BIOS block crashes.
Note 2: When the BIOS recovery block crashes, you will need to follow the procedures
to make a Returned Merchandise Authorization (RMA) request. (For a RMA request,
please see section 3.5 for more information). Also, you may use the Supermicro Update Manager (SUM) Out-of-Band (OOB) (https://www.supermicro.com.tw/products/
nfo/SMS_SUM.cfm) to reflash the BIOS.
D.3Recovering the Main BIOS Block with a USB Device
This feature allows the user to recover the main BIOS image using a USB-attached device
without additional utilities used. A USB flash device such as a USB Flash Drive, or a USB
CD/DVD ROM/RW device can be used for this purpose. However, a USB Hard Disk drive
cannot be used for BIOS recovery at this time.
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Appendix D: UEFI BIOS Recovery
The file system supported by the recovery block is FAT (including FAT12, FAT16, and FAT32)
which is installed on a bootable or non-bootable USB-attached device. However, the BIOS
might need several minutes to locate the SUPER.ROM file if the media size becomes too
large due to the huge volumes of folders and files stored in the device.
To perform UEFI BIOS recovery using a USB-attached device, follow the instructions below.
1. Using a different machine, copy the "Super.ROM" binary image file into the Root "\"
directory of a USB device or a writable CD/DVD.
Note: If you cannot locate the "Super.ROM" file in your drive disk, visit our website at
www.supermicro.com to download the BIOS package. Extract the BIOS binary image
into a USB flash device and rename it "Super.ROM" for the BIOS recovery use.
2. Insert the USB device that contains the new BIOS image ("Super.ROM") into your USB
drive and reset the system when the following screen appears.
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3. After locating the healthy BIOS binary image, the system will enter the BIOS Recovery
menu as shown below.
Note: At this point, you may decide if you want to start the BIOS recovery. If you decide
to proceed with BIOS recovery, follow the procedures below.
4. When the screen as shown above displays, use the arrow keys to select the item
"Proceed with flash update" and press the <Enter> key. You will see the BIOS recovery
progress as shown in the screen below.
Note: Do not interrupt the BIOS flashing process until it has completed.
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Appendix D: UEFI BIOS Recovery
5. After the BIOS recovery process is complete, press any key to reboot the system.
6. Using a different system, extract the BIOS package into a USB flash drive.
7. Press <Del> continuously during system boot to enter the BIOS Setup utility. From the
top of the tool bar, select Boot to enter the submenu. From the submenu list, select Boot
Option #1 as shown below. Then, set Boot Option #1 to [UEFI AP:UEFI: Built-in EFI
Shell]. Press <F4> to save the settings and exit the BIOS Setup utility.
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8. When the UEFI Shell prompt appears, type fs# to change the device directory path. Go
to the directory that contains the BIOS package you extracted earlier from Step 6. Enter
flash.nsh BIOSname.### at the prompt to start the BIOS update process.
Note: Do not interrupt this process until the BIOS flashing is complete.
9. The screen above indicates that the BIOS update process is complete. When you see
the screen above, unplug the AC power cable from the power supply, clear CMOS, and
plug the AC power cable in the power supply again to power on the system.
10. Press <Del> continuously to enter the BIOS Setup utility.
11. Press <F3> to load the default settings.
12. After loading the default settings, press <F4> to save the settings and exit the BIOS
Setup utility.
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(Disclaimer Continued)
The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment, nuclear facilities or systems, aircraft, aircraft devices,
aircraft/emergency communication devices or other critical systems whose failure to perform be reasonably expected to result in significant injury or loss of life or catastrophic
property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products for use in such ultra-hazardous applications, it does so
entirely at its own risk. Furthermore, buyer agrees to fully indemnify, defend and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and
proceedings of any kind arising out of or related to such ultra-hazardous use or sale.