Texas Instruments | LM2904-Q1, LM2904B-Q1 Industry-Standard Dual Operational Amplifiers for Automotive Applications (Rev. H) | Datasheet | Texas Instruments LM2904-Q1, LM2904B-Q1 Industry-Standard Dual Operational Amplifiers for Automotive Applications (Rev. H) Datasheet

Texas Instruments LM2904-Q1, LM2904B-Q1 Industry-Standard Dual Operational Amplifiers for Automotive Applications (Rev. H) Datasheet
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LM2904-Q1, LM2904B-Q1
SLOS414H – MAY 2003 – REVISED DECEMBER 2019
LM2904-Q1, LM2904B-Q1 Industry-Standard Dual Operational Amplifiers for
Automotive Applications
1 Features
3 Description
•
The LM2904-Q1 and LM2904B-Q1 are industrystandard operational amplifiers that have been
qualified for automotive use in accordance to the
AEC-Q100 specifications. The LM2904B-Q1 is the
next-generation version of the LM2904-Q1, which
include two high-voltage (36 V) operational amplifiers
(op amps). The LM2904B-Q1 provides outstanding
value for cost-sensitive applications, with features
including low offset (1 mV, typical), common-mode
input range to ground, and high differential input
voltage capability.
1
•
•
•
•
•
•
AEC Q-100 qualified for automotive applications
– Temperature grade 1: –40°C to +125°C
– Device HBM ESD classification 2
– Device CDM ESD classification C5
Wide supply range of 3 V to 36 V (LM2904B-Q1)
Supply-current of 300 µA per channel (LM2904BQ1, typical)
Unity-gain bandwidth of 1.2 MHz (LM2904B-Q1)
Common-mode input voltage range includes
ground, enabling direct sensing near ground
Low input offset voltage of 3 mV at 25°C
(LM2904B-Q1, maximum)
Internal RF and EMI filter (LM2904B-Q1)
The LM2904B-Q1 simplifies circuit design with
enhanced features such as unity-gain stability, lower
offset voltage of 1 mV (typical), and lower quiescent
current of 300 µA (typical). High ESD (2 kV, HBM)
and integrated EMI and RF filters enable the
LM2904B-Q1 devices to be used in the most rugged,
environmentally challenging applications for the
automotive marketplace.
2 Applications
•
•
•
•
•
•
•
Automotive lighting
Body electronics
Automotive head unit
Telematics control unit
Emergency call (eCall)
Passive safety: brake system
Electric vehicle / hybrid electric:
– Inverter and motor control
– On-board (OBC) and wireless charger
– Battery management system (BMS)
Device Information(1)
PART NUMBER
LM2904B-Q1
LM2904-Q1
PACKAGE
BODY SIZE (NOM)
SOIC (8)
4.90 mm × 3.90 mm
TSSOP (8)(2)
3.00 mm × 4.40 mm
SOT-23 (8)(2)
1.60 mm × 2.90 mm
SOIC (8)
4.90 mm × 3.90 mm
TSSOP (8)
3.00 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
(2) This package is preview only.
Single-Pole, Low-Pass Filter
RG
RF
R1
VOUT
VIN
C1
f-3 dB =
(
RF
VOUT
= 1+
RG
VIN
((
1
1 + sR1C1
1
2pR1C1
(
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM2904-Q1, LM2904B-Q1
SLOS414H – MAY 2003 – REVISED DECEMBER 2019
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
5
7.1
7.2
7.3
7.4
7.5
7.6
5
5
6
6
7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics: LM2904B-Q1 ...................
Electrical Characteristics: LM2904-Q1, LM2904AVQ1, LM2904V-Q1.......................................................
7.7 Typical Characteristics ..............................................
8
9
8
9
Parameter Measurement Information ................ 16
Detailed Description ............................................ 17
9.1 Overview ................................................................. 17
9.2 Functional Block Diagram ....................................... 17
9.3 Feature Description................................................. 18
9.4 Device Functional Modes........................................ 18
10 Application and Implementation........................ 19
10.1 Application Information.......................................... 19
10.2 Typical Application ................................................ 19
11 Power Supply Recommendations ..................... 21
12 Layout................................................................... 21
12.1 Layout Guidelines ................................................. 21
12.2 Layout Examples................................................... 22
13 Device and Documentation Support ................. 23
13.1
13.2
13.3
13.4
13.5
13.6
13.7
Documentation Support ........................................
Related Links ........................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
23
23
23
23
23
23
23
14 Mechanical, Packaging, and Orderable
Information ........................................................... 24
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision G (February 2019) to Revision H
Page
•
Added information on SOT23-8 package to Device Information table ................................................................................... 1
•
Added information on SOT23-8 package to the Device Comparison Table .......................................................................... 3
•
Added the Typical Characteristics section for the LM2904B-Q1 device ................................................................................ 9
•
Added test circuit for THD+N and small-signal step response, G = –1 in the Parameter Measurement Information
section .................................................................................................................................................................................. 16
•
Changed specific voltages to a Recommended Operating Conditions reference................................................................ 17
•
Changed the functional block diagram for LM2904B-Q1 in the Detailed Description section.............................................. 17
Changes from Revision F (April 2008) to Revision G
Page
•
Added Applications section, ESD Ratings table, Feature Description section, Device Functional Modes, Application
and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation
Support section, and Mechanical, Packaging, and Orderable Information section ............................................................... 1
•
Added new device to data sheet ............................................................................................................................................ 1
•
Added AEC-Q100 qualification statement .............................................................................................................................. 1
2
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SLOS414H – MAY 2003 – REVISED DECEMBER 2019
5 Device Comparison Table
(1)
PART NUMBER
SUPPLY
VOLTAGE
AMBIENT
TEMPERATURE
RANGE
VOS
(MAXIMUM AT 25°C)
IQ / CH
(TYPICAL AT 25°C)
INTEGRATED EMI
FILTER
PACKAGE
LM2904B-Q1
3 V to 36 V
–40°C to 125°C
3 mV
300 µA
Yes
D, DDF (1), PW (1)
LM2904-Q1
3 V to 26 V
–40°C to 125°C
7 mV
350 µA
No
D, PW
LM2904V-Q1
3 V to 32 V
–40°C to 125°C
7 mV
350 µA
No
D, PW
LM2904AV-Q1
3 V to 32 V
–40°C to 125°C
2 mV
350 µA
No
D, PW
Packages for this device are preview only.
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Product Folder Links: LM2904-Q1 LM2904B-Q1
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6 Pin Configuration and Functions
D, DDF(1), and PW(1) Packages
8-Pin SOIC, SOT23-8, and TSSOP
Top View
OUT1
1
8
V+
IN1±
2
7
OUT2
IN1+
3
6
IN2±
V±
4
5
IN2+
Not to scale
(1)
Package is preview only.
Pin Functions
PIN
NAME
SOIC, SOT23-8, and TSSOP (1)
I/O
DESCRIPTION
IN1–
2
I
Negative input
IN1+
3
I
Positive input
IN2–
6
I
Negative input
IN2+
5
I
Positive input
OUT1
1
O
Output
OUT2
7
O
Output
V–
4
—
Negative (lowest) supply or ground (for single-supply operation)
V+
8
—
Positive (highest) supply
(1)
4
For a listing of which devices are available in what packages, see the Device Comparison Table section.
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SLOS414H – MAY 2003 – REVISED DECEMBER 2019
7 Specifications
7.1 Absolute Maximum Ratings
over operating ambient temperature range (unless otherwise noted) (1)
MIN
Supply voltage, VS = ([V+] – [V–])
Differential input voltage, VID (2)
Input voltage, VI
Either input
MAX
LM2904B-Q1
40
LM2904V-Q1, LM2904AV-Q1
32
LM2904-Q1
26
LM2904B-Q1, LM2904V-Q1,
LM2904AV-Q1
–32
32
LM2904-Q1
–26
26
LM2904B-Q1
–0.3
40
LM2904V-Q1, LM2904AV-Q1
–0.3
32
LM2904-Q1
–0.3
26
Duration of output short circuit (one amplifier) to V– at (or below) TA = 25°C,
VS ≤ 15 V (3)
Operating ambient temperature, TA
Unlimited
–40
Operating virtual-junction temperature, TJ
Storage temperature, Tstg
(1)
(2)
(3)
–65
UNIT
V
V
V
s
125
°C
150
°C
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Differential voltages are at IN+, with respect to IN−.
Short circuits from outputs to the supply pins can cause excessive heating and eventual destruction.
7.2 ESD Ratings
VALUE
UNIT
LM2904B-Q1
V(ESD)
Electrostatic discharge
Human-body model (HBM), per AEC Q100-002 (1)
±2000
Charged-device model (CDM), per AEC Q100-011
±750
V
LM2904-Q1, LM2904AV-Q1, AND LM2904V-Q1
V(ESD)
(1)
Electrostatic discharge
Human-body model (HBM), per AEC Q100-002 (1)
±1000
Charged-device model (CDM), per AEC Q100-011
±500
V
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
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7.3 Recommended Operating Conditions
over operating ambient temperature range (unless otherwise noted)
VS
Supply voltage, VS = ([V+] – [V–])
VCM
Common-mode voltage
TA
Operating ambient temperature
MIN
MAX
UNIT
LM2904B-Q1
3
36
LM2904AV-Q1, LM2904V-Q1
3
30
LM2904-Q1
3
26
V–
(V+) – 2
V
–40
125
°C
V
7.4 Thermal Information
LM2904-Q1, LM2904AV-Q1, LM2904BQ1,LM2904V-Q1 (2)
THERMAL METRIC (1)
D (SOIC)
PW (TSSOP)
8 PINS
8 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
124.7
171.7
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
66.9
68.8
°C/W
RθJB
Junction-to-board thermal resistance
67.9
99.2
°C/W
ψJT
Junction-to-top characterization parameter
19.2
11.5
°C/W
ψJB
Junction-to-board characterization parameter
67.2
97.9
°C/W
(1)
(2)
6
For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.
For a listing of which devices are available in what packages, see Device Comparison Table.
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SLOS414H – MAY 2003 – REVISED DECEMBER 2019
7.5 Electrical Characteristics: LM2904B-Q1
VS = (V+) – (V–) = 5 V – 36 V (±2.5 V – ±18 V), TA = 25°C, VCM = VOUT = VS / 2, RL = 10k connected to VS / 2
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
±0.3
±3.0
UNIT
OFFSET VOLTAGE
VOS
Input offset voltage
LM2904B-Q1
mV
TA = –40°C to +125°C
dVOS/dT
Input offset voltage drift
PSRR
Power supply rejection ratio
Channel separation, dc
TA = –40°C to +125°C
±4
(1)
f = 1 kHz to 20 kHz
±3.5
12
µV/°C
±2
15
µV/V
±1
µV/V
INPUT VOLTAGE RANGE
VCM
Common-mode voltage range
CMRR
Common-mode rejection ratio
VS = 3 V to 36 V
(V–)
(V+) – 1.5
(V–)
(V+) – 2
V
VS = 5 V to 36 V
TA = –40°C to +125°C
(V–) ≤ VCM ≤ (V+) – 1.5 V
VS = 3 V to 36 V
(V–) ≤ VCM ≤ (V+) – 2.0 V
VS = 5 V to 36 V
20
100
25
316
±10
±35
µV/V
TA = –40°C to +125°C
INPUT BIAS CURRENT
IB
Input bias current
IOS
Input offset current
dIOS/dT
Input offset current drift
nA
TA = –40°C to +125°C (1)
±50
0.5
4
nA
TA = –40°C to +125°C (1)
5
TA = –40°C to +125°C
10
pA/℃
NOISE
En
Input voltage noise
f = 0.1 to 10 Hz
en
Input voltage noise density
f = 1 kHz
3
µVPP
40
nV/√/Hz
10 || 0.1
MΩ || pF
4 || 1.5
GΩ || pF
INPUT IMPEDANCE
ZID
Differential
ZIC
Common-mode
OPEN-LOOP GAIN
AOL
Open-loop voltage gain
VS = 15 V; VO = 1 V to 11 V; RL ≥ 10 kΩ, connected to (V–)
70
140
V/mV
TA = –40°C to +125°C
35
FREQUENCY RESPONSE
GBW
Gain bandwidth product
1.2
MHz
SR
Slew rate
G = +1
0.5
V/µs
Θm
Phase margin
G = +1, RL = 10 kΩ, CL = 20 pF
56
°
tOR
Overload recovery time
VIN × gain > VS
10
µs
ts
Settling time
To 0.1%, VS = 5 V, 2-V step , G = +1, CL = 100 pF
4
µs
THD+N
Total harmonic distortion + noise
G = +1, f = 1 kHz, VO = 3.53 VRMS, VS = 36 V, RL = 100k, IOUT ≤ ±50 µA, BW = 80 kHz
0.001%
OUTPUT
Positive rail (V+)
VO
Voltage output swing from rail
Negative rail (V–)
VS = 5 V, RL ≤ 10 kΩ connected to (V–)
IO
Output current
VS = 15 V; VO = V–;
VID = 1 V
Source (1)
VS = 15 V; VO = V+;
VID = –1 V
Sink (1)
IOUT = 50 µA
1.35
1.42
IOUT = 1 mA
1.4
1.48
IOUT = 5 mA (1)
1.5
1.61
IOUT = 50 µA
100
150
IOUT = 1 mA
0.75
1
V
5
20
mV
TA = –40°C to +125°C
–20
TA = –40°C to +125°C
TA = –40°C to +125°C
ISC
Short-circuit current
CLOAD
Capacitive load drive
RO
Open-loop output resistance
–30
mA
20
5
60
VS = 20 V, (V+) = 10 V, (V–) = –10 V, VO = 0 V
100
±40
f = 1 MHz, IO = 0 A
mV
–10
10
VID = –1 V; VO = (V–) + 200 mV
V
μA
±60
mA
100
pF
300
Ω
POWER SUPPLY
IQ
(1)
Quiescent current per amplifier
VS = 5 V; IO = 0 A
VS = 36 V; IO = 0 A
300
TA = –40°C to +125°C
460
µA
800
Specified by characterization only.
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7.6 Electrical Characteristics: LM2904-Q1, LM2904AV-Q1, LM2904V-Q1
For VS = (V+) – (V–) = 5 V, TA = 25°C, RL = 10 kΩ connected to V– (unless otherwise noted)
TEST CONDITIONS (1)
PARAMETER
MIN
TYP
MAX
UNIT
OFFSET VOLTAGE
VOS
Input offset voltage
LM2904-Q1,
LM2904V-A1
VS = 5 V to maximum;
VCM = 0 V; VO = 1.4 V
±3
TA = –40°C to 125°C
±7
±10
mV
±1
±2
LM2904AV-Q1
TA = –40°C to 125°C
dVOS/dT
Input offset voltage drift
PSRR
Input offset voltage vs power supply
(ΔVIO/ΔVS)
VS = 5 V to 30 V
VO1/ VO2
Channel separation
f = 1 kHz to 20 kHz
±4
TA = –40°C to 125°C
65
±7
µV/°C
100
dB
120
dB
INPUT VOLTAGE RANGE
VCM
Common-mode voltage range
CMRR
Common-mode rejection ratio
VS = 5 V to maximum
(V–)
(V+) – 1.5
(V–)
(V+) – 2
V
TA = –40°C to 125°C
VS = 5 V to maximum; VCM = 0 V
65
80
dB
INPUT BIAS CURRENT
–20
IB
Input bias current
VO = (V–) + 1.4 V
–250
nA
TA = –40°C to 125°C
–500
2
50
LM2904-Q1
IOS
Input offset current
TA = –40°C to 125°C
VO = (V–) + 1.4 V
LM2904AV-Q1,
LM2904V-Q1
dIOS/dT
Input offset current drift
300
nA
2
TA = –40°C to 125°C
50
150
TA = –40°C to 125°C
10
pA/°C
40
nV/√Hz
NOISE
en
Input voltage noise density
f = 1 kHz
OPEN-LOOP GAIN
AOL
Open-loop voltage gain
VS = 15 V; VO = (V–) + 1 V to (V–) + 11 V; RL ≥ 2 kΩ,
connected to (V–)
25
100
V/mV
TA = –40°C to 125°C
15
FREQUENCY RESPONSE
GBW
Gain bandwidth product
SR
Slew rate
G = +1
0.7
MHz
0.3
V/µs
OUTPUT
RL ≥ 10 kΩ
LM2904-Q1
VS = maximum;
RL ≥ 10 kΩ
Positive rail
VO
VS – 1.5
VS = maximum;
RL = 2 kΩ
Voltage output swing from rail
LM2904AV-Q1,
LM2904V-Q1
VS = maximum;
RL = 2 kΩ
4
3
Negative rail
VS = 15 V; VO = V–; VID = 1 V
Source
VS = 15 V; VO = V+;
VID = –1 V
Sink
5
TA = –40°C to 125°C
Output current
TA = –40°C to 125°C
ISC
Short-circuit current
mV
–30
mA
20
5
LM2904-Q1
VID = –1 V; VO = (V–) + 200 mV
20
–10
10
TA = –40°C to 125°C
4
5
–20
IO
V
6
VS = maximum;
RL ≥ 10 kΩ
VS = 5 V;
RL ≤ 10 kΩ
2
TA = –40°C to 125°C
30
µA
LM2904AV-Q1, LM2904V-Q1
12
VS = 10 V; VO = VS / 2
40
±40
±60
mA
POWER SUPPLY
IQ
(1)
8
Quiescent current per amplifier
VO = VS / 2; IO = 0 A
VS = maximum; VO = maximum / 2; IO = 0 A
TA = –40°C to 125°C
350
600
500
1000
µA
All characteristics are measured with zero common-mode input voltage, unless otherwise specified. Maximum VS for testing purposes is
26 V for LM2904-Q1 and 32 V for LM2904AV-Q1/LM2904V-Q1.
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7.7 Typical Characteristics
20
30
18
27
16
24
14
21
Amplifiers (%)
Amplifiers (%)
Typical characteristics section is applicable for LM2904B-Q1. The typical characteristics data section was taken with TA =
25°C, VS = 36 V (±18 V), VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2 (unless otherwise noted).
12
10
8
18
15
12
6
9
4
6
2
3
0
-1800
0
-1200
-600
0
600
Offset Voltage (µV)
1200
1800
0
DC11
0.25 0.5 0.75 1 1.25 1.5 1.75 2
Offset Voltage Drift (µV/°C)
750
500
450
300
150
-150
-450
100
-100
-300
-750
-40
-20
0
20
40
60
Temperature (°C)
80
100
-500
-18
120
80
90
60
70
80
60
70
50
60
40
50
30
40
20
30
10
20
10
Gain (dB)
Phase (°)
-20
10k
100k
Frequency (Hz)
Closed Lopp Voltage Gain (dB)
70
0
-6
0
6
Common-Mode Voltage (V)
12
17
DC10
Figure 4. Offset Voltage vs Common-Mode Voltage
100
Phase ( )
Open Loop Voltage Gain (dB)
Figure 3. Offset Voltage vs Temperature
1k
-12
DC10
90
-10
DC12
Figure 2. Offset Voltage Drift Distribution
Offset Voltage (µV)
Offset Voltage (µV)
Figure 1. Offset Voltage Production Distribution
2.25 2.5 2.75
50
40
30
20
10
0
-10
0
-20
-10
-30
1M
G=1
G = 10
G = 100
G = 1000
G = –1
1k
D012
Figure 5. Open-Loop Gain and Phase vs Frequency
10k
100k
Frequency (Hz)
1M
D017
Figure 6. Closed-Loop Gain vs Frequency
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Typical Characteristics (continued)
Typical characteristics section is applicable for LM2904B-Q1. The typical characteristics data section was taken with TA =
25°C, VS = 36 V (±18 V), VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2 (unless otherwise noted).
-5
120
IB+
IB–
Input Offset Current (pA)
100
Input Bias Current (nA)
-7.5
-10
-12.5
80
60
40
20
0
-20
-15
-20
-15
-10
-5
0
5
10
Common-Mode Voltage (V)
15
-40
-20
20
-10
-5
0
5
10
Common-Mode Voltage (V)
-7
0.045
-8
-9
IB+
IB–
15
20
DC3I
Figure 8. Input Offset Current vs Common-Mode Voltage
0.06
Input Offset Current (nA)
Input Bias Current (nA)
Figure 7. Input Bias Current vs Common-Mode Voltage
-6
-10
-15
DC3I
0.03
0.015
0
-0.015
-11
-12
-40
-10
20
50
Temperature (°C)
80
110
-0.03
-40
130
-10
20
50
Temperature (°C)
DCIB
Figure 9. Input Bias Current vs Temperature
80
110
130
DCIO
Figure 10. Input Offset Current vs Temperature
V+
(V–) + 18 V
–40 C
25 C
125 C
(V–) + 15 V
Output Voltage (V)
Output Voltage (V)
(V+) – 3 V
(V+) – 6 V
(V–) + 12 V
(V–) + 9 V
(V–) + 6 V
(V+) – 9 V
–40 C
25 C
125 C
(V–) + 3 V
V–
(V+) – 12 V
0
10
20
30
Output Current (mA)
40
Figure 11. Output Voltage Swing vs
Output Current (Sourcing)
10
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50
0
5
DC13
10
15
20
25
Output Current (mA)
30
35
40
DC1-
Figure 12. Output Voltage Swing vs
Output Current (Sinking)
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Typical Characteristics (continued)
Typical characteristics section is applicable for LM2904B-Q1. The typical characteristics data section was taken with TA =
25°C, VS = 36 V (±18 V), VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2 (unless otherwise noted).
120
100
90
PSRR and CMRR (dB)
80
Common-Mode Rejection Ratio (dB)
PSRR+
PSRRCMRR
70
60
50
40
30
20
10
10k
100k
Frequency (Hz)
110
105
100
95
90
VS = 36V
VS = 5V
85
-40
0
1k
115
1M
20
50
Temperature (°C)
D001
Figure 13. CMRR and PSRR vs Frequency
80
110
130
DC2_
Figure 14. Common-Mode Rejection Ratio vs
Temperature (dB)
-118
1.6
1.2
-119
0.8
Voltage (µV)
Power Supply Rejection Ratio (dB)
-10
-120
-121
0.4
0
-0.4
-0.8
-1.2
-122
-1.6
-123
-40
-2
-20
0
20
40
60
80
Temperature (°C)
100
120
0
140
1
2
DC8_
3
4
5
6
Time (s)
7
8
9
10
D011
VS = 5 V to 36 V
Figure 16. 0.1-Hz to 10-Hz Noise
100
-32
90
-40
80
-48
70
-56
THD+N (dB)
Voltage Noise Spectral Density (nV/—Hz)
Figure 15. Power Supply Rejection Ratio vs
Temperature (dB)
60
50
40
10 k
2k
-64
-72
-80
-88
30
20
-96
10
-104
0
10
-112
100
1k
Frequency (Hz)
10k
100k
100
D010
1k
Frequency (Hz)
10k
D013
G = 1, f = 1 kHz, BW = 80 kHz,
VOUT = 10 VPP, RL connected to V–
Figure 17. Input Voltage Noise Spectral Density vs
Frequency
Figure 18. THD+N Ratio vs Frequency, G = 1
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Typical Characteristics (continued)
Typical characteristics section is applicable for LM2904B-Q1. The typical characteristics data section was taken with TA =
25°C, VS = 36 V (±18 V), VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2 (unless otherwise noted).
-32
-30
10 k
2k
-40
-48
-50
-56
-60
THD+N (dB)
THD+N (dB)
-40
-64
-72
-70
-80
-80
-90
-88
-100
-96
-110
-104
100
1k
Frequency (Hz)
10k
0.01
D014
G = –1, f = 1 kHz, BW = 80 kHz,
VOUT = 10 VPP, RL connected to V–
0.1
Amplitude (VPP)
1
10 20
D015
G = 1, f = 1 kHz, BW = 80 kHz,
RL connected to V–
Figure 19. THD+N Ratio vs Frequency, G = –1
Figure 20. THD+N vs Output Amplitude, G = 1
-20
460
-35
430
Quiescent Current (µA)
THD+N (dB)
10 k
2k
-120
0.001
-50
-65
-80
400
370
340
310
-95
10 k
2k
280
-110
0.001
0.01
0.1
Amplitude (VPP)
1
3
10 20
9
15
21
Supply Voltage (V)
D016
27
33
36
DC_S
G = –1, f = 1 kHz, BW = 80 kHz,
RL connected to V–
Figure 21. THD+N vs Output Amplitude, G = –1
Figure 22. Quiescent Current vs Supply Voltage
540
500
VS = 36V
VS = 5V
Open Loop Output Impedance ( )
Quiescent Current per Amplifier (µA)
600
480
420
360
300
240
-40
-20
0
20
40
60
Temperature (°C)
80
100
120
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300
200
100
1k
10k
DC4_
Figure 23. Quiescent Current vs Temperature
12
400
100k
Frequency (Hz)
1M
D006
Figure 24. Open-Loop Output Impedance vs Frequency
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Typical Characteristics (continued)
Typical characteristics section is applicable for LM2904B-Q1. The typical characteristics data section was taken with TA =
25°C, VS = 36 V (±18 V), VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2 (unless otherwise noted).
44
18
Overshoot (+)
Overshoot (-)
36
14
32
12
28
24
20
10
8
6
16
4
12
2
8
0
40
80
Overshoot (+)
Overshoot (–)
16
Overshoot (%)
Overshoot (%)
40
120 160 200 240
Capacitance load (pF)
280
320
0
40
360
G = 1, 100-mV output step, RL = open
120
160
200
240
Capacitance load (pF)
280
320
360
D020
G = –1, 100-mV output step, RL = open
Figure 25. Small-Signal Overshoot vs Capacitive Load
Figure 26. Small-Signal Overshoot vs Capacitive Load
20
60
Input
Output
57
54
10
51
Voltage (V)
Phase Margin (°)
80
D019
48
45
42
39
0
-10
36
33
-20
30
0
40
80
120 160 200 240
Capacitance Load (pF)
280
320
0
360
200
D018
400
600
Time ( s)
800
1000
D021
G = –10
Figure 28. Overload Recovery
10
7.5
7.5
5
5
Voltage (mV)
Voltage (mV)
Figure 27. Phase Margin vs Capacitive Load
10
2.5
0
-2.5
-5
2.5
0
-2.5
-5
-7.5
-7.5
Input
Output
-10
Input
Output
-10
0
20
40
60
80
Time ( s)
100
0
20
G = 1, RL = open
40
60
80
100
Time ( s)
D022
D023
G = –1, RL = open, RFB = 10K
Figure 29. Small-Signal Step Response, G = 1
Figure 30. Small-Signal Step Response, G = –1
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Typical Characteristics (continued)
20
40
16
32
Output Delta from Final Value (mV)
Output Delta from Final Value (mV)
Typical characteristics section is applicable for LM2904B-Q1. The typical characteristics data section was taken with TA =
25°C, VS = 36 V (±18 V), VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2 (unless otherwise noted).
12
8
4
0
-4
-8
-12
-16
24
16
8
0
-8
-16
-24
-32
-20
-40
0
0.5
1
1.5
2
2.5
3
Time ( s)
3.5
4
4.5
5
0
0.5
1
1.5
G = 1, RL = open
2.5
3
Time ( s)
3.5
4
4.5
5
D004
G = 1, RL = open
Figure 31. Large-Signal Step Response (Rising)
Figure 32. Large-Signal Step Response (Falling)
2.5
0.675
Output
Input
2
Positive
Negative
1.5
0.625
Slew Rate(V/ s)
1
Votlage (V)
2
D003
0.5
0
-0.5
-1
-1.5
0.575
0.525
0.475
-2
-2.5
0
20
40
60
80
100
Time (µs)
0.425
-40
-25
-10
5
20
AC_S
35 50 65
Temp( C)
80
95
110 125
D009
G = 1, RL = open
Figure 34. Slew Rate vs Temperature
Figure 33. Large-Signal Step Response
Short-Circuit Current (mA)
40
20
Sinking
Sourcing
0
-20
-40
-60
-40 -25 -10
5
20 35 50 65
Temperature (°C)
80
95
110 125
Maximum Output Voltage (V PP)
60
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1k
10k
DC7_
100k
Frequency (Hz)
1M
D005
VS = 15 V
Figure 35. Short-Circuit Current vs Temperature
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Figure 36. Maximum Output Voltage vs Frequency
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Typical Characteristics (continued)
Typical characteristics section is applicable for LM2904B-Q1. The typical characteristics data section was taken with TA =
25°C, VS = 36 V (±18 V), VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2 (unless otherwise noted).
-75
90
84
78
72
-95
EMIRR (dB)
Channel Separation (dB)
-85
-105
-115
66
60
54
48
42
36
-125
30
-135
1k
10k
100k
Frequency (Hz)
24
1M
1M
10M
D008
Figure 37. Channel Separation vs Frequency
100M
Frequency (Hz)
1G
D007
Figure 38. EMIRR (Electromagnetic Interference Rejection
Ratio) vs Frequency
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8 Parameter Measurement Information
VCC+
−
VO
+
VI
VCC−
CL
RL
Figure 39. Unity-Gain Amplifier
900 Ω
VCC+
100 Ω
−
VI = 0 V
RS
VO
+
VCC−
Figure 40. Noise-Test Circuit
10 k
–
+18V
VIN
+
RL
-18V
GND
GND
Figure 41. Test Circuit, G = –1, for THD+N and Small-Signal Step Response
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9 Detailed Description
9.1 Overview
The LM2904-Q1 and LM2904B-Q1 devices consist of two independent, high-gain frequency-compensated
operational amplifiers designed to operate from a single supply over a wide range of voltages. Operation from
split supplies also is possible if the difference between the two supplies is within the supply voltage range
specified in the Recommended Operating Conditions section, and VS is at least 1.5 V more positive than the
input common-mode voltage. The low supply-current drain is independent of the magnitude of the supply voltage.
Applications include transducer amplifiers, dc amplification blocks, and all the conventional operational amplifier
circuits that now can be implemented more easily in single-supply-voltage systems. For example, these devices
can be operated directly from the standard 5-V supply used in digital systems and easily can provide the required
interface electronics without additional ±5-V supplies.
9.2 Functional Block Diagram
VCC+
~6 µA
Curren t
Regula tor
~6 µA
Curren t
Regula tor
~100 µA
Curren t
Regula tor
IN-
OUT
IN+
~120 µA
Curren t
Regula tor
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9.3 Feature Description
9.3.1 Unity-Gain Bandwidth
The unity-gain bandwidth is the frequency up to which an amplifier with a unity gain may be operated without
greatly distorting the signal. These devices have a 1.2-MHz unity-gain bandwidth (LM2904B-Q1).
9.3.2 Slew Rate
The slew rate is the rate at which an operational amplifier can change its output when there is a change on the
input. These devices have a 0.5-V/µs slew rate (LM2904B-Q1).
9.3.3 Input Common Mode Range
The valid common mode range is from device ground to VS – 1.5 V (VS – 2 V across temperature). Inputs may
exceed VS up to the maximum VS without device damage. At least one input must be in the valid input commonmode range for the output to be the correct phase. If both inputs exceed the valid range, then the output phase is
undefined. If either input more than 0.3 V below V– then input current should be limited to 1 mA and the output
phase is undefined.
9.4 Device Functional Modes
The LM2904-Q1 and LM2904B-Q1 devices are powered on when the supply is connected. This device can be
operated as a single-supply operational amplifier or dual-supply amplifier, depending on the application.
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10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
The LM2904-Q1 and LM2904B-Q1 operational amplifiers are useful in a wide range of signal conditioning
applications. Inputs can be powered before VS for flexibility in multiple supply circuits. For full application design
guidelines related to this family of devices, please refer to the application report Application design guidelines for
LM324/LM358 devices.
10.2 Typical Application
A typical application for an operational amplifier is an inverting amplifier. This amplifier takes a positive voltage on
the input, and makes it a negative voltage of the same magnitude. In the same manner, it also makes negative
voltages positive.
RF
RI
Vsup+
VOUT
+
VIN
Vsup-
Figure 42. Application Schematic
10.2.1 Design Requirements
The supply voltage must be chosen such that it is larger than the input voltage range and output range. For
instance, this application scales a signal of ±0.5 V to ±1.8 V. Setting the supply at ±12 V is sufficient to
accommodate this application.
10.2.2 Detailed Design Procedure
Determine the gain required by the inverting amplifier using Equation 1 and Equation 2:
VOUT
AV
VIN
1.8
AV
3.6
0.5
(1)
(2)
Once the desired gain is determined, choose a value for RI or RF. Choosing a value in the kilohm range is
desirable because the amplifier circuit uses currents in the milliampere range. This ensures the part does not
draw too much current. This example uses 10 kΩ for RI which means 36 kΩ is used for RF. This was determined
by Equation 3.
RF
AV
(3)
RI
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Typical Application (continued)
10.2.3 Application Curve
2
VIN
1.5
VOUT
1
Volts
0.5
0
-0.5
-1
-1.5
-2
0
0.5
1
Time (ms)
1.5
2
Figure 43. Input and Output Voltages of the Inverting Amplifier
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11 Power Supply Recommendations
CAUTION
Supply voltages larger than specified in the recommended operating region can
permanently damage the device (see the Absolute Maximum Ratings).
Place 0.1-µF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or highimpedance power supplies. For more detailed information on bypass capacitor placement, see the Layout
section.
12 Layout
12.1 Layout Guidelines
For best operational performance of the device, use good PCB layout practices, including:
• Noise can propagate into analog circuitry through the power pins of the circuit as a whole, as well as the
operational amplifier. Bypass capacitors are used to reduce the coupled noise by providing low-impedance
power sources local to the analog circuitry.
– Connect low-ESR, 0.1-µF ceramic bypass capacitors between each supply pin and ground, placed as
close to the device as possible. A single bypass capacitor from V+ to ground is applicable for singlesupply applications.
• Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective
methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes.
A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital
and analog grounds, paying attention to the flow of the ground current.
• To reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If
it is not possible to keep them separate, it is much better to cross the sensitive trace perpendicular as
opposed to in parallel with the noisy trace.
• Place the external components as close to the device as possible. Keeping RF and RG close to the inverting
input minimizes parasitic capacitance, as shown in the Layout Examples section.
• Keep the length of input traces as short as possible. Always remember that the input traces are the most
sensitive part of the circuit.
• Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly reduce
leakage currents from nearby traces that are at different potentials.
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12.2 Layout Examples
Place components close to
device and to each other to
reduce parasitic errors
Run the input traces as far
away from the supply lines
as possible
VS+
RF
OUT1
V+
GND
IN1í
OUT2
VIN
IN1+
IN2í
Ví
IN2+
RG
GND
R IN
Only needed for
dual-supply
operation
GND
Use low-ESR, ceramic
bypass capacitor
VSí
(or GND for single supply)
Ground (GND) plane on another layer
Figure 44. Operational Amplifier Board Layout for Noninverting Configuration
RIN
VIN
+
VOUT
RG
RF
Figure 45. Operational Amplifier Schematic for Noninverting Configuration
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13 Device and Documentation Support
13.1 Documentation Support
13.1.1 Related Documentation
For related documentation see the following: Texas Instruments, Application Design Guidelines for LM324/LM358
Devices application report
13.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to order now.
Table 1. Related Links
PARTS
PRODUCT FOLDER
ORDER NOW
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
LM2904-Q1
Click here
Click here
Click here
Click here
Click here
LM2904B-Q1
Click here
Click here
Click here
Click here
Click here
13.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
13.4 Community Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
13.5 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
13.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
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14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the mostcurrent data available for the designated devices. This data is subject to change without notice and without
revision of this document. For browser based versions of this data sheet, see the left-hand navigation pane.
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PACKAGE OPTION ADDENDUM
www.ti.com
20-Dec-2019
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM2904AVQDRG4Q1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2904AVQ
LM2904AVQDRQ1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2904AVQ
LM2904AVQPWRG4Q1
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2904AVQ
LM2904AVQPWRQ1
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2904AVQ
LM2904BQDRQ1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
2904BQ
LM2904QDRG4Q1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2904Q1
LM2904QDRQ1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2904Q1
LM2904QPWRG4Q1
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2904Q1
LM2904QPWRQ1
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2904Q1
LM2904VQDRG4Q1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2904VQ
LM2904VQDRQ1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2904VQ1
LM2904VQPWRG4Q1
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
LM2904VQPWRQ1
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
PLM2904BQDRQ1
ACTIVE
SOIC
D
8
2500
TBD
Call TI
Call TI
-40 to 125
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 1
2904VQ
2904VQ
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
20-Dec-2019
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM2904-Q1, LM2904B-Q1 :
• Catalog: LM2904, LM2904B
• Enhanced Product: LM2904-EP
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Enhanced Product - Supports Defense, Aerospace and Medical Applications
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Dec-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
LM2904AVQDRG4Q1
Package Package Pins
Type Drawing
SOIC
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
D
8
2500
330.0
12.5
6.4
5.2
2.1
8.0
12.0
Q1
LM2904AVQDRQ1
SOIC
D
8
2500
330.0
12.5
6.4
5.2
2.1
8.0
12.0
Q1
LM2904AVQPWRG4Q1
TSSOP
PW
8
2000
330.0
12.4
7.0
3.6
1.6
8.0
12.0
Q1
LM2904AVQPWRQ1
TSSOP
PW
8
2000
330.0
12.4
7.0
3.6
1.6
8.0
12.0
Q1
LM2904BQDRQ1
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
LM2904QDRG4Q1
SOIC
D
8
2500
330.0
12.5
6.4
5.2
2.1
8.0
12.0
Q1
LM2904QDRQ1
SOIC
D
8
2500
330.0
12.5
6.4
5.2
2.1
8.0
12.0
Q1
LM2904QPWRG4Q1
TSSOP
PW
8
2000
330.0
12.4
7.0
3.6
1.6
8.0
12.0
Q1
LM2904QPWRQ1
TSSOP
PW
8
2000
330.0
12.4
7.0
3.6
1.6
8.0
12.0
Q1
LM2904VQDRG4Q1
SOIC
D
8
2500
330.0
12.5
6.4
5.2
2.1
8.0
12.0
Q1
LM2904VQDRQ1
SOIC
D
8
2500
330.0
12.5
6.4
5.2
2.1
8.0
12.0
Q1
LM2904VQPWRG4Q1
TSSOP
PW
8
2000
330.0
12.4
7.0
3.6
1.6
8.0
12.0
Q1
LM2904VQPWRQ1
TSSOP
PW
8
2000
330.0
12.4
7.0
3.6
1.6
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Dec-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM2904AVQDRG4Q1
SOIC
D
8
2500
340.5
338.1
20.6
LM2904AVQDRQ1
SOIC
D
8
2500
340.5
338.1
20.6
LM2904AVQPWRG4Q1
TSSOP
PW
8
2000
367.0
367.0
35.0
LM2904AVQPWRQ1
TSSOP
PW
8
2000
367.0
367.0
35.0
LM2904BQDRQ1
SOIC
D
8
2500
340.5
338.1
20.6
LM2904QDRG4Q1
SOIC
D
8
2500
340.5
338.1
20.6
LM2904QDRQ1
SOIC
D
8
2500
340.5
338.1
20.6
LM2904QPWRG4Q1
TSSOP
PW
8
2000
367.0
367.0
35.0
LM2904QPWRQ1
TSSOP
PW
8
2000
367.0
367.0
35.0
LM2904VQDRG4Q1
SOIC
D
8
2500
340.5
338.1
20.6
LM2904VQDRQ1
SOIC
D
8
2500
340.5
338.1
20.6
LM2904VQPWRG4Q1
TSSOP
PW
8
2000
367.0
367.0
35.0
LM2904VQPWRQ1
TSSOP
PW
8
2000
367.0
367.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
D0008A
SOIC - 1.75 mm max height
SCALE 2.800
SMALL OUTLINE INTEGRATED CIRCUIT
C
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
A
.004 [0.1] C
PIN 1 ID AREA
6X .050
[1.27]
8
1
2X
.150
[3.81]
.189-.197
[4.81-5.00]
NOTE 3
4X (0 -15 )
4
5
B
8X .012-.020
[0.31-0.51]
.010 [0.25]
C A B
.150-.157
[3.81-3.98]
NOTE 4
.069 MAX
[1.75]
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
[0.11-0.25]
0 -8
.016-.050
[0.41-1.27]
DETAIL A
(.041)
[1.04]
TYPICAL
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
SEE
DETAILS
1
8
8X (.024)
[0.6]
6X (.050 )
[1.27]
SYMM
5
4
(R.002 ) TYP
[0.05]
(.213)
[5.4]
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
METAL
SOLDER MASK
OPENING
EXPOSED
METAL
.0028 MAX
[0.07]
ALL AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
EXPOSED
METAL
.0028 MIN
[0.07]
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
1
8
8X (.024)
[0.6]
6X (.050 )
[1.27]
SYMM
5
4
(R.002 ) TYP
[0.05]
(.213)
[5.4]
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
PW0008A
TSSOP - 1.2 mm max height
SCALE 2.800
SMALL OUTLINE PACKAGE
C
6.6
TYP
6.2
SEATING PLANE
PIN 1 ID
AREA
A
0.1 C
6X 0.65
8
1
3.1
2.9
NOTE 3
2X
1.95
4
5
B
4.5
4.3
NOTE 4
SEE DETAIL A
8X
0.30
0.19
0.1
C A
1.2 MAX
B
(0.15) TYP
0.25
GAGE PLANE
0 -8
0.15
0.05
0.75
0.50
DETAIL A
TYPICAL
4221848/A 02/2015
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
PW0008A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
8X (1.5)
8X (0.45)
SYMM
1
8
(R0.05)
TYP
SYMM
6X (0.65)
5
4
(5.8)
LAND PATTERN EXAMPLE
SCALE:10X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4221848/A 02/2015
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
PW0008A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
8X (1.5)
8X (0.45)
SYMM
(R0.05) TYP
1
8
SYMM
6X (0.65)
5
4
(5.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:10X
4221848/A 02/2015
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
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Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2019, Texas Instruments Incorporated
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