Texas Instruments | OPA1671 13-MHz, Low-Noise, Rail-to-Rail, Audio Operational Amplifier (Rev. B) | Datasheet | Texas Instruments OPA1671 13-MHz, Low-Noise, Rail-to-Rail, Audio Operational Amplifier (Rev. B) Datasheet

Texas Instruments OPA1671 13-MHz, Low-Noise, Rail-to-Rail, Audio Operational Amplifier (Rev. B) Datasheet
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OPA1671
SBOS931B – JANUARY 2019 – REVISED AUGUST 2019
OPA1671 13-MHz, Low-Noise, Rail-to-Rail, Audio Operational Amplifier
1 Features
3 Description
•
The OPA1671 is a wide-bandwidth, low-noise, lowdistortion, audio operational amplifier that provides
rail-to-rail input and output operation. This device
offers an excellent combination of low voltage noise,
current noise, and input capacitance, allowing the
device to deliver high performance in a wide array of
audio and industrial applications. The unique internal
topology of the OPA1671 delivers very low distortion
(–109 dB), while only consuming 940 µA of power
supply current. The wide bandwidth (13 MHz) and
high slew rate (5 V/µs) of OPA1671 makes this
device an excellent choice for high gain audio and
industrial signal conditioning.
1
•
•
•
•
•
•
•
•
Low noise:
4 nV/√Hz at 10 kHz
4.7 fA/√Hz at 1 kHz
Low distortion: –109 dB (0.00035%)
Wide gain bandwidth: 13 MHz
Rail-to-rail input and output
Low supply-voltage operation: 1.7 V to 5.5 V
Low input capacitance
– Differential: 6 pF
– Common-mode: 2.5 pF
Low input-bias current: 10 pA
Low power supply current: 940 µA
Industry-standard packages: SC-70 and SOT-23
The OPA1671 is available in the SC-70 and SOT-23
packages and is specified over the industrial
temperature range (–40°C to +125°C).
Device Information(1)
2 Applications
•
•
•
•
•
PART NUMBER
Microphone preamplifier
Auxiliary line input and output
Active filter circuit
Transimpedance amplifier
Voltage buffer
OPA1671
PACKAGE
BODY SIZE (NOM)
SC-70 (5)
2.00 mm × 1.25 mm
SOT-23 (5)
2.90 mm × 1.60 mm
(1) For all available packages, see the package option addendum
at the end of the data sheet.
Electret Microphone Preamplifier
OPA1671 Voltage Noise Density
1000
5V
10 µF
10 NŸ
Electret
Microphone
100 NŸ
5V
10 µF
+
Microphone
Cable
OPA1671
Output
100 NŸ
10 µF
4.9 NŸ
±
499 NŸ
15 pF
10 µF
Voltage Noise Density (nV/—Hz)
1.58 NŸ
100
10
1
10
100
1k
Frequency (Hz)
10k
100k
OPA1
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
OPA1671
SBOS931B – JANUARY 2019 – REVISED AUGUST 2019
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description ............................................ 12
7.1
7.2
7.3
7.4
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
12
12
13
14
8
Application and Implementation ........................ 15
8.1 Application Information............................................ 15
8.2 Typical Application .................................................. 17
9 Power Supply Recommendations...................... 19
10 Layout................................................................... 19
10.1 Layout Guidelines ................................................. 19
10.2 Layout Example .................................................... 19
11 Device and Documentation Support ................. 20
11.1
11.2
11.3
11.4
11.5
11.6
11.7
Device Support......................................................
Documentation Support ........................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
20
20
20
20
21
21
21
12 Mechanical, Packaging, and Orderable
Information ........................................................... 21
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (January 2019) to Revision B
Page
•
Added SOT-23 (DBV) package and associated content to data sheet ................................................................................. 1
•
Added input offset voltage specification for VCM = (V+), (V–)................................................................................................. 5
Changes from Original (November 2018) to Revision A
•
2
Page
Changed from advanced information (preview) to production data (active)........................................................................... 1
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5 Pin Configuration and Functions
DBV and DCK Packages
5-Pin SOT-23 and SC-70
Top View
V±
2
+IN
3
5
V+
4
±IN
±
1
+
OUT
Not to scale
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
–IN
4
I
Inverting input
+IN
3
I
Noninverting input
OUT
1
O
Output
V–
2
—
Negative (lowest) power supply
V+
5
—
Positive (highest) power supply
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
Supply voltage, VS = (V+) – (V–)
Input voltage
(V–) –0.3
Output short-circuit (2)
UNIT
6
V
(V+) +0.3
V
Continuous
Operating temperature, TA
–55
150
°C
Storage temperature, Tstg
–65
150
°C
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Theseare stress ratings
only, which do not imply functional operation of the device at these or anyother conditions beyond those indicated under Recommended
OperatingConditions. Exposure to absolute-maximum-rated conditions for extended periods mayaffect device reliability.
Short-circuit to ground, one amplifier per package.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safemanufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safemanufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
Supply voltage, VS = (V+) – (V–)
NOM
MAX
UNIT
1.7 (±0.85)
5.5 (±2.75)
V
–40
125
°C
Specified temperature, TA
6.4 Thermal Information
OPA1671
THERMAL METRIC (1)
DBV (SOT-23)
DCK (SC-70)
5 PINS
5 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
187.1
214.7
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
107.4
127.1
°C/W
RθJB
Junction-to-board thermal resistance
57.5
60.0
°C/W
ΨJT
Junction-to-top characterization parameter
33.5
33.4
°C/W
ΨJB
Junction-to-board characterization parameter
57.1
59.8
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
n/a
n/a
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Electrical Characteristics
at VS = ±0.85 V to ±2.75 V (VS = 1.7 V to 5.5 V), TA = 25°C, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
AUDIO PERFORMANCE
THD+N
IMD
Total harmonic distortion
+ noise
Intermodulation distortion
0.00035%
G = 1, f = 1 kHz, VO = 1 VRMS, VS = 5.5 V
–109
SMPTE/DIN Two-Tone,
4:1, (60 Hz and 7 kHz)
0.00158%
CCIF Two-Tone (19 kHz
and 20 kHz)
0.0005%
dB
–96
G = 1, VO = 1 VRMS, VS = 5.5 V
dB
–106
dB
FREQUENCY RESPONSE
GBW
Gain-bandwidth product
SR
Slew rate
tS
Settling time
4-V step, G = 1
To 0.1%, 2-V step , G = 1
VIN × gain > VS
Input voltage noise
MHz
5
V/μs
0.75
To 0.01%, 2-V step , G = 1
Overload recovery time
13
μs
1
0.35
μs
f = 0.1 Hz to 10 Hz
2.4
μVPP
f = 10 Hz
45
NOISE
eN
iN
Input voltage noise
density
Input current noise
f = 1 kHz
7
f = 10 kHz
4.0
f = 1 kHz
4.7
nV/√Hz
fA/√Hz
OFFSET VOLTAGE
VCM = (V+)
±1.6
VCM = (V–)
VOS
Input offset voltage
dVOS/dT
Input offset voltage drift
PSRR
Input offset voltage versus
VCM = (V–)
power supply
±1.6
±0.25
mV
±1.25
TA = –40°C to 125°C
±0.25
TA = –40°C to 125°C
±0.3
±2.2
μV/°C
±30
±130
μV/V
INPUT BIAS CURRENT
IB
Input bias current
±10
IOS
Input offset current
±10
pA
INPUT VOLTAGE RANGE
VCM
CMRR
Common-mode voltage
range
Common-mode rejection
ratio
V–
V+
VS = 1.7 V, (V–) < VCM < (V+) – 1.25 V
74
91
VS = 5.5 V, (V–) < VCM < (V+) – 1.25 V
80
96
VS = 1.7 V, VCM = 0 V to 1.7 V
60
88
VS = 5.5 V, VCM = 0 V to 5.5 V
68
102
V
dB
INPUT CAPACITANCE
ZID
Differential
ZICM
Common-mode
1013 || 6
MΩ || pF
1013 || 2.5
GΩ || pF
OPEN-LOOP GAIN
(V–) + 50 mV < VO < (V+) –
50 mV, RL = 10 kΩ
AOL
Open-loop voltage gain
(V–) + 200 mV < VO < (V+) –
200 mV, RL = 2 kΩ
97
TA = –40°C to 125°C
106
97
TA = –40°C to 125°C
113
112
105
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Electrical Characteristics (continued)
at VS = ±0.85 V to ±2.75 V (VS = 1.7 V to 5.5 V), TA = 25°C, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
10
20
UNIT
OUTPUT
Voltage output swing from
rail
ISC
Short-circuit current
VS = 5.5 V, RL = 10 kΩ
Sinking, VS = 5.5 V
Sourcing, VS = 5.5 V
–57
mV
mA
66
POWER SUPPLY
IQ
6
Quiescent current per
amplifier
IO = 0 mA
0.94
IO = 0 mA, TA = –40°C to 125°C
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1.3
1.4
mA
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6.6 Typical Characteristics
10
10
8
8
Total Amplifiers (%)
Total Amplifiers (%)
at TA = 25°C, VS = ±2.5 V, VCM = VS / 2, RL = 10 kΩ connected to VS / 2 (unless otherwise noted)
6
4
6
4
2
2
0
-1000
-500
N = 9904
0
Offset Voltage (PV)
500
0
-1000
1000
-500
0
Offset Voltage (PV)
VOSH
VS = ±2.75 V
N = 9904
Figure 1. Offset Voltage Production Distribution
500
1000
VOSL
VS = ±0.85 V
Figure 2. Offset Voltage Production Distribution
25
1250
1000
750
Offset Voltage (PV)
Total Amplifiers (%)
20
15
10
5
500
250
0
-250
-500
-750
-1000
0
-2.25
-1.5
-0.75
0
0.75
Offset Drift (PV/qC)
1.5
-1250
-50
2.25
-25
vosd
N = 65
N=5
500
Gain (dB)
250
0
-250
-500
-750
-1000
-1250
-1.2 -0.6
0
0.6 1.2
Common-mode Voltage (V)
1.8
2.4
100
125
vosv
3
140
130
120
110
100
90
80
70
60
50
40
30
20
10
0
-10
-20
100m
1
vosv
10
100
1k
10k 100k
Frequency (Hz)
1M
240
Gain
225
Phase 210
195
180
165
150
135
120
105
90
75
60
45
30
15
0
10M
Phase (q)
Offset Voltage (PV)
750
-1.8
75
Figure 4. Offset Voltage vs Temperature
1000
-2.4
25
50
Temperature (qC)
5 typical units
Figure 3. Offset Voltage Drift Distribution
1250
-3
0
Aol_
N = 65
Figure 5. Offset Voltage vs Common Mode Voltage
Figure 6. Open-Loop Gain and Phase vs Frequency
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Typical Characteristics (continued)
at TA = 25°C, VS = ±2.5 V, VCM = VS / 2, RL = 10 kΩ connected to VS / 2 (unless otherwise noted)
2
50
G= 1
G= 1
G = 10
G = +100
Gain (dB)
30
0
-2
Input Bias Current (nA)
40
20
10
0
-4
-6
-8
-10
-12
-14
-16
-10
IB
IB+
IOS
-18
-20
1k
10k
100k
1M
Frequency (Hz)
-20
-40
10M
2.7
-0.3
2.4
-0.6
2.1
-0.9
1.8
1.5
1.2
0.9
80
95
110 125
ibvs
-40qC
25qC
85qC
125qC
-1.8
-2.1
-2.4
-2.7
-3
0
5 10 15 20 25 30 35 40 45 50 55 60 65 70 75
Output Current (mA)
claw
0
5 10 15 20 25 30 35 40 45 50 55 60 65 70 75
Output Current (mA)
claw
VS = ±2.75 V
VS = ±2.75 V
Figure 9. Output Voltage Swing vs Sourcing Output Current
(Maximum Supply)
CMRR
80
60
40
20
10
100
1k
10k
100k
Frequency (Hz)
1M
Figure 10. Output Voltage Swing vs Sinking Output Current
(Maximum Supply)
Input Referred Voltage Noise (500 nV/div)
100
Rejection Ratio (dB)
20 35 50 65
Temperature (qC)
-1.5
0
10M
Time (1 s/div)
D027
D007
Figure 11. CMRR vs Frequency
8
5
-1.2
-40qC
25qC
85qC
125qC
0.3
-10
Figure 8. Input Bias Current vs Temperature
0
Output Voltage (V)
Output Voltage (V)
Figure 7. Closed-Loop Gain and Phase vs Frequency
3
0.6
-25
D006
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Figure 12. 0.1-Hz to 10-Hz Noise
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Typical Characteristics (continued)
at TA = 25°C, VS = ±2.5 V, VCM = VS / 2, RL = 10 kΩ connected to VS / 2 (unless otherwise noted)
0.01
0.001
-100
0.0001
-120
1E-5
1
10
100
1k
Frequency (Hz)
10k
Total Harmonic Distortion
10
Noise (dB)
-80
G= 1
G= 1
Noise ( )
100
Total Harmonic Distortion
Voltage Noise Density (nV/—Hz)
1000
-140
100
100k
OPA1
1k
Frequency (Hz)
10k
OPA1
BW = 80 kHz
VO = 1 VRMS
Figure 13. Input Voltage Noise Spectral Density
vs Frequency
-40
-80
0.001
-100
0.0001
1m
Gain = 1
-60
0.01
-80
0.001
-100
0.0001
1m
-120
10m
100m
Output Amplitude (VRMS)
0.1
1
-120
10m
100m
Output Amplitude (VRMS)
D010
BW = 80 kHz
fTEST = 1 kHz
Gain = –1
1
D010
BW = 80 kHz
fTEST = 1 kHz
Figure 16. THD+N vs Output Amplitude
1.4
1.2
1.2
Quiescent Current (mA)
Quiescent Current (mA)
Figure 15. THD+N vs Output Amplitude
1.4
1
0.8
0.6
0.4
0.2
0
-50
Total Harmonic Distortion + Noise (dB)
0.01
RL = 600 :
RL = 2 k:
RL = 10 k:
Noise (%)
-60
Total Harmonic Distortion + Noise (dB)
Noise (%)
0.1
-40
1
RL = 600 :
RL = 2 k:
RL = 10 k:
Total Harmonic Distortion
1
Total Harmonic Distortion
Figure 14. THD+N Ratio vs Frequency
1
0.8
0.6
0.4
0.2
-25
0
25
50
Temperature (qC)
75
100
125
0
0.5
0.75
iqvs
5 typical units
1
1.25 1.5 1.75
2
Supply Voltage (V)
2.25
2.5
2.75
iqvs
5 typical units
Figure 17. Quiescent Current vs Temperature
Figure 18. Quiescent Current vs Supply
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Typical Characteristics (continued)
at TA = 25°C, VS = ±2.5 V, VCM = VS / 2, RL = 10 kΩ connected to VS / 2 (unless otherwise noted)
1000
1
110
10
100
90
-50
Open-Loop Output Impedance, Zo (:)
120
Open-loop Gain (PV/V)
Open-loop Gain (dB)
130
100
10
-25
0
25
50
75
Temperature (qC)
100
125
1
150
aolv
Figure 19. Open-Loop Gain vs Temperature
10
100
1k
10k 100k
Frequency (Hz)
1M
Open
VIN (V)
VOUT (V)
RISO = 0 :
RISO = 24.9 :
RISO = 49.9 :
Voltage (1 V/div)
Overshoot ( )
100M
Figure 20. Open-Loop Output Impedance vs Frequency
60
50
10M
40
30
20
10
0
10
100
Capactiance (pF)
1000
Time (100 Ps/div)
2000
D033
D031
10-mV Step
Figure 22. No Phase Reversal
Figure 21. Small-Signal Overshoot vs Capacitive Load
Voltage (1 V/div)
Voltage (1 V/div)
VIN
VOUT
VIN
VOUT
Time (200 ns/div)
Time (200 ns/div)
D034
Figure 23. Positive Overload Recovery
10
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D034
Figure 24. Negative Overload Recovery
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Typical Characteristics (continued)
at TA = 25°C, VS = ±2.5 V, VCM = VS / 2, RL = 10 kΩ connected to VS / 2 (unless otherwise noted)
Voltage (5 mV/div)
Voltage (5 mV/div)
VIN
VOUT
VIN
VOUT
Time (1 Ps/div)
Time (1 Ps/div)
D035
10-mV step
D035
G = +1
10-mV step
Figure 25. Small-Signal Step Response
G = –1
Figure 26. Small-Signal Step Response
75
Falling
Rising
Output (1 mV/div)
Output Current (mA)
70
65
60
55
50
45
40
Sinking
Sourcing
35
-50
Time (1 Ps/div)
-25
0
25
50
Temperature (qC)
D037
75
100
125
iscv
2-V Step
Figure 27. Settling Time
Figure 28. Short-Circuit Current vs Temperature
8
Output Voltage (VPP)
Vs = r2.75 V
Vs = r0.85 V
6
4
2
0
100
1k
10k
100k
Frequency (Hz)
1M
10M
D012
Figure 29. Maximum Output Voltage vs Frequency
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7 Detailed Description
7.1 Overview
The OPA1671 is a rail-to-rail input, very low noise operational amplifier (op amp). The OPA1671 operates from
1.7 V to 5.5 V, is unity-gain stable, and is designed for a wide range of audio and general-purpose applications.
The OPA1671 strengths also include 13-MHz bandwidth and 4.0-nV/√Hz noise spectral density, with very low
input bias current (10 pA). These strengths make the OPA1671 a great choice for a preamplifier in microphone
circuits, sensor modules and buffering high-fidelity, digital-to-analog converters (DACs).
7.2 Functional Block Diagram
V+
Reference
Current
VIN+
VINVBIAS1
Class AB
Control
Circuitry
VO
VBIAS2
V(Ground)
12
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7.3 Feature Description
7.3.1 Operating Voltage
The OPA1671 op amp can be used with single or dual supplies from an operating range of VS = 1.7 V (±0.85 V)
up to 5.5 V (±2.75 V).
CAUTION
Supply voltages greater than 6 V can permanently damage the device (see Absolute
Maximum Ratings)
Key parameters that vary over the supply voltage or temperature range are shown in the Typical Characteristics
section.
7.3.2 Input Bias Current
Typically, input bias current is approximately ±10 pA. Input voltages exceeding the power supplies, however, can
cause excessive current to flow into or out of the input pins. Momentary voltages greater than the power supply
can be tolerated if the input current is limited to 10 mA. This limitation is easily accomplished with an input
resistor, as shown in Figure 30.
Unlike many operational amplifiers, there are no diodes connected between the positive and negative input
terminals. As a result, differential voltages up to the full supply voltage do not cause any significantly higher
current flow into the inputs.
Current-limiting resistor
required if input voltage
exceeds supply rails by
> 0.3 V.
+5 V
IOVERLOAD
10 mA max
VOUT
VIN
5 NŸ
Figure 30. Input Current Protection
7.3.3 Common-Mode Voltage Range
The OPA1671 features true rail-to-rail inputs, allowing full common mode operation from the negative supply
voltage to the positive supply voltage. This full common mode operation is achieved with complimentary Nchannel and P-channel differential input pairs. The N-channel pair is active for input voltages close to the positive
rail, typically (V+) – 1.25 V to (V+) The P-channel is active for common-mode inputs from (V–) to (V+) – 1.25 V.
There is a small transition region, typically from (V+) – 1.25 V to (V+) – 1 V. In this region, the offset voltage
transitions between the P-channel and N-channel offset values. Figure 5 shows the difference between offset in
the P and N regions.
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Feature Description (continued)
7.3.4 EMI Susceptibility and Input Filtering
Operational amplifiers vary in susceptibility to EMI. If conducted EMI enters the operational amplifier, the dc
offset at the amplifier output can shift from its nominal value when EMI is present. This shift is a result of signal
rectification associated with the internal semiconductor junctions. Although all operational amplifier pin functions
can be affected by EMI, the input pins are likely to be the most susceptible. The OPA1671 operational amplifier
incorporates an internal input low-pass filter that reduces the amplifier response to EMI. Both common-mode and
differential-mode filtering are provided by the input filter. The filter is designed for a cutoff frequency of
approximately 20 MHz (–3 dB), with a rolloff of 20 dB per decade.
120
EMIRR IN+ (dB)
100
80
60
40
20
10M
100M
1G
Frequency (Hz)
10G
EMIR
Figure 31. OPA1671 EMIRR vs Frequency
Table 1. OPA1671 EMIRR IN+ for Frequencies of Interest
FREQUENCY
APPLICATION OR ALLOCATION
EMIRR IN+
400 MHz
Mobile radio, mobile satellite, space operation, weather, radar, ultra-high frequency (UHF)
applications
30 dB
900 MHz
Global system for mobile communications (GSM) applications, radio communication, navigation,
GPS (to 1.6 GHz), GSM, aeronautical mobile, UHF applications
38 dB
1.8 GHz
GSM applications, mobile personal communications, broadband, satellite, L-band (1 GHz to 2 GHz)
60 dB
®
2.4 GHz
802.11b, 802.11g, 802.11n, Bluetooth , mobile personal communications, industrial, scientific and
medical (ISM) radio band, amateur radio and satellite, S-band (2 GHz to 4 GHz)
59 dB
3.6 GHz
Radiolocation, aero communication and navigation, satellite, mobile, S-band
90 dB
802.11a, 802.11n, aero communication and navigation, mobile communication, space and satellite
operation, C-band (4 GHz to 8 GHz)
100 dB
5 GHz
7.4 Device Functional Modes
The OPA1671 has a single functional mode and is operational when the power-supply voltage is greater than 1.7
V (±0.85 V). The maximum specified power-supply voltage for the OPA1671 is 5.5 V (±2.75 V).
14
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The OPA1671 is a low-noise, rail-to-rail input and output operational amplifier specifically designed for portable
applications. The device operates from 1.7 V to 5.5 V, is unity-gain stable, and suitable for a wide range of audio
and general-purpose applications. The class AB output stage is capable of driving ≤ 10-kΩ loads connected to
any point between V+ and ground. The input common-mode voltage range includes both rails, and allows the
OPA1671 device to be used in virtually any single-supply application. Rail-to-rail input and output swing
significantly increases dynamic range, especially in low-supply applications, and makes the device a great choice
for driving sampling analog-to-digital converters (ADCs).
8.1.1 Capacitive Loads
The dynamic characteristics of the OPA1671 amplifiers are optimized for commonly encountered gains, loads,
and operating conditions. The combination of low closed-loop gain and high capacitive loads decreases the
phase margin of the amplifier and can lead to gain peaking or oscillations. As a result, heavier capacitive loads
must be isolated from the output. Add a small resistor (for example, RS = 50 Ω) in series with the output to isolate
heavier capacitive loads.
8.1.2 Noise Performance
Figure 31 shows the total circuit noise for varying source impedances with the operational amplifier in a unitygain configuration (with no feedback resistor network and therefore no additional noise contributions). The op
amp itself contributes a voltage noise component and a current noise component. The voltage noise is commonly
modeled as a time-varying component of the offset voltage. The current noise is modeled as the time-varying
component of the input bias current and reacts with the source resistance to create a voltage component of
noise. For a CMOS-input device, the noise resulting from the input current is negligible; therefore, the total noise
is dominated by the voltage noise of the OPA1671 at low source resistance, and the resistor noise > 1 kΩ.
Figure 31 shows the calculation of the total circuit noise, with these parameters:
• en = voltage noise
• RS = source impedance
• k = Boltzmann's constant = 1.38 × 10–23 J/K
• T = temperature in kelvins (K)
For more details on calculating noise, see Basic Noise Calculations.
200
Noise (nV/—Hz)
100
70
50
Source Resistor Noise
OPA1671 Voltage Noise
Total Noise
30
20
10
7
5
3
2
1
1 2 3 5 10 20
100
1000
10000
Source Resistance (:)
100000 1000000
OPA1
Figure 32. Noise Performance of the OPA1671 in a Unity-Gain Buffer Configuration
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Application Information (continued)
8.1.3 Basic Noise Calculations
Low-noise circuit design requires careful analysis of all noise sources. External noise sources can dominate in
many cases; consider the effect of source resistance on overall op amp noise performance. Total noise of the
circuit is the root-sum-square combination of all noise components.
The resistive portion of the source impedance produces thermal noise proportional to the square root of the
resistance. This function is plotted in Figure 31. The source impedance is typically fixed; consequently, select the
op amp and the feedback resistors to minimize the respective contributions to the total noise.
Figure 33 shows noninverting (A) and inverting (B) op amp circuit configurations with gain. In circuit
configurations with gain, the feedback network resistors contribute noise. In general, the current noise of the op
amp reacts with the feedback resistors to create additional noise components.
The selected feedback resistor values make these noise sources negligible. Low impedance feedback resistors
load the output of the amplifier. The equations for total noise are shown for both configurations.
(A) Noise in Noninverting Gain Configuration
R1
Noise at the output is given as EO, where
R2
GND
±
EO
+
RS
+
±
VS
Source
GND
'1 = l1 +
:2;
A5 = ¥4 „ G$ „ 6(-) „ 45
d
:3;
A41 æ42 = ¨4 „ G$ „ 6(-) „ d
8
41 „ 42
h d
h
41 + 42
¾*V
Thermal noise of R1 || R2
:4;
G$ = 1.38065 „ 10F23
Boltzmann Constant
:5;
,
h
-
6(-) = 237.15 + 6(°%)
(B) Noise in Inverting Gain Configuration
R1
RS
R2
h
>-?
Thermal noise of RS
Temperature in kelvins
:45 + 41 ; „ 42
42
2
p „ ¨:A0 ;2 + kA41 +45 æ42 o + FE0 „ H
IG
45 + 41
45 + 41 + 42
:6;
'1 = l1 +
+
:7;
:45 + 41 ; „ 42
8
I d
A41 +45 æ42 = ¨4 „ G$ „ 6(-) „ H
h
45 + 41 + 42
¾*V Thermal noise of (R1 + RS) || R2
GND
:8;
G$ = 1.38065 „ 10F23
:9;
6(-) = 237.15 + 6(°%)
±
+
±
d
8
¾*V
> 84/5 ?
Noise at the output is given as EO, where
EO
VS
42
41 „ 42 2
2
p „ ¨:A5 ;2 + :A0 ;2 + kA41 æ42 o + :E0 „ 45 ;2 + lE0 „ d
hp
41
41 + 42
:1;
Source
GND
d
,
h
-
2
> 84/5 ?
Boltzmann Constant
>-?
Temperature in kelvins
Copyright © 2017, Texas Instruments Incorporated
(1)
eN is the voltage noise of the amplifier. For the OPA1671 series of operational amplifiers, eN = 4.0 nV/√Hz at 10 kHz.
(2)
iN is the current noise of the amplifier. For the OPA1671 series of operational amplifiers, iN = 4.5 fA/√Hz at 1 kHz.
(3)
For additional resources on noise calculations, see TI's Precision Labs Series.
Figure 33. Noise Calculation in Gain Configurations
16
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8.2 Typical Application
This design uses an OPA1671 as a preamplifier for an electret microphone. Electret microphone types are
common in many audio applications of varying performance levels. The OPA1671 offers very low noise in a tiny
package, and is designed for use in electret preamplifier circuits.
Figure 34 shows the solution.
5V
R1
1.58 NŸ
C1
10 µF
R2
10 k
Electret
Microphone
5V
R3
100 k
OPA1671
+
Microphone
Cable
C2
1 µF
C3
10 µF
Output
R4
100 k
R5
4.9 NŸ
±
C5
10 µF
R6
499 NŸ
C4
15 pF
Figure 34. Electret Preamplifier Schematic
8.2.1 Design Requirements
This solution has the following requirements:
• Supply voltage: 5 V
• Gain: 100 V/V
• Frequency response: 3 dB from 20 Hz to 20 kHz
• Output: 2.5 V ±1 V
• Output noise density: < 1 µV/√Hz at 10 kHz
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Typical Application (continued)
8.2.2 Detailed Design Procedure
The preamplifier circuit uses a noninverting gain configuration to allow for high input impedance, with
independent gain-setting resistor values. DC bypass is accomplished with C2 and C3, with the low frequency
poles set by C2, R4, C3 and R5; see Equation 1 and Equation 2.
1
pL1
3.18 Hz
2S ˜ R3 || R 4 ˜ C2
(1)
1
2S ˜ R 5 ˜ C2
pL2
3.23 Hz
(2)
The filter cutoff frequency is determined by a higher frequency pole, set by R5 and C4.
1
pH
21.3 kHz
2S ˜ R 6 ˜ C 4
(3)
The gain of the circuit in the passband is set by R5 and R6.
R6
A V/V
100 40 dB
R5
(4)
The ouput noise of the circuit (ignoring the electret microphone intrinsic noise and impedance) is the RSS
average noise contribution from R5 and the input voltage noise of OPA1671. R5 was selected for minimal noise
contribution without requiring a dc blocking cap. (C3) larger than 10 µF. See Equation 5 for the output noise
density calculation at 10 kHz.
eN_OUT
Input Referred Noise ˜ Gain
4kTR5
2
VN _10k 2 ˜ 100
0.96 9/ Hz
(5)
50
45
40
35
30
25
20
15
10
5
0
-5
-10
-15
-20
10
Output Noise Density (PV/—Hz)
Gain (dB V/V)
8.2.3 Application Curves
1
2 3 5 710 20
50 100
1000
Frequency (Hz)
10000
100000
6
4
2
0
10 2030 50 100 200
OPA1
TA1
Figure 35. Electret Microphone Preamplifier Transfer
Function
18
8
500 1000
Frequency (Hz)
10000
100000
OPA1
Figure 36. Electret Microphone Preamplifier Output Noise
Density
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9 Power Supply Recommendations
The OPA1671 device is specified for operation from 1.7 V to 5.5 V (±0.85 V to ±2.75 V).
10 Layout
10.1 Layout Guidelines
Paying attention to good layout practice is always recommended. Keep traces short and, when possible, use a
printed-circuit board (PCB) ground plane with surface-mount components placed as close to the device pins as
possible. Place a 0.1-µF capacitor closely across the supply pins. These guidelines must be applied throughout
the analog circuit to improve performance and provide benefits such as reducing the electromagnetic interference
(EMI) susceptibility.
10.2 Layout Example
Minimize
parasitic
inductance by
placing bypass
CBYPASS capacitor close
to V+.
VOUT
OUT
V+
V+IN
Keep high
impedance
input signal
away from
noisy traces.
VIN
-IN
RF
Route trace
under package
for output to
feedback
resistor
connection.
Figure 37. OPA1671 Layout Example
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Development Support
11.1.1.1 TINA-TI™ (Free Software Download)
TINA-TI™ is a simple, powerful, and easy-to-use circuit simulation program based on a SPICE engine. TINATI™ is a free, fully-functional version of the TINA™ software, preloaded with a library of macromodels in addition
to a range of both passive and active models. TINA-TI™ provides all the conventional dc, transient, and
frequency domain analysis of SPICE, as well as additional design capabilities.
Available as a free download from the Analog eLab Design Center, TINA-TI™ offers extensive post-processing
capability that allows users to format results in a variety of ways. Virtual instruments offer the ability to select
input waveforms and probe circuit nodes, voltages, and waveforms, creating a dynamic quick-start tool.
NOTE
These files require that either the TINA software (from DesignSoft™) or TINA-TI™
software be installed. Download the free TINA-TI™ software from the TINA-TI™ folder.
11.2 Documentation Support
11.2.1 Related Documentation
For related documentation see the following:
• Texas Instruments, Circuit Board Layout Techniques
• Texas, Instruments, Analog Engineer's Circuit Cookbook
11.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.4 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
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11.5 Trademarks
TINA-TI, E2E are trademarks of Texas Instruments.
Bluetooth is a registered trademark of Bluetooth SIG, Inc.
TINA, DesignSoft are trademarks of DesignSoft, Inc.
All other trademarks are the property of their respective owners.
11.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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3-Oct-2019
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
OPA1671IDBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
OPA1671IDBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
OPA1671IDCKR
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1D3
OPA1671IDCKT
ACTIVE
SC70
DCK
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1D3
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
3-Oct-2019
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
OPA1671IDBVR
SOT-23
3000
178.0
9.0
DBV
5
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
3.3
3.2
1.4
4.0
8.0
Q3
OPA1671IDBVT
SOT-23
DBV
5
250
178.0
9.0
3.3
3.2
1.4
4.0
8.0
Q3
OPA1671IDCKR
SC70
DCK
5
3000
178.0
9.0
2.4
2.5
1.2
4.0
8.0
Q3
OPA1671IDCKT
SC70
DCK
5
250
178.0
9.0
2.4
2.5
1.2
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
OPA1671IDBVR
SOT-23
DBV
5
3000
190.0
190.0
30.0
OPA1671IDBVT
SOT-23
DBV
5
250
190.0
190.0
30.0
OPA1671IDCKR
SC70
DCK
5
3000
190.0
190.0
30.0
OPA1671IDCKT
SC70
DCK
5
250
190.0
190.0
30.0
Pack Materials-Page 2
PACKAGE OUTLINE
DBV0005A
SOT-23 - 1.45 mm max height
SCALE 4.000
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
1.75
1.45
PIN 1
INDEX AREA
1
0.1 C
B
A
5
2X 0.95
1.9
1.45
0.90
3.05
2.75
1.9
2
4
0.5
5X
0.3
0.2
3
(1.1)
C A B
0.15
TYP
0.00
0.25
GAGE PLANE
8
TYP
0
0.22
TYP
0.08
0.6
TYP
0.3
SEATING PLANE
4214839/E 09/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
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EXAMPLE BOARD LAYOUT
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
2X (0.95)
3
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214839/E 09/2019
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
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EXAMPLE STENCIL DESIGN
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
2X(0.95)
4
3
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214839/E 09/2019
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
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IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
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