Texas Instruments | INA191 Low-Power, Zero-Drift, Wide Dynamic Range, Precision Current-Sense Amplifier (Rev. A) | Datasheet | Texas Instruments INA191 Low-Power, Zero-Drift, Wide Dynamic Range, Precision Current-Sense Amplifier (Rev. A) Datasheet

Texas Instruments INA191 Low-Power, Zero-Drift, Wide Dynamic Range, Precision Current-Sense Amplifier (Rev. A) Datasheet
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INA191
SLYS020A – FEBRUARY 2019 – REVISED APRIL 2019
INA191 Low-Power, Zero-Drift, Wide Dynamic Range, Precision Current-Sense Amplifier
1 Features
3 Description
•
The INA191 is a low-power, voltage-output, currentshunt monitor (also called a current-sense amplifier)
that is commonly used for overcurrent protection,
precision-current
measurement
for
system
optimization, or in closed-loop feedback circuits. This
device can sense drops across shunts at commonmode voltages from –0.2 V to +40 V, independent of
the supply voltage. The low input bias current of the
INA191 permits the use of larger current-sense
resistors, and thus provides accurate current
measurements in the µA range. Five fixed gains are
available: 25 V/V, 50 V/V, 100 V/V, 200 V/V, or 500
V/V. The low offset voltage of the zero-drift
architecture extends the dynamic range of the current
measurement, and allows for smaller sense resistors
with lower power loss while still providing accurate
current measurements.
1
•
•
•
•
•
Low power:
– Low supply voltage, VS: 1.7 V to 5.5 V
– Low shutdown current: 100 nA (max)
– Low quiescent current: 43 μA at 25°C (typ)
Low input bias currents: 100 pA (typ)
(enables microamp current measurement)
Accuracy:
– ±0.25% max gain error (A2 to A5 devices)
– 7-ppm/°C gain drift (max)
– ±12 μV (max) offset voltage
– 0.13-μV/°C offset drift (max)
Wide common-mode voltage: –0.2 V to +40 V
Gain options:
– INA191A1: 25 V/V
– INA191A2: 50 V/V
– INA191A3: 100 V/V
– INA191A4: 200 V/V
– INA191A5: 500 V/V
Package: 0.895-mm2 DSBGA
The INA191 operates from a single 1.7-V to 5.5-V
power supply, drawing a maximum of 65 µA of supply
current when enabled and only 100 nA when
disabled. The device is specified over the operating
temperature range of –40°C to +125°C, and offered
in a DSBGA-6 package.
Device Information(1)
2 Applications
•
•
•
•
•
•
PART NUMBER
INA191
Notebook computers
Cell phones
Battery-powered devices
Telecom equipment
Power management
Battery chargers
PACKAGE
DSBGA (6)
BODY SIZE (NOM)
1.17 mm × 0.765 mm
(1) For all available packages, see the package option addendum
at the end of the datasheet.
Simplified Schematic
Bus Voltage
up to 40 V
100 pA
(typ)
Supply Voltage
1.7 V to 5.5 V
RSENSE
LOAD
0.1 …F
100 pA
(typ)
ENABLE
VS
IN±
INA191
OUT
ADC
Microcontroller
IN+
GND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
INA191
SLYS020A – FEBRUARY 2019 – REVISED APRIL 2019
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description ............................................ 12
7.1 Overview ................................................................. 12
7.2 Functional Block Diagram ....................................... 12
7.3 Feature Description................................................. 13
7.4 Device Functional Modes........................................ 15
8
Application and Implementation ........................ 16
8.1 Application Information............................................ 16
8.2 Typical Applications ................................................ 21
9 Power Supply Recommendations...................... 23
10 Layout................................................................... 23
10.1 Layout Guidelines ................................................. 23
10.2 Layout Example .................................................... 23
11 Device and Documentation Support ................. 24
11.1
11.2
11.3
11.4
11.5
11.6
Documentation Support ........................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
24
24
24
24
24
24
12 Mechanical, Packaging, and Orderable
Information ........................................................... 24
4 Revision History
Changes from Original (February 2019) to Revision A
•
2
Page
Changed device from advanced information to production data (active) ............................................................................... 1
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SLYS020A – FEBRUARY 2019 – REVISED APRIL 2019
5 Pin Configuration and Functions
YFD Package
6-Pin DSBGA
Top View
1
2
3
A
IN+
VS
OUT
B
IN±
GND
ENABLE
Not to scale
Pin Functions
PIN
NAME
NO.
TYPE
DESCRIPTION
Enable pin. When this pin is driven to VS, the device is on and functions as a current sense
amplifier. When this pin is driven to GND, the device is off, the supply current is reduced,
and the output is placed in a high-impedance state. This pin must be driven externally, or
connected to VS if not used.
ENABLE
B3
Digital input
GND
B2
Analog
IN+
A1
Analog input
Current-shunt monitor positive input. For high-side applications, connect this pin to the bus
voltage side of the sense resistor. For low-side applications, connect this pin to the load
side of the sense resistor.
IN–
B1
Analog input
Current-shunt monitor negative input. For high-side applications, connect this pin to the load
side of the sense resistor. For low-side applications, connect this pin to the ground side of
the sense resistor.
OUT
A3
Analog output
VS
A2
Analog
Ground
This pin provides an analog voltage output that is the amplified voltage difference from the
IN+ to the IN– pins.
Power supply, 1.7 V to 5.5 V
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SLYS020A – FEBRUARY 2019 – REVISED APRIL 2019
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
VS
MAX
Supply voltage
Differential (VIN+) – (VIN–)
Analog inputs, VIN+, VIN– (2)
Common-mode, VCM (3)
–42
42
GND – 0.3
42
VENABLE
ENABLE pin voltage
GND – 0.3
6
VOUT
OUT pin Voltage (3)
GND – 0.3
(VS) + 0.3
Input current into any pin (3)
TA
Operating temperature
TJ
Junction temperature
Tstg
Storage temperature
(1)
(2)
(3)
UNIT
6
–55
–65
V
V
V
V
5
mA
150
°C
150
°C
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
VIN+ and VIN– are the voltages at the IN+ and IN– pins, respectively.
Input voltage at any pin may exceed the voltage shown if the current at that pin is limited to 5 mA.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VCM
Common-mode input range
–0.2
40
V
VIN+,VIN-
Input pin voltage range
–0.2
40
V
VS
Operating supply voltage
1.7
5.5
V
TA
Operating free-air temperature
–40
125
°C
6.4 Thermal Information
INA191
THERMAL METRIC (1)
DSBGA
UNIT
6 PINS
RθJA
Junction-to-ambient thermal resistance
141.4
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
1.1
°C/W
RθJB
Junction-to-board thermal resistance
45.7
°C/W
ψJT
Junction-to-top characterization parameter
0.4
°C/W
ψJB
Junction-to-board characterization parameter
45.3
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Electrical Characteristics
at TA = 25°C, VSENSE = VIN+ – VIN–, VS = 1.8 V to 5.0 V, VIN+ = 12 V, and VENABLE = VS (unless otherwise noted)
PARAMETER
CONDITIONS
MIN
TYP
132
150
MAX
UNIT
INPUT
CMRR
Common-mode rejection ratio,
RTI (1)
VIN+ = –0.1 V to 40 V, TA = –40°C to +125°C
VOS
Offset voltage, RTI
VS = 1.8 V
dVOS/dT
Offset drift, RTI
TA = –40°C to +125°C
PSRR
Power-supply rejection ratio, RTI
IIB
Input bias current
IIO
Input offset current
dB
–2.5
±12
µV
10
130
nV/°C
VS = 1.7 V to 5.5 V
–1
±5
µV/V
VSENSE = 0 mV
0.1
3
nA
VSENSE = 0 mV
±0.07
nA
OUTPUT
G
Gain
A1 devices
25
A2 devices
50
A3 devices
100
A4 devices
200
A5 devices
EG
V/V
500
A1 device
–0.17%
±0.35%
A2, A3,
A4, A5
devices
–0.04%
±0.25%
2
7
Gain error
VOUT = 0.1 V to VS – 0.1 V
Gain error drift
VOUT = 0.1 V to VS – 0.1 V, TA = –40°C to +125°C
Nonlinearity error
VOUT = 0.1 V to VS – 0.1 V
Maximum capacitive load
No sustained oscillation
ppm/°C
±0.01%
1
nF
VOLTAGE OUTPUT
VSP
Swing to VS power-supply rail
VS = 1.8 V, RL = 10 kΩ to GND,
TA = –40°C to +125°C, VSENSE overdrive = 10 mV
(VS) – 23
(VS) – 40
mV
VSN
Swing to GND
VS = 1.8 V, RL = 10 kΩ to GND,
TA = –40°C to +125°C, VSENSE = –10 mV
(VGND) +
0.05
(VGND) + 1
mV
A1, A2, A3
devices
(VGND) + 1
(VGND) + 3
Zero current output voltage
VS = 1.8 V, RL = 10 kΩ to GND,
TA = –40°C to +125°C,
VSENSE = 0 mV
A4 device
(VGND) + 2
(VGND) + 4
A5 device
(VGND) + 3
(VGND) + 7
A1 device
45
A2 device
37
A3 device
35
A4 device
33
VZL
mV
FREQUENCY RESPONSE
BW
Bandwidth
CLOAD = 10 pF
A5 device
kHz
27
SR
Slew rate
VS = 5.0 V, VOUT = 0.5 V to 4.5 V
0.3
V/µs
tS
Settling time
From current step to within 1% of final value
30
µs
75
nV/√Hz
NOISE, RTI (1)
Voltage noise density
ENABLE
IEN
Leakage input current
0 V ≤ VENABLE ≤ VS
100
nA
VIH
High-level input voltage
TA = –40°C to +125°C
1.35
5.5
V
VIL
Low-level input voltage
TA = –40°C to +125°C
0
0.4
VHYS
Hysteresis
IODIS
Disabled output leakage
1
100
VS = 1.8 V, VOUT = 0 V to 1.8 V, VENABLE = 0 V
V
mV
1
5
43
65
µA
POWER SUPPLY
IQ
Quiescent current
IQDIS
Quiescent current disabled
(1)
VSENSE = 0 mV, VS = 1.8 V
VSENSE = 0 mV, VS = 1.8 V, TA = –40°C to +125°C
VENABLE < 0.4, VSENSE = 0 mV
85
10
100
µA
nA
RTI = referred-to-input.
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6.6 Typical Characteristics
at TA = 25°C, VS = 1.8 V, VIN+ = 12 V, VENABLE = VS, and all gain options (unless otherwise noted)
15
Population
Offset Voltage (PV)
10
5
0
-5
-12
-10.8
-9.6
-8.4
-7.2
-6
-4.8
-3.6
-2.4
-1.2
0
1.2
2.4
3.6
4.8
6
7.2
8.4
9.6
10.8
12
-10
Input Offset Voltage (PV)
-15
-50
Figure 1. Input Offset Voltage Production Distribution
0
25
50
75
Temperature (qC)
100
125
150
D006
Figure 2. Offset Voltage vs Temperature
0.1
Common-Mode Rejection Ratio (PV/V)
33000
30000
27000
24000
Population
-25
D118
21000
18000
15000
12000
9000
6000
3000
-0.25
-0.225
-0.2
-0.175
-0.15
-0.125
-0.1
-0.075
-0.05
-0.025
0
0.025
0.05
0.075
0.1
0.125
0.15
0.175
0.2
0.225
0.25
0
0.08
0.06
0.04
0.02
0
-0.02
-0.04
-0.06
-0.08
-0.1
-50
D119
-25
0
25
50
75
Temperature (qC)
100
125
150
D012
Common-Mode Rejection Ratio (PV/V)
Figure 4. Common-Mode Rejection Ratio vs Temperature
D116
-0.25
-0.225
-0.2
-0.175
-0.15
-0.125
-0.1
-0.075
-0.05
-0.025
0
0.025
0.05
0.075
0.1
0.125
0.15
0.175
0.2
0.225
0.25
-0.35
-0.33
-0.31
-0.29
-0.27
-0.25
-0.23
-0.21
-0.19
-0.17
-0.15
-0.13
-0.11
-0.09
-0.07
-0.05
-0.03
-0.01
0.01
0.03
0.05
Population
Population
Figure 3. Common-Mode Rejection Production Distribution
Gain Error (%)
A1 devices
A2, A3, A4, A5 devices
Figure 5. Gain Error Production Distribution
6
D117
Gain Error (%)
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Figure 6. Gain Error Production Distribution
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Typical Characteristics (continued)
at TA = 25°C, VS = 1.8 V, VIN+ = 12 V, VENABLE = VS, and all gain options (unless otherwise noted)
0.2
60
0.16
50
0.12
40
Gain Error (%)
0.08
Gain (dB)
0.04
0
-0.04
-0.08
30
20
10
A1
A2
A3
A4
A5
0
-0.12
-10
-0.16
-0.2
-50
-25
0
25
50
75
Temperature (qC)
100
125
-20
10
150
100
1k
10k
Frequency (Hz)
D018
100k
1M
D019
VS = 5 V
Figure 8. Gain vs Frequency
Figure 7. Gain Error vs Temperature
160
Common-Mode Rejection Ratio (dB)
Power-Supply Rejection Ratio (dB)
140
120
100
80
60
40
20
0
10
100
1k
10k
Frequency (Hz)
100k
140
120
100
80
60
40
10
1M
100
1k
10k
Frequency (Hz)
D020
100k
1M
D021
VS = 5 V
Figure 9. Power-Supply Rejection Ratio vs Frequency
Figure 10. Common-Mode Rejection Ratio vs Frequency
Vs
Vs
-40°C
25°C
125°C
GND+0.8
GND+0.4
Vs-2
Y
Output Swing (V)
Vs-0.8
Y
Output Swing (V)
Vs-0.4
-40°C
25°C
125°C
Vs-1
GND+2
GND+1
GND
GND
0
1
2
3
4
5
6
7
Output Current (mA)
8
9
10
11
0
D010
VS = 1.8 V
5
10
15
20
25
Output Current (mA)
30
35
D009
VS = 5.0 V
Figure 11. Output Voltage Swing vs Output Current
Figure 12. Output Voltage Swing vs Output Current
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Typical Characteristics (continued)
0.25
0.25
0.2
0.2
0.15
0.15
Input Bias Current (nA)
Input Bias Current (nA)
at TA = 25°C, VS = 1.8 V, VIN+ = 12 V, VENABLE = VS, and all gain options (unless otherwise noted)
0.1
0.05
0
-0.05
-0.1
-0.15
0.1
0.05
0
-0.05
-0.1
-0.15
-0.2
-0.2
-0.25
-0.25
0
5
10
15
20
25
30
Common-Mode Voltage (V)
35
40
0
5
VS = 5.0 V, VSENSE = 0 V
35
40
D025
Figure 13. Input Bias Current vs Common-Mode Voltage
Figure 14. Input Bias Current vs Common-Mode Voltage
(Shutdown)
7
70
6
65
5
60
4
3
2
1
0
-1
-50
VS = 1.8V
VS = 3.3V
VS = 5V
55
50
45
40
35
30
-25
0
25
50
75
Temperature (qC)
100
125
25
-50
150
-25
0
D026
VSENSE = 0 V
125
150
D101
60
VS = 1.8 V
VS = 3.3 V
VS = 5.0 V
VS = 1.8V
VS = 5V
55
Quiescent Current (PA)
180
100
Figure 16. Quiescent Current vs Temperature (Enabled)
240
210
25
50
75
Temperature (qC)
VENABLE = VS
Figure 15. Input Bias Current vs Temperature
Quiescent Current (nA)
15
20
25
30
Common-Mode Voltage (V)
VENABLE = 0 V, VSENSE = 0 V
Quiescent Current (PA)
Input Bias Current (nA)
10
D024
150
120
90
60
30
50
45
40
35
0
-30
-50
-25
0
25
50
75
Temperature (qC)
100
125
150
30
-5
D002
0
5
10
15
20
25
30
Common-Mode Voltage (V)
35
40
D103
VENABLE = 0 V
Figure 17. Quiescent Current vs Temperature (Disabled)
8
Figure 18. Quiescent Current vs Common Mode Voltage
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Typical Characteristics (continued)
at TA = 25°C, VS = 1.8 V, VIN+ = 12 V, VENABLE = VS, and all gain options (unless otherwise noted)
Referred-to-Input
Voltage Noise (0.5 PV/div)
80
70
60
50
40
30
20
10
10
100
1k
Frequency (Hz)
10k
Time (1 s/div)
100k
D031
D030
Figure 20. 0.1-Hz to 10-Hz Input-Referred Voltage Noise
VCM
VOUT
Common-Mode Voltage (10 V/div)
Input Voltage
5 mV/div
Output Voltage
500 mV/div
Figure 19. Input-Referred Voltage Noise vs Frequency
0V
0V
VOUT (25 mV/div)
Input-Referred Voltage Noise (nV/—Hz)
100
0V
1V
Time (20Ps/div)
Time (500 Ps/div)
D111
D112
VS = 5.0 V, 10-mVPP input step
Figure 21. Step Response
Figure 22. Common-Mode Voltage Transient Response
Noninverting Input
Output
Voltage (1 V/div)
Voltage (1 V/div)
Inverting Input
Output
0V
0V
Time (20 Ps/div)
Time (20 Ps/div)
D113
D114
VS = 5.0 V
Figure 23. Inverting Differential Input Overload Recovery
Figure 24. Noninverting Differential Input Overload
Recovery
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Typical Characteristics (continued)
at TA = 25°C, VS = 1.8 V, VIN+ = 12 V, VENABLE = VS, and all gain options (unless otherwise noted)
Voltage (1 V/div)
Supply Voltage
Output Voltage
Voltage (1V/div)
Supply Voltage
Output Voltage
0V
0V
Time (10Ps/div)
Time (100Ps/div)
D108
D110
VS = 5.0 V, A2 device
VS = 5.0 V, A3 device
Figure 25. Start-Up Response
Figure 26. Brownout Recovery
120
Enable
Output
IBN
IBP
100
Voltage (1 V/div)
Input Bias Current (nA)
80
60
40
20
0
-20
-40
-60
-80
0V
-100
-120
Time (250 Ps/div)
0
20
40
D021
VS = 5.0 V, A3 device
180
200
D120
VS = 5.0 V, A1 device
Figure 27. Enable and Disable Response
Figure 28. IB+ and IB– vs Differential Input Voltage
30
2.75
IBP
IBN
-40qC
25qC
125qC
2.5
Output Leakage Current (PA)
20
Input Bias Current (nA)
60
80 100 120 140 160
Differential Input Voltage (mV)
10
0
-10
-20
2.25
2
1.75
1.5
1.25
1
0.75
0.5
0.25
-30
0
0
5
10
15 20 25 30 35 40
Differential Input Voltage (mV)
45
50
55
VS = 5.0 V, A2, A3, A4, A5 devices
0.5
1
1.5
2
2.5
3
3.5
Output Voltage (V)
4
4.5
5
D105
VS = 5.0 V, VENABLE = 0 V, A1, A2, A3 devices
Figure 29. IB+ and IB– vs Differential Input Voltage
10
0
D007
Figure 30. Output Leakage vs Output Voltage
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Typical Characteristics (continued)
at TA = 25°C, VS = 1.8 V, VIN+ = 12 V, VENABLE = VS, and all gain options (unless otherwise noted)
5000
5.5
-40qC
25qC
125qC
4.5
A5
1000
Output Impedance (:)
Output Leakage Current (PA)
5
4
3.5
3
2.5
2
1.5
A4
A1
100
A2
A3
10
Gain Variants
A1
A2
A3
A4
A5
1
1
0.5
0
0
0.5
1
1.5
2
2.5
3
3.5
Output Voltage (V)
4
4.5
5
0.1
10
D107
VS = 5.0 V, VENABLE = 0 V, A4, A5 devices
Figure 31. Output Leakage vs Output Voltage
100
1k
10k
100k
Frequency (Hz)
1M
Product Folder Links: INA191
D050
VS = 5.0 V, VCM = 0 V
Figure 32. Output Impedance vs Frequency
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7 Detailed Description
7.1 Overview
The INA191 is a low bias current, 40-V common-mode, current-sensing amplifier with an enable pin. When
disabled, the output goes to a high-impedance state, and the supply current draw is reduced to less than 0.1 µA.
The INA191 is intended for use in either low-side and high-side current-sensing configurations where high
accuracy and low current consumption are required. The INA191 is a specially designed, current-sensing
amplifier that accurately measure voltages developed across current-sensing resistors on common-mode
voltages that far exceed the supply voltage. Current can be measured on input voltage rails as high as 40 V, with
a supply voltage as low as 1.7 V.
7.2 Functional Block Diagram
VS
ENABLE
TI-DeviceTM
IN+
+
±
±
+
±
OUT
+
IN±
GND
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7.3 Feature Description
7.3.1 Precision Current Measurement
The INA191 provides accurate current measurements over a wide dynamic range. The high accuracy of the
device is attributable to the low gain error and offset specifications. The offset voltage of the INA191 is less than
12 µV. In this case, the low offset improves the accuracy at light loads when VIN+ approaches VIN–.
Another advantage of low offset is the ability to use a lower-value shunt resistor that reduces the power loss in
the current-sense circuit, and improves the power efficiency of the end application.
The maximum gain error of the INA191 is specified to be within 0.25% for most gain options. As the sensed
voltage becomes much larger than the offset voltage, the gain error becomes the dominant source of error in the
current-sense measurement. When the device monitors currents near the full-scale output range, the total
measurement error approaches the value of the gain error.
7.3.2 Low Input Bias Current
The INA191 is different from many current-sense amplifiers because this device offers very low input bias
current. The low input bias current of the INA191 has three primary benefits.
The first benefit is the reduction of the current consumed by the device in both the enabled and disabled states.
Classical current-sense amplifier topologies typically consume tens of microamps of current at the inputs. For
these amplifiers, the input current is the result of the resistor network that sets the gain and additional current to
bias the input amplifier. To reduce the bias current to near zero, the INA191 uses a capacitively coupled amplifier
on the input stage, followed by a difference amplifier on the output stage.
The second benefit of low bias current is the ability to use input filters to reject high-frequency noise before the
signal is amplified. In a traditional current-sense amplifier, the addition of input filters comes at the cost of
reduced accuracy. However, as a result of the low bias currents, input filters have little effect on the
measurement accuracy of the INA191.
The third benefit of low bias current is the ability to use a larger current-sense resistor. This ability allows the
device to accurately monitor currents as low as 1 µA.
7.3.3 Low Quiescent Current With Output Enable
The device features low quiescent current (IQ), while still providing sufficient small-signal bandwidth to be usable
in most applications. The quiescent current of the INA191 is only 43 µA (typ), while providing a small-signal
bandwidth of 35 kHz in a gain of 100. The low IQ and good bandwidth allow the device to be used in many
portable electronic systems without excessive drain on the battery. Because many applications only need to
periodically monitor current, the INA191 features an enable pin that turns off the device until needed. When in
the disabled state, the INA191 typically draws 10 nA of total supply current.
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Feature Description (continued)
7.3.4 High-Side and Low-Side Current Sensing
The INA191 supports input common-mode voltages from –0.2 V to +40 V. Because of the internal topology, the
common-mode range is not restricted by the power-supply voltage (VS). The ability to operate with commonmode voltages greater or less than VS allows the INA191 to be used in high-side and low-side current-sensing
applications, as shown in Figure 33.
Bus Suppl y
up to +40 V
IN+
High-Side Se nsing
Commo n-mode volta ge (VCM )
is b us-voltage depen dent.
R SENS E
IN±
LOA D
IN+
R SENS E
Low-Side Se nsing
Commo n-mode volta ge (VCM )
is a lwa ys n ear groun d a nd is
isolated fro m bus-voltage sp ikes.
IN±
Figure 33. High-Side and Low-Side Sensing Connections
7.3.5 High Common-Mode Rejection
The INA191 uses a capacitively coupled amplifier on the front end. Therefore, dc common-mode voltages are
blocked from downstream circuits, resulting in very high common-mode rejection. Typically, the common-mode
rejection of the INA191 is approximately 150 dB. The ability to reject changes in the dc common-mode voltage
allows the INA191 to monitor both high- and low-voltage rail currents with very little change in the offset voltage.
7.3.6 Rail-to-Rail Output Swing
The INA191 supports linear current-sensing operation with the output close to the supply rail and ground. The
maximum specified output swing to the positive rail is VS – 40 mV, and the maximum specified output swing to
GND is only GND + 1 mV with –10 mV of differential overdrive. For cases where the sense current is zero, the
swing to ground is determined by the zero current output specification. The value of the zero current output
voltage can differ from the specified value depending on the common mode voltage, supply voltage, and output
load. The close-to-rail output swing maximizes the usable output range, particularly when operating the device
from a 1.8-V supply.
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7.4 Device Functional Modes
7.4.1 Normal Operation
The INA191 is in normal operation when the following conditions are met:
• The power-supply voltage (VS) is between 1.7 V and 5.5 V.
• The common-mode voltage (VCM) is within the specified range of –0.2 V to +40 V.
• The maximum differential input signal times the gain is less than VS minus the output voltage swing to VS.
• The ENABLE pin is driven or connected to VS.
• The minimum differential input signal times the gain is greater than the swing to GND (see the Rail-to-Rail
Output Swing section).
During normal operation, this device produces an output voltage that is the amplified representation of the
difference voltage from IN+ to IN–.
7.4.2 Input Differential Overload
If the differential input voltage (VIN+ – VIN–) times gain exceeds the voltage swing specification, the INA191 drives
the output as close as possible to the positive supply or ground, and does not provide accurate measurement of
the differential input voltage. If this input overload occurs during normal circuit operation, then reduce the value of
the shunt resistor or use a lower-gain version with the chosen sense resistor to avoid this mode of operation. If a
differential overload occurs in a fault event, then the output of the INA191 returns to the expected value
approximately 40 µs after the fault condition is removed. When the differential voltage exceeds approximately
300 mV, the differential input impedance reduces to 3.3 kΩ, and results in a rapid increase in bias currents as
the differential voltage increases. A 3.3-kΩ resistance exists between IN+ and IN– during a differential overload
condition; therefore, currents flowing into the IN+ pin flow out of the IN– pin. An increase in bias currents during a
input differential overload occurs even with the device is powered down. Input differential overloads less than the
absolute maximum voltage rating do not damage the device or result in an output inversion.
7.4.3 Shutdown
The INA191 features an active-high ENABLE pin that shuts down the device when pulled to ground. When the
device is shut down, the quiescent current is reduced to 10 nA (typ), the input bias currents are further reduced,
and the output goes to a high-impedance state. When disabled, the low quiescent and input currents extend the
battery lifetime when the current measurement is not needed. When the ENABLE pin is driven to the supply
voltage, the device turns back on. When enabled, the typical output settling time is 130 µs.
The output of the INA191 goes to a high-impedance state when disabled; therefore, it is possible to connect
multiple outputs of the INA191 together to a single ADC or measurement device, as shown in Figure 34. When
connected in this way, enable only one INA191 at a time, and make sure both devices have the same supply
voltage.
Bus Voltage1
up to 40 V
RSENSE
Supply Voltage
1.7 V to 5.5 V
LOAD
0.1 F
ENABLE
GPIO1
VS
IN±
TI-DeviceTM
ADC
OUT
Microcontroller
IN+
GND
GPIO2
Bus Voltage2
up to 40 V
RSENSE
Supply Voltage
1.7 V to 5.5 V
LOAD
0.1 F
ENABLE
VS
IN±
TI-DeviceTM
OUT
IN+
GND
Figure 34. Multiplexing Multiple Devices With the ENABLE Pin
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The INA191 amplifies the voltage developed across a current-sensing resistor as current flows through the
resistor to the load or ground.
8.1.1 Basic Connections
Figure 35 shows the basic connections of the INA191. Connect the input pins (IN+ and IN–) as closely as
possible to the shunt resistor to minimize any resistance in series with the shunt resistor. The ENABLE pin must
be controlled externally or connected to VS if not used.
Bus Voltage
up to +40 V
100 pA
(typ)
Sup ply Vo ltag e
1.7 V to 5.5 V
R SENS E
LOA D
0.1 …F
100 pA
(typ)
ENABL E
VS
IN±
TI-DeviceTM
OUT
ADC
Microco ntr oller
IN+
GND
Figure 35. Basic Connections for the INA191
A power-supply bypass capacitor of at least 0.1 µF is required for proper operation. Applications with noisy or
high-impedance power supplies may require additional decoupling capacitors to reject power-supply noise.
Connect bypass capacitors close to the device pins.
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Application Information (continued)
8.1.2 RSENSE and Device Gain Selection
The accuracy of any current-sense amplifier is maximized by choosing the current-sense resistor to be as large
as possible. A large sense resistor maximizes the differential input signal for a given amount of current flow and
reduces the error contribution of the offset voltage. However, there are practical limits as to how large the
current-sense resistor can be in a given application because of the resistor size and maximum allowable power
dissipation. Equation 1 gives the maximum value for the current-sense resistor for a given power dissipation
budget:
PDMAX
RSENSE
IMAX2
where:
•
•
PDMAX is the maximum allowable power dissipation in RSENSE.
IMAX is the maximum current that flows through RSENSE.
(1)
An additional limitation on the size of the current-sense resistor and device gain is due to the power-supply
voltage, VS, and device swing-to-rail limitations. In order to make sure that the current-sense signal is properly
passed to the output, both positive and negative output swing limitations must be examined. Equation 2 provides
the maximum values of RSENSE and GAIN to keep the device from hitting the positive swing limitation.
IMAX u RSENSE u GAIN VSP
where:
•
•
•
IMAX is the maximum current that flows through RSENSE.
GAIN is the gain of the current-sense amplifier.
VSP is the positive output swing as specified in the data sheet.
(2)
To avoid positive output swing limitations when selecting the value of RSENSE, there is always a trade-off between
the value of the sense resistor and the gain of the device under consideration. If the sense resistor selected for
the maximum power dissipation is too large, then it is possible to select a lower-gain device in order to avoid
positive swing limitations.
The zero current output voltage places a limit on how small of a sense resistor can be used in a given
application. Equation 3 provides the limit on the minimum size of the sense resistor.
IMIN u RSENSE u GAIN ! VZL
where:
•
•
•
IMIN is the minimum current flows through RSENSE.
GAIN is the gain of the current-sense amplifier.
VZL is the zero current output voltage of the device (see the Rail-to-Rail Output Swing section for more
information).
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Application Information (continued)
8.1.3 Signal Conditioning
When performing accurate current measurements in noisy environments, the current-sensing signal is often
filtered. The INA191 features low input bias currents. Therefore, it is possible to add a differential mode filter to
the input without sacrificing the current-sense accuracy. Filtering at the input is advantageous because this
action attenuates differential noise before the signal is amplified. Figure 36 provides an example of how to use a
filter on the input pins of the device.
Bus Voltage
up to 40 V
VS
1.7 V to 5.5 V
RSENSE
Load
f3dB
1
4SRFCF
CF
VS
ENABLE
Capacitively Coupled
Amplifier
IN±
RF
±
RDIFF
OUT
VOUT
+
RF
IN+
TI-DeviceTM
Figure 36. Filter at the Input Pins
The differential input impedance (RDIFF) shown in Figure 36 limits the maximum value for RF. The value of RDIFF
is a function of the device temperature and gain option, as shown in Figure 37.
6
A1
A2, A3, A4, A5
Input Impedance (M:)
5
4
3
2
1
-50
-25
0
25
50
75
Temperature (qC)
100
125
150
D115
Figure 37. Differential Input Impedance vs Temperature
18
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Application Information (continued)
As the voltage drop across the sense resistor (VSENSE) increases, the amount of voltage dropped across the input
filter resistors (RF) also increases. The increased voltage drop results in additional gain error. The error caused
by these resistors is calculated by the resistor divider equation shown in Equation 4.
Error(%)
§
RDIFF
¨1
¨ RSENSE RDIFF
©
2 u RF
·
¸ u 100
¸
¹
where:
•
•
•
RSENSE is the current sense resistor, as defined in Equation 1.
RDIFF is the differential input impedance.
RF is the added value of the series filter resistance.
(4)
The input stage of the INA191 uses a capacitive feedback amplifier topology in order to achieve high dc
precision. As a result, periodic high-frequency shunt voltage (or current) transients of significant amplitude (10
mV or greater) and duration (hundreds of nanoseconds or greater) may be amplified by the INA191, even though
the transients are greater than the device bandwidth. Use a differential input filter in these applications to
minimize disturbances at the INA191 output.
The high input impedance and low bias current of the INA191 provides flexibility in the input filter design without
impacting the accuracy of current measurement. For example, set RF = 100 Ω and CF = 22 nF to achieve a lowpass filter corner frequency of 36.2 kHz. These filter values significantly attenuate most unwanted high-frequency
signals at the input without severely impacting the current-sensing bandwidth or precision. If a lower corner
frequency is desired, increase the value of CF.
Filtering the input filters out differential noise across the sense resistor. If high-frequency, common-mode noise is
a concern, add an RC filter from the OUT pin to ground. The RC filter helps filter out both differential and
common mode noise, as well as internally generated noise from the device. The value for the resistance of the
RC filter is limited by the impedance of the load. Any current drawn by the load manifests as an external voltage
drop from the INA191 OUT pin to the load input. To select the optimal values for the output filter, use Figure 32
and see the Closed-Loop Analysis of Load-Induced Amplifier Stability Issues Using ZOUT Application Report
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Application Information (continued)
8.1.4 Common-Mode Voltage Transients
With a small amount of additional circuitry, the INA191 can be used in circuits subject to transients that exceed
the absolute maximum voltage ratings. The most simple way to protect the inputs from negative transients is to
add resistors in series to the IN– and IN+ pins. Use resistors that are 1 kΩ or less, and limit the current in the
ESD structures to less than 5 mA. For example, using 1-kΩ resistors in series with the INA191 allows voltages
as low as –5 V, while limiting the ESD current to less than 5 mA. If protection from high-voltage or morenegative, common-voltage transients is needed, use the circuits shown in Figure 38 and Figure 39. When
implementing these circuits, use only Zener diodes or Zener-type transient absorbers (sometimes referred to as
transzorbs); any other type of transient absorber has an unacceptable time delay. Start by adding a pair of
resistors as a working impedance for the Zener diode, as shown in Figure 38. Keep these resistors as small as
possible; most often, use around 100 Ω. Larger values can be used with an effect on gain that is discussed in the
Signal Conditioning section. This circuit limits only short-term transients; therefore, many applications are
satisfied with a 100-Ω resistor along with conventional Zener diodes of the lowest acceptable power rating. This
combination uses the least amount of board space. These diodes can be found in packages as small as SOT523 or SOD-523.
Bus Voltage
up to 40 V
VS
1.7 V to 5.5 V
RSENSE
Load
TI-'HYLFHŒ
RPROTECT
ENABLE
CBYPASS
0.1 µF
VS
IN±
< 1 k:
Capacitively
Coupled
Amplifier
±
OUT
VOUT
+
RPROTECT
IN+
< 1 k:
GND
Figure 38. Transient Protection Using Dual Zener Diodes
In the event that low-power Zener diodes do not have sufficient transient absorption capability, a higher-power
transzorb must be used. The most package-efficient solution involves using a single transzorb and back-to-back
diodes between the device inputs, as shown in Figure 39. The most space-efficient solutions are dual, seriesconnected diodes in a single SOT-523 or SOD-523 package. In either of the examples shown in Figure 38 and
Figure 39, the total board area required by the INA191 with all protective components is less than that of an SO8 package, and only slightly greater than that of an VSSOP-8 package.
Bus Voltage
up to 40 V
VS
1.7 V to 5.5 V
RSENSE
Load
TI-'HYLFHŒ
RPROTECT
ENABLE
CBYPASS
0.1 µF
VS
IN±
< 1 k:
Capacitively
Coupled
Amplifier
Transorb
±
OUT
VOUT
+
RPROTECT
IN+
< 1 k:
GND
Figure 39. Transient Protection Using a Single Transzorb and Input Clamps
For more information, see Current Shunt Monitor With Transient Robustness Reference Design.
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8.2 Typical Applications
8.2.1 Microamp Current Measurement
The low input bias current of the INA191 provides accurate monitoring of small-value currents. To accurately
monitor currents in the microamp range, increase the value of the sense resistor to increase the sense voltage
so that the error introduced by the offset voltage is small. The circuit configuration to monitor low-value currents
is shown in Figure 40. As a result of the differential input impedance of the INA191, limit the value of RSENSE to 1
kΩ or less for best accuracy.
R SENS E ” 1kO
12 V
LOA D
5V
0.1 F
ENABL E
VS
IN±
TI-DeviceTM
OUT
IN+
GND
Figure 40. Measuring Microamp Currents
8.2.1.1 Design Requirements
The design requirements for the circuit shown in Figure 40, are listed in Table 1
Table 1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Power-supply voltage (VS)
5V
Bus supply rail (VCM)
12 V
Minimum sense current (IMIN)
1 µA
Maximum sense current (IMAX)
150 µA
Device gain (GAIN)
25 V/V
8.2.1.2 Detailed Design Procedure
The maximum value of the current-sense resistor is calculated based choice of gain, value of the maximum
current the be sensed (IMAX), and the power supply voltage (VS). When operating at the maximum current, the
output voltage must not exceed the positive output swing specification, VSP. Using Equation 5, for the given
design parameters the maximum value for RSENSE is calculated to be 1.321 kΩ.
VSP
RSENSE <
IMAX u GAIN
(5)
However, because this value exceeds the maximum recommended value for RSENSE, a resistance value of 1 kΩ
must be used. When operating at the minimum current value, IMIN the output voltage must be greater than the
swing to GND (VSN), specification. For this example, the output voltage at the minimum current is calculated
using Equation 6 to be 25 mV, which is greater than the value for VSN.
VOUTMIN IMIN u RSENSE u GAIN
(6)
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8.2.1.3 Application Curve
Figure 41 shows the output of the device when disabled and enabled while measuring a 40-µA load current.
When disabled, the current draw from the device supply and inputs is less than 106 nA.
Voltage (1 V/div)
Enable
Output
0V
Time (250 Ps/div)
D030
Figure 41. Output Disable and Enable Response
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9 Power Supply Recommendations
The input circuitry of the INA191 accurately measures beyond the power-supply voltage, VS. For example, VS
can be 5 V, whereas the bus supply voltage at IN+ and IN– can be as high as 40 V. However, the output voltage
range of the OUT pin is limited by the voltage on the VS pin. The INA191 also withstands the full differential input
signal range up to 40 V at the IN+ and IN– input pins, regardless of whether or not the device has power applied
at the VS pin. There is no sequencing requirement for VS and VIN+ or VIN–.
10 Layout
10.1 Layout Guidelines
•
•
•
Connect the input pins to the sensing resistor using a Kelvin or 4-wire connection. This connection technique
makes sure that only the current-sensing resistor impedance is detected between the input pins. Poor routing
of the current-sensing resistor commonly results in additional resistance present between the input pins.
Given the very low ohmic value of the current resistor, any additional high-current carrying impedance can
cause significant measurement errors.
Place the power-supply bypass capacitor as close as possible to the device power supply and ground pins.
The recommended value of this bypass capacitor is 0.1 µF. To compensate for noisy or high-impedance
power supplies, add more decoupling capacitance.
When routing the connections from the current-sense resistor to the device, keep the trace lengths as short
as possible. Place input filter capacitor CF as close as possible to the input pins of the device.
10.2 Layout Example
RSHUNT
RF(1)
RF(1)
CF(1)
VIA to Ground
Plane
IN±
B1
A1
IN+
GND
B2
A2
VS
ENABLE
B3
A3
OUT
Connect to Supply
(1.7 V to 5.5 V)
CBYPASS
Current
Sense Output
Connect to Control or VS
(Do not float)
Figure 42. Recommended Layout DSBGA (YFD) Package
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11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Documentation
For related documentation see the following:
Texas Instruments, INA191EVM user's guide
11.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OUTLINE
INA191AxIYFD
YFD0006-C02
DSBGA - 0.4 mm max height
SCALE 14.000
DIE SIZE BALL GRID ARRAY
A
1.20
1.14
B
BALL A1
CORNER
0.80
0.73
0.4 MAX
C
SEATING PLANE
0.175
0.125
BALL TYP
0.05 C
0.8 TYP
B
SYMM
0.4
TYP
A
6X
0.015
0.285
0.185
C A B
2
1
3
SYMM
0.4
TYP
4224626/B 02/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
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EXAMPLE BOARD LAYOUT
INA191AxIYFD
YFD0006-C02
DSBGA - 0.4 mm max height
DIE SIZE BALL GRID ARRAY
(0.4) TYP
6X (
0.225)
1
3
2
A
SYMM
(0.4) TYP
B
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:50X
0.05 MAX
( 0.225)
METAL
EXPOSED
METAL
SOLDER MASK
OPENING
( 0.225)
SOLDER MASK
OPENING
0.05 MIN
EXPOSED
METAL
NON-SOLDER MASK
DEFINED
(PREFERRED)
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4224626/B 02/2019
NOTES: (continued)
3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
Refer to Texas Instruments Literature No. SNVA009 (www.ti.com/lit/snva009).
www.ti.com
26
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
Product Folder Links: INA191
INA191
www.ti.com
SLYS020A – FEBRUARY 2019 – REVISED APRIL 2019
EXAMPLE STENCIL DESIGN
INA191AxIYFD
YFD0006-C02
DSBGA - 0.4 mm max height
DIE SIZE BALL GRID ARRAY
(0.4) TYP
(R0.05) TYP
6X ( 0.25)
1
3
2
A
SYMM
(0.4) TYP
B
METAL
TYP
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE:50X
4224626/B 02/2019
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
www.ti.com
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
Product Folder Links: INA191
27
PACKAGE OPTION ADDENDUM
www.ti.com
19-Apr-2019
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
INA191A1IYFDR
ACTIVE
DSBGA
YFD
6
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
1E3
INA191A2IYFDR
ACTIVE
DSBGA
YFD
6
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
1E2
INA191A3IYFDR
ACTIVE
DSBGA
YFD
6
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
1E4
INA191A4IYFDR
ACTIVE
DSBGA
YFD
6
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
1E5
INA191A5IYFDR
ACTIVE
DSBGA
YFD
6
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
1E6
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
19-Apr-2019
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Jul-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
INA191A1IYFDR
DSBGA
YFD
6
3000
180.0
8.4
INA191A1IYFDR
DSBGA
YFD
6
3000
178.0
INA191A2IYFDR
DSBGA
YFD
6
3000
180.0
INA191A2IYFDR
DSBGA
YFD
6
3000
INA191A3IYFDR
DSBGA
YFD
6
INA191A3IYFDR
DSBGA
YFD
INA191A4IYFDR
DSBGA
YFD
INA191A4IYFDR
DSBGA
INA191A5IYFDR
INA191A5IYFDR
0.86
1.26
0.56
4.0
8.0
Q2
8.4
0.84
1.27
0.46
4.0
8.0
Q2
8.4
0.86
1.26
0.56
4.0
8.0
Q2
178.0
8.4
0.84
1.27
0.46
4.0
8.0
Q2
3000
178.0
8.4
0.84
1.27
0.46
4.0
8.0
Q2
6
3000
180.0
8.4
0.86
1.26
0.56
4.0
8.0
Q2
6
3000
178.0
8.4
0.84
1.27
0.46
4.0
8.0
Q2
YFD
6
3000
180.0
8.4
0.86
1.26
0.56
4.0
8.0
Q2
DSBGA
YFD
6
3000
180.0
8.4
0.86
1.26
0.56
4.0
8.0
Q2
DSBGA
YFD
6
3000
178.0
8.4
0.84
1.27
0.46
4.0
8.0
Q2
Pack Materials-Page 1
W
Pin1
(mm) Quadrant
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Jul-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
INA191A1IYFDR
DSBGA
YFD
6
3000
182.0
182.0
20.0
INA191A1IYFDR
DSBGA
YFD
6
3000
220.0
220.0
35.0
INA191A2IYFDR
DSBGA
YFD
6
3000
182.0
182.0
20.0
INA191A2IYFDR
DSBGA
YFD
6
3000
220.0
220.0
35.0
INA191A3IYFDR
DSBGA
YFD
6
3000
220.0
220.0
35.0
INA191A3IYFDR
DSBGA
YFD
6
3000
182.0
182.0
20.0
INA191A4IYFDR
DSBGA
YFD
6
3000
220.0
220.0
35.0
INA191A4IYFDR
DSBGA
YFD
6
3000
182.0
182.0
20.0
INA191A5IYFDR
DSBGA
YFD
6
3000
182.0
182.0
20.0
INA191A5IYFDR
DSBGA
YFD
6
3000
220.0
220.0
35.0
Pack Materials-Page 2
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AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
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