Texas Instruments | INAx180 Low- and high-side voltage output, current-sense amplifiers (Rev. F) | Datasheet | Texas Instruments INAx180 Low- and high-side voltage output, current-sense amplifiers (Rev. F) Datasheet

Texas Instruments INAx180 Low- and high-side voltage output, current-sense amplifiers (Rev. F) Datasheet
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INA180, INA2180, INA4180
SBOS741F – APRIL 2017 – REVISED MARCH 2019
INAx180 Low- and high-side voltage output, current-sense amplifiers
1 Features
3 Description
•
•
•
The INA180, INA2180, and INA4180 (INAx180)
current sense amplifiers are designed for costoptimized applications. These devices are part of a
family of current-sense amplifiers (also called currentshunt monitors) that sense voltage drops across
current-sense resistors at common-mode voltages
from –0.2 V to +26 V, independent of the supply
voltage. The INAx180 integrate a matched resistor
gain network in four, fixed-gain device options: 20
V/V, 50 V/V, 100 V/V, or 200 V/V. This matched gain
resistor network minimizes gain error and reduces the
temperature drift.
1
•
•
•
•
Common-mode range (VCM): –0.2 V to +26 V
High bandwidth: 350 kHz (A1 devices)
Offset voltage:
– ±150 µV (max) at VCM = 0 V
– ±500 µV (max) at VCM = 12 V
Output slew rate: 2 V/µs
Accuracy:
– ±1% gain error (max)
– 1-µV/°C offset drift (max)
Gain options:
– 20 V/V (A1 devices)
– 50 V/V (A2 devices)
– 100 V/V (A3 devices)
– 200 V/V (A4 devices)
Quiescent current: 260 µA max (INA180)
All these devices operate from a single 2.7-V to 5.5-V
power supply. The single-channel INA180 draws a
maximum supply current of 260 µA; whereas, the
dual-channel INA2180 draws a maximum supply
current of 500 µA, and the quad channel draws a
maximum supply current of 900 µA.
The INA180 is available in a 5-pin, SOT-23 package
with two different pin configurations. The INA2180 is
available in an 8-pin, VSSOP package. The INA4180
is available in a 14-pin, TSSOP package. All device
options are specified over the extended operating
temperature range of –40°C to +125°C.
2 Applications
•
•
•
•
•
•
Motor control
Battery monitoring
Power management
Lighting control
Overcurrent detection
Solar inverters
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
INA180
SOT-23 (5)
2.90 mm × 1.60 mm
INA2180
VSSOP (8)
3.00 mm × 3.00 mm
INA4180
TSSOP (14)
5.00 mm × 4.40 mm
(1) For all available packages, see the package option addendum
at the end of the datasheet.
Typical Application Circuit
Bus Voltage, VCM
Up To 26 V
Power Supply, VS
2.7 V to 5.5 V
RSENSE
CBYPASS
0.1 µF
Load
INA4180 (quad-channel)
INA2180 (dual-channel)
INA180 (single-channel)
VS
Microcontroller
IN±
±
OUT
ADC
+
IN+
GND
Copyright © 2017, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
INA180, INA2180, INA4180
SBOS741F – APRIL 2017 – REVISED MARCH 2019
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
4
4
6
7.1
7.2
7.3
7.4
7.5
7.6
6
6
6
6
7
8
Absolute Maximum Ratings .....................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description ............................................ 15
8.1
8.2
8.3
8.4
Overview .................................................................
Functional Block Diagrams .....................................
Feature Description.................................................
Device Functional Modes........................................
15
15
17
18
9
Application and Implementation ........................ 20
9.1 Application Information............................................ 20
9.2 Typical Application .................................................. 24
10 Power Supply Recommendations ..................... 26
10.1 Common-Mode Transients Greater Than 26 V .... 26
11 Layout................................................................... 27
11.1 Layout Guidelines ................................................. 27
11.2 Layout Examples................................................... 27
12 Device and Documentation Support ................. 30
12.1
12.2
12.3
12.4
12.5
12.6
12.7
Documentation Support ........................................
Related Links ........................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
30
30
30
30
30
30
30
13 Mechanical, Packaging, and Orderable
Information ........................................................... 31
4 Revision History
Changes from Revision E (July 2018) to Revision F
•
Page
Added new paragraph regarding phase reversal to end of Input Differential Overload section........................................... 19
Changes from Revision D (March 2018) to Revision E
•
Page
Added B version devices to Device Comparison table........................................................................................................... 4
Changes from Revision C (December 2017) to Revision D
Page
•
Changed INA4180 device from preview to production data (active) ...................................................................................... 1
•
Added new Figure 25 for INA4180 ...................................................................................................................................... 11
•
Added new Figure 28 for INA4180 ...................................................................................................................................... 11
Changes from Revision B (November 2017) to Revision C
Page
•
Changed INA2180 device from preview to production data (active) ...................................................................................... 1
•
Added "Both Inputs" to Figure 21 title ................................................................................................................................. 10
•
Added new Figure 24 for INA2180 ....................................................................................................................................... 10
•
Added new Figure 25 placeholder for INA4180 ................................................................................................................... 11
•
Added new Figure 27 for INA2180 ....................................................................................................................................... 11
•
Added new Figure 28 placeholder for INA4180 ................................................................................................................... 11
•
Changed Figure 29 ............................................................................................................................................................... 11
•
Added "(A3 Devices)" to end of Figure 29 title ..................................................................................................................... 11
•
Added new Figure 38 for INA2180 ....................................................................................................................................... 13
•
Changed "less than 150 µV" to "within ±150 µV" regarding offset voltage in Precise Low-Side Current Sensing section.. 17
•
Added text regarding RC filter and reference to application report to note at the bottom of Figure 45 ............................... 20
•
Deleted VS from Equation 2 ................................................................................................................................................. 21
2
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SBOS741F – APRIL 2017 – REVISED MARCH 2019
•
Added equation and curve for f-3dB to Figure 46 ................................................................................................................... 22
•
Added link to reference design TIDA-00302 to end of Common-Mode Transients Greater Than 26 V section.................. 27
•
Added new bullet to Layout Guidelines section.................................................................................................................... 27
Changes from Revision A (August 2017) to Revision B
Page
•
Added INA4180 preview device and associated content to data sheet ................................................................................. 1
•
Changed design parameter name in Table 3 from "Accuracy" to "Current sensing error" for clarity .................................. 24
•
Changed "RMS" to "RSS" in reference to equation 7 .......................................................................................................... 25
Changes from Original (April 2017) to Revision A
•
Page
Added INA2180 preview device and associated content to data sheet ................................................................................. 1
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SBOS741F – APRIL 2017 – REVISED MARCH 2019
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5 Device Comparison Table
PRODUCT
NUMBER OF CHANNELS
GAIN (V/V)
INA180A1 (1)
1
20
INA180A2 (1)
1
50
(1)
1
100
INA180A4 (1)
1
200
INA180B1 (1)
1
20
INA180B2 (1)
1
50
(1)
1
100
INA180B4 (1)
1
200
INA2180A1
2
20
INA2180A2
2
50
INA2180A3
2
100
INA2180A4
2
200
INA4180A1
4
20
INA4180A2
4
50
INA4180A3
4
100
INA4180A4
4
200
INA180A3
INA180B3
(1)
INA180A devices use pinout A. INA180B devices use pinout B. See the Pin Configuration and Functions section for more information.
6 Pin Configuration and Functions
INA180: DBV Package
5-Pin SOT-23 (Pinout A)
Top View
OUT
1
GND
2
IN+
3
5
INA180: DBV Package
5-Pin SOT-23 (Pinout B)
Top View
VS
4
IN±
IN+
1
GND
2
IN±
3
Not to scale
5
VS
4
OUT
Not to scale
Pin Functions: INA180 (Single Channel)
PIN
4
NAME
SOT-23
Pinout A
SOT-23
Pinout B
TYPE
GND
2
2
Analog
IN–
4
3
Analog input
Current-sense amplifier negative input. For high-side applications,
connect to load side of sense resistor. For low-side applications, connect
to ground side of sense resistor.
IN+
3
1
Analog input
Current-sense amplifier positive input. For high-side applications, connect
to bus-voltage side of sense resistor. For low-side applications, connect
to load side of sense resistor.
OUT
1
4
Analog output
VS
5
5
Analog
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DESCRIPTION
Ground
Output voltage
Power supply, 2.7 V to 5.5 V
Copyright © 2017–2019, Texas Instruments Incorporated
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SBOS741F – APRIL 2017 – REVISED MARCH 2019
INA2180: DGK Package
8-Pin VSSOP
Top View
INA4180: PW Package
14-Pin TSSOP
Top View
OUT1
1
8
VS
IN±1
2
7
IN+1
3
GND
4
OUT1
1
14
OUT4
OUT2
IN±1
2
13
IN±4
6
IN±2
IN+1
3
12
IN+4
5
IN+2
VS
4
11
GND
IN+2
5
10
IN+3
IN±2
6
9
IN±3
OUT2
7
8
OUT3
Not to scale
Not to scale
Pin Functions: INA2180 (Dual Channel) and INA4180 (Quad Channel)
PIN
NAME
TYPE
DESCRIPTION
INA2180
INA4180
GND
4
11
Analog
IN–1
2
2
Analog input
Current-sense amplifier negative input for channel 1. For high-side
applications, connect to load side of channel-1 sense resistor. For lowside applications, connect to ground side of channel-1 sense resistor.
IN+1
3
3
Analog input
Current-sense amplifier positive input for channel 1. For high-side
applications, connect to bus-voltage side of channel-1 sense resistor. For
low-side applications, connect to load side of channel-1 sense resistor.
IN–2
6
6
Analog input
Current-sense amplifier negative input for channel 2. For high-side
applications, connect to load side of channel-2 sense resistor. For lowside applications, connect to ground side of channel-2 sense resistor.
IN+2
5
5
Analog input
Current-sense amplifier positive input for channel 2. For high-side
applications, connect to bus-voltage side of channel-2 sense resistor. For
low-side applications, connect to load side of channel-2 sense resistor.
IN–3
—
9
Analog input
Current-sense amplifier negative input for channel 3. For high-side
applications, connect to load side of channel-3 sense resistor. For lowside applications, connect to ground side of channel-3 sense resistor.
IN+3
—
10
Analog input
Current-sense amplifier positive input for channel 3. For high-side
applications, connect to bus-voltage side of channel-3 sense resistor. For
low-side applications, connect to load side of channel-3 sense resistor.
IN–4
—
13
Analog input
Current-sense amplifier negative input for channel 4. For high-side
applications, connect to load side of channel-4 sense resistor. For lowside applications, connect to ground side of channel-4 sense resistor.
IN+4
—
12
Analog input
Current-sense amplifier positive input for channel 4. For high-side
applications, connect to bus-voltage side of channel-4 sense resistor. For
low-side applications, connect to load side of channel-4 sense resistor.
OUT1
1
1
Analog output
Channel 1 output voltage
OUT2
7
7
Analog output
Channel 2 output voltage
OUT3
—
8
Analog output
Channel 3 output voltage
OUT4
—
14
Analog output
Channel 4 output voltage
VS
8
4
Analog
Ground
Power supply, 2.7 V to 5.5 V
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
6
V
Supply voltage, VS
Differential (VIN+) – (VIN–)
Analog inputs, IN+, IN– (2)
Common-mode (3)
Output voltage
–26
26
GND – 0.3
26
GND – 0.3
VS + 0.3
V
8
mA
150
°C
150
°C
150
°C
Maximum output current, IOUT
Operating free-air temperature, TA
–55
Junction temperature, TJ
Storage temperature, Tstg
(1)
(2)
(3)
–65
V
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
VIN+ and VIN– are the voltages at the IN+ and IN– pins, respectively.
Input voltage at any pin can exceed the voltage shown if the current at that pin is limited to 5 mA.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
UNIT
±3000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
V
±1000
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
MIN
NOM
MAX
–0.2
12
26
V
Operating supply voltage
2.7
5
5.5
V
Operating free-air temperature
–40
125
°C
VCM
Common-mode input voltage (IN+ and IN–)
VS
TA
UNIT
7.4 Thermal Information
THERMAL METRIC
(1)
INA180
INA2180
INA4180
DBV (SOT-23)
DGK (VSSOP)
PW (TSSOP)
6 PINS
8 PINS
20 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
197.1
177.9
115.9
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
95.8
65.6
44.3
°C/W
RθJB
Junction-to-board thermal resistance
53.1
99.3
59.2
°C/W
ψJT
Junction-to-top characterization parameter
23.4
10.5
4.7
°C/W
ψJB
Junction-to-board characterization parameter
52.7
97.9
58.6
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
N/A
N/A
°C/W
(1)
6
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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SBOS741F – APRIL 2017 – REVISED MARCH 2019
7.5 Electrical Characteristics
at TA = 25°C, VS = 5 V, VIN+ = 12 V, and VSENSE = VIN+ – VIN– (unless otherwise noted)
PARAMETER
CONDITIONS
MIN
TYP
84
100
MAX
UNIT
INPUT
CMRR
Common-mode rejection ratio,
RTI (1)
VOS
Offset voltage (2), RTI
dVOS/dT
PSRR
VIN+ = 0 V to 26 V, VSENSE = 10 mV,
TA = –40°C to +125°C
dB
±100
±500
VIN+ = 0 V
±25
±150
Offset drift, RTI
TA = –40°C to +125°C
0.2
1
μV/°C
Power-supply rejection ratio, RTI
VS = 2.7 V to 5.5 V, VSENSE = 10 mV
±8
±40
μV/V
VSENSE = 0 mV, VIN+ = 0 V
0.1
VSENSE = 0 mV
80
VSENSE = 0 mV
±0.05
IIB
Input bias current
IIO
Input offset current
μV
µA
µA
OUTPUT
A1 devices
G
Gain
EG
20
A2 devices
50
A3 devices
100
A4 devices
200
Gain error
VOUT = 0.5 V to VS – 0.5 V,
TA = –40°C to +125°C
Gain error vs temperature
TA = –40°C to +125°C
Nonlinearity error
VOUT = 0.5 V to VS – 0.5 V
Maximum capacitive load
No sustained oscillation
V/V
±0.1%
±1%
1.5
20
ppm/°C
±0.01%
1
nF
VOLTAGE OUTPUT (3)
VSP
Swing to VS power-supply rail (4)
VSN
(4)
Swing to GND
RL = 10 kΩ to GND, TA = –40°C to +125°C
(VS) – 0.02
(VS) – 0.03
V
RL = 10 kΩ to GND, TA = –40°C to +125°C
(VGND) +
0.0005
(VGND) +
0.005
V
FREQUENCY RESPONSE
BW
Bandwidth
SR
Slew rate
A1 devices, CLOAD = 10 pF
350
A2 devices, CLOAD = 10 pF
210
A3 devices, CLOAD = 10 pF
150
A4 devices, CLOAD = 10 pF
105
kHz
2
V/µs
40
nV/√Hz
NOISE, RTI
Voltage noise density
POWER SUPPLY
INA180
IQ
Quiescent current
INA2180
INA4180
(1)
(2)
(3)
(4)
VSENSE = 10 mV
197
VSENSE = 10 mV, TA = –40°C to +125°C
VSENSE = 10 mV
300
355
VSENSE = 10 mV, TA = –40°C to +125°C
VSENSE = 10 mV
260
500
520
690
VSENSE = 10 mV, TA = –40°C to +125°C
µA
900
1000
RTI = referred-to-input.
Offset voltage is obtained by linear extrapolation to VSENSE = 0 V with VSENSE = 10% to 90% of full-scale-range.
See Figure 19.
Swing specifications are tested with an overdriven input condition.
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7.6 Typical Characteristics
-165
-150
-135
-120
-105
-90
-75
-60
-45
-30
-15
0
15
30
45
60
75
90
105
120
135
150
-95
-85
-75
-65
-55
-45
-35
-25
-15
-5
5
15
25
35
45
55
65
75
85
95
105
115
Population
Population
at TA = 25°C, VS = 5 V, and VIN+ = 12 V (unless otherwise noted)
D001
Input Offset Voltage (PV)
Input Offset Voltage (PV)
D002
VIN+ = 0 V
VIN+ = 0 V
Figure 2. Input Offset Voltage Production Distribution A2
-80
-70
-60
-50
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
90
100
110
120
130
Population
-80
-70
-60
-50
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
90
100
110
120
130
Population
Figure 1. Input Offset Voltage Production Distribution A1
D003
Input Offset Voltage (PV)
Input Offset Voltage (PV)
VIN+ = 0 V
D004
VIN+ = 0 V
Figure 3. Input Offset Voltage Production Distribution A3
Figure 4. Input Offset Voltage Production Distribution A4
100
A1
A2
A3
A4
Population
Offset Voltage (PV)
50
0
-100
-50
-25
0
25
50
75
Temperature (qC)
100
125
150
D005
-55
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
5
10
15
20
25
30
35
40
45
50
-50
Common-Mode Rejection Ratio (PV/V)
VIN+ = 0 V
D006
Figure 5. Offset Voltage vs Temperature
Figure 6. Common-Mode Rejection Production Distribution
A1
8
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Typical Characteristics (continued)
-11
-10
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
1
2
3
4
5
6
7
8
9
10
Population
-32
-29
-26
-23
-20
-17
-14
-11
-8
-5
-2
1
4
7
10
13
16
19
22
25
28
31
Population
at TA = 25°C, VS = 5 V, and VIN+ = 12 V (unless otherwise noted)
D007
Common-Mode Rejection Ratio (PV/V)
D008
Common-Mode Rejection Ratio (PV/V)
Figure 7. Common-Mode Rejection Production Distribution
A2
Figure 8. Common-Mode Rejection Production Distribution
A3
A1
A2
A3
A4
8
6
4
2
0
-2
-4
-6
-8
-10
-50
-10
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
1
2
3
4
5
6
7
8
9
10
11
Population
Common-Mode Rejection Ratio (PV/V)
10
-25
0
25
50
75
Temperature (qC)
100
125
150
D010
D009
Common-Mode Rejection Ratio (PV/V)
Figure 10. Common-Mode Rejection Ratio vs Temperature
D011
-0.11
-0.1
-0.09
-0.08
-0.07
-0.06
-0.05
-0.04
-0.03
-0.02
-0.01
0
0.01
0.02
0.03
0.04
0.05
0.06
0.07
0.08
0.09
0.1
-0.125
-0.115
-0.105
-0.095
-0.085
-0.075
-0.065
-0.055
-0.045
-0.035
-0.025
-0.015
-0.005
0.005
0.015
0.025
0.035
0.045
0.055
0.065
0.075
0.085
Population
Population
Figure 9. Common-Mode Rejection Production Distribution
A4
Gain Error (%)
Gain Error (%)
Figure 11. Gain Error Production Distribution A1
D012
Figure 12. Gain Error Production Distribution A2
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Typical Characteristics (continued)
-0.23
-0.21
-0.19
-0.17
-0.15
-0.13
-0.11
-0.09
-0.07
-0.05
-0.03
-0.01
0.01
0.03
0.05
0.07
0.09
0.11
0.13
0.15
0.17
0.19
Population
-0.12
-0.11
-0.1
-0.09
-0.08
-0.07
-0.06
-0.05
-0.04
-0.03
-0.02
-0.01
0
0.01
0.02
0.03
0.04
0.05
0.06
0.07
0.08
0.09
Population
at TA = 25°C, VS = 5 V, and VIN+ = 12 V (unless otherwise noted)
Gain Error (%)
Gain Error (%)
D013
Figure 13. Gain Error Production Distribution A3
Figure 14. Gain Error Production Distribution A4
50
0.4
A1
A2
A3
A4
0.3
0.2
A1
A2
A3
A4
40
30
0.1
Gain (dB)
Gain Error (%)
D014
0
-0.1
20
10
-0.2
0
-0.3
-0.4
-50
-25
0
25
50
75
Temperature (qC)
100
125
-10
10
150
Figure 15. Gain Error vs Temperature
Common-Mode Rejection Ratio (dB)
Power-Supply Rejection Ratio (dB)
10k
100k
Frequency (Hz)
1M
10M
D016
140
100
80
60
40
20
100
1k
10k
Frequency (Hz)
100k
1M
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A1
A2
A3
A4
120
100
80
60
40
20
10
100
D017
Figure 17. Power-Supply Rejection Ratio vs Frequency
10
1k
Figure 16. Gain vs Frequency
120
0
10
100
D015
1k
10k
Frequency (Hz)
100k
1M
D018
Figure 18. Common-Mode Rejection Ratio vs Frequency
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Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, and VIN+ = 12 V (unless otherwise noted)
VS
120
–40°C
25°C
125°C
100
Input Bias Current (PA)
Output Swing (V)
VS – 1
VS – 2
GND + 2
GND + 1
80
60
40
20
0
GND
0
5
10
15
20 25 30 35 40
Output Current (mA)
45
50
55
-20
-5
60
0
5
10
15
20
Common-Mode Voltage (V)
D019
25
30
D020
Supply voltage = 5 V
Figure 19. Output Voltage Swing vs Output Current
Figure 20. Input Bias Current vs Common-Mode Voltage
120
85
84
100
Input Bias Current (PA)
Input Bias Current (PA)
83
80
60
40
20
82
81
80
79
78
77
0
-20
-5
76
0
5
10
15
20
Common-Mode Voltage (V)
25
75
-50
30
-25
0
D021
25
50
75
Temperature (qC)
100
125
150
D022
Supply voltage = 0 V
Figure 21. Input Bias Current vs Common-Mode Voltage
(Both Inputs, Shutdown)
Figure 22. Input Bias Current vs Temperature
380
210
Quiescent Current (PA)
Quiescent Current (PA)
375
205
200
195
370
365
360
355
350
345
190
-50
-25
0
25
50
75
Temperature (qC)
100
125
150
340
-50
-25
0
D023
Figure 23. Quiescent Current vs Temperature (INA180)
25
50
75
Temperature (qC)
100
125
150
D023
Figure 24. Quiescent Current vs Temperature (INA2180)
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Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, and VIN+ = 12 V (unless otherwise noted)
720
400
715
Quiescent Current (PA)
Quiescent Current (PA)
350
710
705
700
695
300
250
200
690
685
-50
-25
0
25
50
75
Temperature (qC)
100
125
150
-5
150
5
10
15
20
Common-mode Voltage (V)
750
1450
700
1350
650
1250
600
550
500
450
400
25
30
D031
Figure 26. Quiescent Current vs Common-Mode Voltage
(INA180)
Quiescent Current (PA)
Quiescent Current (PA)
Figure 25. Quiescent Current vs Temperature (INA4180)
1150
1050
950
850
750
650
350
300
-5
0
D038
0
5
10
15
20
Common-Mode Voltage (V)
25
30
550
-5
0
5
10
15
20
Common-Mode Voltage (V)
D031
Figure 27. Quiescent Current vs Common-Mode Voltage
for All Amplifiers (INA2180)
25
30
D039
Figure 28. Quiescent Current vs Common-Mode Voltage for
All Amplifiers (INA4180)
80
70
60
Referred-to-Input
Voltage Noise (200 nV/div)
Input-Referred Voltage Noise (nV/—Hz)
100
50
40
30
20
10
10
100
1k
10k
Frequency (Hz)
100k
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D025
D024
Figure 29. Input-Referred Voltage Noise vs Frequency
(A3 Devices)
12
Time (1 s/div)
1M
Figure 30. 0.1-Hz to 10-Hz Voltage Noise (Referred-to-Input)
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Typical Characteristics (continued)
VCM
VOUT
VOUT (100 mV/div)
Input Voltage
40 mV/div
Common-Mode Voltage (5 V/div)
Output Voltage
2 V/div
at TA = 25°C, VS = 5 V, and VIN+ = 12 V (unless otherwise noted)
Time (25 Ps/div)
Time (10 Ps/div)
D027
D026
80-mVPP input step
Figure 31. Step Response
Figure 32. Common-Mode Voltage Transient Response
Voltage (2 V/div)
Noninverting Input
Output
Voltage (2 V/div)
Inverting Input
Output
0V
0V
Time (250 Ps/div)
Time (250 Ps/div)
D028
D029
Figure 33. Inverting Differential Input Overload
Figure 34. Noninverting Differential Input Overload
Supply Voltage
Output Voltage
Voltage (1 V/div)
Voltage (1 V/div)
Supply Voltage
Output Voltage
0V
0V
Time (100 Ps/div)
Time (10 Ps/div)
D032
D030
Figure 35. Start-Up Response
Figure 36. Brownout Recovery
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Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, and VIN+ = 12 V (unless otherwise noted)
200
100
50
140
A1
A2
A3
A4
20
10
5
2
1
0.5
0.2
0.1
10
120
110
100
90
80
100
1k
10k
100k
Frequency (Hz)
1M
Figure 37. Output Impedance vs Frequency
14
Ch1 onto Ch2
Ch2 onto Ch1
130
Channel Separation (dB)
Output Impedance (:)
1000
500
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10M
70
100
1k
D033
10k
Frequency (Hz)
100k
1M
D034
Figure 38. Channel Separation vs Frequency (INA2180)
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8 Detailed Description
8.1 Overview
The INA180, INA2180, and INA4180 (INAx180) are 26-V, common-mode, current-sensing amplifiers used in both
low-side and high-side configurations. These specially-designed, current-sensing amplifiers accurately measures
voltages developed across current-sensing resistors on common-mode voltages that far exceed the supply
voltage powering the device. Current can be measured on input voltage rails as high as 26 V, and the devices
can be powered from supply voltages as low as 2.7 V.
8.2 Functional Block Diagrams
VS
Single-Channel
TI Device
IN±
±
OUT
+
IN+
GND
Figure 39. INA180 Functional Block Diagram
VS
Dual-Channel
TI Device
IN±1
±
OUT1
+
IN+1
IN±2
±
OUT2
+
IN+2
GND
Figure 40. INA2180 Functional Block Diagram
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Functional Block Diagrams (continued)
VS
Quad-Channel
TI Device
IN±1
±
OUT1
+
IN+1
IN±2
±
OUT2
+
IN+2
IN±3
±
OUT3
+
IN+3
IN±4
±
OUT4
+
IN+4
GND
Figure 41. INA4180 Functional Block Diagram
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8.3 Feature Description
8.3.1 High Bandwidth and Slew Rate
The INAx180 support small-signal bandwidths as high as 350 kHz, and large-signal slew rates of 2 V/µs. The
ability to detect rapid changes in the sensed current, as well as the ability to quickly slew the output, make the
INAx180 a good choice for applications that require a quick response to input current changes. One application
that requires high bandwidth and slew rate is low-side motor control, where the ability to follow rapid changing
current in the motor allows for more accurate control over a wider operating range. Another application that
requires higher bandwidth and slew rates is system fault detection, where the INAx180 are used with an external
comparator and a reference to quickly detect when the sensed current is out of range.
8.3.2 Wide Input Common-Mode Voltage Range
The INAx180 support input common-mode voltages from –0.2 V to +26 V. Because of the internal topology, the
common-mode range is not restricted by the power-supply voltage (VS) as long as VS stays within the operational
range of 2.7 V to 5.5 V. The ability to operate with common-mode voltages greater or less than VS allow the
INAx180 to be used in high-side, as well as low-side, current-sensing applications, as shown in Figure 42.
Bus Supply
±0.2 V to +26 V
Direction of Positive
Current Flow
IN+
RSENSE
High-Side Sensing
Common-mode voltage (VCM)
is bus-voltage dependent.
IN±
LOAD
Direction of Positive
Current Flow
IN+
RSENSE
Low-Side Sensing
Common-mode voltage (VCM)
is always near ground and is
isolated from bus-voltage spikes.
IN±
Figure 42. High-Side and Low-Side Sensing Connections
8.3.3 Precise Low-Side Current Sensing
When used in low-side current sensing applications the offset voltage of the INAx180 is within ±150 µV. The low
offset performance of the INAx180 has several benefits. First, the low offset allows the device to be used in
applications that must measure current over a wide dynamic range. In this case, the low offset improves the
accuracy when the sensed currents are on the low end of the measurement range. Another advantage of low
offset is the ability to sense lower voltage drop across the sense resistor accurately, thus allowing a lower-value
shunt resistor. Lower-value shunt resistors reduce power loss in the current sense circuit, and help improve the
power efficiency of the end application.
The gain error of the INAx180 is specified to be within 1% of the actual value. As the sensed voltage becomes
much larger than the offset voltage, this voltage becomes the dominant source of error in the current sense
measurement.
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Feature Description (continued)
8.3.4 Rail-to-Rail Output Swing
The INAx180 allow linear current sensing operation with the output close to the supply rail and GND. The
maximum specified output swing to the positive rail is 30 mV, and the maximum specified output swing to GND is
only 5 mV. In order to compare the output swing of the INAx180 to an equivalent operational amplifier (op amp),
the inputs are overdriven to approximate the open-loop condition specified in op amp data sheets. The currentsense amplifier is a closed-loop system; therefore, the output swing to GND can be limited by the product of the
offset voltage and amplifier gain.
For devices that have positive offset voltages, the swing to GND is limited by the larger of either the offset
voltage multiplied by the gain or the swing to GND specified in the Electrical Characteristics table.
For example, in an application where the INA180A4 (gain = 200 V/V) is used for low-side current sensing and the
device has an offset of 40 µV, the product of the device offset and gain results in a value of 8 mV, greater than
the specified negative swing value. Therefore, the swing to GND for this example is 8 mV. If the same device
has an offset of –40 µV, then the calculated zero differential signal is –8 mV. In this case, the offset helps
overdrive the swing in the negative direction, and swing performance is consistent with the value specified in the
Electrical Characteristics table.
The offset voltage is a function of the common-mode voltage as determined by the CMRR specification;
therefore, the offset voltage increases when higher common-mode voltages are present. The increase in offset
voltage limits how low the output voltage can go during a zero-current condition when operating at higher
common-mode voltages. Figure 43 shows the typical limitation of the zero-current output voltage vs commonmode voltage for each gain option.
0.06
A1
A2
A3
A4
Zero Current Output Voltage (V)
0.054
0.048
0.042
0.036
0.03
0.024
0.018
0.012
0.006
0
0
2
4
6
8 10 12 14 16 18 20 22 24 26
Common Mode Voltage (V)
D033
Figure 43. Zero-Current Output Voltage vs Common-Mode Voltage
8.4 Device Functional Modes
8.4.1 Normal Mode
The INAx180 is in normal operation when the following conditions are met:
• The power supply voltage (VS) is between 2.7 V and 5.5 V.
• The common-mode voltage (VCM) is within the specified range of –0.2 V to +26 V.
• The maximum differential input signal times gain is less than VS minus the output voltage swing to VS.
• The minimum differential input signal times gain is greater than the swing to GND (see the Rail-to-Rail Output
Swing section).
During normal operation, the device produces an output voltage that is the gained-up representation of the
difference voltage from IN+ to IN–.
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Device Functional Modes (continued)
8.4.2 Input Differential Overload
If the differential input voltage (VIN+ – VIN–) times gain exceeds the voltage swing specification, the INAx180 drive
the output as close as possible to the positive supply, and does not provide accurate measurement of the
differential input voltage. If this input overload occurs during normal circuit operation, then reduce the value of the
shunt resistor or use a lower-gain version with the chosen sense resistor to avoid this mode of operation. If a
differential overload occurs in a fault event, then the output of the INAx180 return to the expected value
approximately 20 µs after the fault condition is removed.
When the INAx180 output is driven to either the supply rail or ground, increasing the differential input voltage
does not damage the device as long as the absolute maximum ratings are not violated. Following these
guidelines, the INAx180 output maintains polarity, and does not suffer from phase reversal.
8.4.3 Shutdown Mode
Although the INAx180 do not have a shutdown pin, the low power consumption of the device allows the output of
a logic gate or transistor switch to power the INAx180. This gate or switch turns on and off the INAx180 powersupply quiescent current.
However, in current shunt monitoring applications, there is also a concern for how much current is drained from
the shunt circuit in shutdown conditions. Evaluating this current drain involves considering the simplified
schematic of the INAx180 in shutdown mode, as shown in Figure 44.
VS
2.7 V to 5.5 V
RPULL-UP
10 k
Bus Voltage
±0.2 V to +26 V
Shutdown
RSENSE
Load
CBYPASS
0.1 µF
Single-Channel
TI Device
VS
IN±
OUT
±
Output
+
IN+
GND
Figure 44. Basic Circuit to Shut Down the INxA180
There is typically more than 500 kΩ of impedance (from the combination of 500-kΩ feedback and
input gain set resistors) from each input of the INAx180 to the OUT pin and to the GND pin. The amount of
current flowing through these pins depends on the voltage at the connection.
Regarding the 500-kΩ path to the output pin, the output stage of a disabled INAx180 does constitute a good path
to ground. Consequently, this current is directly proportional to a shunt common-mode voltage present across a
500-kΩ resistor.
As a final note, as long as the shunt common-mode voltage is greater than VS when the device is powered up,
there is an additional and well-matched 55-µA typical current that flows in each of the inputs. If less than VS, the
common-mode input currents are negligible, and the only current effects are the result of the 500-kΩ resistors.
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The INAx180 amplify the voltage developed across a current-sensing resistor as current flows through the
resistor to the load or ground.
9.1.1 Basic Connections
Figure 45 shows the basic connections of the INA180. Connect the input pins (IN+ and IN–) as closely as
possible to the shunt resistor to minimize any resistance in series with the shunt resistor.
Bus Voltage
±0.2 V to +26 V
Power Supply, VS
2.7 V to 5.5 V
CBYPASS
0.1 µF
RSENSE
Load
VS
Single-Channel
TI Device
IN±
Microcontroller
OUT
±
ADC
+
IN+
GND
NOTE: For best measurement accuracy, connect analog-to-digital converter (ADC) reference or microcontroller
ground as closely as possible to the INAx180 GND pin, and add an RC filter between the output of the INAx180 and
the ADC. See Closed-Loop Analysis of Load-Induced Amplifier Stability Issues Using ZOUT for more details.
Figure 45. Basic Connections for the INA180
A power-supply bypass capacitor of at least 0.1 µF is required for proper operation. Applications with noisy or
high-impedance power supplies may require additional decoupling capacitors to reject power-supply noise.
Connect bypass capacitors close to the device pins.
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Application Information (continued)
9.1.2 RSENSE and Device Gain Selection
The accuracy of the INAx180 is maximized by choosing the current-sense resistor to be as large as possible. A
large sense resistor maximizes the differential input signal for a given amount of current flow and reduces the
error contribution of the offset voltage. However, there are practical limits as to how large the current-sense
resistor can be in a given application. The INAx180 have a typical input bias currents of 80 µA for each input
when operated at a 12-V common-mode voltage input. When large current-sense resistors are used, these bias
currents cause increased offset error and reduced common-mode rejection. Therefore, using current-sense
resistors larger than a few ohms is generally not recommended for applications that require current-monitoring
accuracy. A second common restriction on the value of the current-sense resistor is the maximum allowable
power dissipation that is budgeted for the resistor. Equation 1 gives the maximum value for the current sense
resistor for a given power dissipation budget:
PDMAX
RSENSE
IMAX2
where:
•
•
PDMAX is the maximum allowable power dissipation in RSENSE.
IMAX is the maximum current that will flow through RSENSE.
(1)
An additional limitation on the size of the current-sense resistor and device gain is due to the power-supply
voltage, VS, and device swing to rail limitations. In order to make sure that the current-sense signal is properly
passed to the output, both positive and negative output swing limitations must be examined. Equation 2 provides
the maximum values of RSENSE and GAIN to keep the device from hitting the positive swing limitation.
IMAX u RSENSE u GAIN VSP
where:
•
•
•
IMAX is the maximum current that will flow through RSENSE.
GAIN is the gain of the current sense-amplifier.
VSP is the positive output swing as specified in the data sheet.
(2)
To avoid positive output swing limitations when selecting the value of RSENSE, there is always a trade-off between
the value of the sense resistor and the gain of the device under consideration. If the sense resistor selected for
the maximum power dissipation is too large, then it is possible to select a lower-gain device in order to avoid
positive swing limitations.
The negative swing limitation places a limit on how small of a sense resistor can be used in a given application.
Equation 3 provides the limit on the minimum size of the sense resistor.
IMIN u RSENSE u GAIN > VSN
where:
•
•
•
IMIN is the minimum current that will flow through RSENSE.
GAIN is the gain of the current sense amplifier.
VSN is the negative output swing of the device (see Rail-to-Rail Output Swing).
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Application Information (continued)
9.1.3 Signal Filtering
Provided that the INAx180 output is connected to a high impedance input, the best location to filter is at the
device output using a simple RC network from OUT to GND. Filtering at the output attenuates high-frequency
disturbances in the common-mode voltage, differential input signal, and INAx180 power-supply voltage. If filtering
at the output is not possible, or filtering of only the differential input signal is required, it is possible to apply a
filter at the input pins of the device. Figure 46 provides an example of how a filter can be used on the input pins
of the device.
Bus Voltage
±0.2 V to +26 V
RSENSE
VS
2.7 V to 5.5 V
Load
f
1
3dB
2S(RF
Single-Channel
TI Device
VS
RF )CF
RF < 10
RINT
IN±
f±3dB
CF
±
OUT VOUT
Bias
+
RF < 10
IN+
RINT
GND
Figure 46. Filter at Input Pins
The addition of external series resistance creates an additional error in the measurement; therefore, the value of
these series resistors must be kept to 10 Ω (or less, if possible) to reduce impact to accuracy. The internal bias
network shown in Figure 46 present at the input pins creates a mismatch in input bias currents when a
differential voltage is applied between the input pins. If additional external series filter resistors are added to the
circuit, the mismatch in bias currents results in a mismatch of voltage drops across the filter resistors. This
mismatch creates a differential error voltage that subtracts from the voltage developed across the shunt resistor.
This error results in a voltage at the device input pins that is different than the voltage developed across the
shunt resistor. Without the additional series resistance, the mismatch in input bias currents has little effect on
device operation. The amount of error these external filter resistors add to the measurement can be calculated
using Equation 5, where the gain error factor is calculated using Equation 4.
The amount of variance in the differential voltage present at the device input relative to the voltage developed at
the shunt resistor is based both on the external series resistance (RF) value as well as internal input resistor RINT,
as shown in Figure 46. The reduction of the shunt voltage reaching the device input pins appears as a gain error
when comparing the output voltage relative to the voltage across the shunt resistor. A factor can be calculated to
determine the amount of gain error that is introduced by the addition of external series resistance. Calculate the
expected deviation from the shunt voltage to what is measured at the device input pins is given using Equation 4:
1250 u RINT
Gain Error Factor
(1250 u RF ) (1250 u RINT ) (RF u RINT )
where:
•
•
22
RINT is the internal input resistor.
RF is the external series resistance.
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Application Information (continued)
With the adjustment factor from Equation 4, including the device internal input resistance, this factor varies with
each gain version, as shown in Table 1. Each individual device gain error factor is shown in Table 2.
Table 1. Input Resistance
PRODUCT
GAIN
RINT (kΩ)
INAx180A1
20
25
INAx180A2
50
10
INAx180A3
100
5
INAx180A4
200
2.5
Table 2. Device Gain Error Factor
PRODUCT
SIMPLIFIED GAIN ERROR FACTOR
INAx180A1
25000
(21u RF ) 25000
INAx180A2
10000
(9 u RF ) 10000
INAx180A3
1000
RF 1000
INAx180A4
2500
(3 u RF ) 2500
The gain error that can be expected from the addition of the external series resistors can then be calculated
based on Equation 5:
Gain Error (%) = 100 - (100 ´ Gain Error Factor)
(5)
For example, using an INA180A2 and the corresponding gain error equation from Table 2, a series resistance of
10 Ω results in a gain error factor of 0.991. The corresponding gain error is then calculated using Equation 5,
resulting in an additional gain error of approximately 0.89% solely because of the external 10-Ω series resistors.
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9.2 Typical Application
Power Supply, VS
2.7 V to 5.5 V
CBYPASS
0.1 µF
Load
Supply
RSENSE
Load
Single-Channel
TI Device
VS
IN±
OUT
±
VOUT
+
IN+
GND
Figure 47. Low-Side Sensing
9.2.1 Design Requirements
The design requirements for the circuit shown in Figure 47, are listed in Table 3
Table 3. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Power-supply voltage, VS
5V
Low-side current sensing
VCM = 0 V
RSENSE power loss
< 900 mW
Maximum sense current, IMAX
40 A
Current sensing error
Less than 1.5% at maximum current, TJ = 25°C
Small-signal bandwidth
> 80 kHz
9.2.2 Detailed Design Procedure
The maximum value of the current sense resistor is calculated based on the maximum power loss requirement.
By applying Equation 1, the maximum value of the current-sense resistor is calculated to be 0.563 mΩ. This is
the maximum value for sense resistor RSENSE; therefore, select RSENSE to be 0.5 mΩ because it is the closest
standard resistor value that meets the power-loss requirement.
The next step is to select the appropriate gain and reduce RSENSE, if needed, to keep the output signal swing
within the VS range. Using Equation 2, and given that IMAX = 40 A and RSENSE = 0.5 mΩ, the maximum currentsense gain calculated to avoid the positive swing-to-rail limitations on the output is 248.5. To maximize the output
signal range, the INA180A4 (gain = 200) device is selected for this application.
To calculate the accuracy at peak current, the two factors that must be determined are the gain error and the
offset error. The gain error of the INAx180 is specified to be a maximum of 1%. The error due to the offset is
constant, and is specified to be 125 µV (maximum) for the conditions where VCM = 0 V and VS = 5 V. Using
Equation 6, the percentage error contribution of the offset voltage is calculated to be 0.75%, with total offset error
= 150 µV, RSENSE = 0.5 mΩ, and ISENSE = 40 A.
Total Offset Error (V)
Total Offset Error (%) =
u 100%
ISENSE u RSENSE
(6)
24
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One method of calculating the total error is to add the gain error to the percentage contribution of the offset error.
However, in this case, the gain error and the offset error do not have an influence or correlation to each other. A
more statistically accurate method of calculating the total error is to use the RSS sum of the errors, as shown in
Equation 7:
Total Error (%) = Total Gain Error (%)2 + Total Offset Error (%)2
(7)
After applying Equation 7, the total current sense error at maximum current is calculated to be 1.25%, and that is
less than the design example requirement of 1.5%.
The INA180A4 (gain = 200) also has a bandwidth of 105 kHz that meets the small-signal bandwidth requirement
of 80 kHz. If higher bandwidth is required, lower-gain devices can be used at the expense of either reduced
output voltage range or an increased value of RSENSE.
9.2.3 Application Curve
Output Voltage (1 V/div)
Figure 48 shows an example output response of a unidirectional configuration. The device output swing is limited
by ground; therefore, the output is biased to this zero output level. The output rises above ground for positive
differential input signals, but cannot fall below ground for negative differential input signals.
0V
Output
Ground
Time (500 µs/div)
Figure 48. Output Response
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10 Power Supply Recommendations
The input circuitry of the INAx180 accurately measures beyond the power-supply voltage, VS. For example, VS
can be 5 V, whereas the bus supply voltage at IN+ and IN– can be as high as 26 V. However, the output voltage
range of the OUT pin is limited by the voltages on the VS pin. The INAx180 also withstand the full differential
input signal range up to 26 V at the IN+ and IN– input pins, regardless of whether or not the device has power
applied at the VS pin.
10.1 Common-Mode Transients Greater Than 26 V
With a small amount of additional circuitry, the INAx180 can be used in circuits subject to transients higher than
26 V, such as automotive applications. Use only Zener diodes or Zener-type transient absorbers (sometimes
referred to as transzorbs)—any other type of transient absorber has an unacceptable time delay. Start by adding
a pair of resistors as a working impedance for the Zener diode, as shown Figure 49. Keep these resistors as
small as possible; most often, around 10 Ω. Larger values can be used with an effect on gain that is discussed in
the Signal Filtering section. This circuit limits only short-term transients; therefore, many applications are satisfied
with a 10-Ω resistor along with conventional Zener diodes of the lowest acceptable power rating. This
combination uses the least amount of board space. These diodes can be found in packages as small as
SOT-523 or SOD-523.
VS
2.7 V to 5.5 V
Bus Supply
±0.2 V to +26 V
CBYPASS
0.1 µF
RSENSE
Load
Single-Channel
TI Device
VS
IN±
±
RPROTECT
< 10
OUT
Output
+
IN+
GND
Figure 49. Transient Protection Using Dual Zener Diodes
In the event that low-power Zener diodes do not have sufficient transient absorption capability, a higher-power
transzorb must be used. The most package-efficient solution involves using a single transzorb and back-to-back
diodes between the device inputs, as shown in Figure 50. The most space-efficient solutions are dual, seriesconnected diodes in a single SOT-523 or SOD-523 package. In either of the examples shown in Figure 49 and
Figure 50, the total board area required by the INAx180 with all protective components is less than that of an
SO-8 package, and only slightly greater than that of an MSOP-8 package.
VS
2.7 V to 5.5 V
Bus Supply
±0.2 V to +26 V
CBYPASS
0.1 µF
RSENSE
Load
Single-Channel
TI Device
< 10
VS
IN±
±
Transorb
OUT
Output
+
< 10
IN+
GND
Figure 50. Transient Protection Using a Single Transzorb and Input Clamps
26
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Common-Mode Transients Greater Than 26 V (continued)
For a reference design example, see Current Shunt Monitor With Transient Robustness Reference Design.
11 Layout
11.1 Layout Guidelines
•
•
•
Connect the input pins to the sensing resistor using a Kelvin or 4-wire connection. This connection technique
makes sure that only the current-sensing resistor impedance is detected between the input pins. Poor routing
of the current-sensing resistor commonly results in additional resistance present between the input pins.
Given the very low ohmic value of the current resistor, any additional high-current carrying impedance can
cause significant measurement errors.
Place the power-supply bypass capacitor as close as possible to the device power supply and ground pins.
The recommended value of this bypass capacitor is 0.1 µF. Additional decoupling capacitance can be added
to compensate for noisy or high-impedance power supplies.
When routing the connections from the current sense resistor to the device, keep the trace lengths as close
as possible in order to minimize any impedance mismatch.
11.2 Layout Examples
Direction Current Flow
RSHUNT
Bus Voltage:
±0.2 V to +26 V
3 IN+
IN± 4
2 GND
VS 5
1 OUT
Current
Sense
VIA to Ground
Plane
Power Supply, VS:
2.7 V to 5.5 V
CBYPASS
Figure 51. Single-Channel Recommended Layout (Pinout A)
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Layout Examples (continued)
Bus Voltage:
±0.2 V to +26 V
VIA to Ground
Plane
Direction of
Current Flow
RSHUNT2
IN+2 5
4 GND
IN±2 6
3 IN+2
OUT2 7
2 IN±1
VS 8
Current Sense
Output 2
RSHUNT1
Direction of
Current Flow
1 OUT1
CBYPASS
Current Sense
Output 1
Power Supply, VS:
2.7 V to 5.5 V
Load 1
Load 2
Figure 52. Dual-Channel Recommended Layout
28
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Layout Examples (continued)
Load 2
Load 3
Current Sense
Output 3
Direction of
Current Flow
Current Sense
Output 2
OUT3 8
7 OUT2
IN±3 9
6 IN±2
IN+3 10
5 IN+2
GND 11
4 VS
IN+4 12
3 IN+1
IN±4 13
2 IN±1
RSHUNT3
VIA to
Ground
Plane
Bus Voltage 3:
±0.2 V to +26 V
OUT4 14
RSHUNT2
Direction of
Current Flow
CBYPASS
Bus Voltage 2:
±0.2 V to +26 V
1 OUT1
VIA to
Current Sense Ground
Output 1
Plane
Current Sense
Output 4
Power Supply, VS:
2.7 V to 5.5 V
Load1
Bus Voltage 4:
±0.2 V to +26 V
RSHUNT4
Bus Voltage 1:
±0.2 V to +26 V
RSHUNT1
Direction of
Current Flow
Direction of
Current Flow
Load 4
Load 1
Figure 53. Quad-Channel Recommended Layout
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12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
For related documentation see the following:
• Texas Instruments, INA180-181EVM User's Guide
• Texas Instruments, INA2180-2181EVM User's Guide
• Texas Instruments, INA4180-4181EVM User's Guide
12.2 Related Links
Table 4 lists quick access links. Categories include technical documents, support and community resources,
tools and software, and quick access to order now.
Table 4. Related Links
PARTS
PRODUCT FOLDER
ORDER NOW
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
INA180
Click here
Click here
Click here
Click here
Click here
INA2180
Click here
Click here
Click here
Click here
Click here
INA4180
Click here
Click here
Click here
Click here
Click here
12.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.4 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.5 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
12.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
30
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SBOS741F – APRIL 2017 – REVISED MARCH 2019
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2017–2019, Texas Instruments Incorporated
Product Folder Links: INA180 INA2180 INA4180
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PACKAGE OPTION ADDENDUM
www.ti.com
27-Feb-2019
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
INA180A1IDBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
18ID
INA180A1IDBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
18ID
INA180A2IDBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
1A8D
INA180A2IDBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
1A8D
INA180A3IDBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
1A9D
INA180A3IDBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
1A9D
INA180A4IDBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
1AAD
INA180A4IDBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
1AAD
INA180B1IDBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
18RD
INA180B1IDBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
18RD
INA180B2IDBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
1ABD
INA180B2IDBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
1ABD
INA180B3IDBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
1ACD
INA180B3IDBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
1ACD
INA180B4IDBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
1ADD
INA180B4IDBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
1ADD
INA2180A1IDGKR
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1CX6
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
27-Feb-2019
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
INA2180A1IDGKT
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1CX6
INA2180A2IDGKR
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1CZ6
INA2180A2IDGKT
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1CZ6
INA2180A3IDGKR
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1D16
INA2180A3IDGKT
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1D16
INA2180A4IDGKR
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1D26
INA2180A4IDGKT
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1D26
INA4180A1IPWR
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
4180A1
INA4180A2IPWR
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
4180A2
INA4180A3IPWR
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
4180A3
INA4180A4IPWR
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
4180A4
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
(4)
27-Feb-2019
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF INA180, INA2180, INA4180 :
• Automotive: INA180-Q1, INA2180-Q1, INA4180-Q1
NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
27-Feb-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
INA180A1IDBVR
SOT-23
DBV
5
3000
178.0
9.0
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
3.23
3.17
1.37
4.0
8.0
Q3
INA180A1IDBVT
SOT-23
DBV
5
250
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
INA180A2IDBVR
SOT-23
DBV
5
3000
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
INA180A2IDBVT
SOT-23
DBV
5
250
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
INA180A3IDBVR
SOT-23
DBV
5
3000
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
INA180A3IDBVT
SOT-23
DBV
5
250
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
INA180A4IDBVR
SOT-23
DBV
5
3000
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
INA180A4IDBVT
SOT-23
DBV
5
250
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
INA180B1IDBVR
SOT-23
DBV
5
3000
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
INA180B1IDBVT
SOT-23
DBV
5
250
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
INA180B2IDBVR
SOT-23
DBV
5
3000
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
INA180B2IDBVT
SOT-23
DBV
5
250
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
INA180B3IDBVR
SOT-23
DBV
5
3000
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
INA180B3IDBVT
SOT-23
DBV
5
250
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
INA180B4IDBVR
SOT-23
DBV
5
3000
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
INA180B4IDBVT
SOT-23
DBV
5
250
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
INA2180A1IDGKR
VSSOP
DGK
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
INA2180A1IDGKT
VSSOP
DGK
8
250
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
27-Feb-2019
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
INA2180A2IDGKR
VSSOP
DGK
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
INA2180A2IDGKT
VSSOP
DGK
8
250
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
INA2180A3IDGKR
VSSOP
DGK
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
INA2180A3IDGKT
VSSOP
DGK
8
250
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
INA2180A4IDGKR
VSSOP
DGK
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
INA2180A4IDGKT
VSSOP
DGK
8
250
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
INA4180A1IPWR
TSSOP
PW
14
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
INA4180A2IPWR
TSSOP
PW
14
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
INA4180A3IPWR
TSSOP
PW
14
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
INA4180A4IPWR
TSSOP
PW
14
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
INA180A1IDBVR
SOT-23
DBV
5
3000
180.0
180.0
18.0
INA180A1IDBVT
SOT-23
DBV
5
250
180.0
180.0
18.0
INA180A2IDBVR
SOT-23
DBV
5
3000
180.0
180.0
18.0
INA180A2IDBVT
SOT-23
DBV
5
250
180.0
180.0
18.0
INA180A3IDBVR
SOT-23
DBV
5
3000
180.0
180.0
18.0
INA180A3IDBVT
SOT-23
DBV
5
250
180.0
180.0
18.0
INA180A4IDBVR
SOT-23
DBV
5
3000
180.0
180.0
18.0
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
27-Feb-2019
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
INA180A4IDBVT
SOT-23
DBV
5
250
180.0
180.0
18.0
INA180B1IDBVR
SOT-23
DBV
5
3000
180.0
180.0
18.0
INA180B1IDBVT
SOT-23
DBV
5
250
180.0
180.0
18.0
INA180B2IDBVR
SOT-23
DBV
5
3000
180.0
180.0
18.0
INA180B2IDBVT
SOT-23
DBV
5
250
180.0
180.0
18.0
INA180B3IDBVR
SOT-23
DBV
5
3000
180.0
180.0
18.0
INA180B3IDBVT
SOT-23
DBV
5
250
180.0
180.0
18.0
INA180B4IDBVR
SOT-23
DBV
5
3000
180.0
180.0
18.0
INA180B4IDBVT
SOT-23
DBV
5
250
180.0
180.0
18.0
INA2180A1IDGKR
VSSOP
DGK
8
2500
366.0
364.0
50.0
INA2180A1IDGKT
VSSOP
DGK
8
250
366.0
364.0
50.0
INA2180A2IDGKR
VSSOP
DGK
8
2500
366.0
364.0
50.0
INA2180A2IDGKT
VSSOP
DGK
8
250
366.0
364.0
50.0
INA2180A3IDGKR
VSSOP
DGK
8
2500
366.0
364.0
50.0
INA2180A3IDGKT
VSSOP
DGK
8
250
366.0
364.0
50.0
INA2180A4IDGKR
VSSOP
DGK
8
2500
366.0
364.0
50.0
INA2180A4IDGKT
VSSOP
DGK
8
250
366.0
364.0
50.0
INA4180A1IPWR
TSSOP
PW
14
2000
367.0
367.0
35.0
INA4180A2IPWR
TSSOP
PW
14
2000
367.0
367.0
35.0
INA4180A3IPWR
TSSOP
PW
14
2000
367.0
367.0
35.0
INA4180A4IPWR
TSSOP
PW
14
2000
367.0
367.0
35.0
Pack Materials-Page 3
PACKAGE OUTLINE
DBV0005A
SOT-23 - 1.45 mm max height
SCALE 4.000
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
1.75
1.45
PIN 1
INDEX AREA
1
0.1 C
B
A
5
2X 0.95
1.9
1.45
0.90
3.05
2.75
1.9
2
4
0.5
5X
0.3
0.2
3
(1.1)
C A B
0.15
TYP
0.00
0.25
GAGE PLANE
8
TYP
0
0.22
TYP
0.08
0.6
TYP
0.3
SEATING PLANE
4214839/E 09/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
www.ti.com
EXAMPLE BOARD LAYOUT
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
2X (0.95)
3
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214839/E 09/2019
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
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EXAMPLE STENCIL DESIGN
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
2X(0.95)
4
3
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214839/E 09/2019
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
www.ti.com
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IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you
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Copyright © 2019, Texas Instruments Incorporated
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