Texas Instruments | TLV370x Family of Nanopower, Push-Pull Output Comparators (Rev. D) | Datasheet | Texas Instruments TLV370x Family of Nanopower, Push-Pull Output Comparators (Rev. D) Datasheet

Texas Instruments TLV370x Family of Nanopower, Push-Pull Output Comparators (Rev. D) Datasheet
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TLV3701, TLV3702, TLV3704
SLCS137D – NOVEMBER 2000 – REVISED MAY 2017
TLV370x Family of Nanopower, Push-Pull Output Comparators
1 Features
3 Description
•
•
The TLV370x is Texas Instruments’ first family of
nanopower comparators with only 560 nA per
channel supply current, which make this device ideal
for battery power and wireless handset applications.
1
•
•
•
•
•
•
Low Supply Current ... 560 nA/Per Channel
Input Common-Mode Range Exceeds the Rails ...
–0.1 V to VCC + 5 V
Supply Voltage Range ... 2.5 V to 16 V
Reverse Battery Protection Up to 18 V
Push-Pull CMOS Output Stage
Specified Temperature Range
– 0°C to 70°C – Commercial Grade
– –40°C to 125°C – Industrial Grade
Ultra-Small Packaging
– 5-Pin SOT-23 (TLV3701)
– 8-Pin MSOP (TLV3702)
Universal Op-Amp EVM (Reference SLOU060 for
More Information)
2 Applications
•
•
•
•
•
Portable Battery Monitoring
Consumer Medical Electronics
Security Detection Systems
Handheld Instruments
Ultra-Low Power Systems
The TLV370x has a minimum operating supply
voltage of 2.7 V over the extended industrial
temperature range (TA = –40°C to 125°C), while
having an input common-mode range of –0.1 to VCC
+ 5 V. The low supply current makes it an ideal
choice for battery-powered portable applications
where quiescent current is the primary concern.
Reverse battery protection guards the amplifier from
an overcurrent condition due to improper battery
installation. For harsh environments, the inputs can
be taken 5 V above the positive supply rail without
damage to the device.
All members are available in PDIP and SOIC with the
singles in the small SOT-23 package, duals in the
MSOP, and quads in the TSSOP package.
Device Information(1)
PART NUMBER
TLV3701
TLV3702
TLV3704
PACKAGE
BODY SIZE (NOM)
SOT-23 (5)
2.90 mm × 1.60 mm
SOIC (8)
4.90 mm × 3.91 mm
SOIC (8)
4.90 mm × 3.91 mm
VSSOP (8)
3.00 mm × 3.00 mm
PDIP (8)
9.81 mm × 6.35 mm
SOIC (14)
8.65 mm × 3.91 mm
PDIP (14)
19.30 mm × 6.35 mm
TSSOP (14)
5.00 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Supply Current vs Supply Voltage
800
High-Side Voltage Sense Circuit
TA = 125 °C
R1
1 MΩ
I CC – Supply Current/Ch – nA
700
TA = 70 °C
600
R3
100 kΩ
VCC +
TA = 25 °C
TLV370X
R2
1 MΩ
500
Vref
µP
TA = 0 °C
400
TA = –40 °C
0
D1
300
200
0
VID = –1 V
100
0
2
4
6
8
10
12
14
16
Copyright © 2016, Texas Instruments Incorporated
VCC – Supply Voltage – V
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TLV3701, TLV3702, TLV3704
SLCS137D – NOVEMBER 2000 – REVISED MAY 2017
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Tables...................................
Pin Configuration and Functions .........................
Specifications.........................................................
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
8
1
1
1
2
3
4
6
Absolute Maximum Ratings ...................................... 6
Recommended Operating Conditions....................... 6
Thermal Information – TLV3701 ............................... 7
Thermal Information – TLV3702 ............................... 7
Thermal Information – TLV3704 ............................... 7
Electrical Characteristics........................................... 8
Switching Characteristics .......................................... 9
Dissipation Ratings ................................................... 9
Typical Characteristics ............................................ 10
Detailed Description ............................................ 13
8.1 Overview ................................................................. 13
8.2 Functional Block Diagram ....................................... 13
8.3 Feature Description................................................. 13
8.4 Device Functional Modes........................................ 13
9
Application and Implementation ........................ 14
9.1 Application Information............................................ 14
9.2 Typical Application ................................................. 14
10 Power Supply Recommendations ..................... 16
11 Layout................................................................... 16
11.1 Layout Guidelines ................................................. 16
11.2 Layout Example .................................................... 16
12 Device and Documentation Support ................. 17
12.1
12.2
12.3
12.4
12.5
12.6
12.7
12.8
Device Support......................................................
Documentation Support .......................................
Related Links ........................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
17
17
17
17
18
18
18
18
13 Mechanical, Packaging, and Orderable
Information ........................................................... 18
4 Revision History
Changes from Revision C (March 2017) to Revision D
•
Page
Changed Wording of Start-up time table note ....................................................................................................................... 9
Changes from Revision B (August 2001) to Revision C
Page
•
Added Device Information table, Device Comparison table, ESD Ratings table, Feature Description section, Device
Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout
section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section ...... 1
•
Changed VOH typical value from 0.08 to 80 to reflect proper units....................................................................................... 8
•
Changed Dissapation Ratings Table to reflect new package thermals.................................................................................. 9
•
Deleted extraneous "Open Collector Leakage" graph.......................................................................................................... 10
2
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TLV3701, TLV3702, TLV3704
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SLCS137D – NOVEMBER 2000 – REVISED MAY 2017
5 Device Comparison Tables
Table 1. Selection of Comparators (1)
OUTP
UT
STAG
E
tr (μs)
RAILTORAIL
22
8
I
PP
5
—
I
OD
DEVICE
VCC (V)
VIO (µV)
ICC/Ch (µA)
IIB (pA )
tPLH (µs)
tPHL (μs)
tf (μs)
TLV370x
2.5 – 16
250
0.56
80
56
83
TLV340x
2.5 – 16
250
0.47
80
55
30
TLC3702/4
3 – 16
1200
9
5
1.1
0.65
0.5
0.125
—
PP
TLC393/339
3 – 16
1400
11
5
1.1
0.55
0.22
—
—
OD
TLC372/4
3 – 16
1000
75
5
0.65
0.65
—
—
—
OD
(1)
All specifications are typical values measured at 5 V.
Table 2. TLV3701 Available Options
TA
0°C to 70°C
–40°C to 125°C
(1)
(2)
PACKAGED DEVICES
VIOmax AT 25°C
SMALL OUTLINE (D) (1)
SOT-23 (DBV) (2)
SYMBOL
TLV3701CD
TLV3701CDBV
VBCC
—
TLV3701ID
TLV3701IDBV
VBCI
TLV3701IP
5000 µV
PLASTIC DIP (P)
This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (for example,
TLV3701CDR).
This package is only available taped and reeled. For standard quantities (3000 pieces per reel), add an R suffix (that is, TLV3701
CDBVR). For small quantities (250 pieces per mini-reel), add a T suffix to the part number (for example, TLV3701CDBVT).
Table 3. TLV3702 Available Options
TA
0°C to 70°C
–40°C to 125°C
(1)
PACKAGED DEVICES
VIOmax AT 25°C
SMALL OUTLINE (D) (1)
MSOP (DGK)
SYMBOL
TLV3702CD
TLV3702CDGK
xxTIAKC
—
TLV3702ID
TLV3702IDGK
xxTIAKD
TLV3702IP
5000 µV
PLASTIC DIP (P)
This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (for example,
TLV3702CDR).
Table 4. TLV3704 Available Options
TA
0°C to 70°C
–40°C to 125°C
(1)
VIOmax AT 25°C
5000 µV
PACKAGED DEVICES
SMALL OUTLINE (D) (1)
PLASTIC DIP (N)
TSSOP (PW)
TLV3704CD
—
TLV3704CPW
TLV3704ID
TLV3704IN
TLV3704IPW
This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (for example,
TLV3704CDR).
Copyright © 2000–2017, Texas Instruments Incorporated
Product Folder Links: TLV3701 TLV3702 TLV3704
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SLCS137D – NOVEMBER 2000 – REVISED MAY 2017
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6 Pin Configuration and Functions
TLV3701 DBV Package
5-Pin SOT-23
Top View
OUT
GND
IN+
1
5
TLV3701 D or P Package
8-Pin SOIC or PDIP
Top View
VCC
2
3
4
NC
1
8
NC
IN-
2
7
VCC
IN+
3
6
OUT
GND
4
5
NC
IN-
TLV3701 Pin Functions
PIN
NAME
I/O
DESCRIPTION
SOT-23
SOIC, PDIP
GND
2
4
—
IN–
4
2
I
Negative (inverting) input
IN+
3
3
I
Positive (noninverting) input
NC
—
1, 5, 8
—
No internal connection (can be left floating)
OUT
1
6
O
Output
VCC
5
7
—
Positive power supply
Ground
TLV3702 D, DGK, or P Package
8-Pin SOIC, VSSOP, or PDIP
Top View
1OUT
1
8
VCC
1IN-
2
7
2OUT
1IN+
3
6
2IN-
GND
4
5
2IN+
TLV3702 Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
GND
4
—
1IN–
2
I
Inverting input, channel 1
2IN–
6
I
Inverting input, channel 2
1IN+
3
I
Noninverting input, channel 1
2IN+
5
I
Noninverting input, channel 2
1OUT
1
O
Output, channel 1
2OUT
7
O
Output, channel 2
VCC
8
—
Positive power supply
4
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Ground
Copyright © 2000–2017, Texas Instruments Incorporated
Product Folder Links: TLV3701 TLV3702 TLV3704
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SLCS137D – NOVEMBER 2000 – REVISED MAY 2017
TLV3704 D, N, or PW Package
14-Pin SOIC, PDIP, or TSSOP
Top View
1OUT
1
14
4OUT
1IN-
2
13
4IN-
1IN+
3
12
4IN+
VCC
4
11
GND
2IN+
5
10
3IN+
2IN-
6
9
3IN-
2OUT
7
8
3OUT
TLV3704 Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
GND
11
—
1IN–
2
I
Ground
Inverting input, channel 1
2IN–
6
I
Inverting input, channel 2
3IN–
9
I
Inverting input, channel 3
4IN–
13
I
Inverting input, channel 4
1IN+
3
I
Noninverting input, channel 1
2IN+
5
I
Noninverting input, channel 2
3IN+
10
I
Noninverting input, channel 3
4IN+
12
I
Noninverting input, channel 4
1OUT
1
O
Output, channel 1
2OUT
7
O
Output, channel 2
3OUT
8
O
Output, channel 3
4OUT
14
O
Output, channel 4
VCC
4
—
Positive power supply
Copyright © 2000–2017, Texas Instruments Incorporated
Product Folder Links: TLV3701 TLV3702 TLV3704
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TLV3701, TLV3702, TLV3704
SLCS137D – NOVEMBER 2000 – REVISED MAY 2017
www.ti.com
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
Supply voltage, VCC (2)
Differential input voltage, VID
Input voltage, VI (2) (3)
0
±20
V
V
mA
±10
mA
See Dissipation Ratings
Maximum junction temperature, TJ
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
Storage temperature, Tstg
(2)
(3)
V
±10
Output current, IO
(1)
UNIT
17
VCC + 5
Input current, II
Continuous total power dissipation
MAX
–65
150
°C
260
°C
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values, except differential voltages, are with respect to GND.
Input voltage range is limited to 20 V maximum or VCC + 5 V, whichever is smaller.
7.2 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
Single supply
Supply voltage, VCC
Split supply
MIN
MAX
C-suffix
2.5
16
I-suffix
2.7
16
C-suffix
±1.25
±8
I-suffix
±1.35
±8
–0.1
VCC + 5
Common-mode input voltage, VICR
Operating free-air temperature, TA
6
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C-suffix
I-suffix
0
70
–40
125
UNIT
V
V
°C
Copyright © 2000–2017, Texas Instruments Incorporated
Product Folder Links: TLV3701 TLV3702 TLV3704
TLV3701, TLV3702, TLV3704
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SLCS137D – NOVEMBER 2000 – REVISED MAY 2017
7.3 Thermal Information – TLV3701
TLV3701
THERMAL METRIC (1)
DBV (SOT-23)
D (SOIC)
5 PINS
P (PDIP)
UNIT
8 PINS
RθJA
Junction-to-ambient thermal resistance
193.6
124.8
82.8
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
102.4
69.1
84.8
°C/W
RθJB
Junction-to-board thermal resistance
54.3
67.9
59.7
°C/W
ψJT
Junction-to-top characterization parameter
16.9
22.3
45.3
°C/W
ψJB
Junction-to-board characterization parameter
53.6
67.2
59.5
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
—
—
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.4 Thermal Information – TLV3702
TLV3702
THERMAL METRIC
(1)
D (SOIC)
DGK (VSSOP)
P (PDIP)
UNIT
8 PINS
RθJA
Junction-to-ambient thermal resistance
116.7
163.9
77.1
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
59.4
65.7
79
°C/W
RθJB
Junction-to-board thermal resistance
60.2
85.3
54
°C/W
ψJT
Junction-to-top characterization parameter
14.6
9
39.5
°C/W
ψJB
Junction-to-board characterization parameter
59.5
83.9
53.7
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
—
—
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.5 Thermal Information – TLV3704
TLV3704
THERMAL METRIC
(1)
D (SOIC)
N (PDIP)
PW (TSSOP)
UNIT
14 PINS
RθJA
Junction-to-ambient thermal resistance
81.4
58.1
105.7
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
38.1
50.9
33.9
°C/W
RθJB
Junction-to-board thermal resistance
37.8
38
49.5
°C/W
ψJT
Junction-to-top characterization parameter
7.5
23.6
2.5
°C/W
ψJB
Junction-to-board characterization parameter
37.4
37.7
48.8
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
—
—
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
Copyright © 2000–2017, Texas Instruments Incorporated
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7.6 Electrical Characteristics
At specified operating free-air temperature range, VCC = 2.7 V, 5 V, 15 V (unless otherwise noted).
PARAMETER
TA (1)
TEST CONDITIONS
MIN
TYP
MAX
250
5000
UNIT
DC PERFORMANCE
VIO
Input offset voltage
VIC = VCC/2, RS = 50 Ω
αVIO
Offset voltage drift
VIC = VCC/2, RS = 50 Ω
VIC = 0 to 2.7 V, RS = 50 Ω
CMRR Common-mode rejection ratio
VIC = 0 to 5 V, RS = 50 Ω
VIC = 0 to 15 V, RS = 50 Ω
25°C
Full range
25°C
3
25°C
55
Full range
50
25°C
60
Full range
55
25°C
65
Full range
60
Large-signal differential voltage
amplification
AVD
7000
µV
µV/°C
72
76
dB
88
25°C
1000
25°C
20
V/mV
INPUT/OUTPUT CHARACTERISTICS
IIO
Input offset current
VIC = VCC/2, RS = 50 Ω
IIB
Input bias current
VIC = VCC/2, RS = 50 Ω
ri(d)
Differential input resistance
Full range
VOH
25°C
300
25°C
VCC –
80
VCC –
320
Full range
VCC –
450
VIC = VCC/2, IOH = 2 μA, VID = – 1 V
VIC = VCC/2, IOH = 50 μA, VID = – 1 V
250
1500
25°C
VIC = VCC/2, IOH = – 50 μA, VID = 1 V
Low-level output voltage
80
25°C
High-level output voltage
VOL
1000
Full range
VIC = VCC/2, IOH = 2 μA, VID = 1 V
100
pA
pA
MΩ
mV
25°C
8
25°C
80
Full range
200
mV
300
POWER SUPPLY
ICC
Supply current (per channel)
25°C
Output state high
VCC = 2.7 V to 5 V
PSRR
Power supply rejection ratio
VIC = VCC/2 V, No
load
VCC = 5 V to 15 V
(1)
8
560
Full range
800
1000
25°C
75
Full range
70
25°C
85
Full range
80
nA
100
105
dB
Full range is 0°C to 70°C for C suffix and –40°C to 125°C for I suffix. If not specified, full range is –40°C to 125°C.
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SLCS137D – NOVEMBER 2000 – REVISED MAY 2017
7.7 Switching Characteristics
At specified operating free-air temperature range, VCC = 2.7 V, 5 V, 15 V (unless otherwise noted).
PARAMETER
t(PLH)
t(PHL)
TEST CONDITIONS
f = 10 kHz, VSTEP = 100
mV, CL = 10 pF, VCC = 2.7
V
Propagation response time,
low-to-high-level output (1)
f = 10 kHz, VSTEP = 100
mV, CL = 10 pF, VCC = 2.7
V
Propagation response time,
high-to-low-level output (1)
tr
Rise time
CL = 10 pF, VCC = 2.7 V
tf
Fall time
CL = 10 pF, VCC = 2.7 V
tsu
(1)
(2)
Start-up time (TLV3701 Only)
VCC = 2.7 to 15V (2)
MIN
TYP
Overdrive = 2 mV
240
Overdrive = 10 mV
64
Overdrive = 50 mV
36
Overdrive = 2 mV
167
Overdrive = 10 mV
67
Overdrive = 50 mV
37
MAX
UNIT
µs
µs
7
µs
9
µs
25°C
7
15
Full range
14
30
ms
The response time specified is the interval between the input step function and the instant when the output crosses 1.4 V. Propagation
responses are longer at higher supply voltages, refer to Figures 12 – 17 for further details.
The definition of start-up time is the time period between the supply voltage reaching minimum supply (VCCmin) and the device IQ
activating (ICCmin) with a valid device output voltage. Single device only.
7.8 Dissipation Ratings
PACKAGE
θJC (°C/W)
θJA (°C/W)
TA ≤ 25°C POWER RATING
TA = 125°C POWER
RATING
D (8)
69.1
124.8
1001 mW
200 mW
D (14)
38.1
81.4
1536 mW
307 mW
DBV (5)
102.4
193.6
646 mW
129 mW
DGK (8)
65.7
163.9
763 mW
153 mW
N (14)
50.9
58.1
2151 mW
430 mW
P (8)
84.8
82.8
1510 mW
302 mW
PW (14)
33.9
105.7
1183 mW
237 mW
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7.9 Typical Characteristics
At specified operating conditions (unless otherwise noted).
Table 5. Table of Graphs
FIGURE
Input bias/offset current
vs Free-air temperature
VOL
Low-level output voltage
vs Low-level output current
Figure 6, Figure 8, Figure 4
VOH
High-level output voltage
vs High-level output current
Figure 3, Figure 5, Figure 7
ICC
vs Supply voltage
Supply current
Output fall time/rise time
Free-air temperature
Figure 9
vs Supply voltage
Figure 10
Figure 11, Figure 13, Figure 15
High-to-low level output response for various input overdrives
Figure 12, Figure 14, Figure 16
1200
IIB / IIO – Input Bias/Offset Current – pA
TA = 125 °C
TA = 70 °C
600
TA = 25 °C
500
TA = 0 °C
400
TA = –40 °C
300
200
VID = –1 V
0
2
4
6
8
10
12
14
16
VCC – Supply Voltage – V
Figure 1. Supply Current vs Supply Voltage
2.7
800
400
200
IIO
0
–200
–40 –25 –10 5 20 35 50 65 80 95 110 125
TA – Free-Air Temperature – °C
Figure 2. Input Bias/Offset Current vs Free-Air Temperature
2.7
TA = –40 °C
TA = 0 °C
1.8
1.5
TA = 25 °C
1.2
0.9
TA = 70 °C
0.6
0.3
TA = 125 °C
0.0
VCC = 2.7 V
VID = –1 V
2.4
–
2.1
IIB
600
VCC = 2.7 V
VID = –1 V
2.4
VOH – High-Level Output Voltage – V
VCC = 15 V
1000
VOL – Low-Level Output Voltage V
I CC – Supply Current/Ch – nA
700
TA = 125 °C
2.1
TA = 70 °C
1.8
TA = 25 °C
1.5
1.2
TA = 0 °C
0.9
0.6
TA = –40 °C
0.3
0.0
0
0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45
I OH – High-Level Output Current – mA
Figure 3. High-Level Output Voltage vs High-Level Output
Current
10
Figure 1
Low-to-high level output response for various input overdrives
800
100
Figure 2
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0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
IOL – Low-Level Output Current – mA
Figure 4. Low-Level Output Voltage vs Low-Level Output
Current
Copyright © 2000–2017, Texas Instruments Incorporated
Product Folder Links: TLV3701 TLV3702 TLV3704
TLV3701, TLV3702, TLV3704
www.ti.com
SLCS137D – NOVEMBER 2000 – REVISED MAY 2017
5
5
VCC = 5 V
VID = –1 V
4
TA = –40 °C
3.5
TA = 0 °C
3
TA = 25 °C
2.5
2
TA = 70 °C
1.5
1
TA = 125 °C
0.5
VCC = 5 V
VID = –1 V
4.5
VOL– Low-Level Output Voltage – V
VOH – High-Level Output Voltage - V
4.5
4
TA = 125 °C
3.5
TA = 70 °C
3
2.5
2
TA = 25 °C
1.5
TA = 0 °C
1
TA = –40 °C
0.5
0
0
0
0.2 0.4
0.6 0.8 1.0 1.2 1.4 1.6 1.8
0
IOH – High-Level Output Current – mA
Figure 5. High-Level Output Voltage vs High-Level Output
Current
12
VOL – Low-Level Output Voltage - V
VOH – High-Level Output Voltage – V
1.6
2.0
2.4
2.8
TA = –40 °C
10.5
9
TA = 25 °C
7.5
6
TA = 70 °C
4.5
3
TA = 125 °C
VCC = 15 V
VID = –1 V
1.5
0
1
2
3
4
5
6
7
VCC = 15 V
VID = –1 V
13.5
8
12
TA = 70 °C
9
TA = 25 °C
7.5
6
4.5
TA = 0 °C
3
TA = –40 °C
1.5
0
9
TA = 125 °C
10.5
0
I OH – High-Level Output Current – mA
Figure 7. High-Level Output Voltage vs High-Level Output
Current
1
2
3
4
5
6
7
8
9
IOL – Low-Level Output Current – mA
Figure 8. Low-Level Output Voltage vs Low-Level Output
Current
120
700
µs
VCC = 2.7 V, 5 V, 15 V
VID = –1 V
t r(f) – Output Rise/Fall Time
–
I CC – Supply Current /Ch –nA
1.2
15
TA = 0 °C
13.5
600
0.8
Figure 6. Low-Level Output Voltage vs Low-Level Output
Current
15
0
0.4
IOL – Low-Level Output Current – mA
500
400
300
200
100
VID = 1 V to –1 V
Input Rise/Fall Time = 4 µs
CL = 10 pF
TA = 25 °C
100
80
60
Fall Time
40
20
Rise Time
0
–40–25–10 5
0
20 35 50 65 80 95 110 125
0
2.5
TA – Free-Air Temperature – °C
Figure 9. Supply Current vs Free-Air Temperature
5
7.5
10
12.5
VCC – Supply Voltage – V
15
Figure 10. Output Rise/Fall Time vs Supply Voltage
Copyright © 2000–2017, Texas Instruments Incorporated
Product Folder Links: TLV3701 TLV3702 TLV3704
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www.ti.com
VO – Output Voltage – V
VO – Output Voltage – V
6
3
2.7
2.4
2.1
1.8
1.5
1.2
0.9
0.6
0.3
0
50 mV
2 mV
10 mV
5
4
50 mV
3
2 mV
10 mV
2
1
0
VCC = 2.7 V
CL = 10 pF
TA = 25 °C
–0.15
0
50 75 100 125 150 175 200 225 250 275 300
25
–0.15
t – Time – µs
VO – Output Voltage – V
Figure 12. High-to-Low Level Output Response for Various
Input Overdrives
2 mV
10 mV
4
2
0
VCC = 15 V
CL = 10 pF
TA = 25 °C
3
2.7
2.4
2.1
1.8
1.5
1.2
0.9
0.6
0.3
0
–0.3
50 mV
2 mV
10 mV
0.15
0.04
0
–0.04
–0.08
–0.12
VID – Differential
Input Voltage – V
VO – Output Voltage – V
50 mV
0
VCC = 2.7 V
CL = 10 pF
TA = 25 °C
25 50 75 100 125 150 175 200 225 250 275 300
t – Time – µs
Figure 14. High-to-Low Level Output Response for Various
Input Overdrives
Figure 13. Low-to-High Level Output Response for Various
Input Overdrives
VO – Output Voltage – V
5
50 mV
10 mV
2 mV
1
0
VCC = 5 V
CL = 10 pF
TA = 25 °C
0.10
0.05
0
0 25
50
–0.05
75 100 125 150 175 200 225 250 275 300
VID – Differential
Input Voltage – V
VO – Output Voltage – V
6
2
16
14
12
10
8
6
4
2
0
50 mV
10 mV
2 mV
0.12
0.08
0.04
0
–0.04
100 150 200 250 300 350 400
VCC = 15 V
CL = 10 pF
TA = 25 °C
0
50
t – Time – µs
t – Time – µs
Figure 15. Low-to-High Level Output Response for Various
Input Overdrives
12
0.05
–0.05
0
t – Time – µs
3
0.10
0
25 50 75 100 125 150 175 200 225 250 275 300
4
–0.10
50 75 100 125 150 175 200 225 250 275 300
t – Time – µs
Figure 11. Low-to-High Output Response for Various Input
Overdrives
16
14
12
10
8
6
–0.05
VID – Differential
Input Voltage – V
25
–0.10
0
VCC = 5 V
CL = 10 pF
TA = 25 °C
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VID – Differential
Input Voltage – V
0
–0.05
0.05
VID – Differential
Input Voltage – V
0
VID – Differential
Input Voltage – V
0.05
Figure 16. High-to-Low Level Output Response for Various
Input Overdrives
Copyright © 2000–2017, Texas Instruments Incorporated
Product Folder Links: TLV3701 TLV3702 TLV3704
TLV3701, TLV3702, TLV3704
www.ti.com
SLCS137D – NOVEMBER 2000 – REVISED MAY 2017
8 Detailed Description
8.1 Overview
The TLV370x is a family of nanopower comparators drawing only 560 nA per channel supply current. Having a
minimum operating supply voltage of 2.7 V over the extended industrial temperature range (TA = –40°C to
+125°C), while having an input common-mode range of –0.1 to VCC + 5 V makes this device ideal for batterypowered and wireless handset applications.
8.2 Functional Block Diagram
VCC
IN+
OUT
IN±
GND
Copyright © 2016, Texas Instruments Incorporated
8.3 Feature Description
8.3.1 Operating Voltage
The TLV340x comparators are specified for use on a single supply from 2.5 V to 16 V (or a dual supply from
±1.25 V to ±16 V) over a temperature range of −40°C to +125°C.
8.3.2 Setting the Threshold
Using a low-power, stable reference is important when setting the transition point for the TLV340x devices. The
REF3312, as shown in Figure 17, provides a 1.25-V reference voltage with low drift and only 3.9 µA of quiescent
current.
VS
Input voltage
IN+
VCC
Output voltage
OUT
VS
REF3312
IN±
GND
1.25 V threshold voltage
Copyright © 2016, Texas Instruments Incorporated
Figure 17. Setting the Threshold
8.4 Device Functional Modes
The TLV370x has a single functional mode and is operational when the power supply voltage applied ranges
from 2.5 V (±1.25 V) to 16 V (±8 V).
Copyright © 2000–2017, Texas Instruments Incorporated
Product Folder Links: TLV3701 TLV3702 TLV3704
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13
TLV3701, TLV3702, TLV3704
SLCS137D – NOVEMBER 2000 – REVISED MAY 2017
www.ti.com
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
Many applications require the detection of a signal (voltage or current) that exceeds a particular threshold voltage
or current. Using a comparator to make that threshold detection is the easiest, lowest power and highest speed
way to make a threshold detection.
9.2 Typical Application
5V
Input voltage
IN+
VCC
Output voltage
OUT
5V
REF3312
IN±
GND
1.25 V threshold voltage
Copyright © 2016, Texas Instruments Incorporated
Figure 18. 1.25-V Threshold Detector
9.2.1 Design Requirements
• Detect when a signal is above or below 1.25 V
• Operate from a single 5-V power supply
• Rail-to-rail input voltage range from 0 to 5 V
• Rail-to-rail output voltage range from 0 to 5 V
9.2.2 Detailed Design Procedure
The input voltage range in the circuit illustrated in Figure 18 is limited only by the power supply applied to the
TV3701. In this example with the selection of a 5-V, single-supply power supply, the input voltage range is limited
to 0 to VS + 5 V, or 0 to 10 V. The threshold voltage of 1.25 V can de derived in a variety of ways. As the
TLV3701 is a very low-power device, it is desirable to also use very low power to create the threshold voltage.
The REF3312 series voltage reference is selected for its stable output voltage of 1.25 V and its low power
consumption of only 3.9 µA. The TLV3701 is an push-pull output comparator, and does not require a pullup
resistor to save power.
14
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Product Folder Links: TLV3701 TLV3702 TLV3704
TLV3701, TLV3702, TLV3704
www.ti.com
SLCS137D – NOVEMBER 2000 – REVISED MAY 2017
Typical Application (continued)
9.2.3 Application Curve
6
Output Voltage (V)
5
4
3
2
1
0
0
1
2
3
Voltage at IN pin (V)
4
5
Figure 19. Transfer Function for the Threshold Detector
Copyright © 2000–2017, Texas Instruments Incorporated
Product Folder Links: TLV3701 TLV3702 TLV3704
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15
TLV3701, TLV3702, TLV3704
SLCS137D – NOVEMBER 2000 – REVISED MAY 2017
www.ti.com
10 Power Supply Recommendations
The TLV340x device is specified for operation from 2.5 V to 16 V (±1.25 to ±8 V); many specifications apply from
–40°C to +125°C. Parameters that can exhibit significant variance with regard to operating voltage or
temperature are presented in Typical Characteristics.
11 Layout
11.1 Layout Guidelines
Figure 20 shows the typical connections for the TLV340x. To minimize supply noise, power supplies must be
capacitively decoupled by a 0.01-µF ceramic capacitor in parallel with a 10-µF electrolytic capacitor.
Comparators are very sensitive to input noise. Proper grounding (the use of a ground plane) helps to maintain
the specified performance of the TLV340x family.
For best results, maintain the following layout guidelines:
1. Use a printed-circuit board (PCB) with a good, unbroken low-inductance ground plane.
2. Place a decoupling capacitor (0.1-µF ceramic, surface-mount capacitor) as close as possible to VCC.
3. On the inputs and the output, keep lead lengths as short as possible to avoid unwanted parasitic feedback
around the comparator. Keep inputs away from the output.
4. Solder the device directly to the PCB rather than using a socket.
5. For slow-moving input signals, take care to prevent parasitic feedback. A small capacitor (1000 pF or less)
placed between the inputs can help eliminate oscillations in the transition region. This capacitor causes some
degradation to propagation delay when the impedance is low. The top-side ground plane runs between the
output and inputs.
6. The ground pin ground trace runs under the device up to the bypass capacitor, shielding the inputs from the
outputs.
11.2 Layout Example
Power supply
0.01 µF
10 F
V+
+IN
OUT
± IN
OUT
Power supply
1
5
0.01 µF
10 F
2
±
+
3
4
Not to scale
+IN
±IN
Copyright © 2016, Texas Instruments Incorporated
Figure 20. TLV3701 SOT-23 Layout Example
16
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Copyright © 2000–2017, Texas Instruments Incorporated
Product Folder Links: TLV3701 TLV3702 TLV3704
TLV3701, TLV3702, TLV3704
www.ti.com
SLCS137D – NOVEMBER 2000 – REVISED MAY 2017
12 Device and Documentation Support
12.1 Device Support
12.1.1 Development Support
12.1.1.1 DIP Adapter EVM
The DIP Adapter EVM tool provides an easy, low-cost way to prototype small surface mount ICs. The evaluation
tool these TI packages: D or U (8-pin SOIC), PW (8-pin TSSOP), DGK (8-pin MSOP), DBV (6-pin SOT-23, 5-pin
SOT23, and 3-pin SOT-23), DCK (6-pin SC-70 and 5-pin SC-70), and DRL (6-pin SOT-563). The DIP Adapter
EVM may also be used with terminal strips or may be wired directly to existing circuits.
12.1.1.2 Universal Op Amp EVM
The Universal Op Amp EVM is a series of general-purpose, blank circuit boards that simplify prototyping circuits
for a variety of IC package types. The evaluation module board design allows many different circuits to be
constructed easily and quickly. Five models are offered, with each model intended for a specific package type.
PDIP, SOIC, MSOP, TSSOP, and SOT-23 packages are all supported.
NOTE
These boards are unpopulated, so users must provide their own ICs. TI recommends
requesting several op amp device samples when ordering the Universal Op Amp EVM.
12.2 Documentation Support
12.2.1 Related Documentation
The following documents are relevant for using the TLV340x devices and are recommended for reference. All are
available for download at www.ti.com (unless otherwise noted):
• Universal Op Amp EVM User Guide (SLOU060)
• Hardware Pace Using Slope Detection (SLAU511)
• Bipolar High-voltage Differential Interface for Low-Voltage Comparators (TIDU039)
• AC-Coupled Single Supply Comparator (SLAU505)
• ECG Implementation on the TMS320VC5505 DSP Medical Development Kit (SPRAB36)
• REF33xx 3.9-μA, SC70-3, SOT-23-3, and UQFN-8, 30-ppm/°C Drift Voltage Reference (SBOS392)
12.3 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 6. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TLV3701
Click here
Click here
Click here
Click here
Click here
TLV3702
Click here
Click here
Click here
Click here
Click here
TLV3704
Click here
Click here
Click here
Click here
Click here
12.4 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
Copyright © 2000–2017, Texas Instruments Incorporated
Product Folder Links: TLV3701 TLV3702 TLV3704
Submit Documentation Feedback
17
TLV3701, TLV3702, TLV3704
SLCS137D – NOVEMBER 2000 – REVISED MAY 2017
www.ti.com
12.5 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.6 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.7 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
12.8 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
18
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Copyright © 2000–2017, Texas Instruments Incorporated
Product Folder Links: TLV3701 TLV3702 TLV3704
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2019
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TLV3701CD
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
3701C
TLV3701CDBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
VBCC
TLV3701CDBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
VBCC
TLV3701CDBVTG4
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
VBCC
TLV3701ID
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
3701I
TLV3701IDBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
VBCI
TLV3701IDBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
VBCI
TLV3701IDBVTG4
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
VBCI
TLV3701IDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
3701I
TLV3701IP
ACTIVE
PDIP
P
8
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
-40 to 125
TLV3701I
TLV3702CD
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
3702C
TLV3702CDGK
ACTIVE
VSSOP
DGK
8
80
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AKC
TLV3702CDGKG4
ACTIVE
VSSOP
DGK
8
80
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AKC
TLV3702CDGKR
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AKC
TLV3702CDGKRG4
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AKC
TLV3702ID
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
3702I
TLV3702IDGK
ACTIVE
VSSOP
DGK
8
80
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
AKD
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2019
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TLV3702IDGKG4
ACTIVE
VSSOP
DGK
8
80
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
AKD
TLV3702IDGKR
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
AKD
TLV3702IDGKRG4
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
AKD
TLV3702IDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
3702I
TLV3702IP
ACTIVE
PDIP
P
8
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
-40 to 125
TLV3702I
TLV3704CD
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
3704C
TLV3704CPW
ACTIVE
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
3704C
TLV3704ID
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
3704I
TLV3704IDG4
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
3704I
TLV3704IDR
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
3704I
TLV3704IDRG4
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
3704I
TLV3704IN
ACTIVE
PDIP
N
14
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
-40 to 125
TLV3704I
TLV3704IPW
ACTIVE
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
3704I
TLV3704IPWR
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
3704I
TLV3704IPWRG4
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
3704I
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2019
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLV3701, TLV3702 :
• Automotive: TLV3701-Q1, TLV3702-Q1
• Enhanced Product: TLV3701-EP
NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
• Enhanced Product - Supports Defense, Aerospace and Medical Applications
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
25-Sep-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
TLV3701CDBVR
SOT-23
DBV
5
3000
180.0
9.0
TLV3701CDBVT
SOT-23
DBV
5
250
180.0
TLV3701IDBVR
SOT-23
DBV
5
3000
180.0
TLV3701IDBVT
SOT-23
DBV
5
250
TLV3701IDR
SOIC
D
8
TLV3702CDGKR
VSSOP
DGK
TLV3702IDGKR
VSSOP
DGK
TLV3702IDR
SOIC
W
Pin1
(mm) Quadrant
3.15
3.2
1.4
4.0
8.0
Q3
9.0
3.15
3.2
1.4
4.0
8.0
Q3
9.0
3.15
3.2
1.4
4.0
8.0
Q3
180.0
9.0
3.15
3.2
1.4
4.0
8.0
Q3
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TLV3704IDR
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
TLV3704IPWR
TSSOP
PW
14
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
25-Sep-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TLV3701CDBVR
SOT-23
DBV
5
3000
182.0
182.0
20.0
TLV3701CDBVT
SOT-23
DBV
5
250
182.0
182.0
20.0
TLV3701IDBVR
SOT-23
DBV
5
3000
182.0
182.0
20.0
TLV3701IDBVT
SOT-23
DBV
5
250
182.0
182.0
20.0
TLV3701IDR
SOIC
D
8
2500
340.5
338.1
20.6
TLV3702CDGKR
VSSOP
DGK
8
2500
358.0
335.0
35.0
TLV3702IDGKR
VSSOP
DGK
8
2500
358.0
335.0
35.0
TLV3702IDR
SOIC
D
8
2500
340.5
338.1
20.6
TLV3704IDR
SOIC
D
14
2500
333.2
345.9
28.6
TLV3704IPWR
TSSOP
PW
14
2000
367.0
367.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
DBV0005A
SOT-23 - 1.45 mm max height
SCALE 4.000
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
1.75
1.45
PIN 1
INDEX AREA
1
0.1 C
B
A
5
2X 0.95
1.9
1.45
0.90
3.05
2.75
1.9
2
4
0.5
5X
0.3
0.2
3
(1.1)
C A B
0.15
TYP
0.00
0.25
GAGE PLANE
8
TYP
0
0.22
TYP
0.08
0.6
TYP
0.3
SEATING PLANE
4214839/E 09/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
www.ti.com
EXAMPLE BOARD LAYOUT
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
2X (0.95)
3
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214839/E 09/2019
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
2X(0.95)
4
3
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214839/E 09/2019
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
D0008A
SOIC - 1.75 mm max height
SCALE 2.800
SMALL OUTLINE INTEGRATED CIRCUIT
C
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
A
.004 [0.1] C
PIN 1 ID AREA
6X .050
[1.27]
8
1
2X
.150
[3.81]
.189-.197
[4.81-5.00]
NOTE 3
4X (0 -15 )
4
5
B
8X .012-.020
[0.31-0.51]
.010 [0.25]
C A B
.150-.157
[3.81-3.98]
NOTE 4
.069 MAX
[1.75]
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
[0.11-0.25]
0 -8
.016-.050
[0.41-1.27]
DETAIL A
(.041)
[1.04]
TYPICAL
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
SEE
DETAILS
1
8
8X (.024)
[0.6]
6X (.050 )
[1.27]
SYMM
5
4
(R.002 ) TYP
[0.05]
(.213)
[5.4]
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
METAL
SOLDER MASK
OPENING
EXPOSED
METAL
.0028 MAX
[0.07]
ALL AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
EXPOSED
METAL
.0028 MIN
[0.07]
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
1
8
8X (.024)
[0.6]
6X (.050 )
[1.27]
SYMM
5
4
(R.002 ) TYP
[0.05]
(.213)
[5.4]
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
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