Texas Instruments | LF347, LF347B JFET-Input Quad Operational Amplifiers (Rev. C) | Datasheet | Texas Instruments LF347, LF347B JFET-Input Quad Operational Amplifiers (Rev. C) Datasheet

Texas Instruments LF347, LF347B JFET-Input Quad Operational Amplifiers (Rev. C) Datasheet
Product
Folder
Sample &
Buy
Technical
Documents
Support &
Community
Tools &
Software
LF347, LF347B
SLOS013C – MARCH 1987 – REVISED MARCH 2016
LF347, LF347B JFET-Input Quad Operational Amplifiers
1 Features
3 Description
•
•
•
•
•
•
The LF347 and LF347B devices are low-cost, highspeed, JFET-input operational amplifiers. They
require low supply current yet maintain a large gainbandwidth product and a fast slew rate. In addition,
their matched high-voltage JFET inputs provide very
low input bias and offset current.
1
Low Input Bias Current: 50 pA Typical
Low Input Noise Current: 0.01 pA/√Hz Typical
Low Total Harmonic Distortion
Low Supply Current: 8 mA Typical
Gain Bandwidth: 3 MHz Typical
High Slew Rate: 13 V/ms Typical
2 Applications
•
•
•
•
•
Motor Integrated Systems: UPS
Drives and Control Solutions: AC Inverters and VF
Drives
Renewables: Solar Inverters
Pro Audio Mixers
Oscilloscopes
The LF347 and LF347B can be used in applications
such as high-speed integrators, digital-to-analog
converters, sample-and-hold circuits, and many other
circuits.
The LF347 and LF347B devices are characterized for
operation from 0°C to 70°C.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
LF347D, LF347BD
SOIC (14)
8.65 mm × 3.91 mm
LF347N, LF347BN
PDIP (14)
19.30 mm × 6.35 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Symbol (Each Amplifier)
IN –
–
IN +
+
OUT
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LF347, LF347B
SLOS013C – MARCH 1987 – REVISED MARCH 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
4
4
4
4
5
5
6
6
Absolute Maximum Ratings ......................................
ESD Ratings ............................................................
Recommended Operating Conditions.......................
Thermal Information .................................................
Electrical Characteristics: LF347 ..............................
Electrical Characteristics: LF347B ............................
Switching Characteristics ..........................................
Typical Characteristics .............................................
Parameter Measurement Information .................. 7
Detailed Description .............................................. 8
8.1 Overview ................................................................... 8
8.2 Functional Block Diagram ......................................... 8
8.3 Feature Description................................................... 8
8.4 Device Functional Modes.......................................... 8
9
Application and Implementation .......................... 9
9.1 Application Information.............................................. 9
9.2 Typical Application ................................................... 9
10 Power Supply Recommendations ..................... 10
11 Layout................................................................... 10
11.1 Layout Guidelines ................................................. 10
11.2 Layout Example .................................................... 11
12 Device and Documentation Support ................. 12
12.1
12.2
12.3
12.4
12.5
12.6
Documentation Support ........................................
Related Links ........................................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
12
12
12
12
12
12
13 Mechanical, Packaging, and Orderable
Information ........................................................... 12
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (August 1994) to Revision C
•
2
Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section .................................................................................................. 1
Submit Documentation Feedback
Copyright © 1987–2016, Texas Instruments Incorporated
Product Folder Links: LF347 LF347B
LF347, LF347B
www.ti.com
SLOS013C – MARCH 1987 – REVISED MARCH 2016
5 Pin Configuration and Functions
D or N Package
14-Pin SOIC or PDIP
Top View
1OUT
1
14
4OUT
1IN–
2
13
4IN–
1IN+
3
12
4IN+
4
11
V
2IN+
5
10
3IN+
2IN–
6
9
3IN–
2OUT
7
8
3OUT
V
CC+
CC–
Pin Functions
PIN
I/O
DESCRIPTION
NO.
NAME
1
1OUT
O
Output pin of amplifier 1
2
1IN–
I
Inverting input pin of amplifier 1
Noninverting input pin of amplifier 1
3
1IN+
I
4
VCC+
—
5
2IN+
I
Noninverting input pin of amplifier 2
Positive Supply
6
2IN–
I
Inverting input pin of amplifier 2
7
2OUT
O
Output pin of amplifier 2
8
3OUT
O
Output pin of amplifier 3
9
3IN–
I
Inverting input pin of amplifier 3
10
3IN+
I
Noninverting input pin of amplifier 3
11
VCC–
—
12
4IN+
I
Noninverting input pin of amplifier 4
Negative Supply
13
4IN–
I
Inverting input pin of amplifier 4
14
4OUT
O
Output pin of amplifier 4
Submit Documentation Feedback
Copyright © 1987–2016, Texas Instruments Incorporated
Product Folder Links: LF347 LF347B
3
LF347, LF347B
SLOS013C – MARCH 1987 – REVISED MARCH 2016
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
VCC+
Supply voltage
VCC–
Supply voltage
VID
Differential input voltage
–30
VI
Input voltage (2)
–15
MAX
UNIT
18
V
–18
V
30
V
15
V
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260
°C
TJ
Operating virtual junction temperature
150
°C
Tstg
Storage temperature
150
°C
(1)
(2)
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Unless otherwise specified, the absolute maximum negative input voltage is equal to the negative power supply voltage.
6.2 ESD Ratings
VALUE
Electrostatic
discharge
V(ESD)
(1)
(2)
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
UNIT
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
V
±1000
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
TA
free-air temperature
VCC+
Supply voltage
VCC–
Supply voltage
VCM
Common-mode voltage
TA
Operating temperature
MIN
MAX
0
70
UNIT
°C
3.5
18
V
V
–3.5
–18
VCC– + 4
VCC+ – 4
V
0
70
°C
6.4 Thermal Information
LF347, LF347B
THERMAL METRIC
(1)
D (SOIC)
N (PDIP)
14 PINS
14 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
74.4
42.7
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
32.5
29.2
°C/W
RθJB
Junction-to-board thermal resistance
28.9
22.6
°C/W
ψJT
Junction-to-top characterization parameter
3.7
13.5
°C/W
ψJB
Junction-to-board characterization parameter
28.6
22.5
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
Submit Documentation Feedback
Copyright © 1987–2016, Texas Instruments Incorporated
Product Folder Links: LF347 LF347B
LF347, LF347B
www.ti.com
SLOS013C – MARCH 1987 – REVISED MARCH 2016
6.5 Electrical Characteristics: LF347
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VIO
Input offset voltage
VIC = 0, RS = 10 kΩ
αVIO
Average temperature coefficient
of input offset voltage
VIC = 0, RS = 10 kΩ
IIO
Input offset current (2)
VIC = 0
Input bias current (2)
IIB
MAX
5
10
13
18
25°C
25
70°C
25°C
VIC = 0
50
70°C
Lower limit of range
–11
–12
Upper limit of range
11
15
±12
±13.5
25°C
25
100
Full range
15
Common-mode input voltage
VOM
Maximum peak output voltage
swing
RL = 10 kΩ
AVD
Large signal differential voltage
VO = ±10 V, RL = 2 kΩ
ri
Input resistance
TA = 25°C
CMRR
Common-mode rejection ratio
RS ≤ 2 kΩ
kSVR
Supply-voltage rejection ratio
See
ICC
Supply current
(3)
TYP
Full range (1)
VICR
(1)
(2)
MIN
25°C
(3)
UNIT
mV
µV/°C
100
pA
4
nA
200
pA
8
nA
V
V
V/mV
1012
Ω
70
100
dB
70
100
8
dB
11
mA
Full range is 0°C to 70°C.
Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive. Pulse
techniques must be used that will maintain the junction temperatures as close to the ambient temperature as possible.
Supply-voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously.
6.6 Electrical Characteristics: LF347B
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VIO
Input offset voltage
VIC = 0, RS = 10 kΩ
αVIO
Average temperature coefficient
of input offset voltage
VIC = 0, RS = 10 kΩ
IIO
Input offset current (2)
VIC = 0
IIB
Input bias current
(2)
MAX
3
5
7
18
25
70°C
25°C
VIC = 0
50
70°C
Lower limit of range
–11
–12
Upper limit of range
11
15
±12
±13.5
25°C
50
100
Full range
25
Common-mode input voltage
VOM
Maximum peak output voltage
swing
RL = 10 kΩ
AVD
Large signal differential voltage
VO = ±10 V, RL = 2 kΩ
ri
Input resistance
TA = 25°C
CMRR
Common-mode rejection ratio
RS ≤ 2 kΩ
kSVR
Supply-voltage rejection ratio
See
ICC
Supply current
(3)
TYP
Full range (1)
25°C
VICR
(1)
(2)
MIN
25°C
(3)
UNIT
mV
µV/°C
100
pA
4
nA
200
pA
8
nA
V
V
V/mV
1012
Ω
80
100
dB
80
100
8
dB
11
mA
Full range is 0°C to 70°C.
Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive. Pulse
techniques must be used that will maintain the junction temperatures as close to the ambient temperature as possible.
Supply-voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously.
Submit Documentation Feedback
Copyright © 1987–2016, Texas Instruments Incorporated
Product Folder Links: LF347 LF347B
5
LF347, LF347B
SLOS013C – MARCH 1987 – REVISED MARCH 2016
www.ti.com
6.7 Switching Characteristics
VCC± = ±15 V, TA= 25°C
PARAMETER
SR
Slew rate at unity gain
B1
Unity-gain bandwidth
TEST CONDITIONS
MIN
TYP
RL = 2 kΩ,
See Figure 5
8
13
V/μs
3
MHz
VI = 10 V,
CL = 100 pF,
VO1 / VO2 Crosstalk attenuation
f = 1 kHZ
f = 1 kHz
Vn
Equivalent input noise
voltage
RS = 20 Ω
In
Equivalent input noise
current
RS = 20 Ω,
f = 10 Hz to 10 kHz
f = 1 kHz
MAX
UNIT
120
dB
18
nV/√Hz
4
μV
0.01
pA/√Hz
6.8 Typical Characteristics
100
IIIB−
IB Input Bias Current − nA
VCC± = ±15 V
10
1
0.1
0.01
−75
−50
−25
0
25
50
75
100
125
TA − Free-Air Temperature − °C
Figure 1. Input Bias Current vs Free-Air Temperature
Figure 3. Maximum Peak Output Voltage vs Load
Resistance
6
Figure 2. Maximum Peak Output Voltage vs Frequency
Figure 4. Large-Signal Differential Voltage Amplification
and Phase Shift vs Frequency
Submit Documentation Feedback
Copyright © 1987–2016, Texas Instruments Incorporated
Product Folder Links: LF347 LF347B
LF347, LF347B
www.ti.com
SLOS013C – MARCH 1987 – REVISED MARCH 2016
7 Parameter Measurement Information
−
OUT
VI
+
CL = 100 pF
RL = 2 kΩ
Figure 5. Unity-Gain Amplifier
Submit Documentation Feedback
Copyright © 1987–2016, Texas Instruments Incorporated
Product Folder Links: LF347 LF347B
7
LF347, LF347B
SLOS013C – MARCH 1987 – REVISED MARCH 2016
www.ti.com
8 Detailed Description
8.1 Overview
The LF347 is a JFET-input operational amplifier with low input bias and offset currents and fast slew rate. Each
amplifier features JFET inputs (for high input impedance) coupled with bipolar output stages integrated on a
single monolithic chip. The output is protected against shorts due to the resistive 200-Ω output impedance.
8.2 Functional Block Diagram
8.3 Feature Description
8.3.1 Slew Rate
The slew rate is the rate at which an operational amplifier can change its output when there is a change on the
input. These devices have a 13-V/μs slew rate.
8.4 Device Functional Modes
These devices are powered on when the supply is connected. This device can be operated as a single-supply
operational amplifier or dual-supply amplifier depending on the application.
8
Submit Documentation Feedback
Copyright © 1987–2016, Texas Instruments Incorporated
Product Folder Links: LF347 LF347B
LF347, LF347B
www.ti.com
SLOS013C – MARCH 1987 – REVISED MARCH 2016
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The LF347 has four independent amplifiers that have very low input bias current which allow using higher
resistance resistors in the feedback network. The upper input common mode range typically goes to the positive
supply rail. The lower common mode range does not include the negative supply rail; it must be at least 4-V
greater. Output resistance is 200 Ω to protect the device from accidental shorts.
9.2 Typical Application
A typical application for an operational amplifier is an inverting amplifier. This amplifier takes a positive voltage on
the input, and makes it a negative voltage of the same magnitude. In the same manner, it also makes negative
voltages positive.
RF
RI
Vsup+
VOUT
+
VIN
Vsup-
Figure 6. Inverting Amplifier
9.2.1 Design Requirements
The supply voltage must be chosen such that it is larger than the input voltage range and output range. For
instance, this application scales a signal of ±0.5 V to ±1.8 V. Setting the supply at ±12 V is sufficient to
accommodate this application.
9.2.2 Detailed Design Procedure
Determine the gain required by the inverting amplifier:
VOUT
AV =
VIN
1.8
AV =
= -3.6
-0.5
(1)
(2)
When the desired gain is determined, choose a value for RI or RF. Choosing a value in the kΩ range is desirable
because the amplifier circuit uses currents in the milliamp range. This ensures the part does not draw too much
current. For this example, choose 10 kΩ for RI which means 36 kΩ is used for R, as determined by Equation 3.
RF
AV = (3)
RI
Submit Documentation Feedback
Copyright © 1987–2016, Texas Instruments Incorporated
Product Folder Links: LF347 LF347B
9
LF347, LF347B
SLOS013C – MARCH 1987 – REVISED MARCH 2016
www.ti.com
Typical Application (continued)
9.2.3 Application Curve
2
VIN
1.5
VOUT
1
Volts
0.5
0
-0.5
-1
-1.5
-2
0
0.5
1
Time (ms)
1.5
2
Figure 7. Input and Output Voltages of the Inverting Amplifier
10 Power Supply Recommendations
CAUTION
Supply voltages larger than 36 V for a single-supply or outside the range of ±18 V for a
dual-supply can permanently damage the device (see Absolute Maximum Ratings).
Place the 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or
high-impedance power supplies. For more detailed information on bypass capacitor placement, see Layout
Example.
11 Layout
11.1 Layout Guidelines
For best operational performance of the device, use good PCB layout practices, including:
• Noise can propagate into analog circuitry through the power pins of the circuit as a whole, as well as the
operational amplifier. Bypass capacitors are used to reduce the coupled noise by providing low impedance
power sources local to the analog circuitry.
– Connect low-ESR, 0.1-μF ceramic bypass capacitors between each supply pin and ground, placed as
close to the device as possible. A single bypass capacitor from V+ to ground is applicable for single
supply applications.
• Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective
methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes.
A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital
and analog grounds, paying attention to the flow of the ground current. For more detailed information, see the
chapter extract, Circuit Board Layout Techniques (SLOA089).
• To reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If
it is not possible to keep them separate, it is much better to cross the sensitive trace perpendicular as
opposed to in parallel with the noisy trace.
• Place the external components as close to the device as possible. Keeping RF and RG close to the inverting
10
Submit Documentation Feedback
Copyright © 1987–2016, Texas Instruments Incorporated
Product Folder Links: LF347 LF347B
LF347, LF347B
www.ti.com
SLOS013C – MARCH 1987 – REVISED MARCH 2016
Layout Guidelines (continued)
•
•
input minimizes parasitic capacitance, as shown in Layout Example.
Keep the length of input traces as short as possible. Always remember that the input traces are the most
sensitive part of the circuit.
Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly reduce
leakage currents from nearby traces that are at different potentials.
11.2 Layout Example
Figure 8. Operational Amplifier Board Layout for Noninverting Configuration
VIN
RIN
RG
+
VOUT
RF
Figure 9. Operational Amplifier Schematic for Noninverting Configuration
Submit Documentation Feedback
Copyright © 1987–2016, Texas Instruments Incorporated
Product Folder Links: LF347 LF347B
11
LF347, LF347B
SLOS013C – MARCH 1987 – REVISED MARCH 2016
www.ti.com
12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
For related documentation, see the following
Circuit Board Layout Techniques, SLOA089
12.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 1. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
LF347
Click here
Click here
Click here
Click here
Click here
LF347B
Click here
Click here
Click here
Click here
Click here
12.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
12
Submit Documentation Feedback
Copyright © 1987–2016, Texas Instruments Incorporated
Product Folder Links: LF347 LF347B
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LF347BD
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
LF347B
LF347BDR
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
LF347B
LF347BN
ACTIVE
PDIP
N
14
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
0 to 70
LF347BN
LF347D
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
LF347
LF347DG4
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
LF347
LF347DR
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
LF347
LF347N
ACTIVE
PDIP
N
14
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
0 to 70
LF347N
LF347NE4
ACTIVE
PDIP
N
14
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
0 to 70
LF347N
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
15-Jan-2016
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LF347BDR
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
LF347DR
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
15-Jan-2016
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LF347BDR
SOIC
D
14
2500
333.2
345.9
28.6
LF347DR
SOIC
D
14
2500
333.2
345.9
28.6
Pack Materials-Page 2
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you
permission to use these resources only for development of an application that uses the TI products described in the resource. Other
reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third
party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims,
damages, costs, losses, and liabilities arising out of your use of these resources.
TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on
ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable
warranties or warranty disclaimers for TI products.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2019, Texas Instruments Incorporated
Was this manual useful for you? yes no
Thank you for your participation!

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project

Download PDF

advertising