Texas Instruments | INA20x Unidirectional Measurement Current-Shunt Monitor With Dual Comparators (Rev. F) | Datasheet | Texas Instruments INA20x Unidirectional Measurement Current-Shunt Monitor With Dual Comparators (Rev. F) Datasheet

Texas Instruments INA20x Unidirectional Measurement Current-Shunt Monitor With Dual Comparators (Rev. F) Datasheet
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INA206, INA207, INA208
SBOS360F – JUNE 2006 – REVISED NOVEMBER 2015
INA20x Unidirectional Measurement Current-Shunt Monitor With Dual Comparators
1 Features
3 Description
•
•
The INA206, INA207, and INA208 are a family of
undirectional current-shunt monitors with voltage
output, dual comparators, and voltage reference. The
INA206, INA207, and INA208 can sense drops
across shunts at a common-mode voltages from –16
V to 80 V. The INA206, INA207, and INA208 are
available with three output voltage scales: 20 V/V, 50
V/V, and 100 V/V, with up to 500-kHz bandwidth.
1
•
•
•
•
•
•
Complete Current Sense Solution
Three Gain Options Available:
– INA206 = 20 V/V
– INA207 = 50 V/V
– INA208 = 100 V/V
Dual Comparators:
– Comparator 1 With Latch
– Comparator 2 With Optional Delay
Common-mode Range: –16 V to 80 V
High Accuracy: 3.5% (Maximum) Over
Temperature
Bandwidth: 500 kHz
Quiescent Current: 1.8 mA
Packages: SO-14, TSSOP-14, VSSOP-10
The INA206, INA207, and INA208 also incorporates
two open-drain comparators with internal 0.6-V
references. On 14-pin versions, the comparator
references can be overridden by external inputs.
Comparator 1 includes a latching capability, and
Comparator 2 has a user-programmable delay on 14pin versions. The 14-pin versions also provide a 1.2 V
reference output.
The INA206, INA207, and INA208 operate from a
single 2.7-V to 18-V supply. They are specified over
the extended operating temperature range of –40°C
to 125°C.
2 Applications
•
•
•
•
•
•
•
Notebook Computers
Cell Phones
Telecom Equipment
Automotive
Power Management
Battery Chargers
Welding Equipment
Device Information
PART NUMBER
INA206
INA207
INA208
PACKAGE
(1)
BODY SIZE (NOM)
SOIC (14)
8.65 mm × 3.91 mm
TSSOP (14)
5.00 mm × 4.40 mm
VSSOP (10)
3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
INA206- INA208
VS
1
OUT
2
1.2V REF
14
VIN+
13
VIN-
12
1.2V REF OUT
CMP1 IN- /0.6V REF
3
CMP1 IN+
4
11
CMP1 OUT
CMP2 IN-
5
10
CMP2 OUT
CMP2 IN+/0.6V REF
6
9
CMP2 DELAY
GND
7
8
CMP1 RESET
SO-14, TSSOP-14
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
INA206, INA207, INA208
SBOS360F – JUNE 2006 – REVISED NOVEMBER 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
8
1
1
1
2
3
3
5
Absolute Maximum Ratings ...................................... 5
ESD Ratings.............................................................. 5
Recommended Operating Conditions....................... 5
Thermal Information ................................................. 5
Electrical Characteristics: Current-Shunt Monitor ..... 6
Electrical Characteristics: Comparator...................... 7
Electrical Characteristics: Reference ........................ 8
Electrical Characteristics: General ............................ 8
Typical Characteristics ............................................ 10
Detailed Description ............................................ 15
8.1 Overview ................................................................. 15
8.2 Functional Block Diagram ....................................... 15
8.3 Feature Description................................................. 15
8.4 Device Functional Modes........................................ 19
9
Application and Implementation ........................ 22
9.1 Application Information............................................ 22
9.2 Typical Application ................................................. 22
10 Power Supply Recommendations ..................... 25
11 Layout................................................................... 26
11.1 Layout Guidelines ................................................. 26
11.2 Layout Example .................................................... 26
12 Device and Documentation Support ................. 27
12.1
12.2
12.3
12.4
12.5
Related Links ........................................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
27
27
27
27
27
13 Mechanical, Packaging, and Orderable
Information ........................................................... 27
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (October 2007) to Revision F
•
2
Page
ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section,
Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
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SBOS360F – JUNE 2006 – REVISED NOVEMBER 2015
5 Device Comparison Table
DEVICE
GAIN
INA206
20 V/V
INA207
50 V/V
INA208
100 V/V
6 Pin Configuration and Functions
D or PW Packages
14-Pin SOIC OR TSSOP
Top View
INA206- INA208
VS
1
OUT
2
1.2V REF
14
VIN+
13
VIN-
12
1.2V REF OUT
CMP1 IN- /0.6V REF
3
CMP1 IN+
4
11
CMP1 OUT
CMP2 IN-
5
10
CMP2 OUT
CMP2 IN+/0.6V REF
6
9
CMP2 DELAY
GND
7
8
CMP1 RESET
SO-14, TSSOP-14
Pin Functions: SOIC and TSSOP
PIN
NO.
NAME
I/O
DESCRIPTION
1
Vs
I
Power Supply
2
OUT
O
Output voltage
3
CMP1 IN/0.6V Ref
I
Comparator 1 negative input, can be used to override the internal 0.6-V reference
4
CMP1 IN+
I
Comparator 1 positive input
5
CMP2 IN-
I
Comparator 2 negative input
6
CMP2
IN+/0.6V Ref
I
Comparator 2 positive input, can be used to override the internal 0.6-V reference
7
GND
I
Ground
8
CMP1
RESET
I
Comparator 1 ouput reset, active low
9
CMP2
DELAY
I
Connect an optional capacitor to adjust comparator 2 delay
10
CMP2 OUT
O
Comparator 2 output
11
CMP1 OUT
O
Comparator 1 output
12
1.2V REF
OUT
O
1.2-V reference output
13
VIN-
I
Connect to shunt low side
14
VIN+
I
Connect to shunt high side
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DGS Package
10-Pin VSSOP
Top View
INA206- INA208
VS
1
10
VIN+
OUT
2
9
VIN-
CMP1 IN+
3
8
CMP1 OUT
CMP2 IN-
4
7
CMP2 OUT
GND
5
6
CMP1 RESET
0.6V REF
MSOP-10
Pin Functions: VSSOP
PIN
NO.
NAME
I/O
DESCRIPTION
1
Vs
I
Power Supply
2
OUT
O
Output voltage
3
CMP1 IN+
I
Comparator 1 positive input
4
CMP2 IN-
I
Comparator 2 negative input
5
GND
I
Ground
6
CMP1
RESET
I
Comparator 1 ouput reset, active low
7
CMP2 OUT
O
Comparator 2 output
8
CMP1 OUT
O
Comparator 1 output
9
VIN-
I
Connect to shunt low side
10
VIN+
I
Connect to shunt high side
4
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SBOS360F – JUNE 2006 – REVISED NOVEMBER 2015
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
MAX
UNIT
18
V
Supply voltage, Vs
Differential (VIN+) – (VIN–)
–18
18
V
Common-Mode
–16
80
V
Comparator analog input and reset pins
GND – 0.3
(Vs) + 0.3
V
Analog output, out pin
GND – 0.3
(Vs) + 0.3
V
Comparator output, out pin
GND – 0.3
18
V
VREF and CMP2 delay pin
GND – 0.3
10
V
5
mA
Operating temperature
–55
150
°C
Junction temperature
–65
150
°C
Storage temperature, Tstg
–65
150
°C
Current-shunt monitor analog inputs,
VIN+ and VIN–
Input current into any pin
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±4000
Charged device model (CDM), per JEDEC specification JESD22-C101 (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
Vcm Common-mode input voltage
–16
12
80
UNIT
V
Vs Operating supply voltage
2.7
12
18
V
TA Operating free-air temperature
–40
25
125
ºC
7.4 Thermal Information
INA20x
THERMAL METRIC
(1)
D (SOIC)
DGS (VSSOP)
PW (TSSOP)
14 PINS
10 PINS
14 PINS
UNIT
84.9
161.3
112.6
°C/W
44
36.8
37.2
°C/W
RθJA
Junction-to-ambient thermal resistance
RθJC(top)
Junction-to-case (top) thermal resistance
RθJB
Junction-to-board thermal resistance
39.4
82.3
55.4
°C/W
ψJT
Junction-to-top characterization parameter
10.3
1.3
2.7
°C/W
ψJB
Junction-to-board characterization parameter
39.1
80.8
54.7
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
150
200
150
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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7.5 Electrical Characteristics: Current-Shunt Monitor
At TA = 25°C, VS = 12 V, VIN+ = 12 V, VSENSE = 100 mV, RL = 10 kΩ to GND, RPULL-UP = 5.1 kΩ each connected from CMP1
OUT and CMP2 OUT to VS, and CMP1 IN+ = 1 V and CMP2 IN– = GND, unless otherwise noted.
PARAMETERS
TEST CONDITIONS
MIN
TYP
MAX
UNIT
0.15
(VS –0.25)/Gain
V
80
V
INPUT
VSENSE
Full-scale sense input
voltage
VSENSE = VIN+ – VIN–
VCM
Common-mode input
range
TA = –40°C to 125°C
–16
Common-mode rejection
ratio
VIN+ = –16 V to 80 V
80
Common-mode rejection
ratio over temperature
VIN+ = 12 V to 80 V, TA = –40°C to 125°C
CMRR
100
TA = 25°C
VOS
(1)
Offset voltage RTI
100
dB
123
±0.5
dB
±2.5
TA = 25°C to 125°C
±3
TA = –40°C to 25°C
±3.5
mV
dVOS/dT
Offset voltage RTI vs
temperature
TA = –40°C to 125°C
PSR
Offset voltage RTI vs
power supply
VOUT = 2 V, VIN+ = 18 V, 2.7 V, TA = –40°C to 125°C
2.5
100
µV/V
IB
Input bias current, VIN–
Pin
TA = –40°C to 125°C
±9
±16
µA
INA206
20
5
µV/°C
OUTPUT (VSENSE ≥ 20 mV)
G
Gain
Gain error
Nonlinearity error
100
±0.2%
VSENSE = 20 mV to 100 mV, TA = –40°C to 125°C
(2)
(3)
V/V
±1%
±2%
VSENSE = 120 mV, VS = 16 V
Total output error over
temperature
RO
50
INA208
VSENSE = 20 mV to 100 mV
Gain error over
temperature
Total output error
INA207
±0.75%
VSENSE = 120 mV, VS = 16 V, TA = –40°C to 125°C
±2.2%
±3.5%
VSENSE = 20 mV to 100 mV
±0.002%
Output impedance
1.5
Ω
Maximum capacitive load No Sustained Oscillation
10
nF
OUTPUT (VSENSE < 20 mV)
(4)
INA206
INA207
300
–16 V ≤ VCM < 0 V
300
INA208
INA206
Output voltage
INA207
0.4
0 V ≤ VCM ≤ VS, VS = 5 V
1
INA208
V
2
INA206
INA207
mV
300
300
VS < VCM ≤ 80 V
300
INA208
mV
300
VOLTAGE OUTPUT
Output swing to the
positive rail
Output swing to GND
(1)
(2)
(3)
(4)
(5)
6
(5)
VIN– = 11 V, VIN+ = 12 V, TA = –40°C to 125°C
(Vs) – 0.15
(Vs) – 0.25
V
VIN– = 0 V, VIN+ = –0.5 V, TA = –40°C to 125°C
(VGND) + 0.004
(VGND) + 0.05
V
Offset is extrapolated from measurements of the output at 20 mV and 100 mV VSENSE.
Total output error includes effects of gain error and VOS.
Linearity is best fit to a straight line.
For details on this region of operation, see the Accuracy Variations as a Result of VSENSE and Common-Mode Voltage section.
Specified by design.
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Electrical Characteristics: Current-Shunt Monitor (continued)
At TA = 25°C, VS = 12 V, VIN+ = 12 V, VSENSE = 100 mV, RL = 10 kΩ to GND, RPULL-UP = 5.1 kΩ each connected from CMP1
OUT and CMP2 OUT to VS, and CMP1 IN+ = 1 V and CMP2 IN– = GND, unless otherwise noted.
PARAMETERS
TEST CONDITIONS
MIN
TYP
MAX
UNIT
FREQUENCY RESPONSE
INA206
Bandwidth
500
INA207
CLOAD = 5 pF
300
INA208
Phase margin
CLOAD < 10 pF
Slew rate
Settling time (1%)
kHz
200
VSENSE = 10 mVPP to 100 mVPP, CLOAD = 5 pF
40
°
1
V/µs
2
µs
40
nV/√Hz
NOISE, RTI
Output voltage noise
density
7.6 Electrical Characteristics: Comparator
At TA = 25°C, VS = 12 V, VIN+ = 12 V, VSENSE = 100 mV, RL = 10 kΩ to GND, RPULL-UP = 5.1 kΩ each connected from CMP1
OUT and CMP2 OUT to VS, unless otherwise noted.
PARAMETERS
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OFFSET VOLTAGE
Offset Voltage
Comparator Common-Mode Voltage = Threshold Voltage,
Figure 1
Offset Voltage Drift, Comparator 1
TA = –40°C to 125°C
Offset Voltage Drift, Comparator 2
TA = –40°C to 125°C
Threshold
TA = 25°C
590
Threshold over Temperature
TA = –40°C to 125°C
586
2
mV
±2
µV/°C
5.4
608
µV/°C
620
mV
625
mV
Hysteresis
(1)
, CMP1
TA = –40°C to 85C
–8
mV
Hysteresis
(1)
, CMP2
TA = –40°C to 85°C
8
mV
INPUT BIAS CURRENT
(2)
CMP1 IN+, CMP2 IN–
CMP1 IN+, CMP2 IN– vs Temperature
0.005
TA = –40°C to 125°C
10
nA
15
nA
INPUT IMPEDANCE
Pins 3 and 6 (14-pin packages only)
10
kΩ
CMP1 IN+ and CMP2 IN–
0 V to VS – 1.5V
V
Pins 3 and 6 (14-pin packages only) (3)
0 V to VS – 1.5V
V
INPUT RANGE
OUTPUT
Large-signal differential voltage gain
CMP VOUT 1 V to 4 V, RL ≥ 15 kΩ connected to 5 V
High-level output current
VID = 0.4 V, VOH = VS
Low-level output voltage
200
V/mV
0.0001
1
µA
VID = –0.6 V, IOL = 2.35 mA
220
300
mV
Comparator 1
RL to 5 V, CL = 15 pF, 100-mV Input Step with 5-mV Overdrive
1.3
µs
Comparator 2
RL to 5 V, CL = 15 pF, 100-mV Input Step with 5-mV Overdrive,
CDELAY Pin Open
1.3
µs
RESPONSE TIME
(3)
RESET
RESET Threshold
(4)
1.1
Logic Input Impedance
Minimum RESET Pulse Width
RESET Propagation Delay
(1)
(2)
(3)
(4)
V
2
mΩ
1.5
µs
3
µs
Hysteresis refers to the threshold (the threshold specification applies to a rising edge of a noninverting input) of a falling edge on the
noninverting input of the comparator. See Figure 1.
Specified by design.
The comparator response time specified is the interval between the input step function and the instant when the output crosses 1.4 V.
RESET input has an internal 2 MΩ (typical) pull-down. Leaving RESET open results in a LOW state, with transparent comparator
operation.
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Electrical Characteristics: Comparator (continued)
At TA = 25°C, VS = 12 V, VIN+ = 12 V, VSENSE = 100 mV, RL = 10 kΩ to GND, RPULL-UP = 5.1 kΩ each connected from CMP1
OUT and CMP2 OUT to VS, unless otherwise noted.
PARAMETERS
Comparator 2 Delay Equation
TEST CONDITIONS
Comparator 2 Delay, tD
(5)
MIN
(5)
TYP
MAX
CDELAY = tD/5
CDELAY = 0.1 μF
UNIT
µF
0.5
s
The Comparator 2 delay applies to both rising and falling edges of the comparator output.
7.7 Electrical Characteristics: Reference
At TA = 25°C, VS = 12 V, VIN+ = 12 V, VSENSE = 100 mV, RL = 10 kΩ to GND, RPULL-UP = 5.1 kΩ each connected from CMP1
OUT and CMP2 OUT to VS, unless otherwise noted.
PARAMETERS
TEST CONDITIONS
MIN
TYP
MAX
1.188
1.2
1.212
40
100
UNIT
REFERENCE VOLTAGE
1.2VREFOUT Output Voltage
dVOUT/dT
Reference Drift
TA = –40°C to 85°C
0.6VREF Output Voltage
(Pins 3 and 6 of 14-pin packages
only)
dVOUT/dT
Reference Drift
dVOUT/dILOA
LOAD REGULATION
0.6
V
ppm/°C
V
TA = –40°C to 85°C
40
100
ppm/°C
Sourcing
0 mA < ISOURCE < 0.5 mA
0.4
2
mV/mA
Sinking
0 mA < ISINK < 0.5 mA
0.4
ILOAD
LOAD CURRENT
TA = –40°C to 125°C
dVOUT/dVS
LINE REGULATION
D
mV/mA
1
mA
2.7 V < VS < 18 V, TA = –40°C to 125°C
30
µV/V
No Sustained Oscillations
10
nF
10
kΩ
CAPACITIVE LOAD
Reference Output Maximum
Capacitive Load
OUTPUT IMPEDANCE
Pins 3 and 6 of 14-Pin Packages
Only
7.8 Electrical Characteristics: General
At TA = 25°C, VS = 12 V, VIN+ = 12 V, VSENSE = 100 mV, RL = 10 kΩ to GND, RPULL-UP = 5.1 kΩ each connected from CMP1
OUT and CMP2 OUT to VS, and CMP1 IN+ = 1 V and CMP2 IN– = GND, unless otherwise noted.
PARAMETERS
TEST CONDITIONS
MIN
TYP
MAX
UNIT
18
V
1.8
2.2
mA
2.8
mA
POWER SUPPLY
VS
IQ
Operating Power Supply
TA = –40°C to 125°C
Quiescent Current
VOUT = 2 V
Quiescent Current over Temperature
VSENSE = 0 mV, TA = –40°C to 125°C
2.7
Comparator Power-On Reset
Threshold (1)
1.5
V
TEMPERATURE
θJA
(1)
8
Specified Temperature Range
–40
125
°C
Operating Temperature Range
–55
150
°C
Storage Temperature Range
–65
150
°C
Thermal Resistance
MSOP-10 Surface-Mount
200
°C/W
SO-14, TSSOP-14 Surface-Mount
150
°C/W
The INA206, INA207, and INA208 are designed to power-up with the comparator in a defined reset state as long as CMP1 RESET is
open or grounded. The comparator will be in reset as long as the power supply is below the voltage shown here. The comparator will
assume a state based on the comparator input above this supply voltage. If CMP1 RESET is high at power-up, the comparator output
comes up high and requires a reset to assume a low state, if appropriate.
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VTHRESHOLD
0.592
VTHRESHOLD
0.6
0.6
0.608
Input Voltage
Input Voltage
Hysteresis = VTHRESHOLD - 8mV
Hysteresis = VTHRESHOLD - 8mV
a) CMP1
b) CMP2
Figure 1. Comparator Hysteresis
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7.9 Typical Characteristics
All specifications at TA = 25°C, VS = 12 V, VIN+ = 12 V, and VSENSE = 100 mV, unless otherwise noted.
45
45
40
G=50
35
Gain (dB)
30
G=20
25
20
30
G=20
25
20
15
15
10
10
5
10k
5
10k
1M
100k
100k
Frequency (Hz)
Figure 2. Gain vs Frequency
Figure 3. Gain vs Frequency
140
18
130
Common-- Mode and
Power--Supply Rejection (dB)
100V/V
16
14
50V/V
12
10
8
20V/V
6
4
120
CMRR
110
100
90
PSR
80
70
60
50
2
40
0
20
100
200
300
400
500
600
700
800
10
900
100
Figure 5. Common-Mode and Power-Supply Rejection vs
Frequency
Figure 4. Gain Plot
4.0
0.1
3.5
0.09
0.08
3.0
Output Error (% )
Output Error
(% error of the ideal output value)
100k
10k
1k
Frequency (Hz)
VSENSE (mV)
2.5
2.0
1.5
1.0
0.07
0.06
0.05
0.04
0.03
0.02
0.5
0.01
0
0
0
50
100 150
200
250 300 350
400 450 500
–16 –12 –8 –4
VSENSE (mV)
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0
4
8
12 16 20
...
76 80
Common--Mode Voltage (V)
Figure 6. Output Error vs VSENSE
10
1M
Frequency (Hz)
20
VOUT (V)
G = 100
40
G = 50
35
Gain (dB)
CLOAD = 1000pF
G = 100
Figure 7. Output Error vs Common-Mode Voltage
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Typical Characteristics (continued)
All specifications at TA = 25°C, VS = 12 V, VIN+ = 12 V, and VSENSE = 100 mV, unless otherwise noted.
3.5
11
10
9
8
7
VS = 12V
Sourcing Current
3.0
2.5
+25°C
–40°C
+125°C
6
5
IQ (mA)
Output Voltage (V)
12
VS = 3V
Sourcing Current
4
–40°C
+25°C
3
2
1
0
1.5
1.0
Output stage is designed
to source current. Current
sinking capabilty is
approximately 400 µA.
+125°C
0
2.0
0.5
0
5
10
15
20
25
30
0
1
3
2
5
4
7
6
8
9
10
Output Current (mA)
Output Voltage (V)
Figure 8. Positive Output Voltage Swing vs Output Current
Figure 9. Quiescent Current vs Output Voltage
2.50
34
2.25
Output Short--Circuit Current (mA)
VSENSE = 100mV
VS = 2.7V
VS = 12V
IQ (mA)
2.00
1.75
VS = 12V
1.50
VS = 2.7V
VSENSE = 0mV
1.25
1.00
–40°C
30
+25°C
26
+125°C
22
18
14
10
6
–16 –12 –8 –4
0
4
8
12 16 20 24 28 32 36
2.5
3.5
4.5
5.5
6.5
7.5
8.5
9.5 10.5 11.5 17
18
VCM (V)
Supply Voltage (V)
Figure 10. Quiescent Current vs Common-Mode Voltage
Figure 11. Output Short-Circuit Current vs Supply Voltage
G = 20
Output Voltage (50mV/div)
Output Voltage (500mV/div)
G = 20
VSENSE = 20mV to 30mV
VSENSE = 20mV to 110mV
Time (2ms/div)
Time (2ms/div)
Figure 12. Step Response
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Figure 13. Step Response
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Typical Characteristics (continued)
All specifications at TA = 25°C, VS = 12 V, VIN+ = 12 V, and VSENSE = 100 mV, unless otherwise noted.
G = 50
Output Voltage (50mV/div)
Output Voltage (100mV/div)
G = 20
VSENSE = 20mV to 30mV
VSENSE = 90mV to 100mV
Time (5ms/div)
Time (2µs/div)
Figure 15. Step Response
Figure 14. Step Response
G = 50
Output Voltage (1V/div)
Output Voltage (100mV/div)
G = 50
VSENSE = 90mV to 100mV
VSENSE = 20mV to 110mV
Time (5ms/div)
Time (5µs/div)
Figure 16. Step Response
Figure 17. Step Response
600
G = 100
Output Voltage (2V/div)
500
VOL (mV)
400
300
200
100
VSENSE = 20mV to 110mV
0
0
Time (10ms/div)
1
2
3
4
5
6
ISINK (mA)
Figure 18. Step Response
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Figure 19. Comparator VOL vs ISINK
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Typical Characteristics (continued)
All specifications at TA = 25°C, VS = 12 V, VIN+ = 12 V, and VSENSE = 100 mV, unless otherwise noted.
602
600
Comparator Trip Point (mV)
Comparator Trip Point (mV)
599
598
597
596
595
594
593
592
601
600
599
598
597
591
596
–50
590
6
4
2
8
10
12
14
16
18
–25
0
25
50
75
100
125
Temperature (°C)
Supply Voltage (V)
Figure 20. Comparator Trip Point vs Supply Voltage
Figure 21. Comparator Trip Point vs Temperature
14
200
Propagation Delay (µs)
Propagation Delay (ns)
175
150
125
100
13
12
11
75
10
50
20
40
60
80
100 120 140
160
0
180 200
20
40
60
80
100 120 140
160
180 200
Overdrive Voltage (mV)
Overdrive Voltage (mV)
Figure 22. Comparator 1 Propagation Delay vs Overdrive
Voltage
Figure 23. Comparator 2 Propagation Delay vs Overdrive
Voltage
1.2
300
1.0
275
Propagation Delay (ns)
Reset Voltage (V)
0
0.8
0.6
0.4
0.2
250
225
200
175
150
0
2
4
6
8
10
12
14
16
18
125
–50
–25
0
25
50
75
100
125
Supply Voltage (V)
Temperature (°C)
Figure 24. Comparator Reset Voltage vs Supply Voltage
Figure 25. Comparator 1 Propagation Delay vs Temperature
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Typical Characteristics (continued)
All specifications at TA = 25°C, VS = 12 V, VIN+ = 12 V, and VSENSE = 100 mV, unless otherwise noted.
Propagation Delay (ms)
1000
100
Input
200mV/div
10
1
Output
2V/div
0.1
0.01
0.001
VOD = 5mV
0.01
0.1
10
1
100
2µs/div
Delay Capacitance (nF)
Figure 27. Comparator 1 Propagation Delay
Figure 26. Comparator 2 Propagation Delay vs Capacitance
1.22
Input
200mV/div
VREF (V)
1.21
Output
2V/div
1.20
1.19
VOD = 5mV
1.18
–50
5µs/div
–25
0
25
50
75
100
125
Temperature (°C)
Figure 28. Comparator 2 Propagation Delay
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Figure 29. Reference Voltage vs Temperature
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8 Detailed Description
8.1 Overview
The INA206, INA207, and INA208 are a family of unidirectional current-shunt monitors with voltage output, dual
comparators, and voltage reference. The INA206, INA207, and INA208 can sense drops across shunts at
common-mode voltages from –16 V to 80 V. The INA206, INA207, and INA208 are available with three output
voltage scales: 20 V/V, 50 V/V, and 100 V/V, with up to 500-kHz bandwidth. The INA206, INA207, and INA208
also incorporate two open-drain comparators with internal 0.6-V references. On 14-pin versions, the comparator
references can be overridden by external inputs. Comparator 1 includes a latching capability, and Comparator 2
has a user-programmable delay. 14-pin versions also provide a 1.2-V reference output. The INA206, INA207,
and INA208 operate from a single 2.7-V to 18-V supply. They are specified over the extended operating
temperature range of –40°C to 125°C
8.2 Functional Block Diagram
INA206- INA208
VS
1
OUT
2
1.2V REF
14
VIN+
13
VIN-
12
1.2V REF OUT
CMP1 IN- /0.6V REF
3
CMP1 IN+
4
11
CMP1 OUT
CMP2 IN-
5
10
CMP2 OUT
CMP2 IN+/0.6V REF
6
9
CMP2 DELAY
GND
7
8
CMP1 RESET
SO-14, TSSOP-14
8.3 Feature Description
8.3.1 Output Voltage Range
The output of the INA206, INA207, and INA208 is accurate within the output voltage swing range set by the
power supply pin, Vs. This performance is best illustrated when using the INA208 (a gain of 100 version), where
a 100-mV full-scale input from the shunt resistor requires an output voltage swing of 10 V, and a power-supply
voltage sufficient to achieve 10 V on the output.
8.3.2 Reference
The INA206, INA207, and INA208 include an internal voltage reference that has a load regulation of 0.4 mV/mA
(typical), and not more than 100 ppm/°C of drift. Only the 14-pin package allows external access to reference
voltages, where voltages of 1.2 V and 0.6 V are both available. Output current versus output voltage is illustrated
in Typical Characteristics.
8.3.3 Comparator
The INA206, INA207, and INA208 devices incorporate two open-drain comparators. These comparators typically
have 2 mV of offset and a 1.3-µs (typical) response time. The output of Comparator 1 latches and is reset
through the CMP1 RESET pin, as shown in Figure 31. This configuration applies to both the 10- and 14-pin
versions. Figure 30 illustrates the comparator delay.
The 14-pin versions of the INA206, INA207, and INA208 include additional features for comparator functions.
The comparator reference voltage of both Comparator 1 and Comparator 2 can be overridden by external inputs
for increased design flexibility. Comparator 2 has a programmable delay.
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Feature Description (continued)
1.2V
I2
120nA
U1
U2
I1
120nA
0.6V
CDELAY
Figure 30. Simplified Model of the Comparator 2 Delay Circuit
0.6V
VIN
0V
CMP Out
RESET
Figure 31. Comparator 1 Latching Capability
8.3.4 Comparator Delay (14-Pin Version Only)
The Comparator 2 programmable delay is controlled by a capacitor connected to the CMP2 Delay Pin; see
Figure 40. The capacitor value (in µF) is selected by using Equation 1.
t
CDELAY (in mF) = D
5
(1)
A simplified version of the delay circuit for Comparator 2 is shown in Figure 30. The delay comparator consists of
two comparator stages with the delay between them. Note that I1 and I2 cannot be turned on simultaneously; I1
corresponds to a U1 low output and I2 corresponds to a U1 high output. Using an initial assumption that the U1
output is low, I1 is on, then U2 +IN is zero. If U1 goes high, I2 supplies 120 nA to CDELAY. The voltage at U2 +IN
begins to ramp toward a 0.6-V threshold. When the voltage crosses this threshold, the U2 output goes high while
the voltage at U2 +IN continues to ramp up to a maximum of 1.2 V when given sufficient time (twice the value of
the delay specified for CDELAY). This entire sequence is reversed when the comparator outputs go low, so that
returning to low exhibits the same delay.
RSHUNT
3mW
12V Supply
12V Load
3.3V Supply
VS
INA206
x20
OUT
CMP1 IN–/0.6 REF
CMP1 IN+
2.5V Reference
1.2V REF
VIN+
VIN–
1.2V REF OUT
CMP1 OUT
CMP2 IN–
CMP2 IN+/0.6 REF
CMP2 OUT
CMP2 DELAY
GND
CMP1RESET
Shutdown
Warning
CDELAY
0.1µF
(0.5s)
Figure 32. Server 12-V Supply Current Monitor
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Feature Description (continued)
It is important to note what will happen if events occur more rapidly than the delay timeout; for example, when
the U1 output goes high (turning on I2), but returns low (turning I1 back on) prior to reaching the 0.6-V transition
for U2. The voltage at U2 +IN ramps back down at a rate determined by the value of CDELAY, and only returns to
zero if given sufficient time.
In essence, when analyzing Comparator 2 for behavior with events more rapid than its delay setting, use the
model shown in Figure 30.
8.3.5 Comparator Maximum Input Voltage Range
The maximum voltage at the comparator input for normal operation is up to (Vs) – 1.5 V. There are special
considerations when overdriving the reference inputs (pins 3 and 6). Driving either or both inputs high enough to
drive 1 mA back into the reference introduces errors into the reference. Figure 33 shows the basic input
structure. A general guideline is to limit the voltage on both inputs to a total of 20 V. The exact limit depends on
the available voltage and whether either or both inputs are subject to the large voltage. When making this
determination, consider the 20 kΩ from each input back to the comparator. Figure 34 shows the maximum input
voltage that avoids creating a reference error when driving both inputs (an equivalent resistance back into the
reference of 10 kΩ.
i £ 1mA
1.2V
20kW
20kW
CMP1 IN–
CMP2 IN+
Figure 33. Limit Current Into Reference ≤ 1 mA
RSHUNT
Load Supply
–18V to +80V
Load
5V Supply
VS
Current Shunt
Monitor Output
V < 11.2V
INA206
x20
OUT
CMP1 IN–/0.6 REF
CBYPASS
0.01µF
CMP1 IN+
1.2V REF
VIN+
VIN–
RPULL-UP
4.7kW
RPULL-UP
4.7kW
1.2V REF OUT
CMP1 OUT
CMP2 IN–
CMP2 IN+/0.6 REF
CMP2 OUT
CMP2 DELAY
GND
CMP1RESET
Optional Delay
Capacitor
0.2µF
Transparent/Reset
Latch
Figure 34. Overdriving Comparator Inputs Without Generating a Reference Error
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Feature Description (continued)
RSHUNT
3mW
Supply
Load
5V Supply
Q1A, Q1B
MMDT2907A
VS
INA206
x20
OUT
R1
1kW
1.2V REF
CMP1 IN–/0.6 REF
CMP1 IN+
RRAMP
4.99kW
VIN+
VIN–
1.2V REF OUT
CMP1 OUT
CMP2 IN–
CMP2 IN+/0.6 REF
CMP2 OUT
CMP2 DELAY
GND
CMP1RESET
R2
4.02kW
RPULL-UP
1kW
PWMOUT
D1
1N5711
CRAMP
0.27µF
D1
1N5711
Figure 35. PWM Output Current-Shunt Monitor
RSHUNT
Load
Load Supply
Supply
VIN+
5kW
VIN–
+5V
Supply
VS+
5kW
RPULL-UP
1kW
A1
VS
INA206
x20
OUT
CMP1 IN–/0.6 REF
A2
1.2V REF
CMP1 IN+
OUT
RL
INA193
VIN+
VIN–
1.2V REF OUT
CMP1 OUT
CMP2 IN–
CMP2 IN+/0.6 REF
CMP2 OUT
CMP2 DELAY
GND
CMP1RESET
GND
Figure 36. Bi-Directional Current Comparator
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Feature Description (continued)
RSHUNT
Load
Supply
+5V Supply
VS
INA206
x20
OUT
R1
R3
1.2V REF
CMP1 IN–/0.6 REF
CMP1 IN+
R2
R4
VIN+
VIN–
1.2V REF OUT
CMP1 OUT
Power Good
CMP2 IN–
CMP2 IN+/0.6 REF
CMP2 OUT
CMP2 DELAY
GND
CMP1RESET
VUPPER =
RPULL-UP
1kW
0.6(R1 + R2)
R2
VLOWER =
Analog Current Signal
0.6(R3 + R4)
R4
Figure 37. Analog Output Current-Shunt Monitor With Comparators Used as Power-Supply Under-Limit
or Over-Limit or Power-Good Detector
8.4 Device Functional Modes
8.4.1 Accuracy Variations as a Result of VSENSE and Common-Mode Voltage
The accuracy of the INA206, INA207, and INA208 current-shunt monitors is a function of two main variables:
VSENSE (VIN+ – VIN–) and common-mode voltage, VCM, relative to the supply voltage, VS. VCM is expressed as
(VIN+ + VIN–)/2; however, in practice, VCM is seen as the voltage at VIN+ because the voltage drop across VSENSE
is usually small.
This section addresses the accuracy of these specific operating regions:
• Normal Case 1: VSENSE ≥ 20 mV, VCM ≥ VS
• Normal Case 2: VSENSE ≥ 20 mV, VCM < VS
• Low VSENSE Case 1: VSENSE < 20 mV, –16 V ≤ VCM < 0
• Low VSENSE Case 2: VSENSE < 20 mV, 0 V ≤ VCM ≤ VS
• Low VSENSE Case 3: VSENSE < 20 mV, VS < VCM ≤ 80 V
8.4.1.1 Normal Case 1: VSENSE ≥ 20 mV, VCM ≥ VS
This region of operation provides the highest accuracy. Here, the input offset voltage is characterized and
measured using a two-step method. First, the gain is determined by Equation 2.
- VOUT2
V
G = OUT1
100 mV - 20 mV
where
•
•
VOUT1 = Output Voltage with VSENSE = 100 mV
VOUT2 = Output Voltage with VSENSE = 20 mV
(2)
Then the offset voltage is measured at VSENSE = 100 mV and referred to the input (RTI) of the current-shunt
monitor, as shown in Equation 3
æV
ö
VOSRTI (Re ferred - To - Input) = ç OUT1 ÷ - 100 mV
è G ø
(3)
In the Typical Characteristics, the Output Error vs Common-Mode Voltage curve shows the highest accuracy for
this region of operation. In this plot, VS = 12 V; for VCM ≥ 12 V, the output error is at its minimum. This case is
also used to create the VSENSE ≥ 20-mV output specifications in Electrical Characteristics: Current-Shunt Monitor
through Electrical Characteristics: General.
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Device Functional Modes (continued)
8.4.1.2 Normal Case 2: VSENSE ≥ 20 mV, VCM < VS
This region of operation has slightly less accuracy than Normal Case 1 as a result of the common-mode
operating area in which the part functions, as seen in the Output Error vs Common-mode Voltage curve. As
noted, for this graph VS = 12 V; for VCM < 12 V, the Output Error increases as VCM becomes less than 12 V, with
a typical maximum error of 0.005% at the most negative VCM = –16 V.
Low VSENSE Case 1:
VSENSE < 20 mV, –16 V ≤ VCM < 0; and
Low VSENSE Case 3:
VSENSE < 20 mV, VS < VCM ≤ 80 V
Although the INA206 family of devices are not designed for accurate operation in either of these regions, some
applications are exposed to these conditions; for example, when monitoring power supplies that are switched on
and off while VS is still applied to the INA206, INA207, or INA208. It is important to know what the behavior of the
devices will be in these regions.
As VSENSE approaches 0 mV, in these VCM regions, the device output accuracy degrades. A larger-than-normal
offset can appear at the currenrt-shunt monitor output with a typical maximum value of VOUT = 300 mV for VSENSE
= 0 mV. As VSENSE approaches 20 mV, VOUT Returns to the expected output value with accuracy as specified in
Electrical Characteristics: Current-Shunt Monitor through Electrical Characteristics: General. Figure 38 illustrates
this effect using the INA208 (Gain = 100).
2.0
1.8
1.6
VOUT (V)
1.4
1.2
Actual
1.0
0.8
Ideal
0.6
0.4
0.2
0
0
2
4
6
8
10
12
14
16
18
20
VSENSE (mV)
Figure 38. Example for Low VSENSE Cases 1 and 3 (INA208, Gain = 100)
8.4.1.3 Low VSENSE Case 2: VSENSE < 20mV, 0V ≤ VCM ≤ VS
This region of operation is the least accurate for the INA206 family. To achieve the wide input common-mode
voltage range, these devices use two op amp front ends in parallel. One op amp front end operates in the
positive input common-mode voltage range, and the other in the negative input region. For this case, neither of
these two internal amplifiers dominates and overall loop gain is very low. Within this region, VOUT approaches
voltages close to linear operation levels for Normal Case 2. This deviation from linear operation becomes
greatest the closer VSENSE approaches 0 V. Within this region, as VSENSE approaches 20 mV, device operation is
closer o that described by Normal Case 2. Figure 39 illustrates this behavior for the INA208. The VOUT maximum
peak for this case is tested by maintaining a constant VS, setting VSENSE = 0 mV and sweeping VCM from 0 V to
VS. The exact VCM at which VOUT peaks during this test varies from part to part, but the VOUT maximum peak is
tested to be less than the specified VOUT Tested Limit.
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VOUT (V)
Device Functional Modes (continued)
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
(1)
INA208 VOUT Tested Limit
VCM1
Ideal
VCM2
VCM3
VOUT Tested Limit at
VSENSE = 0mV, 0 £ VCM1 £ VS.
VCM4
VCM2, VCM3, and VCM4 illustrate the variance
from part to part of the VCM that can cause
maximum VOUT with VSENSE < 20mV.
0
2
4
6
8
10 12 14 16
18 20
22 24
VSENSE (mV)
NOTE: (1) INA206 VOUT Tested Limit = 0.4V. INA207 VOUT Tested Limit = 1V.
Figure 39. Example for Low VSENSE Case 2 (INA208, Gain = 100)
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
9.1.1 Basic Connection
Figure 40 shows the basic connection of the INA206, INA207, and INA208. The input pins, VIN+ and VIN–,
should be connected as closely as possible to the shunt resistor to minimize any resistance in series with the
shunt resistance.
Power-supply bypass capacitors are required for stability. Applications with noisy or high impedance power
supplies may require additional decoupling capacitors to reject power-supply noise. Connect bypass capacitors
close to the device pins.
RSHUNT
3mW
Load Supply
–18V to +80V
Load
5V Supply
VS
Current Shunt
Monitor Output
INA206
x20
OUT
CMP1 IN–/0.6 REF
1.2V REF
CMP1 IN+
CBYPASS
0.01µF
VIN+
VIN–
RPULL-UP
4.7kW
RPULL-UP
4.7kW
1.2V REF OUT
CMP1 OUT
CMP2 IN–
CMP2 IN+/0.6 REF
CMP2 OUT
CMP2 DELAY
GND
CMP1RESET
Optional Delay
Capacitor
0.2µF
Transparent/Reset
Latch
Figure 40. INA20x Basic Connection
9.2 Typical Application
RSHUNT
Load
Supply
+5-V Supply
VS
INA206
x20
OUT
R1
R2
R3
R4
CMP1 IN–/0.6 REF
CMP1 IN+
1.2V REF
VIN+
VIN–
1.2V REF OUT
RPULLUP
1kW
CMP1 OUT
CMP2 IN–
CMP2 IN+/0.6 REF
CMP2 OUT
CMP2 DELAY
GND
CMP1RESET
VUPPER =
VLOWER =
0.6(R1 + R2)
R2
0.6(R3 + R4)
R4
Figure 41. Using the INA206, INA207, and INA208 as Window Comparators
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Typical Application (continued)
9.2.1 Design Requirements
The device measures current through a resistive shunt with current flowing in one direction. The outputs of the
two comparators are in logic AND connection thus enabling the window comparison. When the INA output
voltage is within the upper and lower limits, the composite comparator output is high. When the INA output
voltage is above the upper limit or below the lower limit, the composite comparator output remains low.
9.2.2 Detailed Design Procedure
9.2.2.1 Selecting RS
The value chosen for the shunt resistor, RS, depends on the application and is a compromise between smallsignal accuracy and maximum permissible voltage loss in the measurement line. High values of RS provide better
accuracy at lower currents by minimizing the effects of offset, while low values of RS minimize voltage loss in the
supply line. For most applications, best performance is attained with an RS value that provides a full-scale shunt
voltage range of 50 mV to 100 mV. Maximum input voltage for accurate measurements is (VS – 0.2) / Gain.
9.2.2.2 Transient Protection
The –16-V to 80-V common-mode range of the INA206, INA207, and INA208 is ideal for withstanding automotive
fault conditions ranging from 12-V battery reversal up to 80-V transients, since no additional protective
components are needed up to those levels. In the event that the INA206, INA207, and INA208 are exposed to
transients on the inputs in excess of their ratings, then external transient absorption with semiconductor transient
absorbers (Zeners or Transzorbs) will be necessary. Use of MOVs or VDRs is not recommended except when
they are used in addition to a semiconductor transient absorber. Select the transient absorber such that it will
never allow the INA206, INA207, and INA208 to be exposed to transients greater than 80 V (that is, allow for
transient absorber tolerance, as well as additional voltage due to transient absorber dynamic impedance).
Despite the use of internal Zener-type ESD protection, the INA206, INA207, and INA208 do not lend themselves
to using external resistors in series with the inputs since the internal gain resistors can vary up to ±30% but are
closely matched. (If gain accuracy is not important, then resistors can be added in series with the INA206,
INA207, and INA208 inputs with two equal resistors on each input.)
9.2.2.3 Input Filtering
An obvious and straightforward location for filtering is at the output of the INA206, INA207, and INA208 series;
however, this location negates the advantage of the low output impedance of the internal buffer. The only other
option for filtering is at the input pins of the INA206, INA207, and INA208, which is complicated by the internal 5
kΩ + 30% input impedance; this is shown in Figure 42. Using the lowest possible resistor values minimizes both
the initial shift in gain and effects of tolerance. The effect on initial gain is given by Equation 4.
æ
ö
5 kW
Gain Error% = 100 - ç 100 ´
÷
5 kW + RFILT ø
è
(4)
Total effect on gain error can be calculated by replacing the 5-kΩ term with 5 kΩ – 30%, (or 3.5 kΩ) or 5 kΩ +
30%, (or 6.5 kΩ). The tolerance extremes of RFILT can also be inserted into the equation. If a pair of 100 Ω 1%
resistors are used on the inputs, the initial gain error will be 1.96%. Worst-case tolerance conditions will always
occur at the lower excursion of the internal 5-kΩ resistor (3.5 kΩ), and the higher excursion of RFILT– 2.8% in this
case.
Copyright © 2006–2015, Texas Instruments Incorporated
Product Folder Links: INA206 INA207 INA208
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23
INA206, INA207, INA208
SBOS360F – JUNE 2006 – REVISED NOVEMBER 2015
www.ti.com
Typical Application (continued)
RSHUNT << RFILTER
3mW
VSUPPLY
Load
RFILTER < 100W
RFILTER < 100W
CFILTER
INA206–INA208
VIN+
VS
1
14
OUT
2
13
CMP1 IN–/0.6V REF
3
CMP1 IN+
4
11 CMP1 OUT
CMP2 IN–
5
10 CMP2 OUT
CMP2 IN+/0.6V REF
6
9
CMP2 DELAY
GND
7
8
CMP1RESET
1.2V REF
VIN–
12 1.2V REF OUT
f–3dB
f–3dB =
1
2p(2RFILTER)CFILTER
SO--14, TSSOP--14
Figure 42. Input Filter (Gain Error 1.5% to 2.8%)
Note that the specified accuracy of the INA26, INA207, and INA208 must then be combined in addition to these
tolerances. While this discussion treated accuracy worst-case conditions by combining the extremes of the
resistor values, it is appropriate to use geometric mean or root sum square calculations to total the effects of
accuracy variations.
24
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Copyright © 2006–2015, Texas Instruments Incorporated
Product Folder Links: INA206 INA207 INA208
INA206, INA207, INA208
www.ti.com
SBOS360F – JUNE 2006 – REVISED NOVEMBER 2015
Typical Application (continued)
9.2.3 Application Curve
5.5
VOUT(V)
CMP_OUT(V)
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
-0.5
0
25
50
75
100
125
150
175
200
225 250 275
Time(mS)
300
325
350
375
400
425
450
475
500
Figure 43. Window Comparator Circuit Response
10 Power Supply Recommendations
The input circuitry of the INA206, INA207, and INA208 can accurately measure beyond the power-supply
voltage, Vs. For example, the Vs power supply can be 5 V, whereas the load power-supply voltage is up to 80 V.
The output voltage range of the OUT terminal, however, is limited by the voltages on the power-supply pin.
Copyright © 2006–2015, Texas Instruments Incorporated
Product Folder Links: INA206 INA207 INA208
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25
INA206, INA207, INA208
SBOS360F – JUNE 2006 – REVISED NOVEMBER 2015
www.ti.com
11 Layout
11.1 Layout Guidelines
•
•
Connect the input pins to the sensing resistor using a Kelvin or 4-wire connection. This connection technique
ensures that only the current-sensing resistor impedance is detected between the input pins. Poor routing of
the current-sensing resistor commonly results in additional resistance present between the input pins. Given
the very low ohmic value of the current resistor, any additional high-current carrying impedance can cause
significant measurement errors.
The power-supply bypass capacitor must be placed as close as possible to the supply and ground pins. The
recommended value of this bypass capacitor is 0.1 μF. Additional decoupling capacitance can be added to
compensate for noisy or high-impedance power supplies.
11.2 Layout Example
Via to Power or Ground Plane
Via to Internal Layer
Supply Voltage
Vs
VIN+
OUT
VIN-
Shunt Resistor
Supply Bypass
Capacitor
CMP1 IN/0.6V Ref
1.2V REF
OUT
CMP1
IN+
CMP1 OUT
CMP2
IN-
CMP2 OUT
CMP2 IN+/
0.6V Ref
CMP2
DELAY
GND
CMP1
RESET
Pull-ups
Figure 44. Layout Recommendation
26
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Copyright © 2006–2015, Texas Instruments Incorporated
Product Folder Links: INA206 INA207 INA208
INA206, INA207, INA208
www.ti.com
SBOS360F – JUNE 2006 – REVISED NOVEMBER 2015
12 Device and Documentation Support
12.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 1. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
INA206
Click here
Click here
Click here
Click here
Click here
INA207
Click here
Click here
Click here
Click here
Click here
INA208
Click here
Click here
Click here
Click here
Click here
12.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2006–2015, Texas Instruments Incorporated
Product Folder Links: INA206 INA207 INA208
Submit Documentation Feedback
27
PACKAGE OPTION ADDENDUM
www.ti.com
26-Aug-2017
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
INA206AID
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA206A
INA206AIDGSR
ACTIVE
VSSOP
DGS
10
2500
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
BQQ
INA206AIDGST
ACTIVE
VSSOP
DGS
10
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
BQQ
INA206AIDR
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA206A
INA206AIPW
ACTIVE
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA206A
INA206AIPWR
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA206A
INA207AID
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA207A
INA207AIDGSR
ACTIVE
VSSOP
DGS
10
2500
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
BQR
INA207AIDGST
ACTIVE
VSSOP
DGS
10
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
BQR
INA207AIPW
ACTIVE
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA207A
INA207AIPWR
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA207A
INA208AID
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA208A
INA208AIDGSR
ACTIVE
VSSOP
DGS
10
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU |
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
BQS
INA208AIDGST
ACTIVE
VSSOP
DGS
10
250
Green (RoHS
& no Sb/Br)
CU NIPDAU |
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
BQS
INA208AIDR
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA208A
INA208AIPW
ACTIVE
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA208A
INA208AIPWR
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
INA208A
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
26-Aug-2017
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
1-May-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
INA206AIDGSR
VSSOP
DGS
10
INA206AIDGST
VSSOP
DGS
INA206AIDR
SOIC
D
INA206AIPWR
TSSOP
INA207AIDGSR
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
10
250
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
PW
14
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
VSSOP
DGS
10
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
INA207AIDGST
VSSOP
DGS
10
250
180.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
INA207AIPWR
TSSOP
PW
14
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
INA208AIDGSR
VSSOP
DGS
10
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
INA208AIDGST
VSSOP
DGS
10
250
180.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
INA208AIDR
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
INA208AIPWR
TSSOP
PW
14
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
1-May-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
INA206AIDGSR
VSSOP
DGS
10
2500
366.0
364.0
50.0
INA206AIDGST
VSSOP
DGS
10
250
366.0
364.0
50.0
INA206AIDR
SOIC
D
14
2500
367.0
367.0
38.0
INA206AIPWR
TSSOP
PW
14
2000
367.0
367.0
35.0
INA207AIDGSR
VSSOP
DGS
10
2500
367.0
367.0
35.0
INA207AIDGST
VSSOP
DGS
10
250
210.0
185.0
35.0
INA207AIPWR
TSSOP
PW
14
2000
367.0
367.0
35.0
INA208AIDGSR
VSSOP
DGS
10
2500
367.0
367.0
35.0
INA208AIDGST
VSSOP
DGS
10
250
210.0
185.0
35.0
INA208AIDR
SOIC
D
14
2500
367.0
367.0
38.0
INA208AIPWR
TSSOP
PW
14
2000
367.0
367.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
DGS0010A
VSSOP - 1.1 mm max height
SCALE 3.200
SMALL OUTLINE PACKAGE
C
5.05
TYP
4.75
SEATING PLANE
PIN 1 ID
AREA
A
0.1 C
10
1
3.1
2.9
NOTE 3
8X 0.5
2X
2
5
6
B
10X
3.1
2.9
NOTE 4
SEE DETAIL A
0.27
0.17
0.1
C A
1.1 MAX
B
0.23
TYP
0.13
0.25
GAGE PLANE
0 -8
0.15
0.05
0.7
0.4
DETAIL A
TYPICAL
4221984/A 05/2015
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-187, variation BA.
www.ti.com
EXAMPLE BOARD LAYOUT
DGS0010A
VSSOP - 1.1 mm max height
SMALL OUTLINE PACKAGE
10X (0.3)
10X (1.45)
(R0.05)
TYP
SYMM
1
10
SYMM
8X (0.5)
6
5
(4.4)
LAND PATTERN EXAMPLE
SCALE:10X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4221984/A 05/2015
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DGS0010A
VSSOP - 1.1 mm max height
SMALL OUTLINE PACKAGE
10X (1.45)
10X (0.3)
SYMM
1
(R0.05) TYP
10
SYMM
8X (0.5)
6
5
(4.4)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:10X
4221984/A 05/2015
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
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These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
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