Texas Instruments | LM9044 Lambda Sensor Interface Amplifier (Rev. D) | Datasheet | Texas Instruments LM9044 Lambda Sensor Interface Amplifier (Rev. D) Datasheet

Texas Instruments LM9044 Lambda Sensor Interface Amplifier (Rev. D) Datasheet
LM9044
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SNOSBP4D – FEBRUARY 1995 – REVISED MARCH 2013
LM9044 Lambda Sensor Interface Amplifier
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FEATURES
DESCRIPTION
•
The LM9044 is a precision differential amplifier
specifically designed for operation in the automotive
environment. Gain accuracy is specified over the
entire automotive temperature range (−40°C to
+125°C) and is factory trimmed after package
assembly. The input circuitry has been specifically
designed to reject common-mode signals as much as
3V below ground without the need for a negative
voltage supply. This facilitates the use of sensors
which are grounded at the engine block while the
LM9044 itself is grounded at chassis potential. An
external capacitor on the RF pin sets the maximum
operating frequency of the amplifier, thereby filtering
high frequency transients. Both inputs are protected
against accidental shorting to the battery and against
load dump transients. The input impedance is
typically 1.2 MΩ.
1
2
•
•
•
•
•
Normal Circuit Operation Specified with Inputs
up to 3V Below Ground on a Single Supply.
Gain Factory Trimmed and Specified over
Temperature (±3% of Full-scale from −40°C to
+125°C)
Low Power Consumption (Typically 1 mA)
Fully Protected Inputs
Input Open Circuit Detection
Operation Specified over the Entire
Automotive Temperature Range (−40°C to
+125°C)
The output op amp is capable of driving capacitive
loads and is fully protected. Also, internal circuitry has
been provided to detect open circuit conditions on
either or both inputs and force the output to a “home”
position (a ratio of the external reference voltage).
Typical Application
+9.0V to
+16.0V
+4.75V to
+5.50V
10 k:
0.01 PF
VCC
800 mV 450 mV 100 mV -
LEAN
100:
VREF
+VIN
AV = 1
7
VS
20
17
RICH
RDIFF
0.01 PF
AV = 4.5
175 k:
VOUT
200:
12
5
100:
0.01 PF
-VIN
0.01 PF
15
LM9044V
2
GND
RF
0.01 PF
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1995–2013, Texas Instruments Incorporated
LM9044
SNOSBP4D – FEBRUARY 1995 – REVISED MARCH 2013
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Connection Diagram
*Pins 1, 3, 4, 6, 8, 9, 10, 11, 13, 14, 16, 18, 19 are trim pins and should be left floating.
Figure 1. Top View
PLCC Package
See Package Number FN0020A
2
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS (1) (2)
VCC Supply Voltage (RVCC = 15 kΩ)
±60V
VREF Supply Voltage
−0.3V to +6V
DC Input Voltage (Either input) (3)
−3V to +16V
Input Transients
(4)
Power Dissipation see
±60V
(5)
1350 mW
Output Short Circuit Duration
Indefinite
Operating Temperature Range
−40°C to +125°C
Storage Temperature Range
−65°C to +150°C
Soldering Information
PLCC Package
Vapor Phase (60 seconds)
215°C
Infrared (15 seconds)
220°C
See http://www.ti.com for other methods of soldering surface mount devices.
(1)
(2)
(3)
(4)
(5)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
With a 100Ω series resistor on each input pin.
This test is performed with a 1000Ω source impedance.
For operation in ambient temperatures above 25°C the device must be derated based on a maximum junction temperature of 150°C and
a thermal resistance of 93°C/W junction to ambient.
ELECTRICAL CHARACTERISTICS
VCC = 12V, VREF = 5V, −40°C ≤ TA ≤ 125°C unless otherwise noted
(1)
Parameter
Conditions
VDIFF = 0.5, −1V ≤ VCM ≤ +1V
Differential Voltage Gain
Gain Error
VDIFF = 0.5, −3V ≤ VCM ≤ +1V
0 ≤ VDIFF ≤ 1V, −1V ≤ VCM ≤ +1V
(3)
0 ≤ VDIFF ≤ 1V, −3 ≤ VCM ≤ +1V
0 ≤ VDIFF ≤ 1V, −1V ≤ VCM ≤ +1V
Differential Input Resistance
Non-Inverting Input Bias Current
Inverting Input Bias Current
VCC Supply Current
Common-Mode Voltage Range
Typ
Max
Min
Typ
Max
4.41
4.50
4.59
-
-
-
Units
V/V
-
-
-
4.36
4.50
4.64
V/V
−2
0
2
-
-
-
%/FS
-
-
-
−3
0
3
%/FS
0.95
1.20
3.00
-
-
-
MΩ
-
-
-
0.70
1.20
4.00
MΩ
0 ≤ VDIFF ≤ 1V, −1 ≤ VCM ≤ +1V
-
±0.38
±0.65
-
-
-
µA
0 ≤ VDIFF ≤ 1V, −3 ≤ VCM ≤ +1V
-
-
-
-
±0.38
±1.5
µA
0 ≤ VDIFF ≤ 1V, −1 ≤ VCM ≤ +1V
−25
−65
−100
-
-
-
µA
0 ≤ VDIFF ≤ 1V, −3 ≤ VCM ≤ +1V
-
-
-
-
−45
−150
µA
VCC = 12V, RVCC = 15k
-
300
500
-
-
-
µA
-
0.5
1.0
-
-
-
mA
−1
-
1
−3
-
1
V
50
60
-
-
-
-
dB
−1V ≤ VCM ≤ +1V
0.371
0.397
0.423
-
-
-
xVREF
−3V ≤ VCM ≤ +1V
-
-
-
0.365
0.397
0.439
xVREF
Output Grounded
1.0
2.7
5.0
-
-
-
mA
(4)
DC Common-Mode Rejection Ratio
Min
0 ≤ VDIFF ≤ 1V, −3 ≤ VCM ≤ +1V
4.75V ≤ VREF ≤ 5.5V
VREF Supply Current
(2)
Input Referred
−1V ≤ VCM ≤ +1V, VDIFF = 0.5V
One or Both Inputs Open
Open Circuit Output Voltage
Short Circuit Output Current
(1)
(2)
(3)
(4)
These parameters are specified and 100% production tested.
These parameters will be specified but not 100% production tested.
Gain error is given as a percent of full-scale. Full-scale is defined as 1V at the input and 4.5V at the output.
The LM9044 has been designed to common-mode to −3V, but production testing is only performed at ±1V.
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ELECTRICAL CHARACTERISTICS (continued)
VCC = 12V, VREF = 5V, −40°C ≤ TA ≤ 125°C unless otherwise noted
(1)
Parameter
Conditions
(2)
Min
Typ
Max
Min
Typ
Max
Units
VCC Power Supply Rejection Ratio
VCC = 12V, RVCC = 15k
VDIFF = 0.5V
50
65
-
-
-
-
dB
VREF Power Supply Rejection Ratio
VREF = 5 VDC
VDIFF = 0.5V
60
74
-
-
-
-
dB
4
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SNOSBP4D – FEBRUARY 1995 – REVISED MARCH 2013
TYPICAL PERFORMANCE CHARACTERISTICS
Non-Inverting Input Bias Current
vs
Temperature
Inverting Input Bias Current
vs
Temperature
Figure 2.
Figure 3.
VREF Supply Current vs
Temperature
VCC Supply Current vs
Temperature
Figure 4.
Figure 5.
Short Circuit Output Current
vs
Temperature
Differential Gain vs
Temperature
Figure 6.
Figure 7.
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LM9044
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
6
Voltage Gain
vs
Frequency
CMRR
vs
Frequency
Figure 8.
Figure 9.
VREF Power Supply
Rejection
VCC Power Supply Rejection
Figure 10.
Figure 11.
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TEST CIRCUIT
Block Diagram
65 PA
VCC
VREF
17
20
380 nA
7.5V
+VIN
7
12
AV=1
5
200:
175 k:
RDIFF
1.2 M:
-VIN
26.5 k:
AV=4.5
VOUT
14 k:
220 k:
1.5V
4 k:
Open -VIN
Detector
15
LM9044V
RF
2
GND
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LM9044
SNOSBP4D – FEBRUARY 1995 – REVISED MARCH 2013
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APPLICATION INFORMATION
CIRCUIT DESCRIPTION
The LM9044 is a single channel device intended to act as a linear interface between a zirconium dioxide oxygen
sensor and an A-to-D convertor. The LM9044 is fabricated in Bipolar technology and requires two supplies: a
nominal 12V automotive supply (i.e. VBATTERY), and a well regulated 5V supply.
The IC consists of a single channel differential input amplifier with a nominal DC gain of 4.5 V/V. The differential
inputs have a specified common mode voltage operating range of 1V above and below ground. The circuitry also
contains provisions for default output voltage in the cases of cold sensor and open sensor wiring. Additional
support circuitry includes one pin for an optional user programmed low pass filter.
COLD SENSOR
Typically, a Lambda sensor will have an impedance of less than 10 kΩ when operating at temperatures between
300°C, and 500°C. When a Lambda sensor is not at operating temperature, its impedance can be more than 10
MegΩ. Any voltage signal that may be developed is seriously attenuated. During this high impedance condition
the LM9044 will provide a default output voltage.
While the Lambda sensor is high impedance the internal non-inverting input bias current (380 nA typical) will flow
through the differential input resistance (1.2 MΩ typical) and out the inverting input pin to ground. This will cause
a voltage to be developed across the differential inputs:
VIN(DIFF) = 380 nA x 1.2 MΩ
VIN(DIFF) = 456 mV
The 456 mV across differential input resistance will be the dominant input signal, and the typical VOUT will be:
VOUT = VIN(DIFF) x 4.50
VOUT = 456 mV x 4.50
VOUT = 2.0V
As the Lambda sensor is heated, and the sensor impedance begins to drop, the voltage signal from the sensor
will become the dominate signal.
The non-inverting input bias current is scaled to the VREF voltage. As the VREF voltage increases, or decreases,
this bias current will change proportionally.
OPEN INPUT PINS DEFAULTS
In any remote sensor application it is desirable to be able to deal with the possibility of open connections
between the sensor and the control module. The LM9044 is capable of providing a default output voltage should
either, or both, of the wires to the Lambda sensor open. The two inputs handle the open circuit condition
differently.
For the case of an open connection at the non-inverting input, the device would react exactly the same as for the
Cold Sensor condition. The internal non-inverting input bias current (380 nA typical) flowing through the
differential input resistance (1.2 MΩ typical) would cause the typical output voltage to be at a value defined by:
VOUT = ((380 nA x 1.2MΩ) x 4.50 )
VOUT = 2.0V
The inverting input would still be connected to the Lambda sensor ground, so common mode signals would still
need to be considered in this condition.
For the case of an open connection of the inverting input, the device output stage switches from the amplifier
output to a resistive voltage divider. The LM9044 has a comparator to monitor the voltage on the inverting input
pin, and a 65 μA (typical) current source that will force the pin high if the pin is open. When the voltage on the
inverting pin goes above typically 1.5V, the comparator will switch the output pin from the amplifier output to the
resistive voltage divider stage. In this case, the default VOUT is not dependent on the gain stage, and any signal
on the non-inverting input will be ignored.
8
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In this condition VOUT is:
VOUT = VREF x ((14k + 4k) / (26.5k + 14k + 4k))
VOUT = VREF x 0.4045
When VREF is at 5.0V, VOUT is defined as:
VOUT = 5.0V x 0.4045
VOUT = 2.0V
In the cases where both the inverting and non-inverting pins are open, the open inverting pin condition (i.e.: a
voltage divider across the output) will be the dominant condition.
Any common mode voltage transient on the inverting input pin which goes above the comparator threshold will
immediately cause the output to switch to the resistive voltage divider mode. The output will return to normal
operation when the voltage on the inverting input falls below the 1.5V threshold.
OUTPUT RESISTANCE
Under normal operating conditions the output pin resistance is typically 200Ω.
If the LM9044 is operating in a default output mode due an open connection on the inverting input, the output
resistance will typically appear to be close to 11 kΩ.
An external output filter capacitor value of no more than 0.01 μF is generally recommended. Since the output pin
voltage drive is basically a simple NPN emitter follower, the output pin pull-down is done by the internal feedback
resistor string. With larger value capacitors on the output pin the effect will be somewhat similar to a voltage peak
detector where the output capacitor is charged through the 200Ω resistor, and discharged back through the 200Ω
resistor and the 18 kΩ feedback resistor string to ground.
The output resistance provides current limiting for the output stage should it become shorted to Ground. Any DC
loading of the output will cause an error in the output voltage.
SUPPLY BYPASSING
For best performance the LM9044 requires a VREF supply which is stable and noise free. The same 5V reference
supply used for the A/D converter is the recommended LM9044 VREF supply.
The LM9044 VCC pin has an internal zener shunt voltage regulator, typically 7.5V, and requires a series resistor
to limit the current. The VCC pin should be bypassed with a minimum 0.01 μF capacitor to the Ground pin, and
should be located as close to the device as possible. Some applications may require an additional bypass
capacitance if the system voltage is unusually noisy.
SETTING THE BANDWIDTH
The LM9044 bandwidth is limited by an external capacitor (CF) on the RF pin.
This pin has an internal 175 kΩ resistor. The external capacitor and the internal resistor form a simple RC lowpass filter with a corner frequency (fC) defined as:
fC = 1/ (2 x π x 175 kΩ x CF)
With a CF capacitor value of 0.001 μF, the corner frequency is:
fC = 1/ (2 x π x 175 kΩ x 0.001 μF)
fC = 909 Hz
INPUT FILTERING
Filtering at the differential inputs is strongly recommended. Both the differential voltage signal and the common
mode voltage signal should have low pass filters.
Input filtering is accomplished with series resistors on the input pins, and appropriate bypass capacitors. Typical
input pin series resistance values are in the 100Ω to 1kΩ range. Series resistance values larger than 1kΩ will
generate offset voltages that affect the accuracy of the signal voltage seen at the differential input pins.
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Simplified Internal Schematic
10
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REVISION HISTORY
Changes from Revision C (March 2013) to Revision D
•
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 10
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PACKAGE OPTION ADDENDUM
www.ti.com
7-Oct-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
LM9044V/NOPB
ACTIVE
PLCC
FN
20
40
Green (RoHS
& no Sb/Br)
CU SN
Level-2A-250C-4
WEEK
-40 to 125
LM9044V
LM9044VX/NOPB
ACTIVE
PLCC
FN
20
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-2A-250C-4
WEEK
-40 to 125
LM9044V
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE OUTLINE
FN0020A
PLCC - 4.57 mm max height
SCALE 1.300
PLASTIC CHIP CARRIER
B
.180 MAX
[4.57]
.350-.356
[8.89-9.04]
NOTE 3
A
3
1
(.008)
[0.2]
20
4
.020 MIN
[0.51]
18
PIN 1 ID
(OPTIONAL)
.350-.356
[8.89-9.04]
NOTE 3
.283-.339
[7.19-8.61]
14
8
9
13
.090-.120 TYP
[2.29-3.04]
20X .026-.032
[0.66-0.81]
C
SEATING PLANE
20X .013-.021
[0.33-0.53]
.007 [0.18]
C A B
.004 [0.1] C
16X .050
[1.27]
.385-.395
[9.78-10.03]
TYP
4215152/B 04/2017
NOTES:
1. All linear dimensions are in inches. Any dimensions in brackets are in millimeters. Any dimensions in parenthesis are for reference only.
Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Dimension does not include mold protrusion. Maximum allowable mold protrusion .01 in [0.25 mm] per side.
4. Reference JEDEC registration MS-018.
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EXAMPLE BOARD LAYOUT
FN0020A
PLCC - 4.57 mm max height
PLASTIC CHIP CARRIER
SYMM
3
20X (.096 )
[2.45]
20X (.025 )
[0.64]
1
(R.002 ) TYP
[0.05]
20
4
18
SYMM
(.327)
[8.3]
16X (.050 )
[1.27]
14
8
9
13
(.327)
[8.3]
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:6X
EXPOSED METAL
.002 MAX
[0.05]
ALL AROUND
METAL
.002 MIN
[0.05]
ALL AROUND
EXPOSED METAL
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
SOLDER MASK
OPENING
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4215152/B 04/2017
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
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EXAMPLE STENCIL DESIGN
FN0020A
PLCC - 4.57 mm max height
PLASTIC CHIP CARRIER
SYMM
20X (.096 )
[2.45]
20X (.025 )
[0.64]
3
1
(R.002 ) TYP
[0.05]
20
4
18
SYMM
(.327)
[8.3]
16X (.050 )
[1.27]
14
8
9
13
(.327)
[8.3]
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:6X
4215152/B 04/2017
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
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