Texas Instruments | SoundPLUS™ High-Performance, Bipolar-Input Audio Op Amp (Rev. B) | Datasheet | Texas Instruments SoundPLUS™ High-Performance, Bipolar-Input Audio Op Amp (Rev. B) Datasheet

Texas Instruments SoundPLUS™ High-Performance, Bipolar-Input Audio Op Amp (Rev. B) Datasheet
OPA1602
OPA1604
Burr-Brown Audio
SBOS474B – APRIL 2011 – REVISED NOVEMBER 2011
www.ti.com
™ High-Performance, Bipolar-Input
AUDIO OPERATIONAL AMPLIFIERS
Check for Samples: OPA1602, OPA1604
FEATURES
DESCRIPTION
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The
OPA1602
and
OPA1604
bipolar-input
operational amplifiers achieve very low 2.5nV/√Hz
noise density with an ultralow distortion of 0.00003%
at 1kHz. The OPA1602 and OPA1604 series of op
amps offer rail-to-rail output swing to within 600mV
with 2kΩ load, which increases headroom and
maximizes dynamic range. These devices also have
a high output drive capability of ±30mA.
1
234
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SUPERIOR SOUND QUALITY
ULTRALOW NOISE: 2.5nV/√Hz at 1kHz
ULTRALOW DISTORTION: 0.00003% at 1kHz
HIGH SLEW RATE: 20V/μs
WIDE BANDWIDTH: 35MHz (G = +1)
HIGH OPEN-LOOP GAIN: 120dB
UNITY GAIN STABLE
LOW QUIESCENT CURRENT:
2.6mA PER CHANNEL
RAIL-TO-RAIL OUTPUT
WIDE SUPPLY RANGE: ±2.25V to ±18V
DUAL AND QUAD VERSIONS AVAILABLE
These devices operate over a very wide supply range
of ±2.25V to ±18V, on only 2.6mA of supply current
per channel. The OPA1602 and OPA1604 are
unity-gain stable and provide excellent dynamic
behavior over a wide range of load conditions.
These devices also feature completely independent
circuitry for lowest crosstalk and freedom from
interactions between channels, even when overdriven
or overloaded.
APPLICATIONS
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PROFESSIONAL AUDIO EQUIPMENT
BROADCAST STUDIO EQUIPMENT
ANALOG AND DIGITAL MIXERS
HIGH-END A/V RECEIVERS
HIGH-END BLU-RAY™ PLAYERS
The OPA1602 and OPA1604
from –40°C to +85°C. SoundPlus™
are
specified
V+
Pre-Output Driver
OUT
IN-
IN+
V-
1
2
3
4
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SoundPlus is a trademark of Texas Instruments Incorporated.
BLU-RAY is a trademark of Blu-ray Disc Association.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated
OPA1602
OPA1604
SBOS474B – APRIL 2011 – REVISED NOVEMBER 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ABSOLUTE MAXIMUM RATINGS (1)
Over operating free-air temperature range (unless otherwise noted).
VALUE
UNIT
40
V
(V–) – 0.5 to (V+) + 0.5
V
±10
mA
VS = (V+) – (V–)
Supply Voltage
Input Voltage
Input Current (All pins except power-supply pins)
Output Short-Circuit (2)
Continuous
Operating Temperature
–55 to +125
°C
Storage Temperature
–65 to +150
°C
Junction Temperature
200
°C
Human Body Model (HBM)
4
kV
Charged Device Model (CDM)
1
kV
200
V
ESD Ratings
Machine Model (MM)
(1)
(2)
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not supported.
Short-circuit to VS/2 (ground in symmetrical dual supply setups), one amplifier per package.
PACKAGE INFORMATION (1)
PRODUCT
PACKAGE-LEAD
PACKAGE DESIGNATOR
PACKAGE MARKING
SO-8
D
O1602A
MSOP-8
DGK
OCKQ
SO-14
D
O1604A
TSSOP-14
PW
O1604A
OPA1602
OPA1604
(1)
For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
PIN CONFIGURATIONS
OPA1602
SO-8, MSOP-8
(TOP VIEW)
OUT A
1
-IN A
2
+IN A
3
V-
4
A
B
OPA1604
SO-14, TSSOP-14
(TOP VIEW)
8
V+
7
OUT B
6
-IN B
5
+IN B
Out A
1
-In A
2
A
14
Out D
13
-In D
D
+In A
3
12
+In D
V+
4
11
V-
+ In B
5
10
+ In C
B
C
-In B
6
9
-In C
Out B
7
8
Out C
2
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1602 OPA1604
OPA1602
OPA1604
SBOS474B – APRIL 2011 – REVISED NOVEMBER 2011
www.ti.com
ELECTRICAL CHARACTERISTICS: VS = ±2.25V to ±18V
At TA = +25°C and RL = 2kΩ, unless otherwise noted. VCM = VOUT = midsupply, unless otherwise noted.
OPA1602, OPA1604
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
AUDIO PERFORMANCE
Total Harmonic Distortion + Noise
Intermodulation Distortion
THD+N
IMD
G = +1, f = 1kHz, VO = 3VRMS
0.00003
%
–130
dB
G = +1, VO = 3VRMS
SMPTE/DIN Two-Tone, 4:1 (60Hz and 7kHz)
DIM 30
(3kHz square wave and 15kHz sine wave)
CCIF Twin-Tone (19kHz and 20kHz)
0.00003
%
–130
dB
0.00003
%
–130
dB
0.00003
%
–130
dB
MHz
FREQUENCY RESPONSE
Gain-Bandwidth Product
GBW
G = +1
35
SR
G = –1
20
V/μs
Full Power Bandwidth (1)
VO = 1VP
3
MHz
Overload Recovery Time
G = –10
1
μs
Slew Rate
NOISE
f = 20Hz to 20kHz
2.5
μVPP
Input Voltage Noise Density
en
f = 100Hz
2.5
nV/√Hz
f = 1kHz
2.5
nV/√Hz
Input Current Noise Density
In
f = 100Hz
2.2
pA/√Hz
f = 1kHz
1.8
pA/√Hz
Input Voltage Noise
OFFSET VOLTAGE
VS = ±15V
±0.1
±1
mV
VS = ±2.25V to ±18V
0.5
2
μV/V
f = 1kHz
-130
IB
VCM = 0V
±20
±200
nA
IOS
VCM = 0V
±20
±200
nA
Input Offset Voltage
VOS
vs Power Supply
PSRR
Channel Separation (Dual and Quad)
dB
INPUT BIAS CURRENT
Input Bias Current
Input Offset Current
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
VCM
Common-Mode Rejection Ratio
CMRR
(V+) – 2
(V–) + 2
V
(V–) + 2V ≤ VCM ≤ (V+) – 2V, VS ≥ ±5V
114
120
dB
(V–) + 2V ≤ VCM ≤ (V+) – 2V, VS < ±5V
100
110
dB
INPUT IMPEDANCE
Differential
Common-Mode
20k || 2
Ω || pF
109 || 2.5
Ω || pF
OPEN-LOOP GAIN
Open-Loop Voltage Gain
AOL
(V–) + 0.6V ≤ VO ≤ (V+) – 0.6V, RL = 2kΩ, VS ≥ ±5V
114
120
dB
(V–) + 0.6V ≤ VO ≤ (V+) – 0.6V, RL = 2kΩ, VS < ±5V
106
114
dB
RL = 2kΩ, AOL ≥ 114dB, VS ≥ ±5V
(V–) + 0.6
(V+) – 0.6
RL = 2kΩ, AOL ≥ 106dB, VS < ±5V
(V–) + 0.6
(V+) – 0.6
OUTPUT
Voltage Output
Output Current
VOUT
IOUT
Open-Loop Output Impedance
ZO
Short-Circuit Current (2)
ISC
Capacitive Load Drive
(1)
(2)
See Typical Characteristics
f = 1MHz
CLOAD
V
V
mA
25
Ω
+70/–60
mA
See Typical Characteristics
pF
Full-power bandwidth = SR/(2π × VP), where SR = slew rate.
One channel at a time.
3
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1602 OPA1604
OPA1602
OPA1604
SBOS474B – APRIL 2011 – REVISED NOVEMBER 2011
www.ti.com
ELECTRICAL CHARACTERISTICS: VS = ±2.25V to ±18V (continued)
At TA = +25°C and RL = 2kΩ, unless otherwise noted. VCM = VOUT = midsupply, unless otherwise noted.
OPA1602, OPA1604
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
±18
V
POWER SUPPLY
Specified Voltage
±2.25
VS
Quiescent Current (3)
xx Dual, per channel
Quad, per channel
IQ
IOUT = 0A
2.6
3.2
mA
IQ
IOUT = 0A
2.8
3.4
mA
TEMPERATURE RANGE
Specified Range
–40
+85
°C
Operating Range
–55
+125
°C
(3)
IQ value is based on flash test.
THERMAL INFORMATION: OPA1602
OPA1602
THERMAL METRIC (1)
OPA1602
D
DGK
8 PINS
8 PINS
154.7
θJA
Junction-to-ambient thermal resistance
105.4
θJCtop
Junction-to-case (top) thermal resistance
58.6
49.7
θJB
Junction-to-board thermal resistance
64.2
107.9
ψJT
Junction-to-top characterization parameter
14.1
2.5
ψJB
Junction-to-board characterization parameter
66.5
106.7
θJCbot
Junction-to-case (bottom) thermal resistance
N/A
N/A
(1)
UNITS
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
THERMAL INFORMATION: OPA1604
THERMAL METRIC (1)
OPA1604
OPA1604
D
PW
14 PINS
14 PINS
θJA
Junction-to-ambient thermal resistance
92.8
122.5
θJCtop
Junction-to-case (top) thermal resistance
44.4
36.5
θJB
Junction-to-board thermal resistance
39.6
53.9
ψJT
Junction-to-top characterization parameter
10.4
2.5
ψJB
Junction-to-board characterization parameter
39.3
53.2
θJCbot
Junction-to-case (bottom) thermal resistance
N/A
N/A
(1)
UNITS
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
4
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1602 OPA1604
OPA1602
OPA1604
SBOS474B – APRIL 2011 – REVISED NOVEMBER 2011
www.ti.com
TYPICAL CHARACTERISTICS
At TA = +25°C, VS = ±15V, and RL = 2kΩ, unless otherwise noted.
INPUT VOLTAGE NOISE DENSITY AND
INPUT CURRENT NOISE DENSITY vs FREQUENCY
0.1Hz TO 10Hz NOISE
10
50nV/div
Voltage Noise Density (nV/?Hz)
Input Bias Current Noise (pA/?Hz)
100
Voltage Noise
Density
Current Noise
Density
1
0.1
1
10
100
1k
10k
Time (1s/div)
100k
Frequency (Hz)
Figure 1.
Figure 2.
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY
15
10k
VS = ±15V
1k
RS
100
10
OPA164x
10
7.5
VS = ±5V
5
2.5
Resistor
Noise
1
100
1k
2
EO =
2
Maximum output
voltage without slewrate induced distortion
12.5
OPA160x
EO
Output Voltage (VP)
Voltage Noise Spectral Density, EO (nV/ÖHz)
VOLTAGE NOISE vs SOURCE RESISTANCE
VS = ±2.25V
2
en + (in RS) + 4kTRS
10k
100k
0
10k
1M
100k
Source Resistance, RS (W)
Figure 3.
GAIN AND PHASE vs FREQUENCY
CLOSED-LOOP GAIN vs FREQUENCY
25
180
20
120
Gain
100
90
40
Phase
45
0
10
Gain (dB)
60
Phase (degrees)
80
G = +10
15
135
20
10M
Figure 4.
140
Gain (dB)
1M
Frequency (Hz)
G = +1
5
0
-5
-10
G = -1
-15
-20
-20
10
100
1k
10k
100k
1M
10M
0
100M
-25
100k
Frequency (Hz)
1M
10M
100M
Frequency (Hz)
Figure 5.
Figure 6.
5
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1602 OPA1604
OPA1602
OPA1604
SBOS474B – APRIL 2011 – REVISED NOVEMBER 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±15V, and RL = 2kΩ, unless otherwise noted.
THD+N RATIO vs FREQUENCY
THD+N RATIO vs FREQUENCY
0.00001
-120
RL = 600W
VOUT = 3VRMS
BW = 80kHz
10
RL = 2kW
Total Harmonic Distortion + Noise (%)
Total Harmonic Distortion + Noise (%)
0.0001
G = -1, RL = 2kW
G = +10, RL = 600W
G = +10, RL = 2kW
0.01
-140
100
1k
RSOURCE OPA1602
-15V
0.001
RL
-120
VOUT = 3VRMS, BW = 80kHz
0.00001
10
10k 20k
100
1k
THD+N RATIO vs FREQUENCY
THD+N RATIO vs FREQUENCY
RL = 600W
-120
0.0001
RL = 2kW
VOUT = 3VRMS
BW > 500kHz
Total Harmonic Distortion + Noise (%)
Total Harmonic Distortion + Noise (%)
-100
0.001
0.01
-140
1k
10k
RSOURCE OPA1602
-15V
0.001
RL
-120
VOUT = 3VRMS
BW > 500kHz
10
-140
100
1k
Frequency (Hz)
Figure 10.
THD+N RATIO vs OUTPUT AMPLITUDE
INTERMODULATION DISTORTION vs
OUTPUT AMPLITUDE
RL = 600W
0.0001
1kHz Signal
BW = 80kHz
RSOURCE = 0W
-120
RL = 2kW
-140
0.00001
1
10
20
Intermodulation Distortion (%)
-100
-60
G = +1
SMPTE/DIN
Two-Tone, 4:1
(60Hz and 7kHz)
0.01
DIM30
(3kHz square wave,
15kHz sine wave)
0.001
-80
-100
-120
0.0001
-140
0.00001
CCIF Twin-Tone
(19kHz and 20kHz)
Total Harmonic Distortion + Noise (dB)
0.1
-80
G = +1, RL = 600W
G = +1, RL = 2kW
G = -1, RL = 600W
G = -1, RL = 2kW
G = +10, RL = 600W
G = +10, RL = 2kW
Total Harmonic Distortion (dB)
Total Harmonic Distortion + Noise (%)
100k
Frequency (Hz)
0.01
0.1
10k
Figure 9.
0.001
-100
0.0001
0.00001
100k
-80
RS = 0W
RS = 300W
RS = 600W
RS = 1kW
+15V
Total Harmonic Distortion + Noise (dB)
G = -1, RL = 2kW
G = +10, RL = 600W
G = +10, RL = 2kW
Total Harmonic Distortion + Noise (dB)
-80
100
-140
20k
Figure 8.
0.01
10
10k
Frequency (Hz)
Figure 7.
0.00001
-100
0.0001
Frequency (Hz)
G = +1, RL = 600W
G = +1, RL = 2kW
G = -1, RL = 600W
-80
RS = 0W
RS = 300W
RS = 600W
RS = 1kW
+15V
Total Harmonic Distortion + Noise (dB)
G = +1, RL = 600W
G = +1, RL = 2kW
G = -1, RL = 600W
Total Harmonic Distortion + Noise (dB)
-100
0.001
-160
0.000001
0.1
1
10
20
Output Amplitude (VRMS)
Output Amplitude (VRMS)
Figure 11.
Figure 12.
6
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1602 OPA1604
OPA1602
OPA1604
SBOS474B – APRIL 2011 – REVISED NOVEMBER 2011
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±15V, and RL = 2kΩ, unless otherwise noted.
CHANNEL SEPARATION vs FREQUENCY
Channel Separation (dB)
-105
CMRR AND PSRR vs FREQUENCY (Referred to Input)
140
VO = 3VRMS
G = +1
Common-Mode Rejection Ratio (dB)
-100
-110
-115
-120
RL = 600W
-125
-130
-135
RL = 2kW
-140
RL = 5kW
-145
-150
CMRR
120
100
-PSRR
80
60
+PSRR
40
20
0
10
100
1k
10k
100k
1
10
100
1k
Frequency (Hz)
10k
100k
1M
10M
Figure 13.
Figure 14.
SMALL-SIGNAL STEP RESPONSE
(100mV)
SMALL-SIGNAL STEP RESPONSE
(100mV)
G = -1
CL = 50pF
20mV/div
G = +1
CL = 50pF
20mV/div
100M
Frequency (Hz)
+15V
OPA1602
RF
RI
= 2kW
= 2kW
+15V
OPA1602
-15V
RL
CL
CL
-15V
Time (0.1ms/div)
Time (0.1ms/div)
Figure 15.
Figure 16.
LARGE-SIGNAL STEP RESPONSE
LARGE-SIGNAL STEP RESPONSE
G = -1
CL = 50pF
G = +1
CL = 50pF
2V/div
2V/div
RF = 0W
RF = 100W
See Application Information,
Input Protection section
Time (1ms/div)
Time (1ms/div)
Figure 17.
Figure 18.
7
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OPA1604
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±15V, and RL = 2kΩ, unless otherwise noted.
SMALL-SIGNAL OVERSHOOT
vs CAPACITIVE LOAD (100mV Output Step)
SMALL-SIGNAL OVERSHOOT
vs CAPACITIVE LOAD (100mV Output Step)
50
50
G = -1
G = +1
RS = 0W
RS = 0W
+15V
40
RF = 2kW
RI = 2kW
40
RS
+15V
RS
RL
-15V
30
Overshoot (%)
Overshoot (%)
OPA1602
CL
RS = 25W
20
OPA1602
RS = 25W
30
CL
-15V
20
RS = 50W
10
10
RS = 50W
0
0
0
100
200
300
400
500
0
600
100
200 300 400 500 600
700 800 900 1000
Capacitive Load (pF)
Capacitive Load (pF)
Figure 19.
Figure 20.
SMALL-SIGNAL OVERSHOOT
vs FEEDBACK CAPACITOR (100mV Output Step)
OPEN-LOOP GAIN vs TEMPERATURE
50
2
RL = 2kW
CF
RF = 2kW
RI = 2kW
40
1.5
RS
30
AOL (mV/V)
Overshoot (%)
+15V
OPA1602
CL
-15V
20
G = -1
RI = RF = 2kW
R S = 0W
CL = 100pF
10
0
0
0.5
1
0.5
0
1
1.5
2
2.5
3
4
3.5
-40
10
-15
Feedback Capacitor, CF (pF)
Figure 21.
60
85
Figure 22.
IB AND IOS vs TEMPERATURE
IB AND IOS vs COMMON-MODE VOLTAGE
40
10
Average of 60 Units
VS = ±18V
30
5
-IOS
-5
-10
-IB
-15
Common-Mode Range
20
0
IB and IOS (nA)
IB and IOS Current (nA)
35
Temperature (°C)
10
0
-10
IOS
-IB
-20
-20
-30
-25
+IB
-30
-50
-25
0
25
50
+IB
-40
75
100
125
-18
-14
-10
-6
-2
2
6
10
14
18
Common-Mode Voltage (V)
Temperature (°C)
Figure 23.
Figure 24.
8
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±15V, and RL = 2kΩ, unless otherwise noted.
QUIESCENT CURRENT vs TEMPERATURE
QUIESCENT CURRENT vs SUPPLY VOLTAGE
4
3
OPA1604
2.9
3.5
2.8
2.7
IQ (mA)
IQ (mA)
OPA1604
3
2.5
2.6
2.5
OPA1602
2.4
2.3
OPA1602
2
2.2
2.1
<−−−−−− Specified Temperature Range −−−−−−>
1.5
−40
−15
10
35
60
Temperature (°C)
85
2
110
<−−−−−− Specified Supply−Voltage Range −−−−−>
0
4
8
12
16
20
24
Supply Voltage (V)
G017
Figure 25.
36
G018
SHORT-CIRCUIT CURRENT vs TEMPERATURE
75
0.3
+ISC
70
0.25
VS = ±18V
65
OPA1604
60
0.2
ISC (mA)
DIQ, per Channel (mA)
32
Figure 26.
IQ WARMUP
(Difference from IQ at Startup, Per Channel)
OPA1602
0.15
55
-ISC
50
45
0.1
40
0.05
35
30
0
0
60
120
180
240
300
360
-50
-25
0
25
50
75
100
125
Temperature (°C)
Time (s)
Figure 27.
Figure 28.
OUTPUT VOLTAGE vs OUTPUT CURRENT
OPEN-LOOP OUTPUT IMPEDANCE vs
FREQUENCY
18
10k
16
VS = ±18V
14
1k
+125°C
+85°C
+25°C
0°C
-25°C
-40°C
12
10
-10
-12
ZO (W)
Output Voltage Swing (V)
28
100
10
-14
-16
1
-18
20
30
40
50
60
70
80
10
100
Output Current (mA)
1k
10k
100k
1M
10M
100M
Frequency (Hz)
Figure 29.
Figure 30.
9
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OPA1604
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APPLICATION INFORMATION
applications do not require equal positive and
negative output voltage swing. With the OPA160x
series, power-supply voltages do not need to be
equal. For example, the positive supply could be set
to +25V with the negative supply at –5V.
The OPA1602 and OPA1604 are unity-gain stable,
precision dual and quad op amps with very low noise.
Applications with noisy or high-impedance power
supplies require decoupling capacitors close to the
device pins. In most cases, 0.1μF capacitors are
adequate. Figure 31 shows a simplified schematic of
the OPA160x (one channel shown).
In all cases, the common-mode voltage must be
maintained within the specified range. In addition, key
parameters are assured over the specified
temperature range of TA = –40°C to +85°C.
Parameters that vary significantly with operating
voltage or temperature are shown in the Typical
Characteristics.
OPERATING VOLTAGE
The OPA160x series op amps operate from ±2.25V
to ±18V supplies while maintaining excellent
performance. The OPA160x series can operate with
as little as +4.5V between the supplies and with up to
+36V between the supplies. However, some
V+
Pre-Output Driver
OUT
IN-
IN+
V-
Figure 31. OPA160x Simplified Schematic
10
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1602 OPA1604
OPA1602
OPA1604
SBOS474B – APRIL 2011 – REVISED NOVEMBER 2011
www.ti.com
The input terminals of the OPA1602 and OPA1604
are protected from excessive differential voltage with
back-to-back diodes, as Figure 32 illustrates. In most
circuit applications, the input protection circuitry has
no consequence. However, in low-gain or G = +1
circuits, fast ramping input signals can forward bias
these diodes because the output of the amplifier
cannot respond rapidly enough to the input ramp.
This effect is illustrated in Figure 17 of the Typical
Characteristics. If the input signal is fast enough to
create this forward bias condition, the input signal
current must be limited to 10mA or less. If the input
signal current is not inherently limited, an input series
resistor (RI) and/or a feedback resistor (RF) can be
used to limit the signal input current. This resistor
degrades the low-noise performance of the OPA160x
and is examined in the following Noise Performance
section. Figure 32 shows an example configuration
when both current-limiting input and feeback resistors
are used.
The equation in Figure 33 shows the calculation of
the total circuit noise, with these parameters:
• en = Voltage noise
• in = Current noise
• RS = Source impedance
• k = Boltzmann’s constant = 1.38 × 10–23 J/K
• T = Temperature in degrees Kelvin (K)
Voltage Noise Spectral Density, EO (nV/ÖHz)
INPUT PROTECTION
10k
OPA160x
EO
1k
RS
100
10
OPA164x
Resistor
Noise
1
100
1k
2
2
2
EO = en + (in RS) + 4kTRS
10k
100k
1M
Source Resistance, RS (W)
RF
Figure 33. Noise Performance of the OPA160x in
Unity-Gain Buffer Configuration
-
OPA160x
RI
Input
Output
+
Figure 32. Pulsed Operation
NOISE PERFORMANCE
Figure 33 shows the total circuit noise for varying
source impedances with the op amp in a unity-gain
configuration (no feedback resistor network, and
therefore no additional noise contributions).
The OPA160x (GBW = 35MHz, G = +1) is shown with
total circuit noise calculated. The op amp itself
contributes both a voltage noise component and a
current noise component. The voltage noise is
commonly modeled as a time-varying component of
the offset voltage. The current noise is modeled as
the time-varying component of the input bias current
and reacts with the source resistance to create a
voltage component of noise. Therefore, the lowest
noise op amp for a given application depends on the
source impedance. For low source impedance,
current noise is negligible, and voltage noise
generally dominates. The low voltage noise of the
OPA160x series op amps makes them a better
choice for low source impedances of less than 1kΩ.
BASIC NOISE CALCULATIONS
Design of low-noise op amp circuits requires careful
consideration of a variety of possible noise
contributors: noise from the signal source, noise
generated in the op amp, and noise from the
feedback network resistors. The total noise of the
circuit is the root-sum-square combination of all noise
components.
The resistive portion of the source impedance
produces thermal noise proportional to the square
root of the resistance. Figure 33 plots this equation.
The source impedance is usually fixed; consequently,
select the op amp and the feedback resistors to
minimize the respective contributions to the total
noise.
Figure 34 illustrates both inverting and noninverting
op amp circuit configurations with gain. In circuit
configurations with gain, the feedback network
resistors also contribute noise. The current noise of
the op amp reacts with the feedback resistors to
create additional noise components. The feedback
resistor values can generally be chosen to make
these noise sources negligible. The equations for
total noise are shown for both configurations.
11
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1602 OPA1604
OPA1602
OPA1604
SBOS474B – APRIL 2011 – REVISED NOVEMBER 2011
A) Noise in Noninverting Gain Configuration
www.ti.com
Noise at the output:
R2
2
R2
EO2 = 1 +
R1
R1
2
en2 +
R2
R1
2
e12 + e22 + 1 +
R2
R1
es2
EO
RS
Where eS =
4kTRS = thermal noise of RS
e1 =
4kTR1 = thermal noise of R1
e2 =
4kTR2 = thermal noise of R2
VS
B) Noise in Inverting Gain Configuration
Noise at the output:
R2
2
R2
2
EO = 1 +
R1
RS
VS
Note:
R1 + RS
e n2 +
2
R2
R 1 + RS
e12 + e22 +
2
R2
R 1 + RS
e s2
EO
Where eS =
4kTRS = thermal noise of RS
e1 =
4kTR1 = thermal noise of R1
e2 =
4kTR2 = thermal noise of R2
For the OPA160x series of op amps at 1kHz, en = 2.5nV/√Hz and in = 1.8pA√Hz.
Figure 34. Noise Calculation in Gain Configurations
12
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1602 OPA1604
OPA1602
OPA1604
SBOS474B – APRIL 2011 – REVISED NOVEMBER 2011
www.ti.com
TOTAL HARMONIC DISTORTION
MEASUREMENTS
The OPA160x series op amps have excellent
distortion characteristics. THD + noise is below
0.00008% (G = +1, VO = 3VRMS, BW = 80kHz)
throughout the audio frequency range, 20Hz to
20kHz, with a 2kΩ load (see Figure 7 for
characteristic performance).
The distortion produced by the OPA160x series op
amps is below the measurement limit of many
commercially available distortion analyzers. However,
a special test circuit (such as Figure 35 shows) can
be used to extend the measurement capabilities.
Op amp distortion can be considered an internal error
source that can be referred to the input. Figure 35
shows a circuit that causes the op amp distortion to
be gained up (refer to the table in Figure 35 for the
distortion gain factor for various signal gains). The
addition of R3 to the otherwise standard noninverting
amplifier configuration alters the feedback factor or
noise gain of the circuit. The closed-loop gain is
unchanged, but the feedback available for error
correction is reduced by the distortion gain factor,
thus extending the resolution by the same amount.
Note that the input signal and load applied to the op
amp are the same as with conventional feedback
without R3. The value of R3 should be kept small to
minimize its effect on the distortion measurements.
R1
The validity of this technique can be verified by
duplicating measurements at high gain and/or high
frequency where the distortion is within the
measurement capability of the test equipment.
Measurements for this data sheet were made with an
Audio Precision System Two distortion/noise
analyzer, which greatly simplifies such repetitive
measurements. The measurement technique can,
however, be performed with manual distortion
measurement instruments.
CAPACITIVE LOADS
The dynamic characteristics of the OPA1602 and
OPA1604 have been optimized for commonly
encountered gains, loads, and operating conditions.
The combination of low closed-loop gain and high
capacitive loads decreases the phase margin of the
amplifier and can lead to gain peaking or oscillations.
As a result, heavier capacitive loads must be isolated
from the output. The simplest way to achieve this
isolation is to add a small resistor (RS equal to 50Ω,
for example) in series with the output.
This small series resistor also prevents excess power
dissipation if the output of the device becomes
shorted. Figure 19 illustrates a graph of Small-Signal
Overshoot vs Capacitive Load for several values of
RS. Also, refer to Applications Bulletin AB-028
(literature number SBOA015, available for download
from the TI web site) for details of analysis
techniques and application circuits.
R2
SIGNAL DISTORTION
GAIN
GAIN
R3
Signal Gain = 1+
OPA160x
VO = 3VRMS
R2
R1
Distortion Gain = 1+
R2
R1 II R3
Generator
Output
R1
R2
R3
¥
1kW
10W
+1
101
-1
101
4.99kW 4.99kW 49.9W
+10
110
549W 4.99kW 49.9W
Analyzer
Input
Audio Precision
System Two(1)
with PC Controller
Load
(1) For measurement bandwidth, see Figure 7 through Figure 12.
Figure 35. Distortion Test Circuit
13
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1602 OPA1604
OPA1602
OPA1604
SBOS474B – APRIL 2011 – REVISED NOVEMBER 2011
POWER DISSIPATION
The OPA1602 and OPA1604 series op amps are
capable of driving 2kΩ loads with a power-supply
voltage up to ±18V and full operating temperature
range. Internal power dissipation increases when
operating at high supply voltages. Copper leadframe
construction used in the OPA160x series op amps
improves heat dissipation compared to conventional
materials. Circuit board layout can also help minimize
junction temperature rise. Wide copper traces help
dissipate the heat by acting as an additional heat
sink. Temperature rise can be further minimized by
soldering the devices to the circuit board rather than
using a socket.
ELECTRICAL OVERSTRESS
Designers often ask questions about the capability of
an operational amplifier to withstand electrical
overstress. These questions tend to focus on the
device inputs, but may involve the supply voltage pins
or even the output pin. Each of these different pin
functions have electrical stress limits determined by
the voltage breakdown characteristics of the
particular semiconductor fabrication process and
specific circuits connected to the pin. Additionally,
internal electrostatic discharge (ESD) protection is
built into these circuits to protect them from
accidental ESD events both before and during
product assembly.
It is helpful to have a good understanding of this
basic ESD circuitry and its relevance to an electrical
overstress event. Figure 36 illustrates the ESD
circuits contained in the OPA160x (indicated by the
dashed line area). The ESD protection circuitry
involves several current-steering diodes connected
from the input and output pins and routed back to the
internal power-supply lines, where they meet at an
absorption device internal to the operational amplifier.
This protection circuitry is intended to remain inactive
during normal circuit operation.
An ESD event produces a short duration,
high-voltage pulse that is transformed into a short
duration, high-current pulse as it discharges through
a semiconductor device. The ESD protection circuits
are designed to provide a current path around the
operational amplifier core to prevent it from being
damaged. The energy absorbed by the protection
circuitry is then dissipated as heat.
www.ti.com
When the operational amplifier connects into a circuit
such as that illustrated in Figure 36, the ESD
protection components are intended to remain
inactive and not become involved in the application
circuit operation. However, circumstances may arise
where an applied voltage exceeds the operating
voltage range of a given pin. Should this condition
occur, there is a risk that some of the internal ESD
protection circuits may be biased on, and conduct
current. Any such current flow occurs through
steering diode paths and rarely involves the
absorption device.
Figure 36 depicts a specific example where the input
voltage, VIN, exceeds the positive supply voltage
(+VS) by 500mV or more. Much of what happens in
the circuit depends on the supply characteristics. If
+VS can sink the current, one of the upper input
steering diodes conducts and directs current to +VS.
Excessively high current levels can flow with
increasingly higher VIN. As a result, the datasheet
specifications recommend that applications limit the
input current to 10mA.
If the supply is not capable of sinking the current, VIN
may begin sourcing current to the operational
amplifier, and then take over as the source of positive
supply voltage. The danger in this case is that the
voltage can rise to levels that exceed the operational
amplifier absolute maximum ratings. In extreme but
rare cases, the absorption device triggers on while
+VS and –VS are applied. If this event happens, a
direct current path is established between the +VS
and –VS supplies. The power dissipation of the
absorption device is quickly exceeded, and the
extreme internal heating destroys the operational
amplifier.
Another common question involves what happens to
the amplifier if an input signal is applied to the input
while the power supplies +VS and/or –VS are at 0V.
Again, it depends on the supply characteristic while at
0V, or at a level below the input signal amplitude. If
the supplies appear as high impedance, then the
operational amplifier supply current may be supplied
by the input source via the current steering diodes.
This state is not a normal bias condition; the amplifier
most likely will not operate normally. If the supplies
are low impedance, then the current through the
steering diodes can become quite high. The current
level depends on the ability of the input source to
deliver current, and any resistance in the input path.
When an ESD voltage develops across two or more
of the amplifier device pins, current flows through one
or more of the steering diodes. Depending on the
path that the current takes, the absorption device
may activate. The absorption device internal to the
OPA160x triggers when a fast ESD voltage pulse is
impressed across the supply pins. Once triggered, it
quickly activates, clamping the ESD pulse to a safe
voltage level.
14
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1602 OPA1604
OPA1602
OPA1604
SBOS474B – APRIL 2011 – REVISED NOVEMBER 2011
www.ti.com
If there is an uncertainty about the ability of the
supply to absorb this current, external zener diodes
may be added to the supply pins as shown in
Figure 36.
The zener voltage must be selected such that the
diode does not turn on during normal operation.
However, its zener voltage should be low enough so
that the zener diode conducts if the supply pin begins
to rise above the safe operating supply voltage level.
TVS
RF
+V
+VS
OPA160x
RI
ESD CurrentSteering Diodes
-In
RS
+In
Op-Amp
Core
Edge-Triggered ESD
Absorption Circuit
ID
VIN
Out
RL
(1)
-V
-VS
TVS
(1) VIN = +VS + 500mV.
Figure 36. Equivalent Internal ESD Circuitry and Its Relation to a Typical Circuit Application (Single
Channel Shown)
15
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1602 OPA1604
OPA1602
OPA1604
SBOS474B – APRIL 2011 – REVISED NOVEMBER 2011
www.ti.com
APPLICATION CIRCUIT
An additional application idea is shown in Figure 37.
820W
2200pF
+VA
(+15V)
0.1mF
330W
IOUTL+
OPA160x
2700pF
-VA
(-15V)
680W
620W
Audio DAC
with Differential
Current
Outputs
0.1mF
+VA
(+15V)
0.1mF
100W
820W
OPA160x
8200pF
2200pF
+VA
(+15V)
L Ch
Output
-VA
(-15V)
0.1mF
0.1mF
680W
620W
IOUTLOPA160x
330W
2700pF
-VA
(-15V)
0.1mF
Figure 37. Audio DAC I/V Converter and Output Filter
16
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1602 OPA1604
OPA1602
OPA1604
SBOS474B – APRIL 2011 – REVISED NOVEMBER 2011
www.ti.com
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (April, 2011) to Revision B
Page
•
Revised minimum and typical Common-mode rejection ratio specifications ........................................................................ 3
•
Added footnote (2) to Electrical Characteristics table ........................................................................................................... 3
•
Added separate quiescent current specifications for dual and quad versions ..................................................................... 4
•
Added footnote (3) to Electrical Characteristics table ........................................................................................................... 4
•
Corrected product identification and values in OPA1602 Thermal Information table ........................................................... 4
•
Added values to OPA1604 Thermal Information table. ........................................................................................................ 4
•
Updated device name in Figure 3 ......................................................................................................................................... 5
•
Updated Figure 25 to show both devices ............................................................................................................................. 9
•
Updated Figure 26 to show both devices ............................................................................................................................. 9
•
Updated device name in Figure 33 ..................................................................................................................................... 11
•
Changed Power Dissipation section ................................................................................................................................... 14
17
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1602 OPA1604
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
OPA1602AID
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
01602A
OPA1602AIDGK
ACTIVE
VSSOP
DGK
8
80
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OCKQ
OPA1602AIDGKR
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OCKQ
OPA1602AIDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
01602A
OPA1604AID
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
01604A
OPA1604AIDR
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
01604A
OPA1604AIPW
ACTIVE
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA1604
OPA1604AIPWR
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA1604
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Aug-2017
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
OPA1602AIDGKR
VSSOP
DGK
OPA1602AIDR
SOIC
OPA1604AIDR
SOIC
OPA1604AIPWR
TSSOP
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
PW
14
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Aug-2017
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
OPA1602AIDGKR
VSSOP
DGK
8
2500
346.0
346.0
29.0
OPA1602AIDR
SOIC
D
8
2500
367.0
367.0
35.0
OPA1604AIDR
SOIC
D
14
2500
367.0
367.0
38.0
OPA1604AIPWR
TSSOP
PW
14
2000
367.0
367.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
D0008A
SOIC - 1.75 mm max height
SCALE 2.800
SMALL OUTLINE INTEGRATED CIRCUIT
C
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
A
.004 [0.1] C
PIN 1 ID AREA
6X .050
[1.27]
8
1
2X
.150
[3.81]
.189-.197
[4.81-5.00]
NOTE 3
4X (0 -15 )
4
5
B
8X .012-.020
[0.31-0.51]
.010 [0.25]
C A B
.150-.157
[3.81-3.98]
NOTE 4
.069 MAX
[1.75]
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
[0.11-0.25]
0 -8
.016-.050
[0.41-1.27]
DETAIL A
(.041)
[1.04]
TYPICAL
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
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EXAMPLE BOARD LAYOUT
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
SEE
DETAILS
1
8
8X (.024)
[0.6]
6X (.050 )
[1.27]
SYMM
5
4
(R.002 ) TYP
[0.05]
(.213)
[5.4]
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
METAL
SOLDER MASK
OPENING
EXPOSED
METAL
.0028 MAX
[0.07]
ALL AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
EXPOSED
METAL
.0028 MIN
[0.07]
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
1
8
8X (.024)
[0.6]
6X (.050 )
[1.27]
SYMM
5
4
(R.002 ) TYP
[0.05]
(.213)
[5.4]
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
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