Texas Instruments | General-Purpose Low-Voltage Comparators (Rev. D) | Datasheet | Texas Instruments General-Purpose Low-Voltage Comparators (Rev. D) Datasheet

Texas Instruments General-Purpose Low-Voltage Comparators (Rev. D) Datasheet
LMV331-Q1 SINGLE, LMV393-Q1 DUAL
SLOS468D – MAY 2005 – REVISED AUGUST 2011
www.ti.com
GENERAL-PURPOSE LOW-VOLTAGE COMPARATORS
Check for Samples: LMV331-Q1 SINGLE, LMV393-Q1 DUAL
FEATURES
1
•
•
•
LMV393...D PACKAGE
(TOP VIEW)
Qualified for Automotive Applications
2.7-V and 5-V Performance
Low Supply Current
– LMV331 . . . 60 μA Typ
– LMV393 . . . 100 μA Typ
Input Common-Mode Voltage Range Includes
Ground
Low Output Saturation Voltage . . . 200 mV Typ
Open-Collector Output for Maximum Flexibility
•
•
•
1OUT
1IN–
1IN+
GND
1
8
2
7
3
6
4
5
VCC+
2OUT
2IN–
2IN+
LMV331...DBV PACKAGE
(TOP VIEW)
IN+
1
GND
2
IN–
3
5
VCC+
4
OUT
DESCRIPTION/ORDERING INFORMATION
The LMV393-Q1 device is a low-voltage (2.7 V to 5.5 V) version of the dual and quad comparators, LM393 and
LM339, which operate from 5 V to 30 V. The LMV331-Q1 is the single-comparator version.
The LMV331-Q1 and LMV393-Q1 are the most cost-effective solutions for applications where low-voltage
operation, low power, space saving, and price are the primary specifications in circuit design for portable
consumer products. These devices offer specifications that meet or exceed the familiar LM339 and LM393
devices at a fraction of the supply current.
ORDERING INFORMATION (1)
TA
–40°C to 125°C
(1)
(2)
(3)
PACKAGE
Single
Dual
(2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING (3)
SOT23-5 – DBV
Reel of 3000
LMV331QDBVRQ1
LADQ
SOIC – D
Reel of 2500
LMV393QDRQ1
V393Q1
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
DBV: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
Figure 1. SYMBOL (EACH COMPARATOR)
IN−
−
IN+
+
OUT
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005–2011, Texas Instruments Incorporated
LMV331-Q1 SINGLE, LMV393-Q1 DUAL
SLOS468D – MAY 2005 – REVISED AUGUST 2011
www.ti.com
Figure 2. SIMPLIFIED SCHEMATIC
VCC+
Q6
Q7
M
IN+
Q1
Q2
Q3
Q4
OUT
Q5
IN−
R1
R2
R3
GND
2
Copyright © 2005–2011, Texas Instruments Incorporated
LMV331-Q1 SINGLE, LMV393-Q1 DUAL
SLOS468D – MAY 2005 – REVISED AUGUST 2011
www.ti.com
Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN
(2)
VCC+
Supply voltage
VID
Differential input voltage (3)
VI
Input voltage range (either input)
0
D (8-pin) package
Package thermal impedance (4)
θJA
(5)
Operating virtual junction temperature
Tstg
Storage temperature range
(1)
(2)
(3)
(4)
(5)
UNIT
5.5
V
±5.5
V
5.5
V
97
D (14-pin) package
86
DBV package
TJ
MAX
°C/W
206
–65
150
°C
150
°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values (except differential voltages and VCC+ specified for the measurement of IOS) are with respect to the network GND.
Differential voltages are at IN+ with respect to IN–.
Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/θJA. Selecting the maximum of 150°C can affect reliability.
The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions
VCC+
Supply voltage (single-supply operation)
VOUT
Output voltage
TA
Operating free-air temperature
Copyright © 2005–2011, Texas Instruments Incorporated
MIN
MAX
2.7
5.5
–40
UNIT
V
VCC+ + 0.3
V
125
°C
3
LMV331-Q1 SINGLE, LMV393-Q1 DUAL
SLOS468D – MAY 2005 – REVISED AUGUST 2011
www.ti.com
Electrical Characteristics
at specified free-air temperature, VCC+ = 2.7 V, GND = 0 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VIO
Input offset voltage
αVIO
Average temperature coefficient
of input offset voltage
IIB
Input bias current
IIO
Input offset current
IO
Output current (sinking)
TA
MIN
25°C
MAX
1.7
7
–40°C to 125°C
5
25°C
10
–40°C to 125°C
25°C
5
VO ≤ 1.5 V
25°C
25°C
Common-mode input voltage range
VSAT
Saturation voltage
IO ≤ 1 mA
23
–0.1
to 2
25°C
200
Supply current
LMV393 (both comparators)
25°C
LMV339 (all four comparators)
mV
nA
nA
mA
1
25°C
LMV331
50
0.003
–40°C to 125°C
VICR
250
150
5
UNIT
μV/°C
400
–40°C to 125°C
Output leakage current
ICC
TYP
μA
V
mV
40
100
70
140
140
200
μA
Switching Characteristics
TA = 25°C, VCC+ = 2.7 V, RL = 5.1 kΩ, GND = 0 V (unless otherwise noted)
PARAMETER
tPHL
Propagation delay, high- to low-level output switching
tPLH
Propagation delay, low- to high-level output switching
4
TEST CONDITIONS
TYP
Input overdrive = 10 mV
1000
Input overdrive = 100 mV
350
Input overdrive = 10 mV
500
Input overdrive = 100 mV
400
UNIT
ns
ns
Copyright © 2005–2011, Texas Instruments Incorporated
LMV331-Q1 SINGLE, LMV393-Q1 DUAL
SLOS468D – MAY 2005 – REVISED AUGUST 2011
www.ti.com
Electrical Characteristics
at specified free-air temperature, VCC+ = 5 V, GND = 0 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
25°C
VIO
Input offset voltage
αVIO
Average temperature coefficient
of input offset voltage
IIB
Input bias current
IIO
Input offset current
IO
Output current (sinking)
TYP
MAX
1.7
7
–40°C to 125°C
9
25°C
5
25°C
25
–40°C to 125°C
2
–40°C to 125°C
VO ≤ 1.5 V
25°C
10
Common-mode input voltage range
25°C
AVD
Large-signal differential voltage gain
25°C
VSAT
Saturation voltage
25°C
IO ≤ 4 mA
84
Supply current
–0.1
to 4.2
20
25°C
–40°C to 125°C
25°C
LMV393 (both comparators)
25°C
–40°C to 125°C
μA
400
mV
120
150
100
–40°C to 125°C
LMV339 (all four comparators)
nA
V/mV
700
60
nA
V
50
200
mV
mA
1
–40°C to 125°C
LMV331
50
0.003
–40°C to 125°C
VICR
250
150
25°C
UNIT
μV/°C
400
25°C
Output leakage current
ICC
MIN
200
250
170
μA
300
350
Switching Characteristics
TA = 25°C, VCC+ = 5 V, RL = 5.1 kΩ, GND = 0 V (unless otherwise noted)
PARAMETER
tPHL
Propagation delay, high- to low-level output switching
tPLH
Propagation delay, low- to high-level output switching
Copyright © 2005–2011, Texas Instruments Incorporated
TEST CONDITIONS
TYP
Input overdrive = 10 mV
600
Input overdrive = 100 mV
200
Input overdrive = 10 mV
450
Input overdrive = 100 mV
300
UNIT
ns
ns
5
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2019
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LMV331QDBVRQ1
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LADQ
LMV393QDRQ1
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
V393Q1
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2019
OTHER QUALIFIED VERSIONS OF LMV331-Q1, LMV393-Q1 :
• Catalog: LMV331, LMV393
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
25-Sep-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
LMV331QDBVRQ1
Package Package Pins
Type Drawing
SPQ
SOT-23
3000
DBV
5
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
179.0
8.4
Pack Materials-Page 1
3.2
B0
(mm)
K0
(mm)
P1
(mm)
3.2
1.4
4.0
W
Pin1
(mm) Quadrant
8.0
Q3
PACKAGE MATERIALS INFORMATION
www.ti.com
25-Sep-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LMV331QDBVRQ1
SOT-23
DBV
5
3000
203.0
203.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
DBV0005A
SOT-23 - 1.45 mm max height
SCALE 4.000
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
1.75
1.45
PIN 1
INDEX AREA
1
0.1 C
B
A
5
2X 0.95
1.9
1.45
0.90
3.05
2.75
1.9
2
4
0.5
5X
0.3
0.2
3
(1.1)
C A B
0.15
TYP
0.00
0.25
GAGE PLANE
8
TYP
0
0.22
TYP
0.08
0.6
TYP
0.3
SEATING PLANE
4214839/E 09/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
www.ti.com
EXAMPLE BOARD LAYOUT
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
2X (0.95)
3
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214839/E 09/2019
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
2X(0.95)
4
3
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214839/E 09/2019
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
D0008A
SOIC - 1.75 mm max height
SCALE 2.800
SMALL OUTLINE INTEGRATED CIRCUIT
C
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
A
.004 [0.1] C
PIN 1 ID AREA
6X .050
[1.27]
8
1
2X
.150
[3.81]
.189-.197
[4.81-5.00]
NOTE 3
4X (0 -15 )
4
5
B
8X .012-.020
[0.31-0.51]
.010 [0.25]
C A B
.150-.157
[3.81-3.98]
NOTE 4
.069 MAX
[1.75]
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
[0.11-0.25]
0 -8
.016-.050
[0.41-1.27]
DETAIL A
(.041)
[1.04]
TYPICAL
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
SEE
DETAILS
1
8
8X (.024)
[0.6]
6X (.050 )
[1.27]
SYMM
5
4
(R.002 ) TYP
[0.05]
(.213)
[5.4]
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
METAL
SOLDER MASK
OPENING
EXPOSED
METAL
.0028 MAX
[0.07]
ALL AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
EXPOSED
METAL
.0028 MIN
[0.07]
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
1
8
8X (.024)
[0.6]
6X (.050 )
[1.27]
SYMM
5
4
(R.002 ) TYP
[0.05]
(.213)
[5.4]
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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