Texas Instruments | Low Power, Single-Supply, Rail-To-Rail Operational MicroAmplifier™ Series (Rev. A) | Datasheet | Texas Instruments Low Power, Single-Supply, Rail-To-Rail Operational MicroAmplifier™ Series (Rev. A) Datasheet

Texas Instruments Low Power, Single-Supply, Rail-To-Rail Operational MicroAmplifier™ Series (Rev. A) Datasheet
OPA344
OPA2344
OPA4344
OPA
434
4
OPA
344
OPA345
OPA
345
OPA
342
OPA2345
OPA4345
®
www.ti.com
SBOS107A – APRIL 2000 – REVISED AUGUST 2008
LOW POWER, SINGLE-SUPPLY, RAIL-TO-RAIL
OPERATIONAL AMPLIFIERS
MicroAmplifier ™ Series
FEATURES
DESCRIPTION
●
●
●
●
The OPA344 and OPA345 series rail-to-rail CMOS
operational amplifiers are designed for precision, low-power,
miniature applications. The OPA344 is unity gain stable,
while the OPA345 is optimized for gains greater than or equal
to five, and has a gain-bandwidth product of 3MHz.
The OPA344 and OPA345 are optimized to operate on a
single supply from 2.5V and up to 5.5V with an input
common-mode voltage range that extends 300mV
beyond the supplies. Quiescent current is only
250µA (max).
Rail-to-rail input and output make them ideal for driving
sampling analog-to-digital converters. They are also well suited
for general purpose and audio applications and providing I/V
conversion at the output of D/A converters. Single, dual and
quad versions have identical specs for design flexibility.
A variety of packages are available. All are specified for
operation from –40ºC to 85ºC. A SPICE macromodel for
design analysis is available for download from www.ti.com.
RAIL-TO-RAIL INPUT
RAIL-TO-RAIL OUTPUT (within 1mV)
LOW QUIESCENT CURRENT: 150µA typ
MicroSIZE PACKAGES
SOT23-5
MSOP-8
TSSOP-14
● GAIN-BANDWIDTH
OPA344: 1MHz, G ≥ 1
OPA345: 3MHz, G ≥ 5
● SLEW RATE
OPA344: 0.8V/µs
OPA345: 2V/µs
● THD + NOISE: 0.006%
APPLICATIONS
●
●
●
●
●
●
●
PCMCIA CARDS
DATA ACQUISITION
PROCESS CONTROL
AUDIO PROCESSING
COMMUNICATIONS
ACTIVE FILTERS
TEST EQUIPMENT
OPA344, OPA345
Out
1
V–
2
+In
3
1
–In A
2
+In A
3
V–
4
A
B
V+
4
–In
OPA4344, OPA4345
Out A
1
–In A
2
14
Out D
13
–In D
SOT23-5
OPA2344, OPA2345
Out A
5
A
OPA344, OPA345
8
V+
7
Out B
6
–In B
5
+In B
NC
–In
1
2
+In A
3
12
+In D
8
NC
+V
4
11
–V
7
V+
+In B
5
10
+In C
6
Out
–In B
6
9
–In C
5
NC
Out B
7
8
Out C
B
SO-8, MSOP-8, 8-Pin DIP (OPA2344 Only)
+In
V–
3
4
D
SO-8, 8-Pin DIP (OPA344 Only)
C
TSSOP-14, SO-14, 14-PIn DIP (OPA4344 Only)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
Copyright © 2000-2008, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
www.ti.com
SPECIFICATIONS: VS = 2.7V to 5.5V
At TA = +25°C, RL = 10kΩ connected to VS /2 and VOUT = VS /2, unless otherwise noted.
Boldface limits apply over the temperature range, TA = –40°C to +85°C.
OPA344NA, UA, PA
OPA2344EA, UA, PA
OPA4344EA, UA, PA
PARAMETER
OFFSET VOLTAGE
Input Offset Voltage
Over Temperature
vs Temperature
vs Power Supply
Over Temperature
Channel Separation, dc
f = 1kHz
INPUT BIAS CURRENT
Input Bias Current
Over Temperature
Input Offset Current
NOISE
Input Voltage Noise
Input Voltage Noise Density
Current Noise Density
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
Common-Mode Rejection Ratio
Over Temperature
Common-Mode Rejection
Over Temperature
Common-Mode Rejection
Over Temperature
CONDITION
VS = 2.7V to 5.5V, VCM < (V+) -1.8V
VS = 2.7V to 5.5V, VCM < (V+) -1.8V
IOS
f = 0.1 to 50kHz
f = 10kHz
f = 10kHz
en
in
VCM
CMRR
CMRR
CMRR
AOL
TEMPERATURE RANGE
Specified Range
Operating Range
Storage Range
Thermal Resistance
SOT23-5 Surface Mount
MSOP-8 Surface Mount
8-Pin DIP
SO-8 Surface Mount
TSSOP-14 Surface Mount
14-Pin DIP
SO-14 Surface Mount
mV
mV
µV/°C
µV/V
µV/V
µV/V
dB
200
250
VS = +5.5V, –0.3V < VCM < (V+)-1.8
VS = +5.5V, –0.3V < VCM < (V+)-1.8
VS = +5.5V, –0.3V < VCM < 5.8V
VS = +5.5V, –0.3V < VCM < 5.8V
VS = +2.7V, –0.3V < VCM < 3V
VS = +2.7V, –0.3V < VCM < 3V
–0.3
76
74
70
68
66
64
RL
RL
RL
RL
= 100kΩ, 10mV < VO < (V+) –10mV
= 100kΩ, 10mV < VO < (V+) –10mV
= 5kΩ, 400mV < VO < (V+) –400mV
= 5kΩ, 400mV < VO < (V+) –400mV
104
100
96
90
pA
pA
pA
µVrms
nV/√Hz
fA/√Hz
(V+) + 0.3
92
84
80
V
dB
dB
dB
dB
dB
dB
1013 || 3
1013 || 6
Ω || pF
Ω || pF
122
dB
dB
dB
dB
120
CL = 100pF
THD+N
1
0.8
5
8
2.5
0.006
VS = 5.5V, 2V Step
VS = 5.5V, 2V Step
VIN • G = VS
VS = 5.5V, VO = 3Vp-p, G = 1, f = 1kHz
RL = 100kΩ, AOL ≥ 96dB
RL = 100kΩ, AOL ≥ 104dB
RL = 100kΩ, AOL ≥ 100dB
RL = 5kΩ, AOL ≥ 96dB
RL = 5kΩ, AOL ≥ 90dB
Over Temperature
POWER SUPPLY
Specified Voltage Range
Operating Voltage Range
Quiescent Current (per amplifier)
Over Temperature
±1
±1.2
8
30
0.5
GBW
SR
OUTPUT
Voltage Output Swing from Rail(1)
Over Temperature
Short-Circuit Current
Capacitive Load Drive
UNITS
±0.2
±10
See Typical Curve
±0.2
±10
IB
Over Temperature
FREQUENCY RESPONSE
Gain-Bandwidth Product
Slew Rate
Settling Time, 0.1%
0.01%
Overload Recovery Time
Total Harmonic Distortion + Noise
MAX
0.2
130
INPUT IMPEDANCE
Differential
Common-Mode
OPEN-LOOP GAIN
Open-Loop Voltage Gain
Over Temperature
TYP
±0.2
±0.8
±3
30
VS = +5.5V, VCM = VS/2
VOS
dVOS/dT
PSRR
MIN
1
3
40
IQ
10
10
400
400
±15
See Typical Curve
ISC
CLOAD
VS
MHz
V/µs
µs
µs
µs
%
2.7
5.5
2.5 to 5.5
150
VS = 5.5V, IO = 0
–40
–55
–65
θJA
200
150
100
150
100
80
100
mV
mV
mV
mV
mV
mA
250
300
V
V
µA
µA
85
125
150
°C
°C
°C
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
NOTE: (1) Output voltage swings are measured between the output and power-supply rails.
OPA344, 2344, 4344
OPA345, 2345, 4345
2
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SBOS107A
SPECIFICATIONS: VS = 2.7V to 5.5V
At TA = +25°C, RL = 10kΩ connected to VS /2 and VOUT = VS /2, unless otherwise noted.
Boldface limits apply over the temperature range, TA = –40°C to +85°C.
OPA345NA, UA
OPA2345EA, UA
OPA4345EA, UA
PARAMETER
OFFSET VOLTAGE
Input Offset Voltage
Over Temperature
vs Temperature
vs Power Supply
Over Temperature
Channel Separation, dc
f = 1kHz
INPUT BIAS CURRENT
Input Bias Current
Over Temperature
Input Offset Current
NOISE
Input Voltage Noise
Input Voltage Noise Density
Current Noise Density
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
Common-Mode Rejection Ratio
Over Temperature
Common-Mode Rejection Ratio
Over Temperature
Common-Mode Rejection Ratio
Over Temperature
CONDITION
VOS
dVOS/dT
PSRR
MIN
±0.2
±0.8
±3
30
VS = +5.5V, VCM = VS/2
VS = 2.7V to 5.5V, VCM < (V+) -1.8V
VS = 2.7V to 5.5V, VCM < (V+) -1.8V
IOS
f = 0.1 to 50kHz
f = 10kHz
f = 10kHz
en
in
VCM
CMRR
CMRR
CMRR
AOL
TEMPERATURE RANGE
Specified Range
Operating Range
Storage Range
Thermal Resistance
SOT23-5 Surface Mount
MSOP-8 Surface Mount
SO-8 Surface Mount
TSSOP-14 Surface Mount
SO-14 Surface Mount
mV
mV
µV/°C
µV/V
µV/V
µV/V
dB
200
250
VS = +5.5V, –0.3V < VCM < (V+)-1.8
VS = +5.5V, –0.3V < VCM < (V+)-1.8
VS = +5.5V, –0.3V < VCM < 5.8V
VS = +5.5V, –0.3V < VCM < 5.8V
VS = +2.7V, –0.3V < VCM < 3V
VS = +2.7V, –0.3V < VCM < 3V
–0.3
76
74
70
68
66
64
RL
RL
RL
RL
= 100kΩ, 10mV < VO < (V+) –10mV
= 100kΩ, 10mV < VO < (V+) –10mV
= 5kΩ, 400mV < VO < (V+) –400mV
= 5kΩ, 400mV < VO < (V+) –400mV
104
100
96
90
pA
pA
pA
µVrms
nV/√Hz
fA/√Hz
(V+) + 0.3
92
84
80
V
dB
dB
dB
dB
dB
dB
1013 || 3
1013 || 6
Ω || pF
Ω || pF
122
dB
dB
dB
dB
120
CL = 100pF
THD+N
3
2
1.5
1.6
2.5
0.006
G = 5, 2V Output Step
G = 5, 2V Output Step
VIN • G = VS
VS = 5.5V, VO = 2.5Vp-p, G = 5, f = 1kHz
RL = 100kΩ, AOL ≥ 96dB
RL = 100kΩ, AOL ≥ 104dB
RL = 100kΩ, AOL ≥ 100dB
RL = 5kΩ, AOL ≥ 96dB
RL = 5kΩ, AOL ≥ 90dB
Over Temperature
POWER SUPPLY
Specified Voltage Range
Operating Voltage Range
Quiescent Current (per amplifier)
Over Temperature
±1
±1.2
8
30
0.5
GBW
SR
OUTPUT
Voltage Output Swing from Rail(1)
Over Temperature
Short-Circuit Current
Capacitive Load Drive
UNITS
±0.2
±10
See Typical Curve
±0.2
±10
IB
Over Temperature
FREQUENCY RESPONSE
Gain-Bandwidth Product
Slew Rate
Settling Time, 0.1%
0.01%
Overload Recovery Time
Total Harmonic Distortion + Noise
MAX
0.2
130
INPUT IMPEDANCE
Differential
Common-Mode
OPEN-LOOP GAIN
Open-Loop Voltage Gain
Over Temperature
TYP
1
3
40
IQ
10
10
400
400
±15
See Typical Curve
ISC
CLOAD
VS
MHz
V/µs
µs
µs
µs
%
2.7
5.5
2.5 to 5.5
150
VS = 5.5V, IO = 0
–40
–55
–65
θJA
200
150
150
100
100
mV
mV
mV
mV
mV
mA
250
300
V
V
µA
µA
85
125
150
°C
°C
°C
°C/W
°C/W
°C/W
°C/W
°C/W
NOTE: (1) Output voltage swings are measured between the output and power-supply rails.
OPA344, 2344, 4344
OPA345, 2345, 4345
SBOS107A
3
www.ti.com
ABSOLUTE MAXIMUM RATINGS(1)
ELECTROSTATIC
DISCHARGE SENSITIVITY
Supply Voltage, V+ to V- ................................................................... 7.5V
Signal Input Terminals, Voltage(2) ..................... (V–) –0.5V to (V+) +0.5V
Current(2) .................................................... 10mA
Output Short-Circuit(3) .............................................................. Continuous
Operating Temperature .................................................. –55°C to +125°C
Storage Temperature ..................................................... –65°C to +150°C
Junction Temperature ...................................................................... 150°C
Lead Temperature (soldering, 10s) ................................................. 300°C
ESD Tolerance (Human Body Model) ............................................ 4000V
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
NOTES: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only. Functional operation of the device at these conditions, or beyond the specified operating
conditions, is not implied. (2) Input terminals are diode-clamped to the power
supply rails. Input signals that can swing more than 0.5V beyond the supply
rails should be current-limited to 10mA or less. (3) Short-circuit to ground,
one amplifier per package.
PACKAGE/ORDERING INFORMATION(1)
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
ORDERING
NUMBER(2)
TRANSPORT
MEDIA
OPA344NA/250
OPA344NA /3K
OPA344UA
OPA344UA /2K5
OPA344PA
Tape and Reel
Tape and Reel
Rails
Tape and Reel
Rails
OPA2344EA /250
OPA2344EA /2K5
OPA2344UA
OPA2344UA /2K5
OPA2344PA
Tape and Reel
Tape and Reel
Rails
Tape and Reel
Rails
Rails
Tape and Reel
Rails
Tape and Reel
Rails
PRODUCT
PACKAGE
PACKAGE
DESIGNATOR
OPA344NA
SOT23-5
DBV
–40°C to +85°C
B44
"
"
"
"
SO-8
D
–40°C to +85°C
OPA344UA
"
"
"
"
OPA344PA
8-Pin Dip
P
–40° C to +85°C
OPA344PA
OPA2344EA
MSOP-8
DGK
–40°C to +85°C
C44
"
"
"
"
"
OPA2344UA
SO-8
D
–40°C to +85°C
OPA2344UA
"
"
"
"
"
OPA2344PA
8-Pin DIP
P
–40°C to +85°C
OPA2344PA
OPA4344EA
TSSOP-14
PW
–40°C to +85°C
OPA4344EA
"
"
"
"
"
OPA4344UA
SO-14
D
–40°C to +85°C
OPA4344UA
"
"
"
"
"
OPA4344PA
14-Pin DIP
N
–40°C to +85°C
OPA4344PA
OPA4344EA /250
OPA4344EA /2K5
OPA4344UA
OPA4344UA /2K5
OPA4344PA
OPA345NA
"
OPA345UA
"
SOT23-5
"
SO-8
"
DBV
"
D
"
–40°C to +85°C
"
–40°C to +85°C
"
A45
"
OPA345UA
"
OPA345NA/250
OPA345NA/3K
OPA345UA
OPA345UA/2K5
Tape and Reel
Tape and Reel
Rails
Tape and Reel
OPA2345EA
MSOP-8
DGK
–40°C to +85°C
B45
"
"
"
"
"
OPA2345UA
SO-8
D
–40°C to +85°C
OPA2345UA
"
"
"
"
"
OPA2345EA/250
OPA2345EA /2K5
OPA2345UA
OPA2345UA /2K5
Tape and Reel
Tape and Reel
Rails
Tape and Reel
OPA4345EA
TSSOP-14
PW
–40°C to +85°C
OPA4345EA
"
"
"
"
"
OPA4345UA
SO-14
D
–40°C to +85°C
OPA4345UA
"
"
"
"
"
OPA4345EA/250
OPA4345EA /2K5
OPA4345UA
OPA4345UA /2K5
Tape and Reel
Tape and Reel
Rails
Tape and Reel
"
OPA344UA
"
NOTES: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site
at www.ti.com.
(2) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500
pieces of “OPA344UA/2K5” will get a single 2500-piece Tape and Reel.
OPA344, 2344, 4344
OPA345, 2345, 4345
4
www.ti.com
SBOS107A
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = +5V, and RL = 10kΩ connected to VS/2, unless otherwise noted.
OPEN-LOOP GAIN/PHASE vs FREQUENCY
OPEN-LOOP GAIN/PHASE vs FREQUENCY
100
OPA344
120
30
100
0
30
OPA345
Phase
80
90
40
120
Gain (dB)
60
60
60
90
40
120
Gain
Gain
20
0
0.1
10
1
100
1k
10k
100k
1M
150
20
180
10M
0
150
0.1
10
1
100
Frequency (Hz)
6
Maximum Output Voltage (VPP)
1M
180
10M
CMRR
–PSRR
40
20
VS = +5V
5
4
OPA344
OPA345
3
VS = +2.7V
2
1
0
10
10
100
1k
10k
100k
10k
100k
1M
10M
Frequency (Hz)
Frequency (Hz)
CHANNEL SEPARATION vs FREQUENCY
VOLTAGE AND CURRENT NOISE
SPECTRAL DENSITY vs FREQUENCY
10000
Voltage Noise (nV/√Hz)
140
120
100
Dual and quad devices.
G = 1, all channels.
Quad measured channel
A to D or B to C—other
combinations yield improved
rejection.
80
100
IN
1000
10
VN
100
1
10
60
100
1k
10k
100k
1
1M
100
1k
10k
100k
1M
0.1
10M
Frequency (Hz)
Frequency (Hz)
OPA344, 2344, 4344
OPA345, 2345, 4345
SBOS107A
10
Current Noise (fA/√Hz)
Rejection Ratio (dB)
100k
VS = +5.5V
+PSRR
Channel Separation (dB)
10k
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY
100
80
1k
Frequency (Hz)
POWER SUPPLY AND COMMON-MODE
REJECTION RATIO vs FREQUENCY
60
Phase
80
60
Phase (°)
Gain (dB)
0
Phase (°)
120
5
www.ti.com
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = +5V, and RL = 10kΩ connected to VS/2, unless otherwise noted.
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
OPEN-LOOP GAIN, COMMON-MODE REJECTION RATIO,
AND POWER-SUPPLY REJECTION vs TEMPERATURE
1
140
AOL
OPA344: G = 1
120
AOL, CMRR, PSRR (dB)
OPA345: G = 5
THD+N (%)
0.1
0.010
100
CMRR
80
PSRR
60
40
20
0.001
0
100
1k
10k
20k
–75
–50
–25
0
25
100
INPUT BIAS CURRENT vs TEMPERATURE
QUIESCENT CURRENT AND
SHORT-CIRCUIT CURRENT vs TEMPERATURE
125
200
40
175
1000
Quiescent Current (µA)
Input Bias Current (pA)
75
Temperature (°C)
10000
100
10
1
0.1
35
IQ
150
30
135
25
+ISC
100
20
–ISC
75
15
50
10
25
5
0
–75
–50
–25
0
25
50
75
100
–75
125
–50
25
0
–25
50
75
Temperature (°C)
Temperature (°C)
SLEW RATE vs TEMPERATURE
INPUT BIAS CURRENT
vs COMMON-MODE VOLTAGE
100
0
125
5
6
6
3.0
SR–
SR+
OPA345
2.0
1.5
SR–
OPA344
1.0
SR+
4
Input Bias Current (pA)
2.5
Slew Rate (V/µs)
50
Frequency (Hz)
V–
Supply
2
0
–2
Input voltage ≤ –0.3V
can cause op amp output
to lock up. See text.
–4
0.5
V+
Supply
–6
0
–75
–50
–25
0
25
50
75
100
–1
125
0
1
2
3
4
Common-Mode Voltage (V)
Temperature (°C)
OPA344, 2344, 4344
OPA345, 2345, 4345
6
www.ti.com
SBOS107A
Short-Circuit Current (mA)
20
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = +5V, and RL = 10kΩ connected to VS/2, unless otherwise noted.
QUIESCENT CURRENT AND
SHORT-CIRCUIT CURRENT vs SUPPLY VOLTAGE
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
160
V+
20
15
–ISC
150
10
IQ
145
5
140
(V+) – 1
Output Voltage (V)
155
Short-Circuit Current (mA)
Quiescent Current (µA)
+ISC
3
4
5
(V+) – 2
2
85°C
25°C
≈
≈
25°C
–40°C
1
85°C
0
0
2
–40°C
5
0
6
10
15
Supply Voltage (V)
Output Current (mA)
OPEN-LOOP GAIN vs OUTPUT VOLTAGE SWING
OFFSET VOLTAGE
PRODUCTION DISTRIBUTION
20
130
RL = 100kΩ
120
RL = 5kΩ
Population
Open-Loop Gain (dB)
140
110
800
1000
235
250
600
400
0
200
20
0
40
–200
60
–400
80
Output Voltage Swing from Rail (mV)
–600
100
–1000
120
–800
100
Offset Voltage (µV)
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
Offset Voltage Drift (µV/°C)
220
205
190
175
160
145
130
Quiescent Current (µA)
OPA344, 2344, 4344
OPA345, 2345, 4345
SBOS107A
115
100
10
8
6
4
2
0
–2
–4
–6
–8
–10
Population
Population
QUIESCENT CURRENT
PRODUCTION DISTRIBUTION
7
www.ti.com
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = +5V, and RL = 10kΩ connected to VS/2, unless otherwise noted.
SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE
SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE
50
70
Small-Signal Overshoot (%)
Small-Signal Overshoot (%)
OPA345
OPA344
45
40
35
G = +1
30
G = +5
25
G = –1
20
15
10
G = –5
5
0
60
G = +5
50
G = –5
40
30
G = –10, +10
20
10
0
1
10
100
1k
10
10k
100
1k
10k
Load Capacitance (pF)
Load Capacitance (pF)
LARGE-SIGNAL STEP RESPONSE: OPA344
G = +1, RL = 10kΩ, CL = 100pF
LARGE-SIGNAL STEP RESPONSE: OPA345
G = +5, RL = 10kΩ, CL = 100pF
OPA345
1V/div
1V/div
OPA344
5µs/div
5µs/div
SMALL-SIGNAL STEP RESPONSE: OPA344
G = +1, RL = 10kΩ, CL = 100pF
SMALL-SIGNAL STEP RESPONSE: OPA345
G = +5, RL = 10kΩ, CL = 100pF
OPA344
20mV/div
20mV/div
OPA345
5µs/div
5µs/div
OPA344, 2344, 4344
OPA345, 2345, 4345
8
www.ti.com
SBOS107A
APPLICATIONS INFORMATION
OPA344 series op amps are unity gain stable and can operate
on a single supply, making them highly versatile and easy to
use. OPA345 series op amps are optimized for applications
requiring higher speeds with gains of 5 or greater.
Rail-to-rail input and output swing significantly increases
dynamic range, especially in low supply applications. Figure
1 shows the input and output waveforms for the OPA344 in
unity-gain configuration. Operation is from VS = +5V with
a 10kΩ load connected to VS/2. The input is a 5Vp-p
sinusoid. Output voltage is approximately 4.997Vp-p.
Power supply pins should be bypassed with 0.01µF ceramic
capacitors.
G = +1, VS = +5V
Input
1V/div
5V
0V
Output (inverted on scope)
5µs/div
OPERATING VOLTAGE
OPA344 and OPA345 series op amps are fully specified and
ensured from +2.7V to +5.5V. In addition, many specifications apply from –40ºC to +85ºC. Parameters that vary
significantly with operating voltages or temperature are
shown in the Typical Performance Curves.
RAIL-TO-RAIL INPUT
The input common-mode voltage range of the OPA344 and
OPA345 series extends 300mV beyond the supply rails.
This is achieved with a complementary input stage—an Nchannel input differential pair in parallel with a P-channel
differential pair (see Figure 2). The N-channel pair is active
for input voltages close to the positive rail, typically (V+) –
1.3V to 300mV above the positive supply, while the Pchannel pair is on for inputs from 300mV below the negative
supply to approximately (V+) –1.3V. There is a small
transition region, typically (V+) – 1.5V to (V+) – 1.1V, in
which both pairs are on. This 400mV transition region can
vary 300mV with process variation. Thus, the transition
region (both stages on) can range from (V+) – 1.8V to (V+)
– 1.4V on the low end, up to (V+) – 1.2V to (V+) – 0.8V on
the high end. Within the 400mV transition region PSRR,
CMRR, offset voltage, offset drift, and THD may be degraded compared to operation outside this region. For more
information on designing with rail-to-rail input op amps, see
Figure 3 “Design Optimization with Rail-to-Rail Input Op
Amps.”
FIGURE 1. Rail-to-Rail Input and Output.
V+
Reference
Current
VIN+
VIN–
VBIAS1
Class AB
Control
Circuitry
VO
VBIAS2
V–
(Ground)
FIGURE 2. Simplified Schematic.
OPA344, 2344, 4344
OPA345, 2345, 4345
SBOS107A
9
www.ti.com
DESIGN OPTIMIZATION WITH RAIL-TO-RAIL INPUT OP AMPS
With a unity-gain buffer, for example, signals will traverse
this transition at approximately 1.3V below V+ supply
and may exhibit a small discontinuity at this point.
The common-mode voltage of the non-inverting amplifier is equal to the input voltage. If the input signal always
remains less than the transition voltage, no discontinuity
will be created. The closed-loop gain of this configuration can still produce a rail-to-rail output.
Inverting amplifiers have a constant common-mode voltage equal to VB. If this bias voltage is constant, no
discontinuity will be created. The bias voltage can generally be chosen to avoid the transition region.
Rail-to-rail op amps can be used in virtually any op amp
configuration. To achieve optimum performance, however, applications using these special double-input-stage
op amps may benefit from consideration of their special
behavior.
In many applications, operation remains within the common-mode range of only one differential input pair.
However some applications exercise the amplifier through
the transition region of both differential input stages.
Although the two input stages are laser trimmed for
excellent matching, a small discontinuity may occur in
this transition. Careful selection of the circuit configuration, signal levels and biasing can often avoid this transition region.
G = 1 Buffer
Non-Inverting Gain
V+
Inverting Amplifier
V+
VB
VO
VIN
V+
VIN
VO
VO
VIN
VB
VCM = VIN = VO
VCM = VIN
VCM = VB
FIGURE 3. Design Optimization with Rail-to-Rail Input Op Amps.
COMMON-MODE REJECTION
The CMRR for the OPA344 and OPA345 is specified in
several ways so the best match for a given application may
be used. First, the CMRR of the device in the common-mode
range below the transition region (VCM < (V+) – 1.8V) is
given. This specification is the best indicator of the capability of the device when the application requires use of one of
the differential input pairs. Second, the CMRR at VS = 5.5V
over the entire common-mode range is specified. Third, the
CMRR at VS = 2.7V over the entire common-mode range is
provided. These last two values include the variations seen
through the transition region.
INPUT VOLTAGE BEYOND THE RAILS
If the input voltage can go more than 0.3V below the
negative power supply rail (single-supply ground), special
precautions are required. If the input voltage goes sufficiently negative, the op amp output may lock up in an
inoperative state. A Schottky diode clamp circuit will prevent this—see Figure 4. The series resistor prevents excessive current (greater than 10mA) in the Schottky diode and
in the internal ESD protection diode, if the input voltage can
exceed the positive supply voltage. If the signal source is
limited to less than 10mA, the input resistor is not required.
RAIL-TO-RAIL OUTPUT
A class AB output stage with common-source transistors is
used to achieve rail-to-rail output. This output stage is
capable of driving 600Ω loads connected to any potential
between V+ and ground. For light resistive loads (> 50kΩ),
the output voltage can typically swing to within 1mV from
supply rail. With moderate resistive loads (2kΩ to 50kΩ),
the output can swing to within a few tens of millivolts from
the supply rails while maintaining high open-loop gain. See
the typical performance curve “Output Voltage Swing vs
Output Current.”
V+
IOVERLOAD
10mA max
OPA344
VOUT
VIN
1kΩ
IN5818
Schottky diode is required only
if input voltage can go more
than 0.3V below ground.
FIGURE 4. Input Current Protection for Voltages Exceeding the Supply Voltage.
CAPACITIVE LOAD AND STABILITY
The OPA344 in a unity-gain configuration and the OPA345
in gains greater than 5 can directly drive up to 250pF pure
capacitive load. Increasing the gain enhances the amplifier’s
ability to drive greater capacitive loads. See the typical
OPA344, 2344, 4344
OPA345, 2345, 4345
10
www.ti.com
SBOS107A
DRIVING A/D CONVERTERS
The OPA344 and OPA345 series op amps are optimized for
driving medium-speed sampling A/D converters. The
OPA344 and OPA345 op amps buffer the A/D’s input
capacitance and resulting charge injection while providing
signal gain.
performance curve “Small-Signal Overshoot vs Capacitive
Load.” In unity-gain configurations, capacitive load drive
can be improved by inserting a small (10Ω to 20Ω) resistor,
RS, in series with the output, as shown in Figure 5. This
significantly reduces ringing while maintaining dc performance for purely capacitive loads. However, if there is a
resistive load in parallel with the capacitive load, a voltage
divider is created, introducing a dc error at the output and
slightly reducing the output swing. The error introduced is
proportional to the ratio RS/RL, and is generally negligible.
Figures 6 shows the OPA344 in a basic noninverting configuration driving the ADS7822. The ADS7822 is a 12-bit,
micro-power sampling converter in the MSOP-8 package.
When used with the low-power, miniature packages of the
OPA344, the combination is ideal for space-limited, lowpower applications. In this configuration, an RC network at
the A/D’s input can be used to filter charge injection.
V+
Figure 7 shows the OPA2344 driving an ADS7822 in a
speech bandpass filtered data acquisition system. This small,
low-cost solution provides the necessary amplification and
signal conditioning to interface directly with an electret
microphone. This circuit will operate with VS = +2.7V to
+5V with less than 500µA quiescent current.
RS
VOUT
OPA344
10Ω to
20Ω
VIN
RL
CL
FIGURE 5. Series Resistor in Unity-Gain Configuration
Improves Capacitive Load Drive.
+5V
0.1µF
0.1µF
1 VREF
8 V+
DCLOCK
500Ω
+In
OPA344
ADS7822
12-Bit A/D
2
VIN
DOUT
–In
CS/SHDN
3
3300pF
7
6
Serial
Interface
5
GND 4
VIN = 0V to 5V for
0V to 5V output.
NOTE: A/D Input = 0 to VREF
RC network filters high frequency noise.
FIGURE 6. OPA344 in Noninverting Configuration Driving ADS7822.
V+ = +2.7V to 5V
Passband 300Hz to 3kHz
R9
510kΩ
R1
1.5kΩ
R2
1MΩ
R4
20kΩ
C3
33pF
C1
1000pF
1/2
OPA2344
Electret
Microphone(1)
R3
1MΩ
R6
100kΩ
R7
51kΩ
R8
150kΩ
VREF 1
8 V+
7
C2
1000pF
1/2
OPA2344
+IN
ADS7822 6
12-Bit A/D
5
2
–IN
DCLOCK
DOUT
CS/SHDN
Serial
Interface
3
4
NOTE: (1) Electret microphone
powered by R1.
R5
20kΩ
G = 100
GND
FIGURE 7. Speech Bandpass Filtered Data Acquisition System.
OPA344, 2344, 4344
OPA345, 2345, 4345
SBOS107A
11
www.ti.com
PACKAGE OPTION ADDENDUM
www.ti.com
28-Sep-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
OPA2344EA/250
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 85
C44
OPA2344EA/2K5
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 85
C44
OPA2344UA
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA
2344UA
OPA2344UA/2K5
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA
2344UA
OPA2344UA/2K5G4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA
2344UA
OPA2345EA/250
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-40 to 85
B45
OPA2345UA
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA
2345UA
OPA2345UA/2K5
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA
2345UA
OPA344NA/250
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
B44
OPA344NA/250G4
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
B44
OPA344NA/3K
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
B44
OPA344NA/3KG4
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
B44
OPA344PA
ACTIVE
PDIP
P
8
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
-40 to 85
OPA344PA
OPA344UA
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA
344UA
OPA344UA/2K5
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA
344UA
OPA344UAG4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA
344UA
OPA345NA/250
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
A45
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
28-Sep-2018
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
OPA345NA/3K
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
A45
OPA345UA
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA
345UA
OPA4344EA/250
ACTIVE
TSSOP
PW
14
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
OPA
4344EA
OPA4344EA/2K5
ACTIVE
TSSOP
PW
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
OPA
4344EA
OPA4344UA
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA4344UA
OPA4344UA/2K5
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA4344UA
OPA4344UAG4
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA4344UA
OPA4345UA
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA4345UA
OPA4345UAG4
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA4345UA
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
28-Sep-2018
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
1-May-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
OPA2344EA/250
VSSOP
DGK
8
250
180.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
OPA2344EA/2K5
VSSOP
DGK
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
OPA2344UA/2K5
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
OPA2345EA/250
VSSOP
DGK
8
250
180.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
OPA2345UA/2K5
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
OPA344NA/250
SOT-23
DBV
5
250
178.0
9.0
3.3
3.2
1.4
4.0
8.0
Q3
OPA344NA/3K
SOT-23
DBV
5
3000
178.0
9.0
3.3
3.2
1.4
4.0
8.0
Q3
OPA344UA/2K5
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
OPA345NA/250
SOT-23
DBV
5
250
178.0
9.0
3.3
3.2
1.4
4.0
8.0
Q3
OPA345NA/3K
SOT-23
DBV
5
3000
178.0
9.0
3.3
3.2
1.4
4.0
8.0
Q3
OPA4344EA/250
TSSOP
PW
14
250
180.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
OPA4344EA/2K5
TSSOP
PW
14
2500
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
OPA4344UA/2K5
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
1-May-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
OPA2344EA/250
VSSOP
DGK
OPA2344EA/2K5
VSSOP
DGK
8
250
210.0
185.0
35.0
8
2500
367.0
367.0
35.0
OPA2344UA/2K5
SOIC
D
8
2500
367.0
367.0
35.0
OPA2345EA/250
VSSOP
DGK
8
250
210.0
185.0
35.0
OPA2345UA/2K5
SOIC
D
8
2500
367.0
367.0
35.0
OPA344NA/250
SOT-23
DBV
5
250
180.0
180.0
18.0
OPA344NA/3K
SOT-23
DBV
5
3000
180.0
180.0
18.0
OPA344UA/2K5
SOIC
D
8
2500
367.0
367.0
35.0
OPA345NA/250
SOT-23
DBV
5
250
180.0
180.0
18.0
OPA345NA/3K
SOT-23
DBV
5
3000
180.0
180.0
18.0
OPA4344EA/250
TSSOP
PW
14
250
210.0
185.0
35.0
OPA4344EA/2K5
TSSOP
PW
14
2500
367.0
367.0
35.0
OPA4344UA/2K5
SOIC
D
14
2500
367.0
367.0
38.0
Pack Materials-Page 2
PACKAGE OUTLINE
DBV0005A
SOT-23 - 1.45 mm max height
SCALE 4.000
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
1.75
1.45
PIN 1
INDEX AREA
1
0.1 C
B
A
5
2X 0.95
1.9
1.45
0.90
3.05
2.75
1.9
2
4
0.5
5X
0.3
0.2
3
(1.1)
C A B
0.15
TYP
0.00
0.25
GAGE PLANE
8
TYP
0
0.22
TYP
0.08
0.6
TYP
0.3
SEATING PLANE
4214839/E 09/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
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EXAMPLE BOARD LAYOUT
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
2X (0.95)
3
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214839/E 09/2019
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
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EXAMPLE STENCIL DESIGN
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
2X(0.95)
4
3
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214839/E 09/2019
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
D0008A
SOIC - 1.75 mm max height
SCALE 2.800
SMALL OUTLINE INTEGRATED CIRCUIT
C
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
A
.004 [0.1] C
PIN 1 ID AREA
6X .050
[1.27]
8
1
2X
.150
[3.81]
.189-.197
[4.81-5.00]
NOTE 3
4X (0 -15 )
4
5
B
8X .012-.020
[0.31-0.51]
.010 [0.25]
C A B
.150-.157
[3.81-3.98]
NOTE 4
.069 MAX
[1.75]
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
[0.11-0.25]
0 -8
.016-.050
[0.41-1.27]
DETAIL A
(.041)
[1.04]
TYPICAL
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
SEE
DETAILS
1
8
8X (.024)
[0.6]
6X (.050 )
[1.27]
SYMM
5
4
(R.002 ) TYP
[0.05]
(.213)
[5.4]
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
METAL
SOLDER MASK
OPENING
EXPOSED
METAL
.0028 MAX
[0.07]
ALL AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
EXPOSED
METAL
.0028 MIN
[0.07]
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
1
8
8X (.024)
[0.6]
6X (.050 )
[1.27]
SYMM
5
4
(R.002 ) TYP
[0.05]
(.213)
[5.4]
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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