LOG LOG112 LOG2112 2112 LOG 112 SBOS246D – JUNE 2002 – REVISED APRIL 2005 Precision LOGARITHMIC AND LOG RATIO AMPLIFIERS FEATURES DESCRIPTION ● EASY-TO-USE COMPLETE FUNCTION The LOG112 and LOG2112 are versatile integrated circuits that compute the logarithm or log ratio of an input current relative to a reference current. VLOGOUT of the LOG112 and LOG2112 are trimmed to 0.5V per decade of input current, ensuring high precision over a wide dynamic range of input signals. ● OUTPUT SCALING AMPLIFIER ● ON-CHIP 2.5V VOLTAGE REFERENCE ● HIGH ACCURACY: 0.2% FSO Over 5 Decades ● WIDE INPUT DYNAMIC RANGE: 7.5 Decades, 100pA to 3.5mA The LOG112 and LOG2112 features a 2.5V voltage reference that may be used to generate a precision current reference using an external resistor. ● LOW QUIESCENT CURRENT: 1.75mA ● WIDE SUPPLY RANGE: ±4.5V to ±18V Low DC offset voltage and temperature drift allow accurate measurement of low-level signals over the specified temperature range of –5°C to +75°C. ● PACKAGES: SO-14 (narrow) and SO-16 APPLICATIONS ● LOG, LOG RATIO: Communication, Analytical, Medical, Industrial, Test, General Instrumentation ● PHOTODIODE SIGNAL COMPRESSION AMP ● ANALOG SIGNAL COMPRESSION IN FRONT OF ANALOG-TO-DIGITAL (A/D) CONVERTER ● ABSORBANCE MEASUREMENT ● OPTICAL DENSITY MEASUREMENT R1 R2 VLOGOUT = (0.5V)LOG (I1/I2) VO3 = K (0.5V)LOG (I1/I2), K = 1 + R2/R1 CC V+ VLOGOUT I1 Q1 –IN3 LOG112 Q2 A2 A1 I2 +IN3 RREF A3 VREF VO3 VREF VREF – GND VCM GND V– NOTE: Internal resistors are used to compensate gain change over temperature. The VCM pin is internally connected to GND in the LOG2112. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. Copyright © 2002-2005, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. www.ti.com ELECTROSTATIC DISCHARGE SENSITIVITY ABSOLUTE MAXIMUM RATINGS(1) Supply Voltage, V+ to V– .................................................................. ±18V Inputs ................................................................................................. ±18V Input Current ................................................................................... ±10mA Output Short-Circuit Current(2) ................................................ Continuous Operating Temperature .................................................... –40°C to +85°C Storage Temperature ..................................................... –55°C to +125°C Junction Temperature .................................................................... +150°C Lead Temperature (soldering, 10s) ............................................... +300°C NOTES: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. (2) One output per package. This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION(1) PRODUCT PACKAGE DESIGNATOR PACKAGE-LEAD PACKAGE MARKING LOG112 SO -14 D LOG112A LOG2112 SO -16 DW LOG2112A NOTES: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. PIN CONFIGURATION Top View SO I1 1 14 I2 I1A 1 16 I1B NC 2 13 VCM – IN I2A 2 15 I2B +IN3 3 12 NC +IN3A 3 14 +IN3B –IN3 4 11 VREF – GND –IN3A 4 LOG112 13 –IN3B LOG2112 VLOGOUT 5 10 GND V+ 6 9 V– VO3 7 8 VREF VLOGOUTA 5 12 VLOGOUTB V+ 6 11 V– VO3A 7 10 V03B GND 8 9 VREF NC = No Internal Connection 2 LOG112, 2112 www.ti.com SBOS246D ELECTRICAL CHARACTERISTICS Boldface limits apply over the specified temperature range, TA = –5°C to +75°C. At TA = +25°C, VS = ±5V, and ROUT = 10kΩ, unless otherwise noted. LOG112, LOG2112 PARAMETER CONDITION CORE LOG FUNCTION VIN / VOUT Equation LOG CONFORMITY ERROR(1) Initial over Temperature GAIN(2) Initial Value Gain Error vs Temperature INPUT, A1A and A1B, A2A, A2B Offset Voltage vs Temperature vs Power Supply (PSRR) Input Bias Current vs Temperature Voltage Noise Current Noise Common-Mode Voltage Range (Positive) (Negative) Common-Mode Rejection Ratio (CMRR) OUTPUT, (VLOG OUT) A2A, A2B Output Offset, VOSO, Initial vs Temperature Full-Scale Output (FSO) Short-Circuit Current TOTAL ERROR(3)(4) Initial vs Temperature vs Supply MIN TYP MAX VLOGOUT = (0.5V)LOG (I1/I2) 1nA to 100µA (5 decades) 100pA to 3.5mA (7.5 decades) 1nA to 100µA (5 decades) 100pA to 3.5mA (7.5 decades) 0.01 0.13 0.0001 0.005 1nA to 100µA 1nA to 100µA TMIN to TMAX 0.5 0.10 0.003 TMIN to TMAX VS = ±4.5V to ±18V TMIN to TMAX f = 10Hz to 10kHz f = 1kHz f = 1kHz ±3 TMIN to TMAX VS = ±5V I1 or I2 remains fixed while other varies. Min to Max I1 or I2 = 5mA (VS ≥ ±6V) I1 or I2 = 3.5mA I1 or I2 = 1mA I1 or I2 = 100µA I1 or I2 = 10µA I1 or I2 = 1µA I1 or I2 = 100nA I1 or I2 = 10nA I1 or I2 = 1nA I1 or I2 = 350pA I1 or I2 = 100pA I1 or I2 = 3.5mA I1 or I2 = 1mA I1 or I2 = 100µA I1 or I2 = 10µA I1 or I2 = 1µA I1 or I2 = 100nA I1 or I2 = 10nA I1 or I2 = 1nA I1 or I2 = 350pA I1 or I2 = 100pA I1 or I2 = 3.5mA I1 or I2 = 1mA I1 or I2 = 100µA I1 or I2 = 10µA I1 or I2 = 1µA I1 or I2 = 100nA I1 or I2 = 10nA I1 or I2 = 1nA I1 or I2 = 350pA I1 or I2 = 100pA ±10 (V–) + 1.2 V 0.2 ±1 0.01 ±0.3 ±2 5 ±5 Doubles Every 10°C 3 30 4 (V+) – 2 (V+) – 1.5 (V–) + 2 (V–) + 1.2 10 ±1.5 20 ±3.0 ±0.1 ±0.1 ±0.1 ±0.1 ±0.1 ±0.1 ±0.25 ±0.1 ±0.1 % % %/ °C %/ °C V/decade % %/ °C mV µV/°C µV/V pA µVrms nV/√Hz fA/√Hz V V µV/V ±15 mV µV/°C (V+) – 1.5 V mA ±150 ±75 ±20 ±20 ±20 ±20 ±20 ±20 ±20 ±20 ±20 mV mV mV mV mV mV mV mV mV mV mV mV/ °C mV/ °C mV/ °C mV/ °C mV/ °C mV/ °C mV/ °C mV/ °C mV/ °C mV/ °C mV/ V mV/ V mV/ V mV/ V mV/ V mV/ V mV/ V mV/V mV/ V mV/ V ±18 ±1.2 ±0.4 ±0.1 ±0.05 ±0.05 ±0.09 ±0.2 ±0.3 ±0.1 ±0.3 UNITS NOTES: (1) Log Conformity Error is the peak deviation from the best-fit-straight line of VO versus LOG (I1/I2) curve expressed as a percent of peak-to-peak fullscale output. K, scale factor, equals 0.5V output per decade of input current. (2) Scale factor of core log function is trimmed to 0.5V output per decade change of input current. (3) Worst-case Total Error for any ratio of I1/I2, as the largest of the two errors, when I1 and I2 are considered separately. (4) Total Error includes offset voltage, bias current, gain, and log conformity. (5) Bandwidth (3dB) and transient response are a function of both the compensation capacitor and the level of input current. LOG112, 2112 SBOS246D www.ti.com 3 ELECTRICAL CHARACTERISTICS (Cont.) Boldface limits apply over the specified temperature range, TA = –5°C to +75°C. At TA = +25°C, VS = ±5V, and RL = 10kΩ, unless otherwise noted. LOG112, LOG2112 PARAMETER FREQUENCY RESPONSE, CORE LOG(5) BW, 3dB I2 = 10nA I2 = 1µA I2 = 10µA I2 = 1mA Step Response Increasing I1 = 10nA to 100nA I1 = 1µA to 100µA I1 = 1µA to 1mA Decreasing I1 = 100nA to 10nA I1 = 100µA to 1µA I1 = 1mA to 1µA Increasing I2 = 10nA to 100nA I2 = 1µA to 100µA I2 = 1µA to 1mA Decreasing I2 = 100nA to 10nA I2 = 100µA to 1µA I2 = 1mA to 1µA OP AMP, A3 Input Offset Voltage vs Temperature vs Supply Input Bias Current Input Offset Current Input Voltage Range Input Noise, f = 0.1Hz to 10Hz f = 1kHz Open-Loop Voltage Gain Gain-Bandwidth Product Slew Rate Settling Time, 0.01% Rated Output Short-Circuit Current VOLTAGE REFERENCE Bandgap Voltage Error, Initial vs Temperature vs Supply vs Load Short-Circuit Current POWER SUPPLY Operating Range Quiescent Current LOG112 LOG2112 CONDITION MIN TYP MAX UNITS CC = 4500pF CC = 150pF CC = 150pF CC = 50pF 0.1 38 40 45 kH kH kH kHz CC = 120pF, I2 = 31.6nA CC = 375pF, I2 = 10µA CC = 950pF, I2 = 31.6µA 1.1 1.6 1.5 ms µs µs CC = 120pF, I2 = 31.6nA CC = 375pF, I2 = 10µA CC = 950pF, I2 = 31.6µA 2.1 31.2 39 ms µs µs CC = 125pF, I1 = 31.6nA CC = 750pF, I1 = 10µA CC = 10.5nF, I1 = 31.6µA 2.6 113 1.2 ms µs ms CC = 125pF, I1 = 31.6nA CC = 750pF, I1 = 10µA CC = 10.5nF, I1 = 31.6µA 630 6.6 13.3 µs µs µs VS +250 ±2 5 –10 ±0.5 TMIN to TMAX = ±4.5V to ±18V (V–) ±1000 50 (V+) – 1.5 1 28 88 1.4 0.5 16 G = –1, 3V Step, CL = 100pF (V–) + 1.5 (V+) – 0.9 ±4 2.5 ±0.05 ±25 ±10 ±600 16 TMIN to TMAX VS = ±4.5V to ±18V ILOAD = 10mA VS IO = 0 TEMPERATURE RANGE Specified Range, TMIN to TMAX Operating Range Storage Range Thermal Resistance, θJA SO-14 SO-16 ±4.5 ±1.25 ±2.5 –5 –40 –55 110 80 ±0.5 µV µV/°C µV/V nA nA V µVPP nV/ √Hz dB MHz V/µs µs V mA V % ppm/°C ppm/V ppm/mA mA ±18 V ±1.75 ±3.5 mA mA 75 85 125 °C °C °C °C/W °C/W NOTES: (1) Log Conformity Error is the peak deviation from the best-fit-straight line of VO vs LOG(I1/I2) curve expressed as a percent of peak-to-peak full-scale output. K, scale factor, equals 0.5V output per decade of input current. (2) Scale factor of core log function is trimmed to 0.5V output per decade change of input current. (3) Worst-case Total Error for any ratio of I1/I2, as the largest of the two errors, when I1 and I2 are considered separately. (4) Total Error includes offset voltage, bias current, gain, and log conformity. (5) Bandwidth (3dB) and transient response are a function of both the compensation capacitor and the level of input current. 4 LOG112, 2112 www.ti.com SBOS246D TYPICAL CHARACTERISTICS At TA = +25°C, VS = ±5V, and RL = 10kΩ, unless otherwise noted. ONE CYCLE OF NORMALIZED TRANSFER FUNCTION NORMALIZED TRANSFER FUNCTION 0.50 VLOGOUT = (0.5V)LOG (I1/I2) 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 0.0001 0.001 0.01 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 10 100 1k 10k 1 10 Current Ratio, I1/I2 Current Ratio, I1/I2 –10 I1 I2 TOTAL ERROR (70°C) 8 100 80 to 100 60 to 80 40 to 60 20 to 40 0 to 20 –20 to 0 20 40 20 0 0 1mA 100µA 10µA 1µA 100nA 10nA 1µA 10nA 1nA 1nA I1 –20 100nA 1mA 100µA 10µA –20 +85°C +75°C 5 –40°C 4 3 2 1 0 –1 –2 100pA 1nA I2 –5°C +25°C 10nA 100nA 1µA 10µA 100µA 1mA 10mA Input Current (I1 or I2) LOG112, 2112 SBOS246D Gain Error (%) 40 60 I2 GAIN ERROR (I2 = 1µA) 6 80 Total Error (mV) Total Error (mV) 60 –20 7 100 80 –15 5 to 10 0 to 5 –5 to 0 1mA 1mA 100µA 10µA 1mA 1µA 10µA –20 100nA 10nA 1nA 1nA 100nA 10µA I1 –15 0 –5 –5 –10 –15 –20 100µA –10 10 to 15 5 to 10 0 to 5 –5 to 0 100µA –5 –10 –15 –20 5 0 10µA 0 –5 10 1µA 0 15 10 5 100nA 5 20 15 1µA 10 20 100nA 10 5 Total Error (mV) 15 Total Error (mV) 20 15 1mA Total Error (mV) 20 Total Error (mV) TOTAL ERROR (25°C) TOTAL ERROR (–5°C) 10nA 1 10nA 0.1 1nA 1nA 1.5 Normalized Output Voltage (V) Normalized Output Voltage (V) 2.0 www.ti.com 5 TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VS = ±5V, and RL = 10kΩ, unless otherwise noted. 1M Select CC for I1 min. and I2 max. Values below 2pF may be ignored. 10µA I1 = 100pA I1 = 1nA 100k CC (pF) 1M 3dB Frequency Response (Hz) 10M 3dB FREQUENCY RESPONSE MINIMUM VALUE OF COMPENSATION CAPACITOR 100M I1 = 10nA 10k I1 = 100nA 1µA 1k 100 I1 = 10µA 100µA 1mA 10 1 100pA 1nA 10nA 100nA 1µA 100k 10k 1k 100µA CC A 1µA 1mA to 10µA 10nA 100 I1 = 1nA 10 1 1µ to µA 0 1 10nA CC =1 00 100nA 10nA F 0p CC =1 I1 = 1nA µF 0.1 100pA 10µA 100µA 1mA 10mA 1nA 10nA 100nA 1µA 10µA 100µA 1mA I2 LOG CONFORMITY vs TEMPERATURE LOG CONFORMITY vs INPUT CURRENT 700 15 600 13 Log Conformity (m%) Log Conformity (mV) F 0p 100µA =1 1nA I2 17 100µA 100µA 1mA I1 = 1mA 1µA +85°C 11 9 7 +75°C 5 –40°C to +25°C 7.5 Decade 500 400 7 Decade 300 6 Decade 5 Decade 200 3 100 1 –1 100pA 0 1nA 10nA 100nA 1µA 10µA 100µA 1mA Input Current (I1 or I2) 6 –40 –20 0 20 40 60 80 Temperature (°C) LOG112, 2112 www.ti.com SBOS246D INPUT CURRENT RANGE APPLICATION INFORMATION The LOG112 is a true logarithmic amplifier that uses the base-emitter voltage relationship of bipolar transistors to compute the logarithm, or logarithmic ratio of a current ratio. Figure 1 and Figure 2 show the basic connections required for operation of the LOG112 and LOG2112. In order to reduce the influence of lead inductance of power-supply lines, it is recommended that each supply be bypassed with a 10µF tantalum capacitor in parallel with a 1000pF ceramic capacitor, as shown in Figure 1 and Figure 2. Connecting the capacitors as close to the LOG112 and LOG2112 as possible will contribute to noise reduction as well. To maintain specified accuracy, the input current range of the LOG112 and LOG2112 should be limited from 100pA to 3.5mA. Input currents outside of this range may compromise the LOG112 performance. Input currents larger than 3.5mA result in increased nonlinearity. An absolute maximum input current rating of 10mA is included to prevent excessive power dissipation that may damage the input transistor. On ±5V supplies, the total input current (I1 + I2) is limited to 4.5mA. Due to compliance issues internal to the LOG112 and LOG2112, to accommodate larger total input currents, supplies should be increased. SETTING THE REFERENCE CURRENT V+ 10µF When the LOG112 and LOG2112 are used to compute logarithms, either I1 or I2 can be held constant to become the reference current to which the other is compared. 1000pF VLOGOUT is expressed as: 6 1 8 11 14 9 I2 VLOGOUT 5 LOG112 I1 VLOGOUT = (0.5V)LOG (I1/IREF) VREF 10 VREF – GND 13 IREF can be derived from an external current source (such as that shown in Figure 3), or it may be derived from a voltage source with one or more resistors. When a single resistor is used, the value may be large depending on IREF. If IREF is 10nA and +2.5V is used: VCM – IN RREF = 2.5V/10nA = 250MΩ CC 1000pF 10µF 2N2905 FIGURE 1. Basic Connections of the LOG112. RREF V+ –15V 6V IN834 6V RREF FIGURE 3. Temperature Compensated Current Source. CCA 6 2 5 VLOGOUTA 1 9 VREF I1A LOG2112 16 12 15 11 IREF = 1000pF 10µF I2B 3.6kΩ 2N2905 +15V I1B (2) IREF V– I2A (1) A voltage divider may be used to reduce the value of the resistor, as shown in Figure 4. When using this method, one must consider the possible errors caused by the amplifier’s input offset voltage. The input offset voltage of amplifier A1 has a maximum value of 1.5mV, making VREF a suggested value of 100mV. VLOGOUTB VREF = 100mV R1 8 R3 1 +5V CCB R2 10µF VOS + – IREF A1 R3 >> R2 1000pF V– FIGURE 2. Basic Connections of the LOG2112. FIGURE 4. T Network for Reference Current. LOG112, 2112 SBOS246D www.ti.com 7 Figure 5 shows a low-level current source using a series resistor. The low offset op amp reduces the effect of the LOG112 and LOG2112’s input offset voltage. VREF I1 = 2.5nA to 1mA FREQUENCY COMPENSATION Frequency compensation for the LOG112 is obtained by connecting a capacitor between pins 5 and 14. Frequency compensation for the LOG2112 is obtained by connecting a capacitor between pins 2 and 5, or 15 and 12. The size of the capacitor is a function of the input currents, as shown in the Typical Characteristic curves (Minimum Value of Compensation Capacitor). For any given application, the smallest value of the capacitor which may be used is determined by the maximum value of I2 and the minimum value of I1. Larger values of CC make the LOG112 and LOG2112 more stable, but reduce the frequency response. V+ 8 6 5 1 VLOGOUT 100kΩ LOG112 I2 = 2.5nA 1MΩ 14 +2.5mV 9 +2.5V CC 100Ω In an application, highest overall bandwidth can be achieved by detecting the signal level at VOUT, then switching in appropriate values of compensation capacitors. 10 GND V– OPA335 Chopper Op Amp NEGATIVE INPUT CURRENTS –2.5V The LOG112 and LOG2112 function only with positive input currents (conventional current flows into input current pins). In situations where negative input currents are needed, the circuits in Figures 6, 7, and 8 may be used. FIGURE 5. Current Source with Offset Compensation. FREQUENCY RESPONSE The frequency response curves seen in the Typical Characteristic curves are shown for constant DC I1 and I2 with a small-signal AC current on one input. QA IIN QB National LM394 The 3dB frequency response of the LOG112 and LOG2112 are a function of the magnitude of the input current levels and of the value of the frequency compensation capacitor. See Typical Characteristic curve, 3dB Frequency Response for details. D1 The transient response of the LOG112 and LOG2112 are different for increasing and decreasing signals. This is due to the fact that a log amp is a nonlinear gain element and has different gains at different levels of input signals. Smaller input currents require greater gain to maintain full dynamic range, and will slow the frequency response of the LOG112 and LOG2112. D2 OPA703 IOUT FIGURE 6. Current Inverter/Current Source. +5V TLV271 or 1/2 OPA2335 +3.3V(1) 1/2 OPA2335 NOTE: (1) +3.3V bias is an arbitrary ac level < 5V that also appears on the −IN through the op amp where it applies a reverse bias to the photodiode. 1.5kΩ 1kΩ 10nA to 1mA (+3.3V Back Bias) +5V 1/2 OPA2335 BSH203 10nA to 1mA Pin 1 or Pin 14 LOG112 Photodiode FIGURE 7. Precision Current Inverter/Current Source. 8 LOG112, 2112 www.ti.com SBOS246D VOLTAGE INPUTS age to VCM of at least +1V and up to 2.5V, brings the log transistors out of saturation and reduces output error to approximately 10%. To avoid forward biasing a photodiode, return the cathode to the VCM pin, as shown in Figure 9. To reverse bias the photodiode, apply a more positive voltage to the cathode than the anode. The LOG112 and LOG2112 give the best performances with current inputs. Voltage inputs may be handled directly with series resistors, but the dynamic input range is limited to approximately three decades of input voltage by voltage noise and offsets. The transfer function of Equation 13 applies to this configuration. APPLICATION CIRCUITS ACHIEVING HIGHER ACCURACY WITH HIGHER INPUT CURRENTS LOG RATIO One of the more common uses of log ratio amplifiers is to measure absorbance. See Figure 10 for a typical application. As input current to the LOG112 increases, output accuracy degrades. For a 4.5mA input current on ±5V supplies and a 10mA input current on ±12V supplies, total output error can be between 15% and 25%. Applying a common-mode volt- Absorbance of the sample is A = logλ1´/ λ1 (3) If D1 and D2 are matched A ∝ (0.5V) logI1 / I2 (4) 1kΩ 100kΩ 100kΩ +5V 10nA to 1mA (+3.3V Back Bias) 1/2 OPA2335 +5V +3.3V(1) Photodiode 1.5kΩ 1/2 OPA2335 1.5kΩ 100kΩ 100kΩ NOTE: (1) +3.3V bias is an arbitrary dc level < 5V that also appears on the −IN through the op amp where it applies a reverse bias to the photodiode. LOG112 10nA to 1mA Pin 1 or Pin 14 FIGURE 8. Precision Current Inverter/Current Source. R1 R2 CC V+ = +5V 6 I1 1 Q1 +2.5V 100kΩ +IN3 3 4 –IN3 LOG112 Q2 A2 A1 I2 RREF VLOGOUT 5 14 8 VREF A3 7 VO3 VREF 11 13 VREF – GND VCM 10 9 GND V– = –5V 150kΩ +1.5V FIGURE 9. Extending Input Current Level and Improving Accuracy by Applying a Common-Mode Voltage. LOG112, 2112 SBOS246D www.ti.com 9 DATA COMPRESSION MEASURING AVALANCHE PHOTODIODE CURRENT In many applications, the compressive effects of the logarithmic transfer function are useful. For example, a LOG112 preceding a 12-bit A/D converter can produce the dynamic range equivalent to a 20-bit converter. The wide dynamic range of the LOG112 and LOG2112 is useful for measuring avalanche photodiode current (APD), as shown in Figure 12. OPERATION ON SINGLE SUPPLY Single Supply +5V Many applications do not have the dual supplies required to operate the LOG112 and LOG2112. Figure 11 shows the LOG112 and LOG2112 configured for operation with a single +5V supply. 6 5 1 I1 VLOGOUT LOG112 10 14 V+ I1 6 1 VLOGOUT 5 9 I2 CC D1 Sample λ1 1µF LOG112 λ 1´ I2 Light λ 1 Source 14 3 10 2 9 D2 5 TPS(1) 1µF CC 1 –5V 1µF 4 NOTE: (1) TPS60402DBV negative charge pump. V– FIGURE 11. Single +5V Power-Supply Operation. FIGURE 10. Absorbance Measurement. ISHUNT +15V to +60V 500Ω Irx = 1µA to 1mA 5kΩ Receiver 5kΩ +5V 10Gbits/sec APD INA168 SOT23-5 I-to-V Converter IOUT = 0.1 • ISHUNT 1 2 IOUT CC 10kΩ 16.7kΩ +5V 6 4 5 1 Q2 Q1 A3 7 V03 = 2.5V to 0V A2 A1 14 100µA 25kΩ 8 VREF LOG112 SO-14 9 11 13 10 3 –5V FIGURE 12. High-Side Shunt for APD Measures 3 Decades of APD Current. 10 LOG112, 2112 www.ti.com SBOS246D INSIDE THE LOG112 Using the base-emitter voltage relationship of matched bipolar transistors, the LOG112 establishes a logarithmic function of input current ratios. Beginning with the base-emitter voltage defined as: VBE = VT ln IC IS where : VT = kT q also VOUT = VL (10) I VOUT = (0.5V)LOG 1 I2 k = Boltzmann’s constant = 1.381 • 10–23 or T = Absolute temperature in degrees Kelvin (9) R1 + R2 I n VT log 1 R1 I2 VOUT = (1) R1 + R2 R1 (11) q = Electron charge = 1.602 • 10–19 Coulombs IC = Collector current IS = Reverse saturation current From the circuit in Figure 12: VL = VBE1 – VBE 2 (2) VL = VT1 ln IS1 – + VOUT + 1 I1 I2 Q2 – VBE A2 VBE 2 A1 Substituting (1) into (2) yields: I1 Q1 I1 – VT2 ln I2 IS 2 I VOUT = (0.5V)LOG 1 I2 (3) R2 VL I2 R1 If the transistors are matched and isothermal and VTI = VT2, then (3) becomes: I I VL = VT1 ln 1 – ln 2 I I S S VL = VT ln I1 and since I2 ln x = 2.3 log10 x (4) NOTE: R1 is a metal resistor used to compensate for gain over temperature. (5) (6) I1 I2 (7) where n = 2.3 (8) VL = n VT log FIGURE 13. Simplified Model of a Log Amplifier. DEFINITION OF TERMS 3.5 TRANSFER FUNCTION 3.0 The ideal transfer function is: 2.0 VLOGOUT = (0.5V)LOG (I1/I2) 1.5 Figure 14 shows the graphical representation of the transfer over valid operating range for the LOG112 and LOG2112. 0.5 VOUT (V) 1.0 0 –0.5 –1.0 ACCURACY –1.5 Accuracy considerations for a log ratio amplifier are somewhat more complicated than for other amplifiers. This is because the transfer function is nonlinear and has two inputs, each of which can vary over a wide dynamic range. The accuracy for any combination of inputs is determined from the total error specification. TOTAL ERROR The total error is the deviation (expressed in mV) of the actual output from the ideal output of VLOGOUT = (0.5V)LOG (I1/I2). Thus, VLOGOUT(ACTUAL) = VLOGOUT(IDEAL) ± Total Error –2.0 –2.5 –3.0 100 pA 1nA 10n A 0n 10 I 2 = µA 1 I 2 = 0µA 1 = I 2 00µA 1 I 2 = mA 1 = I2 A 100 nA µA 1 1 0µ A 100 µA 1m A A 10m I1 VLOGOUT = (0.5V)LOG (I1/I2) –3.5 FIGURE 14. Transfer Function with Varying I2 and I1. It represents the sum of all the individual components of error normally associated with the log amp when operated in the current input mode. The worst-case error for any given ratio of I1/I2 is the largest of the two errors when I1 and I2 are considered separately. Temperature can affect total error. (6) LOG112, 2112 SBOS246D A 0p 10 I 2 = nA 1 I 2 = 0nA 1 = I2 2.5 www.ti.com 11 ERRORS RTO AND RTI The individual component of error is: ∆K = gain error (0.10%, typ), as specified in the specification table. As with any transfer function, errors generated by the function may be Referred-to-Output (RTO) or Referred-to-Input (RTI). In this respect, log amps have a unique property: given some error voltage at the log amp’s output, that error corresponds to a constant percent of the input regardless of the actual input level. IB1 = bias current of A1 (5pA, typ) IB2 = bias current of A2 (5pA, typ) N = log conformity error (0.01%, 0.13%, typ) 0.01% for m = 5, 0.13% for m = 7.5 LOG CONFORMITY For the LOG112 and LOG2112, log conformity is calculated the same as linearity and is plotted I1 /I2 on a semi-log scale. In many applications, log conformity is the most important specification. This is true because bias current errors are negligible (5pA compared to input currents of 100pA and above) and the scale factor and offset errors may be trimmed to zero or removed by system calibration. This leaves log conformity as the major source of error. Log conformity is defined as the peak deviation from the best fit straight line of the VLOGOUT versus log (I1/I2) curve. This is expressed as a percent of ideal full-scale output. Thus, the nonlinearity error expressed in volts over m decades is: VLOGOUT (NONLIN) = 0.5V/dec • 2NmV (7) where N is the log conformity error, in percent. VOSO = output offset voltage (3mV, typ) m = number of decades over which N is specified For example, what is the error when: I1 = 1µA and I2 = 100nA 10−6 − 5 • 10−12 ± 2 0.0001)5 ± 3.0mV VLOGOUT = (0.5 ± 0.001) log −7 −12 ( )( 10 − 5 • 10 = 0.505V Since the ideal output is 0.5V, the error as a percent of the reading is: 0.505V • 100% = 1.01% (12) 0.5 For the case of voltage inputs, the actual transfer function is: % error = (13) INDIVIDUAL ERROR COMPONENTS VLOGOUT The ideal transfer function with current input is: I VLOGOUT = (0.5V)LOG 1 I2 (8) The actual transfer function with the major components of error is: VLOGOUT 12 I –I = (0.5V) (1 ± ∆K ) log 1 B1 ± Nm ± VOSO I2 – IB2 (10) (11) Where EOS1 V1 R – IB1 ± R 1 = (0.5V) (1 ± ∆K ) log 1 V2 – I ± EOS2 B2 R2 R2 ± Nm ± VOSO EOS1 E and OS2 (offset error) are considered to be R1 R2 zero for large values of resistance from external input current sources. (9) LOG112, 2112 www.ti.com SBOS246D PACKAGE OPTION ADDENDUM www.ti.com 22-Mar-2018 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LOG112AID ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 85 LOG112A LOG112AIDE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 85 LOG112A LOG112AIDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 85 LOG112A LOG2112AIDW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 85 LOG2112A LOG2112AIDWR ACTIVE SOIC DW 16 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -40 to 85 LOG2112A (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 22-Mar-2018 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LOG112AIDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 LOG2112AIDWR SOIC DW 16 1000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LOG112AIDR LOG2112AIDWR SOIC D 14 2500 367.0 367.0 38.0 SOIC DW 16 1000 367.0 367.0 38.0 Pack Materials-Page 2 GENERIC PACKAGE VIEW DW 16 SOIC - 2.65 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 7.5 x 10.3, 1.27 mm pitch This image is a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4224780/A www.ti.com PACKAGE OUTLINE DW0016A SOIC - 2.65 mm max height SCALE 1.500 SOIC C 10.63 TYP 9.97 SEATING PLANE PIN 1 ID AREA A 0.1 C 14X 1.27 16 1 2X 8.89 10.5 10.1 NOTE 3 8 9 0.51 0.31 0.25 C A B 16X B 7.6 7.4 NOTE 4 2.65 MAX 0.33 TYP 0.10 SEE DETAIL A 0.25 GAGE PLANE 0.3 0.1 0 -8 1.27 0.40 DETAIL A (1.4) TYPICAL 4220721/A 07/2016 NOTES: 1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm, per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm, per side. 5. Reference JEDEC registration MS-013. www.ti.com EXAMPLE BOARD LAYOUT DW0016A SOIC - 2.65 mm max height SOIC 16X (2) SEE DETAILS SYMM 16 1 16X (0.6) SYMM 14X (1.27) 9 8 R0.05 TYP (9.3) LAND PATTERN EXAMPLE SCALE:7X METAL SOLDER MASK OPENING SOLDER MASK OPENING 0.07 MAX ALL AROUND METAL 0.07 MIN ALL AROUND SOLDER MASK DEFINED NON SOLDER MASK DEFINED SOLDER MASK DETAILS 4220721/A 07/2016 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN DW0016A SOIC - 2.65 mm max height SOIC 16X (2) SYMM 1 16 16X (0.6) SYMM 14X (1.27) 9 8 R0.05 TYP (9.3) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:7X 4220721/A 07/2016 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. 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