Texas Instruments | Family of Low-Power Wide Bandwidth Single Supply Op Amps with Shutdown (Rev. D) | Datasheet | Texas Instruments Family of Low-Power Wide Bandwidth Single Supply Op Amps with Shutdown (Rev. D) Datasheet

Texas Instruments Family of Low-Power Wide Bandwidth Single Supply Op Amps with Shutdown (Rev. D) Datasheet
TLV2620, TLV2621
TLV2622, TLV2623
TLV2624, TLV2625
www.ti.com
SLOS251D – DECEMBER 2000 – REVISED JANUARY 2005
FAMILY OF LOW-POWER WIDE BANDWIDTH SINGLE SUPPLY
OPERATIONAL AMPLIFIERS WITH SHUTDOWN
FEATURES
•
•
Operational Amplifier
+
−
DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE
vs
FREQUENCY
120
VDD = 2.7 V and 5 V
RL= 2 kΩ
CL = 10 pF
TA = 25° C
110
100
90
80
180
70
150
120
Phase
60
50
90
40
60
30
30
20
0
−30
Gain
10
Phase Margin − °
•
•
CMOS Rail-To-Rail Output
VICR Includes Positive Rail
Wide Bandwidth . . . 11 MHz
Slew Rate . . . 10 V/µs
Supply Current . . . 800 µA/Channel
Input Noise Voltage . . . 27 nV/√Hz
Ultralow Power-Down Mode:
IDD(SHDN) = 4 µA/Channel
Supply Voltage Range . . . 2.7 V to 5.5 V
Specified Temperature Range:
-40°C to 125°C . . . Industrial Grade
Ultrasmall Packaging:
5 or 6 Pin SOT-23 (TLV2620/1)
8 or 10 Pin MSOP (TLV2622/3)
Universal Opamp EVM (See SLOU060 for More
Information)
A VD − Differential Voltage Amplification − dB
•
•
•
•
•
•
•
0
−60
−10
10
−90
100
1k
10k 100k 1M
f − Frequency − Hz
10M
DESCRIPTION
The TLV262x single supply operational amplifiers provide rail-to-rail output with an input range that includes the
positive rail. The TLV262x takes the minimum operating supply voltage down to 2.7 V over the extended
industrial temperature range (-40°C to 125°C) while adding the rail-to-rail output swing feature. The TLV262x
also provides 11-MHz bandwidth from only 800 µA of supply current. The maximum recommended supply
voltage is 5.5 V, which, when coupled with a 2.7-V minimum, allows the devices to be operated from lithium ion
cells. The combination of wide bandwidth, low noise, and low distortion makes it ideal for high speed and high
resolution data converter applications. The positive input range allows it to directly interface to positive rail
referred systems. All members are available in PDIP and SOIC with the singles in the small SOT-23 package,
duals in the MSOP, and quads in the TSSOP package.
The 2.7-V operation makes it compatible with Li-Ion powered systems and the operating supply voltage range of
many micro-power micro-controllers available today including TI's MSP430.
AMPLIFIER SELECTION TABLE
DEVICE
VDD
[V]
IDD/ch
[µA]
VIO
[µV]
IIB
[pA]
VICR
[V]
GBW
[MHz]
SLEW RATE
[V/µs]
Vn, 1 kHz
[nV/√Hz]
IO
[mA]
SHUTDOWN
TLV262x
2.7-5.5
750
250
TLV263x
2.7-5.5
750
250
1
1 V to VDD + 0.2
11
10
27
28
Y
1
GND to VDD - 0.8
10
9
27
28
TLV278x
1.8-3.6
650
Y
250
2.5
-0.2 to VDD + 0.2
8
5
9
10
Y
TLC07x
4.5 - 16
TLC08x
4.5 - 16
1900
60
1.5
0.5 to VDD - 0.8
10
19
7
55
Y
1900
60
3
GND to VDD - 1
10
19
8.5
55
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2000–2005, Texas Instruments Incorporated
TLV2620, TLV2621
TLV2622, TLV2623
TLV2624, TLV2625
www.ti.com
SLOS251D – DECEMBER 2000 – REVISED JANUARY 2005
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
TLV2620 AND TLV2621 AVAILABLE OPTIONS (1)
PACKAGED DEVICES
VIOmax AT
25°C
TA
-40°C to 125°C
(1)
(2)
(3)
3500 µV
SOT-23
SMALL OUTLINE
(D) (2)
(DBV) (3)
SYMBOL
TLV2620ID
TLV2621ID
TLV2620IDBV
TLV2621IDBV
VBAI
VBBI
PLASTIC DIP (P)
TLV2620IP
TLV2621IP
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2620IDR).
The SOT23 package devices are only available taped and reeled. The R Suffix denotes quantities (3,000 pieces per reel). For smaller
quantities (250 pieces per mini-reel), add a T suffix to the part number (e.g. TLV2620IDBVT).
TLV2622 AND TLV2623 AVAILABLE OPTIONS (1)
PACKAGED DEVICES
TA
VIOmax AT
25°C
-40°C to 125°C
(1)
(2)
3500 µV
SMALL
OUTLINE (2)
(D)
(DGK) (2)
MSOP
TLV2622ID
TLV2623ID
TLV2622IDGK
—
SYMBOL
(DGS) (2)
xxTIAKM
—
—
TLV2623IDGS
SYMBOL
PLASTIC
DIP (N)
PLASTIC
DIP
(P)
—
xxTIALC
—
TLV2623IN
TLV2622IP
—
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2622IDR).
TLV2624 AND TLV2625 AVAILABLE OPTIONS (1)
(1)
(2)
2
TA
VIOmax
AT 25°C
-40°C to 125°C
3500 µV
PACKAGED DEVICES
SMALL OUTLINE
(D) (2)
PLASTIC DIP
(N)
TSSOP
(PW)
TLV2624ID
TLV2625ID
TLV2624IN
TLV2625IN
TLV2624IPW
TLV2625IPW
For the most current package and ordering information, see the Package Option Addendum at the
end of this document, or see the TI website at www.ti.com.
This package is available taped and reeled. To order this packaging option, add an R suffix to the
part number (e.g., TLV2624IDR).
TLV2620, TLV2621
TLV2622, TLV2623
TLV2624, TLV2625
www.ti.com
SLOS251D – DECEMBER 2000 – REVISED JANUARY 2005
TLV262X PACKAGE PINOUTS(1)
TLV2620
D OR P PACKAGE
(TOP VIEW)
TLV2620
DBV PACKAGE
(TOP VIEW)
OUT
1
6
VDD
GND
2
5
SHDN
IN+
3
4
IN −
TLV2621
D OR P PACKAGE
(TOP VIEW)
NC
IN−
IN+
GND
1
8
2
7
3
6
4
5
NC
VDD
OUT
NC
1
14
2
13
3
12
4
11
5
10
6
9
7
8
1
8
2
7
3
6
4
5
SHDN
VDD
OUT
NC
OUT
1
GND
2
IN+
3
1OUT
1IN−
1IN+
GND
1
8
2
7
3
6
4
5
1OUT
1IN−
1IN+
GND
1SHDN
VDD
2OUT
2IN−
2IN+
TLV2624
D, N, OR PW PACKAGE
(TOP VIEW)
VDD
2OUT
2IN−
2IN+
NC
2SHDN
NC
1OUT
1IN−
1IN+
VDD
2IN+
2IN−
2OUT
1
14
2
13
3
12
4
11
5
10
6
9
7
8
5
VDD
4
IN −
TLV2623
DGS PACKAGE
(TOP VIEW)
TLV2622
D, DGK, OR P PACKAGE
(TOP VIEW)
TLV2623
D OR N PACKAGE
(TOP VIEW)
1OUT
1IN−
1IN+
GND
NC
1SHDN
NC
NC
IN−
IN+
GND
TLV2621
DBV PACKAGE
(TOP VIEW)
1
2
3
4
5
10
9
8
7
6
VDD
2OUT
2IN−
2IN+
2SHDN
TLV2625
D, N, OR PW PACKAGE
(TOP VIEW)
1OUT
1IN−
1IN+
VDD
2IN+
2IN−
2OUT
1/2SHDN
4OUT
4IN−
4IN+
GND
3IN+
3IN−
3OUT
NC − No internal connection
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
4OUT
4IN−
4IN+
GND
3IN+
3IN−
3OUT
3/4SHDN
1/2SHDN Pin (8) controls amplifiers 1 and 2.
3/4SHDN Pin (9) controls amplifiers 3 and 4.
(1)
SOT-23 may or may not be indicated.
TYPICAL PIN 1 INDICATORS
Pin 1
Printed or
Molded Dot
Pin 1
Stripe
Pin 1
Bevel Edges
Pin 1
Molded ”U” Shape
NOTE:
If there is not a Pin 1 indicator, turn device to enable reading the symbol from left to
right. Pin 1 is at the lower left corner of the device.
3
TLV2620, TLV2621
TLV2622, TLV2623
TLV2624, TLV2625
www.ti.com
SLOS251D – DECEMBER 2000 – REVISED JANUARY 2005
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
(2)
VDD
Supply voltage
VID
Differential input voltage
6V
VI
Input voltage range
II
Input current (any input)
IO
Output current
±VDD
(2)
+1 to VDD + 0.2 V
± 10 mA
±40 mA
Continuous total power dissipation
See Dissipation Rating Table
TA
Operating free-air temperature range: I-suffix
TJ
Maximum junction temperature
Tstg
Storage temperature range
-40°C to 125°C
150°C
-65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
(1)
(2)
260°C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values, except differential voltages, are with respect to GND.
DISSIPATION RATING TABLE
PACKAGE
θJC
(°C/W)
θJA
(°C/W)
TA ≤ 25°C
POWER RATING
TA = 125°C
POWER RATING
D (8)
38.3
176
710 mW
142 mW
D (14)
26.9
122.3
1022 mW
204.4 mW
D (16)
25.7
114.7
1090 mW
218 mW
DBV (5)
55
324.1
385 mW
77.1 mW
DBV (6)
55
294.3
425 mW
85 mW
DGK (8)
54.2
259.9
481 mW
96.1 mW
DGS (10)
54.1
259.7
485 mW
97 mW
N (14, 16)
32
78
1600 mW
320.5 mW
P (8)
41
104
1200 mW
240.4 mW
PW (14)
29.3
173.6
720 mW
144 mW
PW (16)
28.7
161.4
774 mW
154.9 mW
RECOMMENDED OPERATING CONDITIONS
VDD
Supply voltage
VICR
Common-mode input voltage range
TA
Operating free-air temperature
Shutdown on/off voltage level (1)
(1)
4
Relative to GND.
Single supply
Split supply
I-suffix
MIN
MAX
2.7
5.5
±1.35
±2.75
1
VDD+0.2
V
-40
125
°C
VIL
VIH
0.4
2
UNIT
V
V
TLV2620, TLV2621
TLV2622, TLV2623
TLV2624, TLV2625
www.ti.com
SLOS251D – DECEMBER 2000 – REVISED JANUARY 2005
ELECTRICAL CHARACTERISTICS
at specified free-air temperature, VDD = 2.7 V, 5 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA (1)
MIN
TYP
MAX
250
3500
UNIT
DC PERFORMANCE
VIO
Input offset voltage
αVIO
Temperature coefficient of
input offset voltage
CMRR
AVD
Common-mode rejection ratio
Large-signal differential voltage
amplification
25°C
VIC = VDD/2, VO = VDD/2,
RS = 50 Ω
VIC = 1 to VDD,
RS = 50 Ω
Full range
4500
25°C
VDD = 2.7 V
VDD = 5 V
VDD = 2.7 V, RL = 2 kΩ,
VO(PP) = 1.7 V
VDD = 5 V, RL = 2 kΩ,
VO(PP) = 4 V
3
25°C
77
Full range
63
25°C
78
Full range
75
25°C
90
Full range
82
25°C
95
Full range
90
µV
µV/°C
98
dB
99
100
dB
100
INPUT CHARACTERISTICS
IIO
25°C
Input offset current
IIB
Input bias current
ri(d)
Differential input resistance
Ci(c)
Common-mode input
capacitance
2
Full Range
VIC = VDD/2, VO = VDD/2,
RS = 50Ω
100
25°C
2
Full Range
f = 1 kHz
50
50
pA
200
25°C
100
GΩ
25°C
8
pF
OUTPUT CHARACTERISTICS
VIC = VDD/2,
IOH = -1 mA
VOH
VIC = VDD/2,
IOL = 1 mA
VDD = 2.7 V
VDD = 5 V
Output current
VDD = 2.7 V
VDD = 5 V
VDD = 2.7 V,
VO = 0.5 V from rail
VDD = 5 V,
VO = 0.5 V from rail
Sourcing
Short-circuit output current
Sinking
(1)
VDD = 5 V
Sourcing
Sourcing
IOS
VDD = 2.7 V
Low-level output voltage
VIC = VDD/2,
IOL = 10 mA
IO
VDD = 5 V
High-level output voltage
VIC = VDD/2,
IOH = -10 mA
VOL
VDD = 2.7 V
Sinking
25°C
2.6
Full range
2.55
25°C
4.95
Full range
4.9
25°C
2.3
Full range
2.2
25°C
4.7
Full range
4.6
25°C
2.67
4.98
4.8
0.03
Full range
25°C
0.025
Full range
0.25
0.35
25°C
19
28
VDD = 2.7 V
50
VDD = 5 V
V
14
28
VDD = 2.7 V
0.4
0.45
0.2
Sinking
VDD = 5 V
0.05
0.1
0.26
Full range
25°C
0.1
0.15
Full range
25°C
V
2.43
25°C
95
50
mA
mA
95
Full range is -40°C to 125°C for the I-suffix.
5
TLV2620, TLV2621
TLV2622, TLV2623
TLV2624, TLV2625
www.ti.com
SLOS251D – DECEMBER 2000 – REVISED JANUARY 2005
ELECTRICAL CHARACTERISTICS (continued)
at specified free-air temperature, VDD = 2.7 V, 5 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA (1)
MIN
TYP
MAX
800
1000
UNIT
POWER SUPPLY
IDD
Supply current (per channel)
PSRR
Supply voltage rejection ratio
(∆VDD/∆VIO)
VO = VDD/2,
VDD = 2.7 V to 3.3 V,
VIC = VDD/2
SHDN = VDD
No load
VDD = 2.7 V to 5 V,
VIC = VDD/2
25°C
Full range
1300
25°C
80
Full range
75
25°C
75
Full range
70
µA
98
dB
90
DYNAMIC PERFORMANCE
UGBW
SR+
SR-
Unity gain bandwidth
Positive slew rate at unity gain
RL = 2 kΩ, CL = 10 pF
RL = 2 kΩ, CL = 50 pF
Negative slew rate at unity gain RL = 2 kΩ, CL = 50 pF
φm
Phase margin
Gain margin
25°C
VDD = 2.7 V,
VO(PP) = 1.7 V
VDD = 5 V,
VO(PP) = 3.5 V
VDD = 2.7 V,
VO(PP) = 1.7 V
VDD = 5 V,
VO(PP) = 3.5 V
RL = 2 kΩ, CL = 10 pF
11
25°C
3.5
Full range
2.7
25°C
5.4
Full range
3.4
25°C
2.7
Full range
2.3
25°C
4.5
Full range
3.2
25°C
MHz
4.5
V/µs
7
5
V/µs
6
63°
8
dB
NOISE/DISTORTION PERFORMANCE
THD + N
Total harmonic distortion plus
noise
Vn
Equivalent input noise voltage
In
Equivalent input noise current
VO(PP) = VDD/2,
RL = 2 kΩ, f = 10 kHz
AV = 1
0.002%
AV = 10
0.019%
AV = 100
f = 1 kHz
25°C
0.095%
53
f = 10 kHz
27
f = 1 kHz
0.9
nV/√Hz
fA/√Hz
SHUTDOWN CHARACTERISTICS
Supply current, per channel in
IDD(SHDN) shutdown mode (TLV2620,
TLV2623, TLV2625)
25°C
SHDN = 0.4 V
t(on)
Amplifier turnon time (2)
RL = 2 kΩ
t(off)
Amplifier turnoff time (2)
RL = 2 kΩ
(2)
6
4
Full range
VDD = 2.7 V
VDD = 5 V
13
4.5
25°C
11
1.5
200
µA
µs
ns
Disable time and enable time are defined as the interval between application of the logic signal to SHDN and the point at which the
supply current has reached half its final value.
TLV2620, TLV2621
TLV2622, TLV2623
TLV2624, TLV2625
www.ti.com
SLOS251D – DECEMBER 2000 – REVISED JANUARY 2005
TYPICAL CHARACTERISTICS
TABLE OF GRAPHS
FIGURE
VIO
Input offset voltage
vs Common-mode input voltage
CMRR
Common-mode rejection ratio
vs Frequency
1, 2
VOH
High-level output voltage
vs High-level output current
4, 6
VOL
Low-level output voltage
vs Low-level output current
5, 7
IDD
Supply current
vs Supply voltage
IDD
Supply current
vs Free-air temperature
9
PSRR
Power supply rejection ratio
vs Frequency
10
AVD
Differential voltage amplification & phase
vs Frequency
11
Gain-bandwidth product
vs Free-air temperature
12
vs Supply voltage
13
3
8
SR
Slew rate
φm
Phase margin
vs Load capacitance
16
Vn
Equivalent input noise voltage
vs Frequency
17
vs Free-air temperature
14, 15
Voltage-follower large-signal pulse response
18
Voltage-follower small-signal pulse response
19
Crosstalk
vs Frequency
20
IDD(SHDN)
Shutdown supply current
vs Free-air temperature
21
IDD(SHDN)
Shutdown supply current
vs Supply voltage
22
IDD(SHDN)
Shutdown supply current/output voltage
vs Time
23
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
500
500
VIO − Input Offset Voltage − µ V
400
350
300
250
200
150
100
50
0
VDD = 5 V
TA = 25° C
450
VIO − Input Offset Voltage − µ V
VDD = 2.7 V
TA = 25° C
450
400
350
300
250
200
150
100
50
0
−50
−50
−100
0.0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7
VICR − Common-Mode Input Voltage − V
Figure 1.
−100
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VICR − Common-Mode Input Voltage − V
Figure 2.
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
CMRR − Common-Mode Rejection Ratio − dB
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
120
VDD = 2.7 V and 5 V
TA = 25° C
110
100
90
80
70
60
50
40
30
20
10
0
10
100
1k
10k
100k
f − Frequency − Hz
1M
Figure 3.
7
TLV2620, TLV2621
TLV2622, TLV2623
TLV2624, TLV2625
www.ti.com
SLOS251D – DECEMBER 2000 – REVISED JANUARY 2005
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
2.7
2.1
1.8
1.5
TA = 125°C
1.2
TA = 70°C
0.9
TA = 25°C
TA = 0°C
TA = −40°C
0.6
0.3
2.1
TA = 125°C
1.8
TA = 70°C
1.5
0
0.9
0.6
0.3
5
10
15
20
25
30
35
40
VDD = 5 V
4.5
4.0
3.5
TA = 125°C
3.0
TA = 70°C
2.5
2.0
TA = 25°C
TA = 0°C
TA = −40°C
1.5
1.0
0.5
0.0
0
45
IOH − High-Level Output Current − mA
5
10 15 20 25 30 35 40
IOL − Low-Level Output Current − mA
45
0
10 20 30 40 50 60 70 80 90 100
IOH − High-Level Output Current − mA
Figure 4.
Figure 5.
Figure 6.
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
5.0
1000
1100
4.0
TA = 125°C
3.5
TA = 70°C
3.0
TA = 25°C
TA = 0°C
TA = −40°C
2.5
2.0
TA = 125°C
1000
1.5
1.0
0.5
900
900
I DD − Supply Current − µ A/ch
VDD = 5 V
4.5
I DD − Supply Current − µ A/ch
TA = 70°C
800
TA = 25°C
700
600
TA = 0°C
500
TA = −40°C
400
300
200
A V= 1
VIC = VDD/2
100
0.0
10 20 30 40 50 60 70 80 90 100
IOL − Low-Level Output Current − mA
VDD = 5 V
700
VDD = 2.7 V
600
500
400
300
200
A V= 1
VIC = VDD/2
0
−40 −25 −10 5
0
0
800
100
0 0.5 1.0
1 1.5 2.0
2 2.5 3.0
3 3.5 4.0
4 4.5 5.0
5 5.5 6.0
6
0.0
20 35 50 65 80 95 110 125
VDD − Supply Voltage − V
TA − Free-Air Temperature − °C
Figure 7.
Figure 8.
Figure 9.
POWER SUPPLY REJECTION RATIO
vs
FREQUENCY
DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE
vs
FREQUENCY
GAIN-BANDWIDTH PRODUCT
vs
FREE-AIR TEMPERATURE
PSSR
+
VDD = 2.7 V and 5 V
TA = 25° C
80
PSSR−
70
60
50
40
30
20
10
0
10
100
1k
10k
100k
f − Frequency − Hz
Figure 10.
1M
10M
120
100
90
80
11
180
70
60
12
VDD = 2.7 V and 5 V
RL= 2 kΩ
CL = 10 pF
TA = 25° C
110
150
120
Phase
50
90
40
60
30
30
20
0
−30
Gain
10
0
−60
−10
10
−90
100
1k
10k 100k 1M
f − Frequency − Hz
10M
Gain-Bandwidth Product − MHz
90
A VD − Differential Voltage Amplification − dB
100
Phase Margin − °
VOL − Low-Level Output Voltage − V
TA = 25°C
TA = 0°C
TA = −40°C
1.2
0.0
0.0
PSRR − Power Supply Rejection Ratio − dB
5.0
VDD = 2.7 V
2.4
V OH − High-Level Output Voltage − V
VDD = 2.7 V
2.4
VOL − Low-Level Output Voltage − V
V OH − High-Level Output Voltage − V
2.7
8
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
VDD = 5 V
VDD = 2.7 V
10
9
8
7
6
5
4
3
2
1
RL = 2 kΩ
CL = 10 pF
f = 10 kHz
0
−40 −25 −10 5
20 35 50 65 80 95 110 125
TA − Free-Air Temperature − °C
Figure 11.
Figure 12.
TLV2620, TLV2621
TLV2622, TLV2623
TLV2624, TLV2625
www.ti.com
SLOS251D – DECEMBER 2000 – REVISED JANUARY 2005
SLEW RATE
vs
SUPPLY VOLTAGE
SLEW RATE
vs
FREE-AIR TEMPERATURE
SR+
SR − Slew Rate − V/µs
9
SR−
8
7
6
5
4
3
0
2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6.0
15
14
13
12
11
10
SR+
9
SR−
8
7
6
5
4
3
VDD = 5 V
2
AV = 1
1
V(step) = 1 V to 4.5 V
0
−40 −25 −10 5 20 35 50 65 80 95 110 125
VDD − Supply Voltage − V
TA − Free-Air Temperature − °C
TA − Free-Air Temperature − °C
Figure 13.
Figure 14.
Figure 15.
EQUIVALENT INPUT NOISE
VOLTAGE
vs
FREQUENCY
φ m − Phase Margin − °
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
10
Hz
PHASE MARGIN
vs
LOAD CAPACITANCE
Rnull = 100 Ω
Rnull = 20 Ω
Rnull = 0 Ω
VDD = 2.7 V and 5 V
RL = 2 kΩ
AV = 1
TA = 25°C
100
CL − Load Capacitance − pF
300
V n − Equivalent Input Noise Voltage − nV/
500
VDD = 2.7 V and 5 V
TA = 25° C
450
400
350
300
250
200
150
100
50
0
10
100
Figure 16.
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
9
5
8
4
7
3
6
2
VIC
5
4
3
2
1
1
VO
VDD = 5 V
VIC = 3.5 V
RL = 2 kΩ
CL = 10 pF
AV = 1
TA = 25°C
0
0
−0.10.00.10.20.30.40.50.60.70.80.91.01.11.21.31.4
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4
t − Time − µs
Figure 18.
1k
10k
f − Frequency − Hz
100k
Figure 17.
VOLTAGE-FOLLOWER SMALL-SIGNAL
PULSE RESPONSE
2.80
2.60
2.75
2.55
2.70
2.65
V O − Output Voltage − V
1
AV = 1
V(step) = 1 V to 2 V
TA = 25° C
V IC − Common-Mode Input Voltage − V
2
V O − Output Voltage − V
SR − Slew Rate − V/µs
10
15
14
13
12
11
10
SR+
9
SR−
8
7
6
5
4
3
VDD = 2.7 V
2
AV = 1
1
V(step) = 1 V to 2.2 V
0
−40 −25 −10 5 20 35 50 65 80 95 110 125
VIC
2.60
VDD = 5 V
VIC = 100 mV
RL = 2 kΩ
CL = 10 pF
AV = 1
TA = 25°C
2.50
2.45
2.40
2.55
2.50
VO
V IC − Common-Mode Input Voltage − V
11
SR − Slew Rate − V/µs
12
SLEW RATE
vs
FREE-AIR TEMPERATURE
2.45
2.40
−0.10.0
0.0 0.1 0.2 0.3 0.4
0.40.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
1.2
t − Time − µs
Figure 19.
9
TLV2620, TLV2621
TLV2622, TLV2623
TLV2624, TLV2625
www.ti.com
SLOS251D – DECEMBER 2000 – REVISED JANUARY 2005
0
−20
Crosstalk − dB
−40
−60
VDD = 2.7 V and 5 V
RL = 2 kΩ
CL = 10 pF
AV = 1
VO(PP) = VDD/2
TA = 25°C
All Channels
−80
−100
Shutdown Crosstalk
−120
−140
10
Crosstalk
100
1k
10k
f − Frequency − Hz
100k
4.0
Shutdown = 0
V
AV = 1
VIC = VDD/2
VDD = 5 V
3.5
3.0
2.5
2.0
1.5
VDD = 3.6 V
1.0
VDD = 2.7 V
0.5
0.0
−40 −25 −10 5
SHUTDOWN SUPPLY CURRENT
vs
SUPPLY VOLTAGE
I DD(SD) − Shutdown Supply Current − µ A/ch
SHUTDOWN SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
I DD(SD) − Shutdown Supply Current − µ A/ch
CROSSTALK
vs
FREQUENCY
5.0
4.5
4.0
3.5
2.0
1.0
0.0
20 35 50 65 80 95 110 125
Figure 21.
Figure 22.
SD − Shutdown Pulse − V
I DD(SD) − Shutdown Supply Current − µ A V O − Output Voltage − mV
VDD = 5 V
AV = 1
RL = 2 kΩ
CL = 10 pF
VIC = VDD/2
TA = 25° C
0.5
IDD(SD)
1.5
2.0
2
3
4
5
t − Time − µs
Figure 23.
10
TA = 125°C
0.0
0 0.5 1.0
1 1.5 2.0
2 2.5 3.0
3 3.5 4.0
4 4.5 5.0
5 5.5 6.0
6
VDD − Supply Voltage − V
VO
1
TA = −40°C
0.5
SD
0
TA = 0°C
1.5
0.0
1.0
TA = 25°C
2.5
SHUTDOWN SUPPLY CURRENT/OUTPUT VOLTAGE
vs
TIME
2.5
2.0
1.5
1.0
0.5
0.0
TA = 70°C
3.0
TA − Free-Air Temperature − °C
Figure 20.
5.0
4.0
3.0
2.0
1.0
0.0
Shutdown = 0
V
AV = 1
VIC = VDD/2
6
7
8
9
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TLV2620IDBVR
ACTIVE
SOT-23
DBV
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
VBAI
TLV2620IDBVT
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
VBAI
TLV2620IDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2620I
TLV2621IDBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
VBBI
TLV2621IDBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
VBBI
TLV2621IDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2621I
TLV2622ID
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2622I
TLV2622IDGKR
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
AKM
TLV2622IDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2622I
TLV2623IDGS
ACTIVE
VSSOP
DGS
10
80
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
ALC
TLV2623IDGSR
ACTIVE
VSSOP
DGS
10
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
ALC
TLV2624ID
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2624I
TLV2624IDR
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2624I
TLV2624IPW
ACTIVE
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2624I
TLV2624IPWG4
ACTIVE
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2624I
TLV2624IPWR
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2624I
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Aug-2017
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
TLV2620IDBVR
SOT-23
DBV
6
3000
180.0
TLV2620IDBVT
SOT-23
DBV
6
250
TLV2620IDR
SOIC
D
8
2500
TLV2621IDBVR
SOT-23
DBV
5
TLV2621IDBVT
SOT-23
DBV
B0
(mm)
K0
(mm)
P1
(mm)
9.0
3.15
3.2
1.4
4.0
180.0
9.0
3.15
3.2
1.4
330.0
12.4
6.4
5.2
2.1
3000
180.0
9.0
3.15
3.2
5
250
180.0
9.0
3.15
W
Pin1
(mm) Quadrant
8.0
Q3
4.0
8.0
Q3
8.0
12.0
Q1
1.4
4.0
8.0
Q3
3.2
1.4
4.0
8.0
Q3
TLV2621IDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TLV2622IDGKR
VSSOP
DGK
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
TLV2622IDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TLV2623IDGSR
VSSOP
DGS
10
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
TLV2624IDR
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
TLV2624IPWR
TSSOP
PW
14
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Aug-2017
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TLV2620IDBVR
SOT-23
DBV
6
3000
182.0
182.0
20.0
TLV2620IDBVT
SOT-23
DBV
6
250
182.0
182.0
20.0
TLV2620IDR
SOIC
D
8
2500
340.5
338.1
20.6
TLV2621IDBVR
SOT-23
DBV
5
3000
182.0
182.0
20.0
TLV2621IDBVT
SOT-23
DBV
5
250
182.0
182.0
20.0
TLV2621IDR
SOIC
D
8
2500
340.5
338.1
20.6
TLV2622IDGKR
VSSOP
DGK
8
2500
358.0
335.0
35.0
TLV2622IDR
SOIC
D
8
2500
340.5
338.1
20.6
TLV2623IDGSR
VSSOP
DGS
10
2500
358.0
335.0
35.0
TLV2624IDR
SOIC
D
14
2500
333.2
345.9
28.6
TLV2624IPWR
TSSOP
PW
14
2000
367.0
367.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
DBV0006A
SOT-23 - 1.45 mm max height
SCALE 4.000
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
1.75
1.45
PIN 1
INDEX AREA
1
0.1 C
B
A
6
2X 0.95
1.9
1.45 MAX
3.05
2.75
5
2
4
0.50
6X
0.25
0.2
C A B
3
(1.1)
0.15
TYP
0.00
0.25
GAGE PLANE
8
TYP
0
0.22
TYP
0.08
0.6
TYP
0.3
SEATING PLANE
4214840/B 03/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.15 per side.
4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation.
5. Refernce JEDEC MO-178.
www.ti.com
EXAMPLE BOARD LAYOUT
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
2
5
3
4
2X (0.95)
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214840/B 03/2018
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
2
5
3
4
2X(0.95)
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214840/B 03/2018
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
DBV0005A
SOT-23 - 1.45 mm max height
SCALE 4.000
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
1.75
1.45
PIN 1
INDEX AREA
1
0.1 C
B
A
5
2X 0.95
1.9
1.45
0.90
3.05
2.75
1.9
2
4
0.5
5X
0.3
0.2
3
(1.1)
C A B
0.15
TYP
0.00
0.25
GAGE PLANE
8
TYP
0
0.22
TYP
0.08
0.6
TYP
0.3
SEATING PLANE
4214839/E 09/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
www.ti.com
EXAMPLE BOARD LAYOUT
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
2X (0.95)
3
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214839/E 09/2019
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
2X(0.95)
4
3
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214839/E 09/2019
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
DGS0010A
VSSOP - 1.1 mm max height
SCALE 3.200
SMALL OUTLINE PACKAGE
C
5.05
TYP
4.75
SEATING PLANE
PIN 1 ID
AREA
A
0.1 C
10
1
3.1
2.9
NOTE 3
8X 0.5
2X
2
5
6
B
10X
3.1
2.9
NOTE 4
SEE DETAIL A
0.27
0.17
0.1
C A
1.1 MAX
B
0.23
TYP
0.13
0.25
GAGE PLANE
0 -8
0.15
0.05
0.7
0.4
DETAIL A
TYPICAL
4221984/A 05/2015
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-187, variation BA.
www.ti.com
EXAMPLE BOARD LAYOUT
DGS0010A
VSSOP - 1.1 mm max height
SMALL OUTLINE PACKAGE
10X (0.3)
10X (1.45)
(R0.05)
TYP
SYMM
1
10
SYMM
8X (0.5)
6
5
(4.4)
LAND PATTERN EXAMPLE
SCALE:10X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4221984/A 05/2015
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DGS0010A
VSSOP - 1.1 mm max height
SMALL OUTLINE PACKAGE
10X (1.45)
10X (0.3)
SYMM
1
(R0.05) TYP
10
SYMM
8X (0.5)
6
5
(4.4)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:10X
4221984/A 05/2015
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
D0008A
SOIC - 1.75 mm max height
SCALE 2.800
SMALL OUTLINE INTEGRATED CIRCUIT
C
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
A
.004 [0.1] C
PIN 1 ID AREA
6X .050
[1.27]
8
1
2X
.150
[3.81]
.189-.197
[4.81-5.00]
NOTE 3
4X (0 -15 )
4
5
B
8X .012-.020
[0.31-0.51]
.010 [0.25]
C A B
.150-.157
[3.81-3.98]
NOTE 4
.069 MAX
[1.75]
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
[0.11-0.25]
0 -8
.016-.050
[0.41-1.27]
DETAIL A
(.041)
[1.04]
TYPICAL
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
SEE
DETAILS
1
8
8X (.024)
[0.6]
6X (.050 )
[1.27]
SYMM
5
4
(R.002 ) TYP
[0.05]
(.213)
[5.4]
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
METAL
SOLDER MASK
OPENING
EXPOSED
METAL
.0028 MAX
[0.07]
ALL AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
EXPOSED
METAL
.0028 MIN
[0.07]
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
1
8
8X (.024)
[0.6]
6X (.050 )
[1.27]
SYMM
5
4
(R.002 ) TYP
[0.05]
(.213)
[5.4]
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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