Texas Instruments | Low-side current shunt op-amp circuit to 3-V single-ended ADC for cost-optimized | Application notes | Texas Instruments Low-side current shunt op-amp circuit to 3-V single-ended ADC for cost-optimized Application notes

Texas Instruments Low-side current shunt op-amp circuit to 3-V single-ended ADC for cost-optimized Application notes
Analog Engineer's Circuit: Data
Converters
SBAA353 – June 2019
Low-side current shunt op-amp circuit to single-ended
ADC for cost-optimized monitor
Art Kay, Joseph Wu
Input
ADC Input
Digital Output TLA2024
0.217A
0.1V
021h or 33d
10A
4.6V
5FDh or 1533d
Power Supplies
Supply to Monitor
VDD
15V
5V
Design Description
This design shows a low-side current shunt monitor built using an op amp and a discrete differentialamplifier configuration. This design provides good accuracy at a relatively low cost. The TLV333 op amp is
a zero-drift type amplifier so the offset and drift are very low. This allows a low-resistance shunt resistor to
be used which minimizes the power dissipated in the shunt resistor and consequently, a physically smaller
shunt resistor can be used. The TLA2024 (or TLA2021 for single channel) is used as it is a low-cost, 12bit delta-sigma data converter. This implementation of a current monitor circuit is useful where cost is a
concern, but accuracy is still important. Some possible applications are personal electronics, appliances,
and building automation.
+15V
Load
+5V
Rg2
1.5kŸ
Rsh
1mŸ
Cf2
22nF
TLV333 R 1kŸ
out
Rf2
690kŸ
++
-
+5V
+5V C2 0.1µF
C1 0.1µF
Cout
15nF
R1
Ref
R2
SCL
2
Mux
PGA
Rg11.5kŸ Rf1 690kŸ
ADC
IC
SDA
ADDR
Osc
TLA2024
Cf1 22nF
SBAA353 – June 2019
Submit Documentation Feedback
Low-side current shunt op-amp circuit to single-ended ADC for costoptimized monitor
Copyright © 2019, Texas Instruments Incorporated
1
www.ti.com
Specifications
Specification
Goal
Calculated
Input range
±6.144V
Resolution
6.144/211 = 3mV (1 LSB)
Simulated
Bandwidth
> 100Hz
761Hz
1.1kHz
Noise
< 1 LSB
891µVrms (5.35mVpp)
889µVrms (5.33mVpp)
Range
0A to 10A
0.2A to 10A
0A to 10A
Design Notes
1. For the lowest distortion use C0G capacitors for all filters (Cf1, Cf2, Cout).
2. The ADC used in this reference design has four channels. The other channels may be used for other
monitor activities. If only one channel is required, use the TLA2021 device. Note: the TLA2021 device
does not have an internal PGA.
3. The input impedance of the delta-sigma device is dependent on the PGA setting. In this reference
design, ±6.144-V range is used and the corresponding common-mode input impedance is 10MΩ and
the differential impedance is 22MΩ. The combined input impedance for a single-ended input is the
parallel combination of the two (10MΩ||22MΩ). The output resistance of the amplifier and the output
resister Rout form a voltage divider with the ADC input resistance (Error = [1 – 6.88M / (6.88M + 1kΩ)] •
100 ≈ 0.015%).
4. The amplifier used in this design was selected as a low-cost, low-input offset voltage amplifier. In
general, cost is further reduced by selecting an amplifier with a higher offset (TLV9062). Use the
Component Selection section to confirm that the system errors meet your requirements when selecting
different amplifiers. The Single-supply, low-side, unidirectional current-sensing circuit application report
covers a similar design.
5. Gain error and gain drift for this circuit is dominated by the external resistors Rf1, Rf2, Rg1, and Rg2.
For the highest accuracy, use 0.1% and for lower cost use 1%. The Using SPICE Monte Carlo Tool for
Statistical Error Analysis video describes a method for statistically estimating the gain error for the
system.
6. In this example, the output range of the amplifier was adjusted to 4.6V and the ADC range was
adjusted to ±6.144V. To maximize the ADC range, adjust the amplifier full scale output. For example,
the ADC has a ±4.096-V range, so the full-scale output of the amplifier can be adjusted to match this
range.
7. When using the multiplexer to cycle through multiple measurements, it is best run the device in singleshot conversion mode. Timing the configuration of the device and the readback of the ADC can be
complicated in continuous-conversion mode.
2
Low-side current shunt op-amp circuit to single-ended ADC for costoptimized monitor
Copyright © 2019, Texas Instruments Incorporated
SBAA353 – June 2019
Submit Documentation Feedback
www.ti.com
Component Selection
1. Choose the Rsense resistor and find the gain for the current-sense amplifier (bidirectional current)
P
100mW
Rsh = shMax 2 =
= 1.0m W
(I shMax )
(10A)2
V shMax =
Gopa =
PshMax 100mW
=
= 10mV
I shMax
10A
V out(range)
V shMax
=
4.6V
= 460V / V
10mV
Select Rf = 690kΩ, and Rg = 1.5kΩ for the inverting gain of –460V / V using the Analog Engineer's
Calculator or
G opa =
-R f
Rg
=
- 690 k W
= - 460V / V
1.5 k W
2. Confirm the minimum and maximum output
(
)
VOPA max = Gopa × I load(max) × R sh = 460V / V × (10A × 1m W ) = 4.6 V
(
)
VOPA min(Ideal) = Gopa × I load(min) × R sh = 460V / V × (0.0A) × (1m W ) = 0.0 mV
VOPA min(lim it) = 100 mV from the Aol linear range specification for the TLV333 device
Look at the test condition if the Aol specification to find the linear range.
Aol test condition: (V–) + 0.1 V < VO < (V+) – 0.1 V
3. Offset error impact on system error:
MaxError =
Vos × Gain
15 m V × 460
× 100 =
× 100 = ± 0.15%
VOPA max
4.6 V
4. This system has a dead zone because of the amplifier output swing limit. The amplifier output will not
respond from 0A to IDeadZone.
See the "optional level-shift" for a method to avoid this limitation.
I DeadZone
æ VOPA min(lim it)
ç
ç
Gopa
=è
R sh
I DeadZone (%) =
I DeadZone
I shMax
ö
÷ æ 0.1V ö
÷ ç 460 ÷
ø=è
ø = 0.22mA
1.0m W
× 100 =
0.22mA
× 100 = 2.22%
10 A
5. Selection of Rin to limit input current under transient condition. Choose Iin(Max) = 10mA from absolute
maximum ratings.
R in =
VinMax
15 V
=
= 1.5 k W
I max
10 mA
6. Selection of the different capacitors (rounded down to standard value). Note: the amplifier bandwidth is
approximately 761Hz (GBP / G = 350kHz / 460 = 761Hz). The bandwidth of the external filters was set
to approximately 10 × the amplifier cutoff.
1
1
Cf =
=
= 23.1pF » 22nF
2p × fc × R f
2p × 10 kHz × 690 k W
C out =
1
1
=
= 15.9 nF » 15 nF
2p × fc × R out 2p × 10 kHz × 1k W
SBAA353 – June 2019
Submit Documentation Feedback
Low-side current shunt op-amp circuit to single-ended ADC for costoptimized monitor
Copyright © 2019, Texas Instruments Incorporated
3
www.ti.com
DC Transfer Characteristics
The DC transfer function for the amplifier linear for currents is from 0.213A to 10A. The output is not
accurate for currents from 0A to 0.213A (0-V to 0.1-V output) because the linear output swing limitation is
violated. The region from 0A to 0.213A is referred to as a dead zone as the output is not accurate in this
region. A circuit modification shown at the end of this document can be used to eliminate the dead zone.
AC Transfer Characteristics
The gain bandwidth product for the TLV333 device is 350kHz. In a gain of 460, the bandwidth should be
approximately 350kHz / 460 = 761Hz. Simulated results show a bandwidth of about 1.1kHz. Note that the
external filters are all set to a frequency of about 10kHz, this is why the frequency response has two
different slopes. The bandwidth of this circuit can be adjusted by selecting a wider bandwidth amplifier and
adjusting the external filters. Be careful; however, when selecting an amplifier to look at offset voltage,
common-mode range, and swing as the Component Selection section of this document shows. See the TI
Precision Labs - Op Amps: Bandwidth video series for more details.
4
Low-side current shunt op-amp circuit to single-ended ADC for costoptimized monitor
Copyright © 2019, Texas Instruments Incorporated
SBAA353 – June 2019
Submit Documentation Feedback
www.ti.com
Transient ADC Input Settling Simulation
The simulated response to a 9-A (1A to 10A, or 1mV to 9mV) step is shown. It takes 1.15ms for the
simulated step to settle to ½ LSB. The input step voltage is 9mV, so the step response is a small signal
step and is limited by bandwidth (rise time tr = 0.35 / fc = 0.35 / 1.1kHz = 318µs).
Noise Simulation
The following simplified noise calculation is provided as a rough estimate of total noise. The resistor noise
is neglected as the amplifier noise is high compared to the resistor noise (55nV / √Hz vs about 4nV / √Hz
from 1-kΩ resistors). Also, the bandwidth is estimated at 1.1kHz 3rd order, but the actual filter is more
complex.
En = Gn × e n × K n × fc
En = 460 × 55 nV /
Hz × 1.13 × 1.1kHz = 891mVRMS
Note that calculated and simulated match well. See the TI Precision Labs - Op Amps: Noise video series
for detailed theory on amplifier noise calculations, and Calculating the Total Noise for ADC Systems for
data converter noise. For an estimate of peak-to-peak noise, multiply by six (Epp(simulated) = 6 • 891µV =
5.35mVpp). Note that the peak-to-peak noise is approximately the size of 1 LSB (1 LSB = 3mV).
T
889u
En = 889µVRMS
593u
VADC_in
296u
0
1
SBAA353 – June 2019
Submit Documentation Feedback
10
100
1k
10k
Frequency (Hz)
100k
1MEG
Low-side current shunt op-amp circuit to single-ended ADC for costoptimized monitor
Copyright © 2019, Texas Instruments Incorporated
5
www.ti.com
PCB Layout
The PCB layout gives a general sense of the size of the layout. A 1206 resistor footprint was used for the
0.25-W, 1-mΩ shunt. Notice that the voltage across the shunt is measured directly at the ends of the
resistor. This is called a Kelvin connection and eliminates errors from parasitic resistance in the current
path.
380mil (9.65mm)
+5V
Load Current
GND
SCL
SDA
+5V
R1
R1
SCL
SDA
Cf2
GND
C1
Rf2
GND
C2
Rg2
ADDR
1
GND
High-Current
Path
1-PŸ
Shunt
1206
5
+V
+
-
-V
3
4
NC
VDD
GND
AIN3
AIN0
AIN2
+5V
To Other
Meas.
260mil
6.60mm
AIN1
Rout
Rf1
To Other
Meas.
Rg1
Cf1
Cout
GND
GND
GND
Optional Level Shift
As previously mentioned, the amplifier output swing is limited for output voltages from 0V to 0.1V. One
way to eliminate this problem is to shift the output so that the output is 0.1V when 0A is flowing. For a
differential-amp configuration, the offset shift can be accomplished by connecting Rf2 to a reference
voltage. In this example, a 0.1-V reference voltage is used to provide a linear output from 0.1V to 4.7V for
a 0A to 10A input. A larger reference voltage, such as 2.5V, could be used to read bidirectional current
(–5A to +5A gives 0.2V to 4.8V out with a 2.5-V reference).
+15 V
Load
Rg2
1.5 NŸ
0 A to 10 A
+5V
VR
0.1 V
C1 0.1 µF
Rf2
690 NŸ
+
TLV333
+
Rsh
1PŸ
Cf2
22 nF
±
Rg1 1.5 NŸ
Rout 1 NŸ
Cout
15 nF
Vout = G×Vin + VR
= 460×Vin + 0.1 V
0.1 V to 4.7 V
Rf1 690 NŸ
Cf1 22 nF
6
Low-side current shunt op-amp circuit to single-ended ADC for costoptimized monitor
Copyright © 2019, Texas Instruments Incorporated
SBAA353 – June 2019
Submit Documentation Feedback
www.ti.com
Measurement Conversion
Conversions for the shunt measurements are relatively straightforward based on the gain of the shunt
resistor voltage and the full-scale range of the ADC. The output voltage of the TLV333 device is calculated
with the following:
V AIN0 = I shunt × R shunt × G ain = I shunt × (1m W ) × (460 V / V )
At the same time, the ADC measurement is converted to the output voltage:
OutputCode =
VAIN0 =
211 × VAIN0 211 × VAIN0
=
Vrange
6.144 V
OutputCode × 6.144 V
211
Converting the output code to the shunt current:
I shun t =
OutputCode × 6.144 V
211 × 1m W × 460
= (6.52174 m A ) × OutputCode
Register Settings
The following table shows how to configure the registers in the TLA2024 for this example circuit.
Bit
Field
Value
Description
15
OS
1
Start a single conversion
14:12
MUX [2:0]
100
AINP = AIN0, AINN = GND
11:9
PGA [2:0]
000
FSR = ±6.144V
8
MODE
1
Single-shot conversion mode
7:5
DR [2:0]
111
DR = 3300SPS
4:0
Reserved
00011
Always write 03h
Pseudocode Example
The following example shows a pseudocode sequence with the required steps to set up the device and
the microcontroller that interfaces to the ADC to take subsequent readings from the TLA2024 in singleshot conversion mode. Data is taken by using the maximum data period, allowing for time to wake up the
device, configure the ADC, take a single conversion, and set up other ADC measurements. Other
measurement channels are similarly used with a write to the configuration register and start of a
conversion, wait for the conversion to complete, and a read back of the conversion.
Configure microcontroller for I2C communication, I2C address=1001000 (48h)
Loop
{
Send 90h 01h C1h E3h //
// Start write to address 48h, write bit 0 (90h)
// Configuration register 01h
// Set C1E3h, AIN0-GND, FSR=±6.144V, Single-shot conversion, DR=3300SPS, stop
Wait 353us // Wait for data period, +10% for internal oscillator variation, +20us
Send 90h 00h 91h xxh xxh // Read back ADC conversion data
// Start write to address 48h, write bit 0 (90h)
// Conversion register 00h, stop
// Start read from address 48h, read bit 1 (91h)
// Read back 2 bytes, stop
}
SBAA353 – June 2019
Submit Documentation Feedback
Low-side current shunt op-amp circuit to single-ended ADC for costoptimized monitor
Copyright © 2019, Texas Instruments Incorporated
7
www.ti.com
Design Featured Devices
Device
Key Features
Link
Other Possible Devices
TLA2024
Low cost, 12-bit delta-sigma ADC, I2C interface, ultra-small package,
integrated reference
http://www.ti.com/product/TLA2024
http://www.ti.com/adcs
TLV333
Low cost for excellent offset and drift performance, offset 15µV (max),
small package
http://www.ti.com/product/TLV333
http://www.ti.com/opamps
Link to Key Files
Source files for this circuit - http://www.ti.com/lit/zip/SBAC245.
References
See Analog Engineer's Circuit Cookbooks for TI's comprehensive circuit library.
8
Low-side current shunt op-amp circuit to single-ended ADC for costoptimized monitor
Copyright © 2019, Texas Instruments Incorporated
SBAA353 – June 2019
Submit Documentation Feedback
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you
permission to use these resources only for development of an application that uses the TI products described in the resource. Other
reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third
party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims,
damages, costs, losses, and liabilities arising out of your use of these resources.
TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on
ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable
warranties or warranty disclaimers for TI products.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2019, Texas Instruments Incorporated
Was this manual useful for you? yes no
Thank you for your participation!

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project

Related manuals

Download PDF

advertising