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Texas Instruments High-side current sources for industrial applications Application notes
Analog Design Journal
Signal Chain
High-side current sources for
industrial applications
By Ahmed Noeman
System Engineer, Industrial Systems, Freising
Introduction
Table 1. Current-source performance specifications
Parameter
Applicability
The use of current sources in industrial applications is
widespread because the current-based signal provides
higher noise immunity than voltage-based signals in a
harsh industrial environment. Current is used to carry
information signals in 4–20-mA loops and also for excitation of passive sensors like resistors. High-side current
sources are generally trickier to design compared to lowside current sinks. This article introduces and compares
different topologies used to implement a high-side current
source for industrial applications, and includes evaluation
of performance metrics for each topology.
Unit
Minimum and maximum possible
output current
mA
Compliance range
Minimum and maximum output
voltage at which current is valid
V
Maximum supply
Maximum acceptable supply
V
Inaccuracy before carrying any
calibration
%
Temperature drift
Error due to temperature change
(range >100°C)
ppm/°C
Load regulation
Change in output current vs.
change in output voltage
Output noise
Total output noise over certain
bandwidth
nA
PSRR
Power supply rejection ratio
dB
Accuracy
Initial accuracy
Current source parameters and characterization
Bandwidth
Table 1 shows current-source performance metrics, their
definitions, and measurement units. Although it is possible
to eliminate initial inaccuracies through calibration, it is
not possible to compensate for temperature drifts and load
regulation; thus, those drifts will determine the overall
accuracy of the current source. If the current source is
powering a sensor, the power supply rejection ratio (PSRR)
and output impedance will determine the maximum bandwidth at which the current source is working. This is
because the PSRR and output impedance deteriorate with
increasing frequency and add error components to the
measured signal.
In addition to static performance, dynamic performance
must also be considered to ensure the stability of the
current source against perturbation, especially if the
current source will switch during operation or the load
voltage will experience a step transient. The dynamic
performance can be checked by testing the settling time
upon step inputs.
Although some of the parameters in Table 1 can only be
predicted through calculations of component parametrics,
it is also possible to verify many of them through simulation if component models are available. Simulation is a
pretty easy step for verifying a specification within a given
set of conditions.
Figure 1 shows a conceptual current source with
supply-voltage, output-voltage and control-voltage
sources. The majority of current source parameters can be
Texas Instruments
Definition
Output current
range (IOUT)
Output impedance AC output impedance seen from
(ZO)
the output node
Power efficiency
Dynamic
%/ V
Settling time:
• Load step
• Control step
• Supply ramp
Ω
Output current divided by total
current consumed by source
%
Settling time (of the output
current) and stability upon a step
in the load voltage or a step of the
control input (configurable)
ns
Figure 1. Conceptual current source with
different voltage sources
VSUP
+
–
VCC
VCTRL
ZO
VC
+
–
IOUT
VOUT
+
–
1
VO
ADJ 2Q 2019
Analog Design Journal
Signal Chain
A shunt regulator and a MOSFET
verified by conducting various sweeps of those supplies,
which are summarized in Table 2.
Precision shunt regulators are among the most popular
options for obtaining a voltage reference (VREF). Providing
the shunt regulator with a minimum current (IQ) will
ensure that the VREF is applied on the set resistor (RSET)
as shown in Figure 2, where the circuit implementation
uses the TLV431BQ regulator. The parameters calculation
and simulation results are presented in Table 3.
The output current is calculated as IOUT = VREF/RSET.
This circuit provides a cost-effective solution with a
reasonable error that is 1.2% (0.8% + 0.4%) over the
temperature range, and a moderate initial accuracy of
0.7% that can be compensated with resistor trimming.
This circuit is suitable for applications with 7- to 8-bit
resolution. The 100-Ω resistors and 100-nF capacitor
around U1 are necessary for circuit stability. This circuit
can work with a high supply voltage with only some
limited dynamic performance.
Table 2. Current-source performance simulation or prediction
Parameter
Simulation?
Prediction/Verification (Conditions)
Yes
Typically calculated from component
parameters, but can be simulated later
For programmable sources: DC transfer
function; VC swept from 0 to VC_max
Compliance
range
and load
regulation
Yes
DC transfer function analysis: VO swept
from 0 to VCC (fixed VCC and VC)
IOUT change is regulation; limits of
VO at which IOUT exceeds variation is
compliance
Maximum
supply
No
Typically not modeled; calculated from
the maximum supply limit in the data
sheet
Initial
accuracy
No
Requires accurate models and
statistical analysis; generally more
convenient to calculate
Temperature
drift
No
Not commonly supported with models;
requires calculation
Yes
Noise analysis:
One AC source out of the three supplies
(proper DC value for VCC, VC, VO)
IOUT total noise at specific relevant
frequency (fC) represents system
bandwidth
Output
current
range
Output noise
PSRR
Yes
Figure 2. Current source using a shunt regulator
VCC
IQ
100 Ω
M1
AC transfer function analysis:
AC source at VCC; IOUT (AC signal) in
decibels is PSRR
100 nF
U1
Output
impedance
Yes
AC transfer function analysis:
AC source at VO; 1/IOUT (AC) linear is ZO
vs. frequency
RSET
Power
efficiency
Yes
DC operating point analysis:
IOUT/ICC (for specific VCC, VO and VC)
VOUT
Yes
Transient analysis:
• Supply ramp: VCC ramped from zero;
IOUT settling time and behavior is
monitored
• VC step: VC unit step (minimum to
maximum); IOUT settling to final value
• VO step: VO unit step over compliance
range limits; IOUT settling to final value
Settling time
• Load step
• Control
step
• Supply
ramp
RLIM
100 Ω
VREF
M1
U1
VREF
RLIM
RSET
IOUT
VCC
VOUT
IQ
CSD18541F5
TLV431BQ
1.24 V
604 kΩ, 1%
124 Ω, 0.1%
10.01 mA
24 V
12 V
14 µA
IOUT
Table 3. Current-source specifications using a shunt regulator
Parameter
Calculation and/or Simulation Results
Output current
range
Set by M1 max IDS, and M1 max power;
IOUT_max = Pmax_M1/Vdsmax_M1 = 0.5/23 = 21 mA
At lower IOUT, the initial error due to IQ becomes
significant
The next step is to examine some topologies for current
sources. To establish a basis for useful comparison, the
application is limited to a high-side current source that
can work off a 24-V industrial supply, assume a 10-mA
output and 10-kHz bandwidth for noise, calculate the
output impedance at DC and 1 kHz, and assume a
mid­supply (12 V) as the default output voltage.
Compliance range
VOUT_max = VCC – (VREF + VGSTH_M1 + IQ × RLIM)
= 24 – (1.24 + 1.75 + 1.8) ≈ 20 V
Maximum supply
Vmax_M1 = 60 V, then IOUT_max = 8 mA
Initial accuracy
(1 + ∆VREF)/(1 – ∆RSET) + IQ/IOUT =
(1 + 0.005)/0.999 + 0.001 = 0.7%
Temperature drift
∆VREF/VREF = 11 mV/1.24 V = 0.8% over
temperature range
Constant-current sources
Load regulation
0.4% over compliance range, or 2 µA/V
Output noise
5.2 nA over 10 kHz
PSRR
–75 dB at 10 kHz
Output
impedance
588 kΩ at DC, 46.5 kΩ at 1 kHz
Power efficiency
100%
Settling time
Supply ramp: 114 µs (with large overshoot)
Load step (9 V): 700 µs (with large undershoot)
Many applications require a constant-current source that
is stable over supply drift, temperature drift, and output
variations. The basic principle is to use an accurate
voltage reference applied over a precision resistor to
create an accurate current.
Texas Instruments
2
ADJ 2Q 2019
Analog Design Journal
Signal Chain
Shunt regulator and op amp
Table 4. Current-source specifications using a shunt regulator
and op amp
It is possible to eliminate some of the drawbacks of the
circuit shown in Figure 2. Figure 3 shows a current source
that uses a shunt regulator and an operational amplifier
(op amp) to buffer the voltage reference. In this circuit,
IOUT = VREF/RSET and the 80-kΩ resistor ensures that the
shunt regulator gets the minimum required current to turn
on. This circuit can achieve a wide compliance range, veryhigh PSRR and ZO, and excellent load regulation. The
op-amp offset drift and reference drift contribute directly
to the overall accuracy. This topology can achieve very
high accuracy when using precision components. Table 4
lists the performance metrics.
Parameter
Figure 3. Current source using a shunt
regulator and op amp
10 nF
VREF
U1
IQ1
VCC
80 kΩ IQ2
–
U2
+
RSET
IOUT
Texas Instruments
U1
U2
VREF
RSET
IOUT
VCC
VOUT
TLV431BQ
OPA187
1.24 V
124 Ω, 0.1%
10.0 mA
24 V
12 V
Calculation and/or Simulation Results
Output current
range
Set by U2 max IOUT and U2 max power;
IOUT_max < 30 mA
At lower IOUT, the relative error becomes
significant
Compliance
range
VOUT_max = VCC – VREF – VOUT_max_U2
= 24 – 1.24 – 0.5 ≈ 22.25 V
Simulation results 21.25 V
VOUT_min ≈ 0.25 V (IQ goes below limit for U1 to
function)
Maximum supply
Vmax_U2 = 36 V
Initial accuracy
(1 + ∆VREF + VOS_U2)/(1 – ∆RSET) =
(1 + 0.005 + 0.00001)/0.999 = 1%
Temperature drift
∆VREF + ∆VOS_U2/VREF = (11 mV + 5 µV)/1.24 V
= 0.9% over temperature range
Load regulation
0% over compliance range
Output noise
16.4 nA over 10 kHz
PSRR
–95 dB at 10 kHz
Output
impedance
6.5 MΩ at DC, 76 kΩ at 1 kHz
Power efficiency
IOUT/ICC = IOUT/(IOUT + IQ1 + IQ2) = 10/10.25 = 97%
Settling time
Supply ramp: 800 µs (with some overshoot)
Load step (12 V): 250 µs (with undershoot)
VOUT
3
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Analog Design Journal
Signal Chain
Programmable current sources
Table 5. Modified Howland current source specifications
Parameter
To complete the current-source evaluation, there are two
topologies for implementing a programmable high-side
current source with the control voltage referenced to
ground. They are the modified Howland circuit and
cascaded op amps.
Modified Howland circuit
As shown in Figure 4, a Howland circuit has been modified
to have a buffer in the feedback loop. The output current
of this circuit is calculated with Equation 1.
IOUT
AV
=
× VC
RSET
Calculation and/or Simulation Results
Output current
range
Set by U1 max IOUT and max power, IOUT_max < 60 mA
At lower IOUT, the relative error increases
Compliance
range
VOUT_max is set by VIN_U2 and VOUT_max_U1
Simulation : 22.4-V VOUT_min is determined by U1
minimum input (practical value = 0.2 V)
Maximum
supply
Vmax_U1 = 36 V
Initial accuracy [1 + VOS_U1/VC + 2 × VOS_U2 /VC]/(1 – ∆RSET) =
(excluding VC)
(1 + 0.00002 + 0.00005)/0.9999 ≈ 0.02%
(1)
Temperature
drift
where the AV gain is equal to R2/R1.
For the device chosen (the INA592), the gain equals
0.5, resulting in a 5-mA/V conversion gain. This circuit is
quite interesting, as it is capable of driving bipolar (sink or
source) current. The output impedance is proportional to
the mismatch of R1s and R2s; implementing the circuit
with a precision difference amplifier ensures the best
matching for resistors.
The circuit performance is sensitive to source resistance, as the input impedance equals R1||R2 = 4 kΩ in the
given circuit. As shown in Tabel 5, this circuit offers very
good accuracy with a wide compliance range and excellent
dynamic performance. The trade-off is a slight increase in
noise and lower efficiency.
∆VOS_U1/VC + 2 × ∆VOS_U2 /VC = 40 µ + 250 µ = 0.03%
over temperature
Load regulation 0.1% over compliance range
Output noise
17.8 nA over 10 kHz
PSRR
–60 dB at 10 kHz
Output
impedance
3 MΩ at DC, 109 kΩ at 1 kHz
Power
efficiency
IOUT/ICC = IOUT/(IOUT + IQ1 + IQ2) = 10/12.4 = 80%
Settling time
Supply ramp: 6.8 µs (no overshoot)
Load step (12 V): Large undershoot during transition
Output current step (10 mA): Instant settling
Figure 4. Modified Howland current source using a difference amplifier
VCC
IQ1
IN–
SENSE
R1
R2
–
VC
OUT
U1
RSET
IQ2
+
+
–
R1
IN+
R2
VCC
+
U2
–
REF
IOUT
VOUT
Texas Instruments
4
U1
U2
R1
R2
RSET
VC
IOUT
VCC
VOUT
INA592
OPA196
12 kΩ
6 kΩ
100 Ω, 0.01%
2V
10.0 mA
24 V
12 V
ADJ 2Q 2019
Analog Design Journal
Signal Chain
Cascaded op amps
Table 6. Current-source specifications using cascaded op amps
The topology shown in Figure 5 uses a buffer to copy the
control voltage (VC) over to V1, applied on R1 and resulting in I1 current. Then, another buffer copies the V2
voltage to V3 over R3, which establishes the output
current level. The output current is calculated with
Equation 2.
Parameter
Calculation and/or Simulation Results
Set by M2 max power,
IOUT_max = Pmax_M2/VDS_max_M2 = 2.3/22 ≈100 mA
Note that higher current requires lower R1,R2
Lower IOUT is set by U2IN_max
(for this case, 0 mA)
Higher current reduces compliance range
Output current
range
R 2 × VC
(2)
R1 × R3
which results in a 5-mA/V conversion gain. I1 is set to be
0.2 × IOUT.
A lower I1 current means lower power but higher noise.
Error analysis shows that equal offsets of U1 and U2 will
eliminate the op-amp offset error. Using the dual op-amp
package ensures offset tracking between the two op amps.
Feedback capacitors and output resistors (200 ohms for
U1 and 300 ohms for U2) are necessary to maintain circuit
stability.
The trade-off here is between current range and compliance range. For a 1:20 current range, voltage V3 will vary
with the same ratio, so to maintain a few volts over R3
requires that U2 accept a close-to-supply input at a low
current. This circuit offers a wide current range, a wide
compliance range, excellent accuracy, low noise, and very
high output impedance, along with great dynamic performance as shown in Table 6.
IOUT =
VOUT_max is set by U2IN max rather than U1OUT max,
VCC – VIN_max_U2 = 22
Compliance range
VOUT_min is determined by U2 minimum input,
practically value = 0.0 V
Maximum supply
Vmax_U1 = 36 V
Initial accuracy
(excluding VC)
(1 + ∆R2)/(1 – ∆R1)/(1 – ∆R3) = 0.03% for
0.01% resistors, or 0.3% for 0.1% resistors
Temperature drift
By tracking offsets, there is only resistor drift
variation
Load regulation
0% over compliance range
Output noise
9.7 nA over 10 kHz
PSRR
–77 dB at 10 kHz
Output impedance 142 MΩ at DC, 1.35 MΩ at 1 kHz
Power efficiency
IOUT/ICC = IOUT/(IOUT + I1 + IQ1 + IQ2) = 10/14 = 71%
Settling time
Supply ramp: 180 µs (with no overshoot)
Load step (12 V): no settling observed
Output current step (10 mA): 140 µs with no
overshoot (depends on feedback RC)
Figure 5. Current source using cascaded op amps
VCC
VCC
I1
VCC
R3
R2
10 kΩ
IQ1
V3
V2
2.2 nF
+
U1
M1
–
200 Ω
VC
+
–
VCC
IQ2
1 nF
–
V1
10 kΩ
330 Ω
U2
+
M2
IOUT
R1
U1,U2
R1
R2
R3
VC
IOUT
I1
VCC
VOUT
M1
M2
OPA2192
1 kΩ, 0.01%
1 kΩ, 0.01%
200 Ω, 0.01%
2V
10.0 mA
2 mA
24 V
12 V
CSD18541F5
NTF2955
VOUT
References
It is worth noting that there are many other topologies
for current sources that vary in performance and applications, including floating voltage regulators, current drivers
like TI’s XTR300, current-output digital-to-analog converters
like the DAC7760, and of course, current references like
the REF200.
1. Linden T. Harrison, “Current Sources and Voltage
References,” Newnes, 2005.
2. Collin Wells and David F. Chan, “High-Side Voltage-toCurrent (V-I) Converter,” Texas Instruments Precision
Designs: Verified Design (SLAU502), June 2013.
Conclusion
Related Web sites
There are different performance metrics for industrial
current sources and the various topologies require different evaluation and calculation methods. This article
compared the performance of four different topologies
used to implement industrial current sources.
Texas Instruments
Product information:
OPA187, INA592, OPA196, OPA2192, XTR300
DAC7760, REF200
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Analog Design Journal
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