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Texas Instruments AN-1796 LMP7721 Evaluation Board (Rev. C) User guides
User's Guide
SNOA513C – March 2008 – Revised May 2013
AN-1796 LMP7721 Evaluation Board
1
Introduction
The LMP7721 evaluation board provides a platform to test the input bias current and performance of the
LMP7721 amplifier. The LMP7721 amplifier is optimized for ultra low input bias current, 3 fA typical, by
using on chip guard drivers and a package pin out to isolate the amplifier’s inputs from its power supply
and output pins.
Figure 1 is the schematic diagram for the LMP7721 evaluation board.
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SNOA513C – March 2008 – Revised May 2013
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AN-1796 LMP7721 Evaluation Board
1
Power Supply Connections
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VREF
JP6
-
R1
R3
R2
R4
+
J3 (V ) J4 (GND) J5 (V ) J6 (VREF)
+
V
JP4
C1
100 nF
6
8
-
J1
+
V
U1 LMP7721
JP1
1
V
+
JP2
BNC
-
3
JP3
4
C3
100 nF
JP5
V-
VREF
R5
R6
10 k:
10 k:
+
V
C2
100 nF
J2
TRIAX
3
5
R7
+
1
100:
+
V
U2 LMP7715
V
2
4
C4
100 nF
V-
Figure 1. LMP7721 Evaluation Board
The evaluation board is design to be compatible with the 1 fA input bias current of the LMP7721 by
providing a guarded area around the input puts of the amplifier. The input guard creates an equal potential
zone around the input pins that prevents leakage currents from other parts of the printed circuit board
(PCB) from reaching the input pins and causing an error current. A description of the board’s features is
discussed in the following secitons.
2
Power Supply Connections
J3, J4 and J5 are the power supply connections. The power supply can be a single supply with a range
1.8 to 5.5 V. Also, a split supply voltage can be used with the with the condition that 1.8 V ≤ V+ -(V−) ≤ 5.5
V.
2
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Reference Voltage Connection (VREF)
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For single supply operation, J3 and J4 are connected together and is the ground connection. The
positive supply voltage connection is J5.
For split-supply operation, the negative supply voltage is connected to J3. The positive supply voltage
is connected to J5 and the ground (or common) connection of the supplies is connected to J4.
3
Reference Voltage Connection (VREF)
The LMP7721 can be configured as an inverting amplifier or a non-inverting amplifier. In each case, it may
be required to provide a level shift voltage to keep the output voltage within a specified range and is
accomplished by using the VREF connection. Jumper JP3 is used to connect the VREF to the non-inverting
input of U1 when U1 is used in an inverting amplifier configuration. Jumper JP6 is used to connect the
VREF to the inverting input of U1 when U1 is used in a non-inverting amplifier configuration.
4
Components R1, R2, R3, R4, R5, R6 and R7
These components are shown as resistors on the schematic, but are not mounted on the board. This
evaluation board uses pin sockets at the location of these components to give you the freedom to
configure the LMP7721 amplifier to best fit the application being considered.
5
Jumper Functions
JP1— JP1 is used to connect the signal terminal of the triax connector (J2) to the inverting input or the
non-inverting input of U1, the LMP7721 amplifier.
JP2— JP2 is used to connect the non-inverting input of U1 to ground.
JP3— JP3 is used to connect the non-inverting terminal of the LMP7721 to the VREF voltage. The
connection to VREF can be direct by using a wire jumper in the position of R5, or through a voltage
divider by using resistors in the positions of R5 and R6.
JP4— JP4 is used to connect the guard and guard driver to the inverting terminal of the LMP7721 when it
is the low impedance node. This is the case when the LMP7721 is used as a non-inverting
amplifier.
JP5— JP5 is used to connect the guard and guard driver to the non-inverting terminal of the LMP7721
when it is the low impedance node. This is the case when the LMP7721 is used as an inverting
amplifier.
JP6— JP6 is used to connect the inverting terminal of the LMP7721 to the VREF voltage or to ground.
These is used when U1 is used as a non-inverting amplifier.
6
Input and output connectors
J1— J1 is a BNC connect and is the output of the LMP7721 amplifier
J2— J2 is a Triax connector and is used to connect a signal source to the input of the LMP7721. This
component is not mounted on the board. A Triax connector is similar to a BNC connector but
includes a shield between the central conductor and the outer shield and is referred to as a guard.
A guard driver drives the guard to the same voltage as the center conductor, which minimizes any
leakage currents in the connector or in the triax cable connected to it.
7
Example Applications
Non-inverting amplifier with a gain of two:
In this example, a sensor such as a pH electrode is the signal source and the LMP7721 is being used to
buffer and amplify the signal. The output of a pH electrode, at 25°C ranges from about +415 mV to −415
mV as the pH ranges from 0 to 14. The output impedance of a pH electrode is extremely high, greater
than 5 to 10 MΩ, so the LMP7721 is an excellent amplifier to buffer the output of a pH electrode.
SNOA513C – March 2008 – Revised May 2013
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AN-1796 LMP7721 Evaluation Board
3
Transimpedance Amplifier (Inverting Amplifier With Level Shift)
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For this application, a ±2.5 V supply voltage is used. Figure 2 shows the placement of the jumpers and
components.
VREF
JP6
-2.5
GND
-
+2.5
R1
10 k:
R3
10 k:
R2
R4
+
J3 (V ) J4 (GND) J5 (V ) J6 (VREF)
+
V
JP4
C1
100 nF
6
8
-
J1
+
V
U1 LMP7721
JP1
1
V
+
JP2
BNC
-
3
JP3
4
C3
100 nF
JP5
V-
VREF
R5
R6
10 k:
10 k:
+
V
C2
100 nF
J2
TRIAX
3
5
+
1
R7
100:
+
V
U2 LMP7715
V
2
4
C4
100 nF
V-
Figure 2. Schematic Showing Placement of Jumpers and Components
8
Transimpedance Amplifier (Inverting Amplifier With Level Shift)
In this application, the LMP7721 is used as a transimpedance amplifier that converts the current
generated in the pin diode by light, or other radiation source, to a voltage at the amplifiers output. The
input is biased to 2.5 V by the VREF and the resistive divider R5 and R6. Current from the pin diode
generates a voltage at the amplifier’s output equal to (2.5 V - (Ipin-diode) X (R3)).
4
AN-1796 LMP7721 Evaluation Board
SNOA513C – March 2008 – Revised May 2013
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Transimpedance Amplifier (Inverting Amplifier With Level Shift)
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VREF
JP6
GND
GND
+5.0V
-
+5.0V
R1
R3
1 M:
R2
R4
+
J3 (V ) J4 (GND) J5 (V ) J6 (VREF)
+
V
JP4
C1
100 nF
6
8
-
J1
+
V
U1 LMP7721
JP1
4
BNC
-
1
V
+
3
JP3
JP2
JP5
V-
VREF
+5.0V
O
C3
100 nF
+
V
PIN DIODE
R5
10 k:
R6
10 k:
C2
100 nF
J2
TRIAX
3
5
+
1
R7
100:
+
V
U2 LMP7715
V
2
4
C4
100 nF
V-
SNOA513C – March 2008 – Revised May 2013
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Copyright © 2008–2013, Texas Instruments Incorporated
AN-1796 LMP7721 Evaluation Board
5
Transimpedance Amplifier (Inverting Amplifier With Level Shift)
www.ti.com
Table 1 shows the Bill of Material (BOM) of the evaluation board.
Table 1. Bill of Material (BOM)
6
Designator
Description
Comment
J5
Jack connector
Red
J3
Jack connector
Green
J4
Jack connector
Black
J6
Jack connector
Yellow
C1 –C4
0805 capacitor
100 nF
J1
BNC
JP1, JP6
3 pin header
JP2 –JP5
2 pin header
U1
LMP7721
8-Pin SOIC
U2
LMP7715
5-Pin SOT-23
R1 – R7
Leaded resistor
Not stuffed
J2
Triax connector
Not stuffed
No Designator
PC pin receptacle
For R1 – R7
No Designator
1/2”, 4–40 nylon threaded standoff
Qty. 4
No Designator
3/8”, 4–40 Screw
Qty. 4
AN-1796 LMP7721 Evaluation Board
SNOA513C – March 2008 – Revised May 2013
Submit Documentation Feedback
Copyright © 2008–2013, Texas Instruments Incorporated
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