Texas Instruments | TPA2080D1 2.2-W Constant Output Power Class-D Audio Amplifier With Class-G Boost Converter (Rev. B) | Datasheet | Texas Instruments TPA2080D1 2.2-W Constant Output Power Class-D Audio Amplifier With Class-G Boost Converter (Rev. B) Datasheet

Texas Instruments TPA2080D1 2.2-W Constant Output Power Class-D Audio Amplifier With Class-G Boost Converter (Rev. B) Datasheet
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TPA2080D1
SLOS733B – JANUARY 2012 – REVISED APRIL 2016
TPA2080D1 2.2-W Constant Output Power Class-D Audio Amplifier With Class-G Boost
Converter
1 Features
3 Description
•
The TPA2080D1 device is a high-efficiency Class-D
audio power amplifier with an integrated Class-G
boost converter that enhances efficiency at low output
power. It drives up to 2.2 W into an 4-Ω speaker (1%
THD+N). With 85% typical efficiency, the TPA2080D1
helps extend battery life when playing audio.
1
•
•
•
2.2 W into 4-Ω Load from 3.6-V Supply
(1% THD+N)
Integrated Class-G Boost Converter
– Increases Efficiency at Low Output Power
Low Quiescent Current of 3.5 mA from 3.6 V
Thermal and Short-Circuit Protection With Auto
Recovery
20-dB Fixed Gain
Available in 1.53-mm × 1.98-mm, 0.5-mm pitch
12-ball WCSP (DSBGA) Package
2 Applications
The built-in boost converter generates a 5.75-V
supply voltage for the Class-D amplifier when high
output power is required. This provides a louder
audio output than a stand-alone amplifier directly
connected to the battery. During low audio output
power periods, the boost converter deactivates and
connects VBAT directly to the Class-D amplifier
supply, PVDD. This improves overall efficiency.
•
•
•
The TPA2080D1 has an integrated low-pass filter to
improve the RF rejection and reduce DAC out-ofband noise, increasing the signal-to-noise ratio
(SNR).
•
•
Cell Phones
PDA, GPS
Portable Electronics and Speakers
The TPA2080D1 is available in a space-saving
1.53-mm × 1.982-mm, 0.5-mm pitch WCSP package
(YZG).
Device Information(1)
PART NUMBER
TPA2080D1
PACKAGE
DSBGA (12)
BODY SIZE (NOM)
1.53 mm × 1.98 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Application Diagram
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPA2080D1
SLOS733B – JANUARY 2012 – REVISED APRIL 2016
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Table of Contents
1
2
3
4
5
6
7
8
9
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
4
7.1
7.2
7.3
7.4
7.5
7.6
7.7
4
5
5
5
5
6
7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Operating Characteristics..........................................
Typical Characteristics ..............................................
Parameter Measurement Information ................ 10
Detailed Description ............................................ 11
9.1 Overview ................................................................. 11
9.2 Functional Block Diagram ....................................... 11
9.3 Feature Description................................................. 11
9.4 Device Functional Modes........................................ 14
10 Application and Implementation........................ 15
10.1 Application Information.......................................... 15
10.2 Typical Application ................................................ 15
11 Power Supply Recommendations ..................... 19
11.1 Power Supply Decoupling Capacitors................... 19
12 Layout................................................................... 19
12.1 Layout Guidelines ................................................. 19
12.2 Layout Example .................................................... 21
13 Device and Documentation Support ................. 22
13.1
13.2
13.3
13.4
13.5
Device Support......................................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
22
22
22
22
22
14 Mechanical, Packaging, and Orderable
Information ........................................................... 23
14.1 Package Dimensions ............................................ 23
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (October 2012) to Revision B
Page
•
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
•
Removed Ordering Information table .................................................................................................................................... 1
Changes from Original (January 2012) to Revision A
Page
•
Added (DSBGA) to the Packaged Devices of the ORDERING INFORMATION table .......................................................... 1
•
Changed Feature From: Available in 1.53-mm × 1.98-mm, 0.5-mm pitch 12-ball WCSP Package To: Available in
1.53-mm × 1.98-mm, 0.5-mm pitch 12-ball WCSP (DSBGA) Package ................................................................................ 1
2
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5 Device Comparison Table
DEVICE NUMBER
SPEAKER AMP TYPE
SPECIAL FEATURES
OUTPUT POWER (W)
PSRR (dB)
TPA2013D1
Class D
Boost Converter
2.7
95
TPA2015D1
Class D
Adaptive Boost Converter
2
85
TPA2025D1
Class D
Class G Boost Converter
2
65
TPA2080D1
Class D
Class G Boost Converter
2.2
62.5
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6 Pin Configuration and Functions
YZG Package
12-Pin DSBGA
Top View
A1
A2
A3
PVDD
SW
BGND
B1
B2
B3
OUT+
N/C
VBAT
C1
C2
C3
OUT–
EN
IN+
D1
D2
D3
PGND
AGND
IN–
Pin Functions
PIN
TYPE
DESCRIPTION
NAME
NO.
PVDD
A1
O
Boost converter output and Class-D power stage supply voltage.
SW
A2
I
Boost converter switch input; connect boost inductor between VBAT and SW.
BGND
A3
P
Boost converter power ground.
OUT+
B1
O
Positive audio output.
N/C
B2
–
No Connection
VBAT
B3
P
Supply voltage.
OUT–
C1
O
Negative audio output.
EN
C2
I
Device enable; set to logic high to enable.
IN+
C3
I
Positive audio input.
PGND
D1
P
Class-D power ground.
AGND
D2
P
Analog ground.
IN–
D3
I
Negative audio input.
7 Specifications
7.1 Absolute Maximum Ratings
Over operating free–air temperature range, TA= 25°C (unless otherwise noted) (1)
MIN
MAX
UNIT
Supply voltage
VBAT
–0.3
6
V
Input voltage, VI
IN+, IN–
–0.3
VBAT + 0.3
V
Minimum load resistance
Ω
3.2
Output continuous total power dissipation
See Thermal Information
Operating free-air temperature, TA
–40
85
°C
Operating junction temperature, TJ
–40
150
°C
Storage temperature, Tstg
–65
150
°C
(1)
4
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
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7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic
discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±500
Machine model (MM)
±100
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
MIN
MAX
Supply voltage, VBAT
2.5
5.2
UNIT
VIH
High–level input voltage, END
1.3
VIL
Low–level input voltage, END
0.6
V
TA
Operating free-air temperature
–40
85
°C
TJ
Operating junction temperature
–40
150
°C
V
V
7.4 Thermal Information
TPA2080D1
THERMAL METRIC
(1)
YZG (DSBGA)
UNIT
12 PINS
RθJA
Junction-to-ambient thermal resistance
97.3
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
36.7
°C/W
RθJB
Junction-to-board thermal resistance
55.9
°C/W
ψJT
Junction-to-top characterization parameter
13.9
°C/W
ψJB
Junction-to-board characterization parameter
49.5
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
7.5 Electrical Characteristics
VBAT = 3.6 V, TA = 25°C, RL = 8 Ω + 33 μH (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VBAT supply voltage range
Class-D supply voltage range
MIN
TYP
2.5
EN = VBAT, boost converter active
Boost converter disabled (in bypass mode)
MAX
5.2
5.75
2.5
Supply under voltage shutdown
5.2
2.2
Operating quiescent current
EN = VBAT = 3.6 V
Shutdown quiescent current
VBAT = 2.5 V to 5.2 V, EN = GND
Input common-mode voltage range
IN+, IN–
Start-up time
2
0.2
0.6
6
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V
V
V
6
mA
1
μA
1.3
V
10
ms
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UNIT
5
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7.6 Operating Characteristics
VBAT= 3.6 V, EN = VBAT, TA = 25°C, RL = 8 Ω + 33 μH (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
5.4
5.75
6.4
UNIT
BOOST CONVERTER
PVDD
Boost converter output voltage range
Boost converter input current limit
IBOOST = 0 mA
IBOOST = 700 mA
5.6
Power supply current
1800
Boost converter starts up from full shutdown
IL
Boost converter start-up current limit
fBOOST
V
600
Boost converter wakes up from auto-pass
through mode
mA
1000
Boost converter frequency
1.2
MHz
CLASS-D AMPLIFIER
PO
Output power
THD = 1%, VBAT = 2.5 V, f = 1 kHz
1440
THD = 1%, VBAT = 3 V, f = 1 kHz
1750
THD = 1%, VBAT = 3.6 V, f = 1 kHz
1900
THD = 1%, VBAT = 2.5 V, f = 1 kHz, RL = 4 Ω +
33 µH
1460
THD = 1%, VBAT = 3 V, f = 1 kHz, RL = 4 Ω +
33 µH
1800
THD = 1%, VBAT = 3.6 V, f = 1 kHz, RL = 4 Ω +
33 µH
2280
19.5
mW
AV
Voltage gain
20
20.5
dB
VOOS
Output offset voltage
2
10
mV
Short-circuit protection threshold current
2
Input impedance (per input pin)
RIN
Input impedance in shutdown (per input
pin)
ZO
Output impedance in shutdown
24
EN = 0 V
2
VRMS
Class-D output voltage threshold when boost
converter automatically turns on
2
VPK
Class-D and boost combined efficiency
EN
Noise output voltage
Signal-to-noise ratio
275
PO = 500 mW, VBAT = 3.6 V
Total harmonic distortion plus noise (1)
AC
PSRR
AC-Power supply ripple rejection (output
referred)
AC
CMRR
AC-Common mode rejection ratio (output
referred)
300
325
kHz
90%
A-weighted
49
Unweighted
65
1.7 W, RL = 8 Ω + 33 µH. A-weighted
97.5
1.7 W, RL = 8 Ω + 33 µH. Unweighted
95
2 W, RL = 4 Ω + 33 µH. A-weighted
95
2 W, RL = 4 Ω + 33 µH. Unweighted
6
kΩ
EN = 0 V
Class-D switching frequency
(1)
2
Boost converter auto-pass through
threshold
η
THD+N
kΩ
1300
Maximum input voltage swing
fCLASS-D
SNR
A
μVRMS
dB
93
PO = 100 mW, f = 1 kHz
0.06%
PO = 500 mW, f = 1 kHz
0.07%
PO = 1.7 W, f = 1 kHz, RL = 8 Ω + 33 µH
0.07%
PO = 2 W, f = 1 kHz, RL = 4 Ω + 33 µH
0.15%
200 mVPP square ripple, VBAT = 3.8 V, f = 217
Hz
62.5
200 mVPP square ripple, VBAT = 3.8 V, f = 1 kHz
62.5
200 mVPP square ripple, VBAT = 3.8 V, f = 217
Hz
71
200 mVPP square ripple, VBAT = 3.8 V, f = 1 kHz
71
dB
dB
A-weighted
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7.7 Typical Characteristics
VBAT = 3.6 V, CI = 1 µF, CBOOST = 22 µF, LBOOST = 2.2 µH, EN = VBAT, and Load = 8 Ω + 33 µH, no ferrite bead unless otherwise
specified.
3.0
5.0
RL = 4 Ω + 33 µH
Gain = 20 dB
f = 1 kHz
4.5
4.0
PO − Output Power − W
PO − Output Power − W
2.5
2.0
1.5
1.0
0.0
2.3
2.8
THD + N = 10%
THD + N = 1%
3.3
3.8
4.3
2.0
1.5
THD + N = 10%
THD + N = 1%
0.0
2.5
4.8
4.5
5.0
Figure 2. Output Power vs Supply Voltage
0.6
0.5
0.4
0.3
0.2
RL = 8 Ω + 33 µH
Gain = 20 dB
f = 1 kHz
0.1
0.0
0.0
4.0
Figure 1. Output Power vs Supply Voltage
0.5
1.0
1.5
2.0
IVBAT − Total Supply Current − A
0.7
3.5
VBAT − Supply Voltage − V
1.2
0.8
3.0
VBAT − Supply Voltage − V
VBAT = 2.8 V
VBAT = 3.0V
VBAT = 3.6 V
VBAT = 4.2 V
VBAT = 5.0 V
0.9
RL = 4 Ω + 33 µH
Gain = 20 dB
f = 1 kHz
1.0
0.8
0.6
0.4
VBAT = 2.8 V
VBAT = 3.0V
VBAT = 3.6 V
VBAT = 4.2 V
VBAT = 5.0 V
0.2
0.0
0.0
2.5
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
PO − Output Power − W
PO − Output Power − W
Figure 3. Total Supply Current vs Output Power
Figure 4. Total Supply Current vs Output Power
10
PO = 225 mW
PO = 560 mW
PO = 1 W
PO = 1.7 W
VBAT = 3.6 V
RL = 8 Ω + 33 µH
Gain = 20 dB
1
0.1
0.01
0.001
20
100
1k
f − Frequency − Hz
10k
20k
THD+N − Total Harmonic Distortion + Noise − %
IVBAT − Total Supply Current − A
2.5
0.5
1.0
THD+N − Total Harmonic Distortion + Noise − %
3.0
1.0
RL = 8 Ω + 33 µH
Gain = 20 dB
f = 1 kHz
0.5
3.5
10
PO = 62 mW
PO = 450 mW
PO = 1.1 W
PO = 2 W
VBAT = 3.6 V
RL = 4 Ω + 33 µH
Gain = 20 dB
1
0.1
0.01
0.001
20
Figure 5. THD+N vs Frequency
100
1k
f − Frequency − Hz
10k
20k
Figure 6. THD+N vs Frequency
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Typical Characteristics (continued)
RL = 8 Ω + 33 µH
Gain = 20 dB
f = 1 kHz
VBAT = 3.0 V
VBAT = 3.6 V
VBAT = 4.2 V
VBAT = 5.0 V
10
THD+N − Total Harmonic Distortion + Noise − %
100
1
0.1
0.01
1m
10m
100m
1
4
0.1
0.01
1m
1
5
Figure 8. THD+N vs Output Power
80
60
40
VBAT = 2.8 V
VBAT = 3.0 V
VBAT = 3.6 V
VBAT = 4.2 V
VBAT = 5.0 V
RL = 8 Ω + 33 µH
Gain = 20 dB
f = 1 kHz
0.1
1
60
40
20
VBAT = 2.8 V
VBAT = 3.0 V
VBAT = 3.6 V
VBAT = 4.2 V
VBAT = 5.0 V
RL = 4 Ω + 33 µH
Gain = 20 dB
f = 1 kHz
0
0.01
3
0.1
1
4
PO − Output Power − W
PO − Output Power − W
Figure 9. Total Efficiency vs Output Power
Figure 10. Total Efficiency vs Output Power
1.4
VBAT = 2.8 V
VBAT = 3.0 V
VBAT = 3.6 V
VBAT = 4.2 V
VBAT = 5.0 V
0.6
0.5
0.4
0.3
0.2
RL = 8 Ω + 33 µH
Gain = 20 dB
f = 1 kHz
0.1
0.5
1.0
1.5
2.0
2.5
PD − Total Power Dissipation − W
0.9
0.0
0.0
100m
Figure 7. THD+N vs Output Power
80
0.7
10m
PO − Output Power − W
0
0.01
PD − Total Power Dissipation − W
1
100
0.8
RL = 4 Ω + 33 µH
Gain = 20 dB
f = 1 kHz
VBAT = 3.0 V
VBAT = 3.6 V
VBAT = 4.2 V
VBAT = 5.0 V
10
100
20
8
100
PO − Output Power − W
Efficiency − %
Efficiency − %
THD+N − Total Harmonic Distortion + Noise − %
VBAT = 3.6 V, CI = 1 µF, CBOOST = 22 µF, LBOOST = 2.2 µH, EN = VBAT, and Load = 8 Ω + 33 µH, no ferrite bead unless
otherwise specified.
1.2
RL = 4 Ω + 33 µH
Gain = 20 dB
f = 1 kHz
1.0
0.8
0.6
0.4
VBAT = 2.8 V
VBAT = 3.0 V
VBAT = 3.6 V
VBAT = 4.2 V
VBAT = 5.0 V
0.2
0.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
PO − Output Power − W
PO − Output Power − W
Figure 11. Total Power Dissipation vs Output Power
Figure 12. Total Power Dissipation vs Output Power
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Typical Characteristics (continued)
VBAT = 3.6 V, CI = 1 µF, CBOOST = 22 µF, LBOOST = 2.2 µH, EN = VBAT, and Load = 8 Ω + 33 µH, no ferrite bead unless
otherwise specified.
10m
0
RL = 8 Ω + 33 µH
Gain = 20 dB
Supply Ripple Rejection − dB
Supply Current − A
8m
6m
4m
2m
−40
−60
−80
VBAT − V
1k
f − Frequency − Hz
Figure 13. Quiescent Supply Current vs Battery Voltage
Figure 14. Supply Ripple Rejection vs Frequency
0
2.9
3.2
3.5
3.8
4.1
4.4
5.0
20
−80
RL = 8 Ω + 33 µH
Input Level = 0.2 Vpp
Gain = 20 dB
CIN = 1 µF
−20
4.7
VBAT = 2.5 V
VBAT = 3.0 V
VBAT = 3.6 V
VBAT = 4.2 V
VBAT = 5.0 V
−40
−60
100
10k
20k
RL = 8 Ω + 33 µH
No Input Signal
Gain = 20 dB
−90
−100
−110
−120
−130
−80
−140
−100
−150
20
100
1k
f − Frequency − Hz
10k
20k
0
Figure 15. Common-Mode Rejection Ratio vs Frequency
4k
6k
8k
10k 12k 14k 16k 18k 20k 22k 24k
Frequency − Hz
6
VBAT = 3.6 V
Gain = 20 dB
POUT = 100 mW @ 1 kHz
RL = 8 Ω + 33 µH
EN
VOUT+ − VOUT−
4
V − Voltage − V
4
2k
Figure 16. A-Weighted Output Noise vs Frequency
6
V − Voltage − V
−20
VBAT = 2.5 V
VBAT = 3.0 V
VBAT = 3.6 V
VBAT = 4.2 V
VBAT = 5.0 V
−100
2.6
Amplitude − dBV
CMRR − Common−Mode Rejection Ratio − dB
0
2.3
RL = 8 Ω + 33 µH
Input Level = 0.2 Vpp
Gain = 20 dB
Output Referred
2
0
−2
−2m
VBAT = 3.6 V
Gain = 20 dB
POUT = 100 mW @ 1 kHz
RL = 8 Ω + 33 µH
EN
VOUT+ − VOUT−
2
0
0
2m
4m
t − Time − s
6m
8m
10m
−2
−2.5m
Figure 17. Start-Up timing
−1.5m
−500.0u
500.0u
t − Time − s
1.5m
2.5m
Figure 18. Shutdown timing
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Typical Characteristics (continued)
VBAT = 3.6 V, CI = 1 µF, CBOOST = 22 µF, LBOOST = 2.2 µH, EN = VBAT, and Load = 8 Ω + 33 µH, no ferrite bead unless
otherwise specified.
Figure 19. EMC Performance PO = 750 mW With 2-Inch Speaker Cable
8 Parameter Measurement Information
All parameters are measured according to the conditions described in Specifications.
TPA2080D1
1 ˩F
+
Measurement
Output
–
IN+
OUT+
Load
IN–
OUT–
+
Measurement
Input
–
30-kHz
Low-Pass
Filter
1 ˩F
SW
PVDD
EN
VBAT
10 k
GND
22 ˩F
2.2 ˩H
10 ˩F
+
Supply
–
(1)
The 1-µF input capacitors on IN+ and IN– were shorted for input common-mode voltage measurements.
(2)
A 33-µH inductor was placed in series with the load resistor to emulate a small speaker for efficiency measurements.
(3)
The 30-kHz low-pass filter is required even if the analyzer has an internal low-pass filter. An R-C low-pass filter
(100 Ω, 47 nF) is used on each output for the data sheet graphs.
Figure 20. Test Setup for Graphs
10
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9 Detailed Description
9.1 Overview
The TPA2080D1 is a high-efficiency Class-D audio power amplifier with an integrated Class-G boost converter
that enhances efficiency at low output power. The built-in converter generates a 5.75-V supply voltage for the
Class-D amplifier when high output power is required. The device has a integrated low-pass filter to improve the
RF rejection and reduce DAC out-of-band noise, increasing the signal-to-noise ratio (SNR).
9.2 Functional Block Diagram
9.3 Feature Description
9.3.1 Fully Differential Amplifier
The TPA2080D1 is a fully differential amplifier with differential inputs and outputs. The fully differential amplifier
consists of a differential amplifier with common-mode feedback. The differential amplifier ensures that the
amplifier outputs a differential voltage on the output that is equal to the differential input times the gain. The
common-mode feedback ensures that the common-mode voltage at the output is biased around VCC/2
regardless of the common-mode voltage at the input. The fully differential TPA2080D1 can still be used with a
single-ended input; however, the TPA2080D1 must be used with differential inputs when in a noisy environment,
like a wireless handset, to ensure maximum noise rejection.
9.3.1.1 Advantages of Fully Differential Amplifiers
• Input-coupling capacitors not required:
– The fully differential amplifier allows the inputs to be biased at voltage other than mid-supply. The inputs of
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Feature Description (continued)
•
•
the TPA2080D1 can be biased anywhere within the common-mode input voltage range listed in
Recommended Operating Conditions and Electrical Characteristics. If the inputs are biased outside of that
range, input-coupling capacitors are required.
Midsupply bypass capacitor, C(BYPASS), not required:
– The fully differential amplifier does not require a bypass capacitor. Any shift in the midsupply affects both
positive and negative channels equally and cancels at the differential output.
Better RF-immunity:
– GSM handsets save power by turning on and shutting off the RF transmitter at a rate of 217 Hz. The
transmitted signal is picked up on input and output traces. The fully differential amplifier cancels the signal
better than the typical audio amplifier.
9.3.2 Short-Circuit Auto-Recovery
When a short-circuit event happens, the TPA2080D1 goes to low duty cycle mode and tries to reactivate itself
every 1.6 seconds. The auto-recovery will continue until the short-circuit event stops. This feature protects the
device without affecting the long-term reliability of the device.
9.3.3 Operation With DACs and CODECs
Large noise voltages can be present at the output of ΔΣ DACs and CODECs, just above the audio frequency (for
example, 80 kHz with a 300 mVP-P). This out-of-band noise is due to the noise shaping of the delta-sigma
modulator in the DAC. Some Class-D amplifiers have higher output noise when used in combination with these
DACs and CODECs. This is because out-of-band noise from the CODEC/DAC mixes with the Class-D switching
frequencies in the audio amplifier input stage. The TPA2080D1 has a built-in low-pass filter with cutoff frequency
at 55 kHz that reduces the out-of-band noise and RF noise, filtering out-of-band frequencies that could degrade
in-band noise performance. If driving the TPA2080D1 input with 4th-order or higher ΔΣ DACs or CODECs, add
an R-C low pass filter at each of the audio inputs (IN+ and IN–) of the TPA2080D1 to ensure best performance.
The recommended resistor value is 100 Ω and the capacitor value of 47 nF.
9.3.4 Speaker Load Limitation
Speakers are nonlinear loads with varying impedance (magnitude and phase) over the audio frequency. A
portion of speaker load current can flow back into the boost converter output through the Class-D output H-bridge
high-side device. This is dependent on the phase change over frequency on the speaker, and the audio signal
amplitude and frequency content. Most portable speakers have limited phase change at the resonant frequency,
typically no more than 40 or 50 degrees. To avoid excess flow-back current, use speakers with limited phase
change. Otherwise, flow-back current could drive the PVDD voltage above the absolute maximum recommended
operational voltage.
Confirm proper operation by connecting the speaker to the TPA2080D1 and driving it at maximum output swing.
Observe the PVDD voltage with an oscilloscope. In the unlikely event the PVDD voltage exceeds 6.5 V, add a
6.8-V Zener diode between PVDD and ground to ensure the TPA2080D1 operates properly. The amplifier has
thermal overload protection and deactivates if the die temperature exceeds 150°C. It automatically reactivates
once die temperature returns below 150°C. Built-in output overcurrent protection deactivates the amplifier if the
speaker load becomes short-circuited. The amplifier automatically restarts 1.6 seconds after the overcurrent
event. Although the TPA2080D1 Class-D output can withstand a short between OUT+ and OUT–, do not connect
either output directly to GND, VDD, or VBAT as this could damage the device.
9.3.5 Filter-Free Operation and Ferrite Bead Filters.
A ferrite bead filter can often be used if the design is failing radiated emissions without an LC filter and the
frequency sensitive circuit is greater than 1 MHz. This filter functions well for circuits that just have to pass FCC
and CE because FCC and CE only test radiated emissions greater than 30 MHz. When choosing a ferrite bead,
choose one with high impedance at high frequencies, and very low impedance at low frequencies. In addition,
select a ferrite bead with adequate current rating to prevent distortion of the output signal.
Use an LC output filter if there are low-frequency, (< 1 MHz) EMI-sensitive circuits or long leads from amplifier to
speaker.
Figure 21 shows a typical ferrite bead output filters.
12
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Feature Description (continued)
Ferrite
Chip Bead
OUTP
1 nF
Ferrite
Chip Bead
OUTN
1 nF
Figure 21. Typical Ferrite Chip Bead Filter
Table 1. Suggested Chip Ferrite Bead
LOAD
VENDOR
PART NUMBER
SIZE
8Ω
Murata
BLM18EG121SN1
0603
4Ω
TDK
MPZ2012S101A
0805
9.3.6 Boost Converter Auto Pass Through (APT)
The TPA2080D1 consists of a Class-G boost converter and a Class-D amplifier. The boost converter operates
from the supply voltage, VBAT, and generates a higher output voltage PVDD at 5.75 V. PVDD drives the supply
voltage of the Class-D amplifier. This improves loudness over non-boosted solutions. The boost converter has a
pass through mode in which it turns off automatically and PVDD is directly connected to VBAT through an
internal bypass switch.
The boost converter is adaptive and operates between pass through mode and boost mode depending on the
output audio signal amplitude. When the audio output amplitude exceeds the auto pass through (APT) threshold,
the boost converter is activated automatically and goes to boost mode. The transition time from normal mode to
boost mode is fast enough to prevent clipping large transient audio signals. The APT threshold of the
TPA2080D1 is fixed at 2 VPEAK. When the audio output signal is below APT threshold, the boost converter is
deactivated and goes to pass through mode. The adaptive boost converter maximizes system efficiency at lower
audio output levels.
The Class-G boost converter is designed to drive the Class-D amplifier only. Do not use the boost converter to
drive external devices.
Figure 22 shows how the adaptive boost converter behaves with a typical audio signal.
Figure 22. Class-G Boost Converter With Typical Music Playback
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9.4 Device Functional Modes
9.4.1 Shutdown Mode
The TPA2080D1 can be put in shutdown mode when asserting EN to a logic LOW. While in shutdown mode, the
device output stage is turned off and the current consumption is very low.
14
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10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
These typical connection diagrams highlight the required external components and system level connections for
proper operation of the device. Each of these configurations can be realized using the Evaluation Modules
(EVMs) for the device. These flexible modules allow full evaluation of the device in the most common modes of
operation. Any design variation can be supported by TI through schematic and layout reviews. Visit e2e.ti.com for
design assistance and join the audio amplifier discussion forum for additional information.
10.2 Typical Application
10.2.1 TPA2080D1 With Differential Input Signal
2.2uH
Connected to Power Supply
2.2uF
10uF - 22uF
VBAT
Audio
Input
+
SW
PVDD
IN+
IN-
Enable
BGND
TPA2080D1
OUT+
EN
OUTAGND
PGND
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Figure 23. Typical Application Schematic With Differential Input Signals
10.2.1.1 Design Requirements
For this design example, use the parameters listed in Table 2.
Table 2. Design Parameters
DESIGN PARAMETER
Power supply
Enable inputs
Speaker
EXAMPLE VALUE
3.6 V
High > 1.3 V
Low < 0.6 V
8Ω
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10.2.1.2 Detailed Design Procedure
10.2.1.2.1 Surface Mount Inductor
Working inductance decreases as inductor current increases. if the drop in working inductance is severe enough,
it may cause the boost converter to become unstable, or cause the TPA2080D1 to reach its current limit at a
lower output power than expected. Inductor vendors specify currents at while inductor values decrease by a
specific percentage. This can vary from 10% to 35%. Inductance is also affected by DC current and temperature.
10.2.1.2.2 Inductor Selection
Inductor current rating is determined by the requirements of the load. The inductance is determined by two
factors: the minimum value required for stability and the maximum ripple current permitted in the application. Use
Equation 1 to determine the required current rating. Equation 1 shows the approximate relationship between the
average inductor current, IL, to the load current, load voltage, and input voltage (IPVDD, PVDD, and VBAT,
respectively). Insert IPVDD, PVDD, and VBAT into Equation 1 and solve for IL. The inductor must maintain at least
90% of its initial inductance value at this current.
PVDD
æ
ö
IL = IPVDD ´ ç
÷
è VBAT ´ 0.8 ø
(1)
Ripple current, ΔIL, is peak-to-peak variation in inductor current. Smaller ripple current reduces core losses in the
inductor and reduces the potential for EMI. Use Equation 2 to determine the value of the inductor, L. Equation 2
shows the relationship between inductance L, VBAT, PVDD, the switching frequency, fBOOST, and ΔIL. Insert the
maximum acceptable ripple current into Equation 2 and solve for L.
VBAT ´ (PVDD - VBAT)
L=
DIL ´ ¦BOOST ´ PVDD
(2)
ΔIL is inversely proportional to L. Minimize ΔIL as much as is necessary for a specific application. Increase the
inductance to reduce the ripple current. Do not use greater than 4.7 μH, as this prevents the boost converter
from responding to fast output current changes properly. If using above 3.3 µH, then use at least 10-µF
capacitance on PVDD to ensure boost converter stability.
The typical inductor value range for the TPA2080D1 is 2.2 μH to 3.3 µH. Select an inductor with less than 0.5-Ω
DC resistance, DCR. Higher DCR reduces total efficiency due to an increase in voltage drop across the inductor.
Table 3. Sample Inductors
L
(µH)
SUPPLIER
COMPONENT CODE
SIZE
(LxWxH mm)
DCR
TYP
(mΩ)
ISAT MAX
(A)
2.2
Chilisin Electronics Corp.
CLCN252012T-2R2M-N
2.5 x 2 x 1.2
105
1.2
2.2
Toko
1239AS-H-2R2N=P2
2.5 x 2 x 1.2
96
2.3
2.2
Coilcraft
XFL4020-222MEC
4 x 4 x 2.15
22
3.5
3.3
Toko
1239AS-H-3R3N=P2
2.5 x 2 x 1.2
160
2
3.3
Coilcraft
XFL4020-332MEC
4 x 4 x 2.15
35
2.8
C RANGE
10 to 22 µF, 16 V
10 to 22 µF, 10 V
10 to 22 µF, 10 V
10.2.1.2.3 Surface Mount Capacitors
Temperature and applied DC voltage influence the actual capacitance of high-K materials. Table 4 shows the
relationship between the different types of high-K materials and their associated tolerances, temperature
coefficients, and temperature ranges. Notice that a capacitor made with X5R material can lose up to 15% of its
capacitance within its working temperature range.
In an application, the working capacitance of components made with high-K materials is generally much lower
than nominal capacitance. A worst-case result with a typical X5R material might be –10% tolerance, –15%
temperature effect, and –45% DC voltage effect at 50% of the rated voltage. This particular case would result in
a working capacitance of 42% (0.9 × 0.85 × 0.55) of the nominal value.
Select high-K ceramic capacitors according to the following rules:
1. Use capacitors made of materials with temperature coefficients of X5R, X7R, or better.
2. Use capacitors with DC voltage ratings of at least twice the application voltage. Use minimum 10-V
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capacitors for the TPA2080D1.
3. Choose a capacitance value at least twice the nominal value calculated for the application. Multiply the
nominal value by a factor of 2 for safety. If a 10-μF capacitor is required, use 20 µF.
The preceding rules and recommendations apply to capacitors used in connection with the TPA2080D1. The
TPA2080D1 cannot meet its performance specifications if the rules and recommendations are not followed.
Table 4. Typical Tolerance and Temperature Coefficient of Capacitance by Material
MATERIAL
COG / NPO
X7R
X5R
Typical tolerance
±5%
±10%
80% or –20%
Temperature
±30 ppm
±15%
22% or –82%
Temperature range, °C
–55°C to 125°C
–55°C to 125°C
–30°C to 85°C
10.2.1.2.4 Boost Converter Capacitor Selection
The value of the boost capacitor is determined by the minimum value of working capacitance required for stability
and the maximum voltage ripple allowed on PVDD in the application. Working capacitance refers to the available
capacitance after derating the capacitor value for DC bias, temperature, and aging. Do not use any component
with a working capacitance less than 6.8 µF. This corresponds to a 10-μF, 16-V capacitor or a 10-μF, 10-V
capacitor.
Do not use above 22-μF capacitance as it will reduce the boost converter response time to large output current
transients.
Equation 3 shows the relationship between the boost capacitance, C, to load current, load voltage, ripple voltage,
input voltage, and switching frequency (IPVDD, PVDD, ΔV, VBAT, and fBOOST respectively).
Insert the maximum allowed ripple voltage into Equation 3 and solve for C. The 1.5 multiplier accounts for
capacitance loss due to applied DC voltage and temperature for X5R and X7R ceramic capacitors.
I
´ (PVDD - VBAT)
C = 1.5 ´ PVDD
DV ´ ¦BOOST ´ PVDD
(3)
10.2.1.2.5 Decoupling Capacitors
The TPA2080D1 is a high-performance Class-D audio amplifier that requires adequate power supply decoupling.
Adequate power supply decoupling to ensures that the efficiency is high and total harmonic distortion (THD) is
low.
Place a low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 µF, within 2 mm of the VBAT ball.
Use X5R and X7R ceramic capacitors. This choice of capacitor and placement helps with higher frequency
transients, spikes, or digital hash on the line. Additionally, placing this decoupling capacitor close to the
TPA2080D1 is important, as any parasitic resistance or inductance between the device and the capacitor causes
efficiency loss. In addition to the 0.1-μF ceramic capacitor, place a 2.2-µF to 10-µF capacitor on the VBAT supply
trace. This larger capacitor acts as a charge reservoir, providing energy faster than the board supply, thus
helping to prevent any droop in the supply voltage.
10.2.1.2.6 Input Capacitors
Input audio DC decoupling capacitors are recommended. The input capacitors and TPA2080D1 input impedance
form a high-pass filter with the corner frequency, fC, determined in Equation 4.
Any mismatch in capacitance between the two inputs will cause a mismatch in the corner frequencies. Severe
mismatch may also cause turnon pop noise. Choose capacitors with a tolerance of ±10% or better. Use X5R and
X7R ceramic capacitors.
1
fc =
(2 x p x RICI )
(4)
The value of the input capacitor is important to consider as it directly affects the bass (low frequency)
performance of the circuit. Speakers in wireless phones cannot usually respond well to low frequencies, so the
corner frequency can be set to block low frequencies in this application. Not using input capacitors can increase
output offset.
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10.2.1.2.7 Boost Converter Component Section
The critical external components are summarized in Table 5.
Table 5. Recommended Values
PARAMETER
TEST CONDITIONS
Boost converter inductor
MIN
At 30% rated DC bias current of the inductor
1.5
Working capacitance biased at boost output voltage, if 4.7-µH inductor is
chosen, then minimum capacitance is 10 µF
2.2
UNIT
4.7
µH
1
10
µF
4.7
22
µF
Input capacitor
Boost converter output
capacitor
TYP MAX
10.2.1.3 Application Curves
For application curves, see the figures listed in Table 6.
Table 6. Table of Graphs
DESCRIPTION
FIGURE NUMBER
Output Power vs Supply Voltage
Figure 1
THD+N vs Frequency
Figure 5
THD+N vs Output Power
Figure 7
Total Power Dissipation vs Output Power
Figure 11
10.2.2 TPA2080D1 With Single-Ended Signals.
2.2uH
Connected to Power Supply
2.2uF
10uF - 22uF
VBAT
Single-Ended
Audio Inputs
PVDD
IN+
BGND
TPA2080D1
INEnable
SW
OUT+
OUT-
EN
AGND
PGND
Figure 24. Typical Application Schematic With Single-Ended Input Signal
10.2.2.1 Design Requirements
For this design example, use the parameters listed in Table 2.
10.2.2.2 Detailed Design Procedure
For the design procedure see Detailed Design Procedure.
10.2.2.3 Application Curves
For application curves, see the figures listed in Table 6.
18
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11 Power Supply Recommendations
The TPA2080D1 is designed to operate from an input voltage supply range from 2.5 V to 5.2 V. Therefore the
output voltage range of the power supply should be within this range. The current capability of upper power must
not exceed the maximum current limit of the power switch.
11.1 Power Supply Decoupling Capacitors
The TPA2080D1 requires adequate power supply decoupling to ensure a high efficiency operation with low total
harmonic distortion (THD). Place a low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 µF,
within 2 mm of the VBAT/PVDD pin. This choice of capacitor and placement helps with higher frequency
transients, spikes, or digital hash on the line. In addition to the 0.1-μF ceramic capacitor, TI recommends placing
a 2.2-µF to 10-µF capacitor on the VBAT supply trace. This larger capacitor acts as a charge reservoir, providing
energy faster than the board supply, thus helping to prevent any droop in the supply voltage.
12 Layout
12.1 Layout Guidelines
12.1.1 Component Placement
Place all the external components close to the TPA2080D1 device. Placing the decoupling capacitors as close as
possible to the device is important for the efficiency of the class-D amplifier. Any resistance or inductance in the
trace between the device and the capacitor can cause a loss in efficiency.
12.1.2 Thermal Considerations
It is important to operate the TPA2080D1 at temperatures lower than its maximum operating temperature. The
maximum ambient temperature depends on the heat-sinking ability of the PCB system. Given θJA of 97.3°C/W,
the maximum allowable junction temperature of 150°C, and the internal dissipation of 0.5 W for 1.9-W, 8 Ω-load,
3.6-V supply, the maximum ambient temperature is calculated as:
TA,MAX = TJ,MAX – θJAPD = 150°C – (97.3°C/W × 0.5 W) = 101.4°C
(5)
The calculated maximum ambient temperature is 101.4°C at maximum power dissipation at 3.6-V supply and 8-Ω
load. The TPA2080D1 is designed with thermal protection that turns the device off when the junction temperature
surpasses 150°C to prevent damage to the IC.
12.1.3 Pad Size
TPA2080D1 has AGND, BGND and PGND for analog circuit, boost converter and Class-D amplifier respectively.
These three ground pins should be connected together through a solid ground plane with multiple ground VIAs.
In making the pad size for the WCSP balls, it is recommended that the layout use non-solder mask defined
(NSMD) land. With this method, the solder mask opening is made larger than the desired land area, and the
opening size is defined by the copper pad width. Figure 25 shows the appropriate diameters for a WCSP layout.
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Layout Guidelines (continued)
Copper Trace Width
Solder Pad Width
Solder Mask Opening
Copper Trace Thickness
Solder Mask Thickness
M0200-01
Figure 25. Land Pattern Dimensions
Table 7. Land Pattern Dimensions (1)
SOLDER PAD
DEFINITIONS
COPPER
PAD
Nonsolder mask
defined (NSMD)
275 μm
(+0.0, -25 μm)
(1)
(2)
(3)
(4)
(5)
(6)
(7)
20
SOLDER MASK
OPENING
(5)
375 μm (+0.0, -25 μm)
(2) (3) (4)
COPPER
THICKNESS
STENCIL (6) (7)
OPENING
STENCIL
THICKNESS
1 oz max (32 μm)
275 μm x 275 μm Sq.
(rounded corners)
125 μm thick
Circuit traces from NSMD defined PWB lands should be 75 μm to 100 μm wide in the exposed area inside the solder mask opening.
Wider trace widths reduce device stand off and impact reliability.
Best reliability results are achieved when the PWB laminate glass transition temperature is above the operating the range of the
intended application.
Recommend solder paste is Type 3 or Type 4.
For a PWB using a Ni/Au surface finish, the gold thickness should be less 0.5 mm to avoid a reduction in thermal fatigue performance.
Solder mask thickness should be less than 20 μm on top of the copper circuit pattern
Best solder stencil performance is achieved using laser cut stencils with electro polishing. Use of chemically etched stencils results in
inferior solder paste volume control.
Trace routing away from WCSP device should be balanced in X and Y directions to avoid unintentional component movement due to
solder wetting forces.
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12.2 Layout Example
Decoupling capacitor
placed as close as
possible to the device
10µF-22uF
2.2µH
0.1µF
A1
A2
A3
OUT+
B1
B2
B3
OUT-
C1
C2
C3
D1
D2
D3
Decoupling capacitor
and Input capacitors
placed as close as
possible to the device
ININ+
Differential Routing of
input and output
signals is
recommended
EN
Top Layer Ground Plane
Top Layer Traces
Pad to Top Layer Ground Plane
Bottom Layer Traces
Via to Bottom Ground Plane
Via to Bottom Layer
Via to Power Supply plane
Figure 26. Layout Recommendation
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13 Device and Documentation Support
13.1 Device Support
13.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
13.1.2 Device Nomenclature
13.1.2.1 Boost Terms
The following is a list of terms and definitions used in the boost equations found in this document.
C
Minimum boost capacitance required for a given ripple voltage on PVDD.
L
Boost inductor
fBOOST
Switching frequency of the boost converter.
IPVDD
Current pulled by the Class-D amplifier from the boost converter.
IL
Average current through the boost inductor.
PVDD
Supply voltage for the Class-D amplifier. (Voltage generated by the boost converter output)
VBAT
Supply voltage to the IC.
ΔIL
Ripple current through the inductor.
ΔV
Ripple voltage on PVDD.
13.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
13.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
13.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
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14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
14.1 Package Dimensions
The TPA2080D1 uses a 12-ball, 0.5-mm pitch WCSP package. The die length (D) and width (E) correspond to
the package mechanical drawing at the end of the datasheet.
Table 8. TPA2080D1 YZG Package Dimensions
DIMENSION
D
E
Max
2012 µm
1560 µm
Typ
1982 µm
1530 µm
Min
1952 µm
1500 µm
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PACKAGE OPTION ADDENDUM
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1-Feb-2016
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPA2080D1YZGR
ACTIVE
DSBGA
YZG
12
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
TPA2080D1
TPA2080D1YZGT
ACTIVE
DSBGA
YZG
12
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
TPA2080D1
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
1-Feb-2016
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
1-Feb-2016
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
TPA2080D1YZGR
DSBGA
YZG
12
3000
180.0
8.4
TPA2080D1YZGT
DSBGA
YZG
12
250
180.0
8.4
Pack Materials-Page 1
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
1.63
2.08
0.69
4.0
8.0
Q1
1.63
2.08
0.69
4.0
8.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
1-Feb-2016
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPA2080D1YZGR
DSBGA
YZG
12
3000
182.0
182.0
20.0
TPA2080D1YZGT
DSBGA
YZG
12
250
182.0
182.0
20.0
Pack Materials-Page 2
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IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
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These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
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