Texas Instruments | 2.8-W/Ch Stereo Class-D Audio Amplifier with Easy SmartGainTM AGC/DRC | Datasheet | Texas Instruments 2.8-W/Ch Stereo Class-D Audio Amplifier with Easy SmartGainTM AGC/DRC Datasheet

Texas Instruments 2.8-W/Ch Stereo Class-D Audio Amplifier with Easy SmartGainTM AGC/DRC Datasheet
TPA2017D2
www.ti.com ..................................................................................................................................................................................................... SLOS584 – APRIL 2009
2.8-W/Ch Stereo Class-D Audio Amplifier with SmartGainTM Dynamic Range Compression
and AGC
FEATURES
1
•
•
•
•
•
•
•
•
•
•
•
•
•
Filter-Free Class-D Architecture
3 SmartGainTM functions
– AGC DRC Function
– AGC Limiter Function
– AGC Noise Gate Function
1.7 W/Ch Into 8 Ω at 5 V (10% THD+N)
750 mW/Ch Into 8 Ω at 3.6 V (10% THD+N)
2.8 W/Ch Into 4 Ω at 5 V (10% THD+N)
1.5 W/Ch Into 4 Ω at 3.6 V (10% THD+N)
Power Supply Range: 2.5 V to 5.5 V
Low Supply Current: 3.5 mA
Low Shutdown Current: 0.2 µA
High PSRR: 75 dB at 217 Hz
Fast Start-up Time: 5 ms
Short-Circuit and Thermal Protection
Space-Saving Package
– 4 mm × 4 mm QFN (RTJ)
APPLICATIONS
•
•
•
•
•
•
•
•
Wireless or Cellular Handsets and PDAs
Portable Navigation Devices
Portable DVD Player
Notebook PCs
Portable Radio
Portable Games
Educational Toys
USB Speakers
DESCRIPTION
The TPA2017D2 (sometimes referred to as
TPA2017) is a stereo, filter-free Class-D audio power
amplifier
with
SmartGainTM
dynamic
range
compression (DRC), automatic gain control (AGC),
and noise gate. It is available in a 4 mm x 4mm QFN
package.
SmartGainTM
functions
are
configured
to
automatically prevent distortion of the audio signal
and enhance quiet passages that are normally not
heard. SmartGainTM is a combined AGC DRC and
Limiter that protects the speaker from damage at high
power levels and compress the dynamic range of
voice or music to fit within the dynamic range of the
speaker. SmartGainTM DRC, limiter, and noise gate
functions can be enabled or disabled. The
TPA2017D2 (TPA2017) is capable of driving 1.7
W/Ch at 4 V or 750mW/Ch at 3.6 V into 8 Ω load or
2.8 W/Ch at 5 V or 1.5 W/Ch at 3.6 V into 4 Ω. The
device features an enable pin and also provides
thermal and short circuit protection.
In addition to these features, a fast start-up time and
small package size make the TPA2017D2 (TPA2017)
an ideal choice for Notebook PCs, PDAs and other
portable applications.
SIMPLIFIED APPLICATION DIAGRAM
To Battery
10mF
AVdd
PVddL PVddR
TPA2017D2
CIN 1mF
(optional)
INL-
Analog
Baseband
or
CODEC
OUTL+
INL+
INRINR+
OUTLOUTR+
Digital
BaseBand
Enable1
Enable2
Master Shutdown
AGC1
OUTR-
AGC2
EN
AGND
PGND
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009, Texas Instruments Incorporated
TPA2017D2
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
FUNCTIONAL BLOCK DIAGRAM
AGC1
Control
Interface
AGC2
EN
IC enable
Bias and
References
Interface
& Control
AVDD
PVDDL
CIN
VoutL+
INL-
Differential
INL+
Input Left
Volume
Control
Class-D
Modulator
Power
Stage
VoutL-
1 mF
AGC
Reference
AGC
PVDDR
CIN
VoutR +
INR Differential
INR+
Input Right
Volume
Control
Class-D
Modulator
Power
Stage
VoutR -
1 mF
AGND
PGND
AGC1
EN
AGC2
DEVICE PINOUT
RTJ (QFN) PACKAGE
(TOP VIEW)
20
INL+
16
1
15
INL-
INR-
AGND
AVDD
PVDDL
PVDDR
5
11
2
PVDDR
OUTR-
PGND
10
OUTL-
OUTL+
6
OUTR+
PVDDL
INR+
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TERMINAL FUNCTIONS
TERMINAL
NAME
I/O/P
DESCRIPTION
QFN
INR+
15
I
Right channel positive audio input
INR–
14
I
Right channel negative audio input
INL+
1
I
Left channel positive audio input
INL–
2
I
Left channel negative audio input
EN
18
I
Enable terminal (active high)
AGC2
19
I
AGC select function pin 2
AGC1
17
I
AGC select function pin 1
OUTR+
10
O
Right channel positive differential output
OUTR–
9
O
Right channel negative differential output
OUTL+
6
O
Left channel positive differential output
OUTL–
7
O
Left channel negative differential output
AVDD
13
P
Analog supply (must be the same as PVDDR and PVDDL)
AGND
3
P
Analog ground (all GND pins need to be connected)
PVDDR
11, 12
P
Right channel power supply (must be the same as AVDD and PVDDL)
PGND
8
P
Power ground (all GND pins need to be connected)
PVDDL
4, 5
P
Left channel power supply (must be the same as AVDD and PVDDR)
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted).
VALUE / UNIT
VDD
Supply voltage
Input voltage
AVDD, PVDDR, PVDDL
–0.3 V to 6 V
INR+, INR–, INL+, INL–
–0.3 V to VDD+0.3 V
EN, AGC1, AGC2
–0.3 V to 6 V
Continuous total power dissipation
See Dissipation Ratings Table
TA
Operating free-air temperature range
–40°C to 85°C
TJ
Operating junction temperature range
–40°C to 150°C
Tstg
Storage temperature range
–65°C to 150°C
ESD
Electro-Static Discharge
Tolerance, all pins
Human Body Model (HBM)
2 KV
Charged Device Model (CDM)
500 V
3.6 Ω
RLOAD Minimum load resistance
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATINGS TABLE (1)
(1)
PACKAGE
TA ≤ 25°C
DERATING FACTOR
TA = 70°C
TA = 85°C
20-pin QFN
5.2 W
41.6 mW/°C
3.12 W
2.7 W
Dissipations ratings are for a 2-side, 2-plane PCB.
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AVAILABLE OPTIONS (1)
(1)
(2)
TA
PACKAGED DEVICES (2)
–40°C to 85°C
20-pin, 4 mm × 4 mm QFN (RTJ)
PART NUMBER
SYMBOL
TPA2017D2RTJR
–
TPA2017D2RTJT
–
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com
The RTJ packages are only available taped and reeled. The suffix R indicates a reel of 3000; the suffix T indicates a reel of 250.
RECOMMENDED OPERATING CONDITIONS
MIN MAX
VDD
Supply voltage
AVDD, PVDDR, PVDDL
2.5
VIH
High-level input voltage
EN, AGC1, AGC2
1.3
VIL
Low-level input voltage
EN, AGC1, AGC2
TA
Operating free-air temperature
–40
5.5
UNIT
V
V
0.6
V
85
°C
ELECTRICAL CHARACTERISTICS
at TA = 25°C, VDD = 3.6 V, EN = 1.3 V, and RL = 8 Ω + 33 µH (unless otherwise noted).
PARAMETER
VDD
ISD
IDD
TEST CONDITIONS
Supply voltage range
Shutdown quiescent current
Supply current
2.5
5.5
0.1
1
EN = 0.35 V, VDD = 3.6 V
0.2
1
EN = 0.35 V, VDD = 5.5 V
0.3
1
VDD = 2.5 V
3.5
4.9
VDD = 3.6 V
3.7
5.1
VDD = 5.5 V
4.5
5.5
300
325
kHz
1
µA
Class D Switching Frequency
High-level input current
VDD = 5.5 V, EN = 5.8 V
IIL
Low-level input current
VDD = 5.5 V, EN = –0.3 V
tSTART
Start-up time
2.5 V ≤ VDD ≤ 5.5 V no pop, CIN ≤ 1 µF
275
–1
2
Power on reset hysteresis
CMRR
Input common mode rejection
Voo
Output offset voltage
VDD = 3.6 V, AV = 6 dB, RL = 8 Ω, inputs ac grounded
ZO
Output Impedance in shutdown mode
EN = 0.35 V
Gain accuracy
Compression and limiter disabled, Gain = 0 to 30 dB
Power supply rejection ratio
VDD = 2.5 V to 4.7 V
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–10
V
µA
mA
µA
5
Power on reset ON threshold
RL = 8 Ω, Vicm = 0.5 V and Vicm = VDD – 0.8 V,
differential inputs shorted
4
UNIT
3.6
IIH
PSRR
TYP MAX
EN = 0.35 V, VDD = 2.5 V
fSW
POR
MIN
ms
2.3
V
0.2
V
–70
dB
0
10
2
–0.75
kΩ
0.75
–80
mV
dB
dB
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OPERATING CHARACTERISTICS
at TA = 25°C, VDD = 3.6V, EN = 1.3 V, RL = 8 Ω +33 µH, and AV = 6 dB (unless otherwise noted).
PARAMETER
TEST CONDITIONS
kSVR
VDD = 3.6 Vdc with ac of 200 mVPP at 217 Hz
power-supply ripple rejection ratio
THD+N
Nr
Total harmonic distortion + noise
Output integrated noise
f
Frequency response
PO(max)
η
MIN
Efficiency
MAX
–68
faud_in = 1 kHz; PO = 550 mW; VDD = 3.6 V
0.1%
faud_in = 1 kHz; PO = 1 W; VDD = 5 V
0.1%
faud_in = 1 kHz; PO = 630 mW; VDD = 3.6 V
1%
faud_in = 1 kHz; PO = 1.4 W; VDD = 5 V
1%
Av = 6 dB
44
Av = 6 dB floor, A-weighted
33
Av = 6 dB
Maximum output power
TYP
20
UNIT
dB
µV
µV
20000
Hz
THD+N = 10%, VDD = 5 V, RL = 4 Ω
2.8
W
THD+N = 10%, VDD = 3.6 V, RL = 4 Ω
1.5
W
THD+N = 10%, VDD = 5 V, RL = 8 Ω
1.4
W
THD+N = 10% , VDD = 3.6 V, RL = 8 Ω
630
mW
THD+N = 1%, VDD = 3.6 V, RL = 8 Ω, PO= 0.63 W
90%
THD+N = 1%, VDD = 5 V, RL = 8 Ω, PO = 1.4 W
90%
TEST SET-UP FOR GRAPHS
TPA2017D2
CI
+
Measurement
Output
–
IN+
OUT+
Load
CI
IN–
VDD
+
OUT–
30 kHz
Low-Pass
Filter
+
Measurement
Input
–
GND
1 mF
VDD
–
(1)
All measurements were taken with a 1-µF CI (unless otherwise noted.)
(2)
A 33-µH inductor was placed in series with the load resistor to emulate a small speaker for efficiency measurements.
(3)
The 30-kHz low-pass filter is required, even if the analyzer has an internal low-pass filter. An RC low-pass filter (1 kΩ
4.7 nF) is used on each output for the data sheet graphs.
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TYPICAL CHARACTERISTICS
with C(DECOUPLE) = 1 µF, CI = 1 µF, AGC1 = AGC2 = 0 V.
All THD + N graphs are taken with outputs out of phase (unless otherwise noted).
All data is taken on left channel.
Table of Graphs
FIGURE
Quiescent supply current
vs Supply voltage
Figure 1
Output Level
vs Input Level
Figure 2
Output power
vs Supply voltage
Figure 3
Total harmonic distortion + noise at 2.5 V
vs Frequency
Figure 4
Total harmonic distortion + noise at 3.6 V
vs Frequency
Figure 5
Total harmonic distortion + noise at 5 V
vs Frequency
Figure 6
Total harmonic distortion + noise
vs Output power at 8 Ω
Figure 7
Total harmonic distortion + noise
vs Output power at 4 Ω
Figure 8
Efficiency
vs Output power (per channel) at 8 Ω
Figure 9
Efficiency
vs Output power (per channel) at 4 Ω
Figure 10
Total power dissipation
vs Total output power at 8 Ω
Figure 11
Total power dissipation
vs Total output power at 4 Ω
Figure 12
Total supply current
vs Total output power at 8 Ω
Figure 13
Total supply current
vs Total output power at 4 Ω
Figure 14
Supply ripple rejection ratio
vs Frequency
Figure 15
Crosstalk
vs Frequency
Figure 16
Shutdown time
Figure 17
Startup time
Figure 18
QUIESCENT SUPPLY CURRENT
vs
SUPPLY VOLTAGE
OUTPUT LEVEL
vs
INPUT LEVEL
20
9
EN = VDD
10
8
Output Level − dBV
IDD − Quiescent Supply Current − mA
10
7
6
5
4
3
RL = 8 Ω + 33 µH
VDD = 5 V
0
−10
With AGC,
With Limiter
No AGC,
With Limiter
−20
−30
2
AGC, Limiter,
and Noise Gate
−40
1
0
2.5
3.5
4.5
VDD − Supply Voltage − V
5.5
−50
−70
−60
G001
Figure 1.
6
No AGC,
No Limiter
−50
−40
−30
−20
Input Level − dBV
−10
0
10
G003
Figure 2.
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TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
4.0
fIN = 1 kHz
Gain = 6 dB
3.0
THD = 1%, 4 Ω
2.5
THD = 10%, 4 Ω
1.5
1.0
THD = 10%, 8 Ω
0.5
THD = 1%, 8 Ω
0.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
THD+N − Total Harmonic Distortion + Noise − %
VCC − Supply Voltage − V
PO = 0.2 W
0.01
PO = 0.025 W
0.001
20
100
1k
10k
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
PO = 0.25 W
PO = 0.5 W
0.01
PO = 0.05 W
0.001
100
1k
10k
20k
10
Gain = 6 dB
RL = 8 Ω + 33 µH
VDD = 5 V
1
PO = 0.5 W
0.1
PO = 1 W
0.01
PO = 0.1 W
0.001
20
100
1k
10k
f − Frequency − Hz
G005
Figure 6.
TOTAL HARMONIC DISTORTION + NOISE
vs
OUTPUT POWER
TOTAL HARMONIC DISTORTION + NOISE
vs
OUTPUT POWER
Gain = 6 dB
RL = 8 Ω + 33 µH
VDD = 5 V
10
VDD = 3.6 V
1
VDD = 2.5 V
0.1
0.1
PO − Output Power − W
1
3
20k
G006
Figure 5.
100
20k
G004
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
f − Frequency − Hz
THD+N − Total Harmonic Distortion + Noise − %
PO = 0.125 W
0.1
G016
0.1
0.01
0.01
1
Figure 4.
Gain = 6 dB
RL = 8 Ω + 33 µH
VDD = 3.6 V
20
Gain = 6 dB
RL = 8 Ω + 33 µH
VDD = 2.5 V
Figure 3.
10
1
10
f − Frequency − Hz
THD+N − Total Harmonic Distortion + Noise − %
2.0
THD+N − Total Harmonic Distortion + Noise − %
PO − Output Power − W
3.5
THD+N − Total Harmonic Distortion + Noise − %
OUTPUT POWER
vs
SUPPLY VOLTAGE
100
Gain = 6 dB
RL = 4 Ω + 33 µH
VDD = 5 V
10
VDD = 3.6 V
1
VDD = 2.5 V
0.1
0.01
0.01
G007
Figure 7.
0.1
1
PO − Output Power − W
3
G008
Figure 8.
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EFFICIENCY
vs
OUTPUT POWER (PER CHANNEL)
100
100
90
90
80
80
VDD = 3.6 V
70
VDD = 5 V
VDD = 2.5 V
60
Efficiency − %
Efficiency − %
EFFICIENCY
vs
OUTPUT POWER (PER CHANNEL)
50
40
fIN = 1 kHz
Gain = 6 dB
RL = 8 Ω + 33 µH
20
10
0
0.0
0.5
1.0
1.5
50
40
fIN = 1 kHz
Gain = 6 dB
RL = 4 Ω + 33 µH
10
0
0.0
0.5
1.0
1.5
2.0
2.5
PO − Output Power (Per Channel) − W
G010
Figure 9.
Figure 10.
TOTAL POWER DISSIPATION
vs
TOTAL OUTPUT POWER
TOTAL POWER DISSIPATION
vs
TOTAL OUTPUT POWER
0.30
3.0
G011
1.0
0.25
0.20
PD − Total Power Dissipation − W
fIN = 1 kHz
Gain = 6 dB
RL = 8 Ω + 33 µH
VDD = 3.6 V
0.15
VDD = 2.5 V
VDD = 5 V
0.10
0.05
0.00
fIN = 1 kHz
Gain = 6 dB
RL = 4 Ω + 33 µH
0.9
0.8
0.7
VDD = 3.6 V
0.6
0.5
VDD = 2.5 V
0.4
VDD = 5 V
0.3
0.2
0.1
0.0
0
1
2
3
0
4
PO − Total Output Power − W
1
2
3
4
5
PO − Total Output Power − W
G012
Figure 11.
Figure 12.
TOTAL SUPPLY CURRENT
vs
TOTAL OUTPUT POWER
TOTAL SUPPLY CURRENT
vs
TOTAL OUTPUT POWER
1.0
6
G013
1.4
0.8
IDD − Total Supply Current − A
0.9
VDD = 5 V
0.7
VDD = 3.6 V
0.6
VDD = 2.5 V
0.5
0.4
0.3
fIN = 1 kHz
Gain = 6 dB
RL = 8 Ω + 33 µH
0.2
0.1
0.0
VDD = 5 V
1.2
VDD = 3.6 V
1.0
VDD = 2.5 V
0.8
0.6
0.4
fIN = 1 kHz
Gain = 6 dB
RL = 4 Ω + 33 µH
0.2
0.0
0
1
2
3
PO − Total Output Power − W
4
0
G014
Figure 13.
8
VDD = 5 V
VDD = 2.5 V
20
2.0
PO − Output Power (Per Channel) − W
PD − Total Power Dissipation − W
VDD = 3.6 V
60
30
30
IDD − Total Supply Current − A
70
1
2
3
4
PO − Total Output Power − W
5
6
G015
Figure 14.
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CROSSTALK
vs
FREQUENCY
0
0
−10
−20
Gain = 6 dB
RL = 8 Ω + 33 µH
POUT = 100 mW
VDD = 3.6 V
−20
−40
−30
Crosstalk − dB
PSRR − Power Supply Rejection Ratio − dB
POWER SUPPLY REJECTION RATIO
vs
FREQUENCY
−40
−50
VDD = 2.5 V
−60
VDD = 3.6 V
−70
−60
−80
Right to Left
−100
−80
−120
−90
VDD = 5 V
−100
20
100
Left to Right
1k
10k
f − Frequency − Hz
−140
20
20k
100
1k
f − Frequency − Hz
G009
Figure 15.
1.00
10k
20k
G017
Figure 16.
Output
0.75
EN: HIGH
LOW
Voltage – V
0.50
0.25
0.00
–0.25
–0.50
–0.75
–1.00
0.0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
t – Time – ms
G019
Figure 17. Shutdown Time
1.00
Output
0.75
EN: LOW
Voltage – V
0.50
HIGH
0.25
0.00
–0.25
–0.50
–0.75
–1.00
0
1
2
3
4
5
6
7
8
9
10
t – Time – ms
G020
Figure 18. Startup Time
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APPLICATION INFORMATION
AUTOMATIC GAIN CONTROL
The Automatic Gain Control (AGC) feature provides continuous automatic gain adjustment to the amplifier
through an internal PGA. This feature enhances the perceived audio loudness and at the same time prevents
speaker damage from occurring (Limiter function).
The AGC works by detecting the audio input envelope. The gain changes depending on the amplitude, the limiter
level, the compression ratio, and the attack and release time. The gain changes constantly as the audio signal
increases and/or decreases to create the compression effect. The gain step size for the AGC is 0.5 dB. If the
audio signal has near-constant amplitude, the gain does not change. Figure 19 shows how the AGC works.
INPUT SIGNAL
Limiter threshold
Limiter threshold
B
C
D
E
A
GAIN
OUTPUT SIGNAL
Limiter threshold
Release Time
Hold Time
Attack Time
Limiter threshold
A.
Gain decreases with no delay; attack time is reset. Release time and hold time are reset.
B.
Signal amplitude above limiter level, but gain cannot change because attack time is not over.
C.
Attack time ends; gain is allowed to decrease from this point forward by one step. Gain decreases because the
amplitude remains above limiter threshold. All times are reset
D.
Gain increases after release time finishes and signal amplitude remains below desired level. All times are reset after
the gain increase.
E.
Gain increases after release time is finished again because signal amplitude remains below desired level. All times
are reset after the gain increase.
Figure 19. Input and Output Audio Signal vs Time
10
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Gain - dB
Since the number of gain steps is limited the compression region is limited as well. The following figure shows
how the gain changes vs. the input signal amplitude in the compression region.
VIN - dBV
Figure 20. Input Signal Voltage vs Gain
Thus the AGC performs a mapping of the input signal vs. the output signal amplitude.
Pins AGC1 and AGC 2 are used to enable/disable the limiter, compression, and noise gate function. Table 1
shows each function.
Table 1. FUNCTION DEFINITION FOR AGC1 AND AGC2
AGC1
AGC2
Function
0
0
AGC Function disabled
0
1
AGC Limiter Function enabled
1
0
AGC, Limiter, and Compression Functions enabled
1
1
AGC, Limiter, Compression, and Noise Gate Functions enabled
The default values for the TPA2017D2 AGC function are given in Table 2. The default values can be changed at
the factory during production. Refer to the TI representative for assistance with different default value requests.
Table 2. AGC DEFAULT VALUES
Attack Time
6.4 ms / step
Release Time
1.81 sec/step
Fixed Gain
6 dB
NoiseGate Threshold
20 mV
Output Limiter Level
9 dBV
Max Gain
30 dB
Compression Ratio
2:1
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Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TPA2017D2
11
TPA2017D2
SLOS584 – APRIL 2009 ..................................................................................................................................................................................................... www.ti.com
DECOUPLING CAPACITOR (CS)
The TPA2017D2 is a high-performance Class-D audio amplifier that requires adequate power supply decoupling
to ensure the efficiency is high and total harmonic distortion (THD) is low. For higher frequency transients,
spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) 1-µF ceramic capacitor
(typically) placed as close as possible to the device PVDD (L, R) lead works best. Placing this decoupling
capacitor close to the TPA2017D2 is important for the efficiency of the Class-D amplifier, because any resistance
or inductance in the trace between the device and the capacitor can cause a loss in efficiency. For filtering
lower-frequency noise signals, a 4.7 µF or greater capacitor placed near the audio power amplifier would also
help, but it is not required in most applications because of the high PSRR of this device.
INPUT CAPACITORS (CI)
The input capacitors and input resistors form a high-pass filter with the corner frequency, fC, determined in
Equation 1.
1
fC =
(2p ´ RI ´ CI )
(1)
The value of the input capacitor is important to consider as it directly affects the bass (low frequency)
performance of the circuit. Speakers in wireless phones cannot usually respond well to low frequencies, so the
corner frequency can be set to block low frequencies in this application. Not using input capacitors can increase
output offset. Equation 2 is used to solve for the input coupling capacitance. If the corner frequency is within the
audio band, the capacitors should have a tolerance of ±10% or better, because any mismatch in capacitance
causes an impedance mismatch at the corner frequency and below.
1
CI =
(2p ´ RI ´ fC )
(2)
COMPONENT LOCATION
Place all the external components very close to the TPA2017D2. Placing the decoupling capacitor, CS, close to
the TPA2017D2 is important for the efficiency of the Class-D amplifier. Any resistance or inductance in the trace
between the device and the capacitor can cause a loss in efficiency.
EFFICIENCY AND THERMAL INFORMATION
The maximum ambient temperature depends on the heat-sinking ability of the PCB system. The derating factor
for the packages are shown in the dissipation rating table. Converting this to θJA for the WCSP package:
100°C/W
(3)
Given θJA of 100°C/W, the maximum allowable junction temperature of 150°C, and the maximum internal
dissipation of 0.4 W (0.2 W per channel) for 1.5 W per channel, 8-Ω load, 5-V supply, from Figure 9, the
maximum ambient temperature can be calculated with the following equation.
TA Max = TJMax - qJA PDMAX = 150 - 100 (0.4) = 110°C
(4)
Equation 4 shows that the calculated maximum ambient temperature is 110°C at maximum power dissipation
with a 5-V supply and 8-Ω a load. The TPA2017D2 is designed with thermal protection that turns the device off
when the junction temperature surpasses 150°C to prevent damage to the IC. Also, using speakers more
resistive than 8-Ω dramatically increases the thermal performance by reducing the output current and increasing
the efficiency of the amplifier.
OPERATION WITH DACS AND CODECS
In using Class-D amplifiers with CODECs and DACs, sometimes there is an increase in the output noise floor
from the audio amplifier. This occurs when mixing of the output frequencies of the CODEC/DAC mix with the
switching frequencies of the audio amplifier input stage. The noise increase can be solved by placing a low-pass
filter between the CODEC/DAC and audio amplifier. This filters off the high frequencies that cause the problem
and allow proper performance. See the functional block diagram.
12
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Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TPA2017D2
TPA2017D2
www.ti.com ..................................................................................................................................................................................................... SLOS584 – APRIL 2009
FILTER FREE OPERATION AND FERRITE BEAD FILTERS
A ferrite bead filter can often be used if the design is failing radiated emissions without an LC filter and the
frequency sensitive circuit is greater than 1 MHz. This filter functions well for circuits that just have to pass FCC
and CE because FCC and CE only test radiated emissions greater than 30 MHz. When choosing a ferrite bead,
choose one with high impedance at high frequencies, and low impedance at low frequencies. In addition, select a
ferrite bead with adequate current rating to prevent distortion of the output signal.
Use an LC output filter if there are low frequency (< 1 MHz) EMI sensitive circuits and/or there are long leads
from amplifier to speaker. Figure 21 shows typical ferrite bead and LC output filters.
Ferrite
Chip Bead
OUTP
1 nF
Ferrite
Chip Bead
OUTN
1 nF
Figure 21. Typical Ferrite Bead Filter (Chip bead example: TDK: MPZ1608S221A)
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Product Folder Link(s): TPA2017D2
13
PACKAGE OPTION ADDENDUM
www.ti.com
23-Feb-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPA2017D2RTJR
ACTIVE
QFN
RTJ
20
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
TPA
2017D2
TPA2017D2RTJT
ACTIVE
QFN
RTJ
20
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
TPA
2017D2
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
23-Feb-2014
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Aug-2017
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
4.25
1.15
8.0
12.0
Q2
TPA2017D2RTJR
QFN
RTJ
20
3000
330.0
12.4
TPA2017D2RTJR
QFN
RTJ
20
3000
330.0
12.4
4.3
4.3
1.1
8.0
12.0
Q2
TPA2017D2RTJT
QFN
RTJ
20
250
180.0
12.4
4.25
4.25
1.15
8.0
12.0
Q2
TPA2017D2RTJT
QFN
RTJ
20
250
180.0
12.4
4.3
4.3
1.1
8.0
12.0
Q2
Pack Materials-Page 1
4.25
B0
(mm)
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Aug-2017
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPA2017D2RTJR
QFN
RTJ
20
3000
367.0
367.0
35.0
TPA2017D2RTJR
QFN
RTJ
20
3000
370.0
355.0
55.0
TPA2017D2RTJT
QFN
RTJ
20
250
210.0
185.0
35.0
TPA2017D2RTJT
QFN
RTJ
20
250
195.0
200.0
45.0
Pack Materials-Page 2
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