Texas Instruments | Stereo Audio Codec with USB Interface, Single-Ended, Analog In/Out and S/PDIF | Datasheet | Texas Instruments Stereo Audio Codec with USB Interface, Single-Ended, Analog In/Out and S/PDIF Datasheet

Texas Instruments Stereo Audio Codec with USB Interface, Single-Ended, Analog In/Out and S/PDIF Datasheet
Not Recommended for New Designs
PCM2906B
Burr-Brown Audio
www.ti.com ........................................................................................................................................................................................... SLES227 – DECEMBER 2008
STEREO AUDIO CODEC WITH USB INTERFACE, SINGLE-ENDED ANALOG
INPUT/OUTPUT, AND S/PDIF
FEATURES
1
• On-Chip USB Interface:
– With Full-Speed Transceivers
– Fully Compliant with USB 2.0 Specification
– Certified by USB-IF
– Partially Programmable Descriptors (1)
– USB Adaptive Mode for Playback
– USB Asynchronous Mode for Record
– Bus Powered
• 16-Bit Delta-Sigma ADC and DAC
• Sampling Rate:
– DAC: 32, 44.1, 48 kHz
– ADC: 8, 11.025, 16, 22.05, 32, 44.1, 48 kHz
• On-Chip Clock Generator with Single 12-MHz
Clock Source
• S/PDIF Input/Output
• Single Power Supply:
– 5 V Typical (VBUS)
• Stereo ADC:
– Analog Performance at VBUS = 5 V:
– THD+N = 0.01%
– SNR = 89 dB
– Dynamic Range = 89 dB
– Decimation Digital Filter:
– Passband Ripple = ±0.05 dB
– Stop-Band Attenuation = –65 dB
– Single-Ended Voltage Input
– Antialiasing Filter Included
– Digital HPF Included
•
234
(1)
The descriptor can be modified by changing a mask.
•
•
Stereo DAC:
– Analog Performance at VBUS = 5 V:
– THD+N = 0.005%
– SNR = 96 dB
– Dynamic Range = 93 dB
– Oversampling Digital Filter:
– Passband Ripple = ±0.1 dB
– Stop-Band Attenuation = –43 dB
– Single-Ended Voltage Output
– Analog LPF Included
Multifunctions:
– Human Interface Device (HID) Function:
– Volume and Mute Controls
– Suspend Flag Function
28-Pin SSOP Package
APPLICATIONS
•
•
•
•
USB
USB
USB
USB
Audio Speaker
Headset
Monitor
Audio Interface Box
DESCRIPTION
The PCM2906B is Texas Instruments' single-chip,
USB, stereo audio codec with a USB-compliant
full-speed protocol controller and S/PDIF. The USB
protocol controller requires no software code, but the
USB descriptors can be modified in some areas (for
example, vendor ID and/or product ID). The
PCM2906B employs SpAct™ architecture, TI's
unique system that recovers the audio clock from
USB packet data. On-chip analog PLLs with SpAct
enable playback and record with low clock jitter as
well as independent playback and record sampling
rates.
1
2
3
4
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SpAct is a trademark of Texas Instruments.
System Two, Audio Precision are trademarks of Audio Precision, Inc.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008, Texas Instruments Incorporated
PCM2906B
Not Recommended for New Designs
SLES227 – DECEMBER 2008 ........................................................................................................................................................................................... www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGING/ORDERING INFORMATION (1)
PRODUCT
PACKAGE-LEAD
PACKAGE
DESIGNATOR
PCM2906BDB
SSOP-28
DB
(1)
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
–25°C to +85°C
PCM2906B
ORDERING
NUMBER
TRANSPORT
MEDIA,
QUANTITY
PCM2906BDB
Rails, 47
PCM2906BDBR
Tape and Reel,
2000
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
ABSOLUTE MAXIMUM RATINGS (1)
Over operating free-air temperature range (unless otherwise noted).
PARAMETER
Supply voltage, VBUS
Ground voltage differences, AGNDC, AGNDP, AGNDX, DGND, DGNDU
Digital input
voltage
Analog input
voltage
SEL0, SEL1, DIN
PCM2906B
UNIT
–0.3 to 6.5
V
±0.1
V
–0.3 to 6.5
D+, D–, HID0, HID1, HID2, XTI, XTO, DOUT, SSPND
–0.3 to (VDDI + 0.3) < 4
VINL, VINR, VCOM, VOUTR, VOUTL
–0.3 to (VCCCI + 0.3) < 4
VCCCI, VCCP1I, VCCP2I, VCCXI, VDDI
–0.3 to 4
Input current (any pins except supplies)
V
V
±10
mA
Ambient temperature under bias
–40 to +125
°C
Storage temperature, Tstg
–55 to +150
°C
Junction temperature, TJ
+150
°C
Lead temperature (soldering, 5s)
+260
°C
Package temperature (IR reflow, peak)
+250
°C
(1)
2
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
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ELECTRICAL CHARACTERISTICS
All specifications at TA = +25°C, VBUS, = 5 V, fS = 44.1 kHz, fIN = 1 kHz, and 16-bit data (unless otherwise noted).
PCM2906B
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DIGITAL INPUT/OUTPUT
Host interface
Apply USB Revision 2.0, full speed
Audio data format
USB isochronous data format
INPUT LOGIC
VIH (1)
2
3.3
VIL (1)
0.8
VIH (2) (3)
VIL (2) (3)
VIH
(4)
2.52
3.3
0.9
Input logic level
2
5.25
2.52
5.25
VIL (4)
0.8
VIH (5)
VIL (5)
0.9
IIH (1) (2) (4)
VIN = 3.3 V
±10
IIL (1) (2) (4)
VIN = 0 V
±10
IIH
(3)
IIL (3)
VDC
Input logic current
VIN = 3.3 V
50
VIN = 0 V
80
µA
±10
IIH (5)
VIN = 3.3 V
IIL (5)
VIN = 0 V
65
100
±10
OUTPUT LOGIC
VOH (1)
2.8
VOL (1)
VOH
0.3
(6)
VOL (6)
Output logic level
VOH (7)
VOL
IOH = –4 mA
IOH = –2 mA
(7)
2.8
IOL = 4 mA
0.5
VDC
2.8
IOL = 2 mA
0.5
CLOCK FREQUENCY
Input clock frequency, XTI
(1)
(2)
(3)
(4)
(5)
(6)
(7)
11.994
12
12.006
MHz
Pins 1, 2: D+, D–.
Pin 21: XTI.
Pins 5, 6, 7: HID0, HID1, HID2.
Pins 8, 9: SEL0, SEL1.
Pin 24: DIN.
Pin 25: DOUT.
Pin 28: SSPND.
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ELECTRICAL CHARACTERISTICS (continued)
All specifications at TA = +25°C, VBUS, = 5 V, fS = 44.1 kHz, fIN = 1 kHz, and 16-bit data (unless otherwise noted).
PCM2906B
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ADC CHARACTERISTICS
Resolution
Audio data channel
8, 16
Bits
1, 2
Channel
ADC Clock Frequency
fs
Sampling frequency
8, 11.025, 16, 22.05, 32, 44.1, 48
kHz
ADC DC Accuracy
Gain mismatch,
channel-to-channel
±1
±5
% of FSR
Gain error
±2
±10
% of FSR
Bipolar zero error
±0
% of FSR
ADC Dynamic Performance (8)
VIN = –1 dB (9), VCCCI = 3.67 V
THD+N
Total harmonic distortion
plus noise
0.01
VIN = –1 dB (10)
VIN = –60 dB
SNR
0.02
%
0.1
%
5
%
Dynamic range
A-weighted
81
89
dB
Signal-to-noise ratio
A-weighted
81
89
dB
80
85
dB
Input voltage
0.6 VCCCI
VPP
Center voltage
0.5 VCCCI
Channel separation
Analog Input
Input impedance
Antialiasing filter frequency
response
–3 dB
fIN = 20 kHz
V
30
kΩ
150
kHz
–0.08
dB
ADC Digital Filter Performance
Passband
Stop band
Stop-band attenuation
–65
Delay time
HPF frequency response
Hz
±0.05
dB
Hz
Passband ripple
td
0.454 fs
0.583 fs
dB
17.4/fs
–3 dB
0.078fs/1000
s
Hz
(8)
fIN = 1 kHz, using the System Two™ audio measurement system by Audio Precision™ in RMS mode with 20-kHz LPF, 400-Hz HPF in
calculation.
(9) Using external voltage regulator for VCCCI (as shown in Figure 36).
(10) Using internal voltage regulator for VCCCI (as shown in Figure 37).
4
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ELECTRICAL CHARACTERISTICS (continued)
All specifications at TA = +25°C, VBUS, = 5 V, fS = 44.1 kHz, fIN = 1 kHz, and 16-bit data (unless otherwise noted).
PCM2906B
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DAC CHARACTERISTICS
Resolution
Audio data channel
8, 16
Bits
1, 2
Channel
DAC Clock Frequency
fs
Sampling frequency
32, 44.1, 48
kHz
DAC DC Accuracy
Gain mismatch,
channel-to-channel
±1
±5
% of FSR
Gain error
±2
±10
% of FSR
Bipolar zero error
±2
% of FSR
DAC Dynamic Performance (11)
THD+N
SNR
Total harmonic distortion
plus noise
VOUT = 0 dB
0.005
Dynamic range
EIAJ, A-weighted
Signal-to-noise ratio
EIAJ, A-weighted
VOUT = –60 dB
Channel separation
0.016
%
3
%
87
93
dB
90
96
dB
86
92
dB
0.6 VCCCI
VPP
Analog Output
VO
Output voltage
Center voltage
Load impedance
LPF frequency response
0.5 VCCCI
AC coupling
V
10
–3 dB
f = 20 kHz
kΩ
250
kHz
–0.03
dB
DAC Digital Filter Performance
Passband
Stop band
Hz
±0.1
dB
0.555 fs
Hz
Passband ripple
Stop-band attenuation
td
0.445 fs
–43
Delay time
dB
14.3 fs
s
POWER-SUPPLY REQUIREMENTS
VBUS
Voltage range
Supply current
PD
Power dissipation
4.35
ADC, DAC operation
Suspend mode
(12)
VDC
67
mA
352
mW
280
(12)
Internal power-supply
voltage (13)
5.25
µA
250
ADC, DAC operation
Suspend mode
5
56
1.25
3.1
3.3
mW
3.5
VDC
+85
°C
TEMPERATURE RANGE
Operating temperature range
θJA
Thermal resistance
–25
28-pin SSOP
100
°C/W
(11) fOUT = 1 kHz, using the System Two audio measurement system by Audio Precision in RMS mode with 20-kHz LPF, 400-Hz HPF.
(12) In USB suspend state.
(13) Pins 10, 17, 19, 23, 27: VCCCI, VCCP1I, VCCP2I, VCCXI, VDDI.
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PIN ASSIGNMENTS
DB PACKAGE
SSOP-28
(TOP VIEW)
D+
D–
VBUS
DGNDU
HID0
HID1
HID2
SEL0
SEL1
VCCCI
AGNDC
VINL
VINR
VCOM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PCM2906B
28
27
26
25
24
23
22
21
20
19
18
17
16
15
SSPND
VDDI
DGND
DOUT
DIN
VCCXI
AGNDX
XTI
XTO
VCCP2I
AGNDP
VCCP1I
VOUTL
VOUTR
P0007-05
Table 1. TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
I/O
AGNDC
11
–
Analog ground for codec
DESCRIPTION
AGNDP
18
–
Analog ground for PLL
AGNDX
22
–
D–
2
I/O
USB differential input/output minus (1)
D+
1
I/O
USB differential input/output plus (1)
DGND
26
–
Digital ground
DGNDU
4
–
Digital ground for USB transceiver
DIN
24
I
S/PDIF input (2)
DOUT
25
O
S/PDIF output
HID0
5
I
HID key state input (mute), active-high (3)
HID1
6
I
HID key state input (volume up), active-high (3)
HID2
7
I
HID key state input (volume down), active-high (3)
SEL0
8
I
Must be set to high (4)
SEL1
9
I
Must be set to high (4)
SSPND
28
O
Suspend flag, active-low (Low: suspend, High: operational)
VBUS
3
–
Connect to USB power (VBUS)
VCCCI
10
–
Internal analog power supply for codec (5)
VCCP1I
17
–
Internal analog power supply for PLL (5)
VCCP2I
19
–
Internal analog power supply for PLL (5)
VCCXI
23
–
Internal analog power supply for oscillator (5)
VCOM
14
–
Common for ADC/DAC (VCCCI/2) (5)
VDDI
27
–
Internal digital power supply (5)
Analog ground for oscillator
VINL
12
I
ADC analog input for L-channel
VINR
13
I
ADC analog input for R-channel
VOUTL
16
O
DAC analog output for L-channel
VOUTR
15
O
DAC analog output for R-channel
XTI
21
I
Crystal oscillator input (6)
XTO
20
O
Crystal oscillator output
(1)
(2)
(3)
(4)
(5)
(6)
6
LV-TTL level.
3.3-V CMOS-level input with internal pulldown, 5-V tolerant.
3.3-V CMOS-level input with internal pulldown. This pin informs the PC of serviceable control signals such as mute, volume up, or
volume down, which have no direct connection with the internal DAC or ADC. See the Interface #3 and End-Points sections.
TTL Schmitt trigger, 5-V tolerant.
Connect a decoupling capacitor to GND.
3.3-V CMOS-level input.
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FUNCTIONAL BLOCK DIAGRAM
VCCCI
VCCP1I
VCCP2I
VCCXI
VDDI
AGNDC
AGNDP
AGNDX
DGND
DGNDU
5-V to 3.3-V Voltage Regulator
Lock
DIN
Power
Manager
SSPND
S/PDIF Decoder
VBUS
VINL
ISO-In
End-Point
USB SIE
VINR
Analog
PLL
VCOM
Selector
Analog
PLL
XCVR
FIFO
ADC
D+
D–
Control
End-Point
SEL0
SEL1
VOUTL
FIFO
DAC
ISO-Out
End-Point
VOUTR
DOUT
HID0
HID1
HID2
HID
End-Point
S/PDIF Encoder
USB
Protocol
Controller
96 MHz
PLL (´8)
XTI
12 MHz
Tracker
(SpAct)
XTO
B0239-01
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BLOCK DIAGRAM OF ANALOG FRONT-END (RIGHT CHANNEL)
4.7 mF
+
VINR
30 kW
–
13
–
(+)
+
+
(–)
Delta-Sigma
Modulator
VCOM
14
+
(VCCCI/2)
10 mF
Reference
S0011-06
8
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TYPICAL CHARACTERISTICS: ADC
All specifications at TA = +25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, using REG103xA-A, unless otherwise
noted.
TOTAL HARMONIC DISTORTION + NOISE AT –1 dB
vs
FREE-AIR TEMPERATURE
DYNAMIC RANGE and SNR
vs
FREE-AIR TEMPERATURE
95
0.009
Dynamic Range and SNR – dB
THD+N – Total Harmonic Distortion + Noise – %
0.010
0.008
0.007
0.006
0.005
91
Dynamic Range
89
SNR
87
0.004
0.003
−50
−25
0
25
50
75
85
−50
100
TA – Free-Air Temperature – °C
−25
0
25
50
75
TA – Free-Air Temperature – °C
G001
Figure 1.
Figure 2.
TOTAL HARMONIC DISTORTION + NOISE AT –1 dB
vs
SUPPLY VOLTAGE
DYNAMIC RANGE and SNR
vs
SUPPLY VOLTAGE
0.010
100
G002
95
0.009
Dynamic Range and SNR – dB
THD+N – Total Harmonic Distortion + Noise – %
93
0.008
0.007
0.006
0.005
93
91
Dynamic Range
89
SNR
87
0.004
0.003
4.0
4.5
5.0
VBUS – Supply Voltage – V
5.5
85
4.0
G003
Figure 3.
4.5
5.0
VBUS – Supply Voltage – V
5.5
G004
Figure 4.
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TYPICAL CHARACTERISTICS: ADC (continued)
All specifications at TA = +25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, using REG103xA-A, unless otherwise
noted.
TOTAL HARMONIC DISTORTION + NOISE AT –1 dB
vs
SAMPLING FREQUENCY
DYNAMIC RANGE and SNR
vs
SAMPLING FREQUENCY
95
0.009
Dynamic Range and SNR – dB
THD+N – Total Harmonic Distortion + Noise – %
0.010
0.008
0.007
0.006
0.005
93
91
Dynamic Range
89
SNR
87
0.004
0.003
85
30
35
40
45
50
fS – Sampling Frequency – kHz
30
35
40
45
50
fS – Sampling Frequency – kHz
G005
Figure 5.
G006
Figure 6.
TYPICAL CHARACTERISTICS: DAC
All specifications at TA = +25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, using REG103xA-A, unless otherwise
noted.
TOTAL HARMONIC DISTORTION + NOISE AT 0 dB
vs
FREE-AIR TEMPERATURE
DYNAMIC RANGE and SNR
vs
FREE-AIR TEMPERATURE
98
97
0.007
Dynamic Range and SNR – dB
THD+N – Total Harmonic Distortion + Noise – %
0.008
0.006
0.005
0.004
95
Dynamic Range
94
93
92
91
0.003
−50
−25
0
25
50
75
TA – Free-Air Temperature – °C
100
90
−50
G007
Figure 7.
10
SNR
96
−25
0
25
50
TA – Free-Air Temperature – °C
75
100
G008
Figure 8.
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TYPICAL CHARACTERISTICS: DAC (continued)
All specifications at TA = +25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, using REG103xA-A, unless otherwise
noted.
TOTAL HARMONIC DISTORTION + NOISE AT 0 dB
vs
SUPPLY VOLTAGE
DYNAMIC RANGE and SNR
vs
SUPPLY VOLTAGE
98
97
0.007
Dynamic Range and SNR – dB
THD+N – Total Harmonic Distortion + Noise – %
0.008
0.006
0.005
0.004
95
Dynamic Range
94
93
92
91
0.003
4.0
4.5
5.0
90
4.0
5.5
VBUS – Supply Voltage – V
4.5
5.0
5.5
VBUS – Supply Voltage – V
G009
Figure 9.
Figure 10.
TOTAL HARMONIC DISTORTION + NOISE AT 0 dB
vs
SAMPLING FREQUENCY
DYNAMIC RANGE and SNR
vs
SAMPLING FREQUENCY
G010
98
0.008
97
0.007
Dynamic Range and SNR – dB
THD+N – Total Harmonic Distortion + Noise – %
SNR
96
0.006
0.005
0.004
96
SNR
95
94
93
Dynamic Range
92
91
90
0.003
30
35
40
45
30
50
fS – Sampling Frequency – kHz
G011
Figure 11.
35
40
45
fS – Sampling Frequency – kHz
50
G012
Figure 12.
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TYPICAL CHARACTERISTICS: SUPPLY CURRENT
All specifications at TA = +25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, using REG103xA-A, unless otherwise
noted.
OPERATIONAL and SUSPEND SUPPLY CURRENT
vs
SUPPLY VOLTAGE
ICC – Operational Supply Current – mA
60
0.28
Operational
0.26
50
Suspend
40
0.24
30
0.22
20
4.00
4.25
4.50
4.75
5.00
5.25
ICC – Suspend Supply Current – mA
0.30
70
0.20
5.50
VBUS – Supply Voltage – V
G013
Figure 13.
OPERATIONAL SUPPLY CURRENT
vs
SAMPLING FREQUENCY
SUSPEND SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
0.40
ICC – Suspend Supply Current – mA
ICC – Operational Supply Current – mA
70
60
50
40
30
20
30
35
40
45
50
fS – Sampling Frequency – kHz
0.35
0.30
USB Spec Limit for Device (0.3 mA)
0.25
0.20
0.15
0.10
–40
G014
Figure 14.
12
–20
0
20
40
60
TA – Free-Air Temperature – °C
80
100
G015
Figure 15.
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TYPICAL CHARACTERISTICS: ADC DIGITAL DECIMATION FILTER FREQUENCY RESPONSE
All specifications at TA = +25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
OVERALL CHARACTERISTICS
STOP-BAND ATTENUATION
0
0
−10
−20
−20
−40
Amplitude – dB
Amplitude – dB
−30
−60
−80
−100
−40
−50
−60
−70
−120
−80
−140
−90
−160
0
8
16
24
Frequency [y fS]
0.4
0.6
0.8
G016
Figure 17.
PASSBAND RIPPLE
TRANSITION-BAND RESPONSE
0
0.0
−4
−0.2
−0.4
−0.6
1.0
G017
Figure 16.
0.2
−0.8
0.0
0.2
Frequency [y fS]
Amplitude – dB
Amplitude – dB
−100
0.0
32
−8
−12
−16
0.1
0.2
0.3
Frequency [y fS]
0.4
0.5
−20
0.46
G018
Figure 18.
0.48
0.50
0.52
Frequency [y fS]
0.54
G019
Figure 19.
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TYPICAL CHARACTERISTICS: ADC DIGITAL HIGH-PASS FILTER FREQUENCY RESPONSE
All specifications at TA = +25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
STOP-BAND CHARACTERISTICS
PASSBAND CHARACTERISTICS
0
0.0
−10
−20
−0.2
Amplitude – dB
Amplitude – dB
−30
−40
−50
−60
−0.4
−0.6
−70
−80
−0.8
−90
−100
0.0
−1.0
0.1
0.2
0.3
Frequency [y fS/1000]
0.4
0
1
2
3
Frequency [y fS/1000]
G020
Figure 20.
4
G021
Figure 21.
TYPICAL CHARACTERISTICS: ADC ANALOG ANTIALIASING FILTER FREQUENCY RESPONSE
All specifications at TA = +25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
PASSBAND CHARACTERISTICS
0.0
−10
−0.2
Amplitude – dB
Amplitude − dB
STOP-BAND CHARACTERISTICS
0
−20
−30
−0.4
−0.6
−0.8
−40
−50
1
10
100
1k
10k
−1.0
0.01
0.1
1
100
G023
G022
Figure 22.
14
10
f – Frequency – kHz
f − Frequency − kHz
Figure 23.
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TYPICAL CHARACTERISTICS: DAC DIGITAL INTERPOLATION FILTER FREQUENCY
RESPONSE
All specifications at TA = +25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
STOP-BAND ATTENUATION
PASSBAND RIPPLE
0
0.2
−10
−20
0.0
Amplitude – dB
Amplitude – dB
−30
−40
−50
−60
−0.2
−0.4
−70
−80
−0.6
−90
−100
0
1
2
3
−0.8
0.0
4
Frequency [y fS]
0.1
0.2
0.3
0.4
Frequency [y fS]
G024
Figure 24.
0.5
G025
Figure 25.
TRANSITION-BAND RESPONSE
0
−2
−4
Amplitude – dB
−6
−8
−10
−12
−14
−16
−18
−20
0.46 0.47 0.48
0.49 0.50 0.51
0.52 0.53 0.54
Frequency [y fS]
G026
Figure 26.
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TYPICAL CHARACTERISTICS: DAC ANALOG FIR FILTER FREQUENCY RESPONSE
All specifications at TA = +25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
PASSBAND CHARACTERISTICS
0.2
−10
0.0
Amplitude – dB
Amplitude – dB
STOP-BAND CHARACTERISTICS
0
−20
−30
−40
−0.2
−0.4
−0.6
−50
0
8
16
24
−0.8
0.0
32
Frequency [y fS]
0.1
0.2
0.3
0.4
Frequency [y fS]
G027
Figure 27.
0.5
G028
Figure 28.
TYPICAL CHARACTERISTICS: DAC ANALOG LOW-PASS FILTER FREQUENCY RESPONSE
All specifications at TA = +25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
PASSBAND CHARACTERISTICS
0.0
−10
−0.2
Amplitude – dB
Amplitude – dB
STOP-BAND CHARACTERISTICS
0
−20
−30
−0.4
−0.6
−0.8
−40
−50
1
10
100
1k
10k
−1.0
0.01
0.1
1
100
G030
G029
Figure 29.
16
10
f – Frequency – kHz
f – Frequency – kHz
Figure 30.
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DETAILED DESCRIPTION
USB INTERFACE
Control data and audio data are transferred to the PCM2906B via D+ (pin 1) and D– (pin 2). All data to/from the
PCM2906B are transferred at full speed. The device descriptor contains the information described in Table 2.
The device descriptor can be modified on request; contact a Texas Instruments representative about the details.
Table 2. Device Descriptor
USB revision
2.0 compliant
Device class
0x00 (device defined interface level)
Device sub class
0x00 (not specified)
Device protocol
0x00 (not specified)
Max packet size for end-point 0
8 byte
Vendor ID
0x08BB (default value, can be modified)
Product ID
0x29B6 (default value, can be modified)
Device release number
1.0 (0x0100)
Number of configurations
1
Vendor string
String #1 (see Table 4)
Product string
String #2 (see Table 4)
Serial number
Not supported
The configuration descriptor contains the information described in Table 3. The configuration descriptor can be
modified on request; contact a Texas Instruments representative about the details.
Table 3. Configuration Descriptor
Interface
Four interfaces
Power attribute
0x80 (Bus powered, no remote wakeup)
Max power
0xFA (500 mA. Default value, can be modified)
The string descriptor contains the information described in Table 4. The string descriptor can be modified on
request; contact a Texas Instruments representative about the details.
Table 4. String Descriptor
#0
0x0409
#1
Burr-Brown from TI (default value, can be modified)
#2
USB Audio CODEC (default value, can be modified)
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DEVICE CONFIGURATION
Figure 31 illustrates the USB audio function topology. The PCM2906B has four interfaces. Each interface
consists of alternative settings.
End-Point #0
Default End-Point
FU
Analog Out
End-Point #2
(IF #1)
IT
TID1
OT
TID2
Audio Streaming Interface
UID3
Analog In
End-Point #4
(IF #2)
IT
TID4
OT
TID5
Audio Streaming Interface
Standard Audio Control Interface (IF #0)
End-Point #5
(IF #3)
HID Interface
PCM2906B
M0024-02
Figure 31. USB Audio Function Topology
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Interface #0
Interface #0 is the control interface. Alternative setting #0 is the only possible setting for interface #0. Alternative
setting #0 describes the standard audio control interface. The audio control interface consists of a single
terminal. The PCM2906B has the following five terminals:
• Input terminal (IT #1) for isochronous-out stream
• Output terminal (OT #2) for audio analog output
• Feature unit (FU #3) for DAC digital attenuator
• Input terminal (IT #4) for audio analog input
• Output terminal (OT #5) for isochronous-in stream
Input terminal #1 is defined as a USB stream (terminal type 0x0101). Input terminal #1 can accept two-channel
audio streams consisting of left and right channels. Output terminal #2 is defined as a speaker (terminal type
0x0301). Input terminal #4 is defined as a microphone (terminal type 0x0201). Output terminal #5 is defined as a
USB stream (terminal type 0x0101). Output terminal #5 can generate two-channel audio streams composed of
left and right channel data. Feature unit #3 supports the following sound control features:
• Volume control
• Mute control
The built-in digital volume controller can be manipulated by an audio-class-specific request from 0 dB to –64 dB
in 1-dB steps. Changes are made by incrementing or decrementing by one step (1 dB) for every 1/fS time interval
until the volume level has reached the requested value. Each channel can be set for different values. The master
volume control is not supported. A request to the master volume is stalled and ignored. The built-in digital mute
controller can be manipulated by audio-class-specific request. A master mute control request is acceptable. A
request to an individual channel is stalled and ignored.
Interface #1
Interface #1 is the audio streaming data-out interface. Interface #1 has the five alternative settings listed in
Table 5. Alternative setting #0 is the zero-bandwidth setting. All other alternative settings are operational settings.
Table 5. Interface #1 Alternative Settings
ALTERNATIVE
SETTING
DATA FORMAT
00
TRANSFER
MODE
SAMPLING RATE
(kHz)
32, 44.1, 48
Zero bandwidth
01
16-bit
Stereo
Twos complement (PCM)
Adaptive
02
16-bit
Mono
Twos complement (PCM)
Adaptive
32, 44.1, 48
03
8-bit
Stereo
Twos complement (PCM)
Adaptive
32, 44.1, 48
04
8-bit
Mono
Twos complement (PCM)
Adaptive
32, 44.1, 48
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Interface #2
Interface #2 is the audio streaming data-in interface. Interface #2 has the 19 alternative settings listed in Table 6.
Alternative setting #0 is the zero-bandwidth setting. All other alternative settings are operational settings.
Table 6. Interface #2 Alternative Settings
ALTERNATIVE
SETTING
TRANSFER
MODE
DATA FORMAT
00
SAMPLING RATE
(kHz)
Zero Bandwidth
01
16-bit
Stereo
Twos complement (PCM)
Asynchronous
48
02
16-bit
Mono
Twos complement (PCM)
Asynchronous
48
03
16-bit
Stereo
Twos complement (PCM)
Asynchronous
44.1
04
16-bit
Mono
Twos complement (PCM)
Asynchronous
44.1
05
16-bit
Stereo
Twos complement (PCM)
Asynchronous
32
06
16-bit
Mono
Twos complement (PCM)
Asynchronous
32
07
16-bit
Stereo
Twos complement (PCM)
Asynchronous
22.05
08
16-bit
Mono
Twos complement (PCM)
Asynchronous
22.05
09
16-bit
Stereo
Twos complement (PCM)
Asynchronous
16
0A
16-bit
Mono
Twos complement (PCM)
Asynchronous
16
0B
8-bit
Stereo
Twos complement (PCM)
Asynchronous
16
0C
8-bit
Mono
Twos complement (PCM)
Asynchronous
16
0D
8-bit
Stereo
Twos complement (PCM)
Asynchronous
8
0E
8-bit
Mono
Twos complement (PCM)
Asynchronous
8
0F
16-bit
Stereo
Twos complement (PCM)
Synchronous
11.025
10
16-bit
Mono
Twos complement (PCM)
Synchronous
11.025
11
8-bit
Stereo
Twos complement (PCM)
Synchronous
11.025
12
8-bit
Mono
Twos complement (PCM)
Synchronous
11.025
Interface #3
Interface #3 is the interrupt data-in interface. Alternative setting #0 is the only possible setting for interface #3.
Interface #3 consists of the HID consumer control device and reports the status of these three key parameters:
• Mute (0xE209)
• Volume up (0xE909)
• Volume down (0xEA09)
End-Points
The PCM2906B has the following four end-points:
• Control end-point (EP #0)
• Isochronous-out audio data stream end-point (EP #2)
• Isochronous-in audio data stream end-point (EP #4)
• HID end-point (EP #5)
The control end-point is a default end-point. The control end-point is used to control all functions of the
PCM2906B by the standard USB request and USB audio class specific request from the host. The
isochronous-out audio data stream end-point is an audio sink end-point, which receives the PCM audio data. The
isochronous-out audio data stream end-point accepts the adaptive transfer mode. The isochronous-in audio data
stream end-point is an audio source end-point that transmits the PCM audio data. The isochronous-in audio data
stream end-point uses the asynchronous transfer mode. The HID end-point is an interrupt-in end-point. The HID
end-point reports HID0, HID1, and HID2 pin status every 32 ms.
The human interface device (HID) pins are defined as consumer control devices. The HID function is designed
as an independent end-point from both isochronous-in and -out end-points. Therefore, the result obtained from
the HID operation depends on the host software. Typically, the HID function is used as the primary audio-out
device.
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Clock and Reset
The PCM2906B requires a 12-MHz (±500 ppm) clock for the USB and audio functions. The clock can be
generated by a built-in oscillator with a 12-MHz crystal resonator. The 12-MHz crystal resonator must be
connected to XTI (pin 21) and XTO (pin 20) with one high-value (1-MΩ) resistor and two small capacitors, the
capacitance of which depends on the load capacitance of the crystal resonator. An external clock can be
supplied to XTI (pin 21). If an external clock is used, XTO (pin 20) must be left open. Because there is no clock
disabling signal, use of the external clock supply is not recommended. SSPND (pin 28) is unable to use clock
disabling.
The PCM2906B has an internal power-on reset circuit, which triggers automatically when VBUS (pin 3) exceeds
2.5 V typical (2.7 V to 2.2 V). Approximately 700 µs is required until internal reset release.
Digital Audio Interface
The PCM2906 employs S/PDIF for both input and output. Isochronous-out data from the host are encoded to the
S/PDIF output and the DAC analog output. Input data are selected from either the S/PDIF or ADC analog input.
When the device detects S/PDIF input and successfully locks the received data, the isochronous-in transfer data
source automatically selected is S/PDIF; otherwise, the data source selected is the ADC analog input.
This feature is a customer option. It is the responsibility of the user to implement this feature.
Supported Input/Output Data
The following data formats are accepted by S/PDIF for input and output. All other data formats are unusable as
S/PDIF.
• 48-kHz 16-bit stereo
• 44.1-kHz 16-bit stereo
• 32-kHz 16-bit stereo
Any mismatch of the sampling rate between the input S/PDIF signal and the host command is not acceptable.
Any mismatch of the data format between the input S/PDIF signal and the host command may cause unexpected
results, with the following exceptions:
• Recording in monaural format from stereo data input at the same data rate
• Recording in 8-bit format from 16-bit data input at the same data rate
A combination of these two conditions is not acceptable.
For playback, all possible data-rate sources are converted to the 16-bit stereo format at the same source data
rate.
Channel Status Information
The channel status information is fixed as consumer application, PCM mode, copyright, and digital/digital
converter. All other bits are fixed as 0's except for the sample frequency, which is set automatically according to
the data received through the USB.
Copyright Management
Isochronous-in data are affected by the serial copy management system (SCMS). When the control bit indicates
that the received digital audio data are original, the input digital audio data are transferred to the host. If the data
are indicated as first generation or higher, the transferred data are routed to the analog input.
Digital audio data output is always encoded as original with SCMS control.
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INTERFACE SEQUENCE
Power-On, Attach, and Playback Sequence
The PCM2906B is ready for setup when the reset sequence has finished and the USB device is attached. After a
connection has been established by setup, the PCM2906B is ready to accept USB audio data. While waiting for
the audio data (idle state), the analog output is set to bipolar zero (BPZ).
When receiving the audio data, the PCM2906B stores the first audio packet, which contains 1-ms audio data,
into the internal storage buffer. The PCM2906B starts playing the audio data when detecting the next
start-of-frame (SOF) packet, as illustrated in Figure 32.
5 V (Typ)
VBUS (Pin 3)
2.5 V (Typ)
0V
Bus Reset
st
1 Audio Data
Set Configuration
2
nd
Audio Data
Bus Idle
D+/D–
SOF
SOF
SOF
SSPND
BPZ
VOUTL
VOUTR
700 ms
Device Setup
Internal Reset
Ready for Setup
1 ms
Ready for Playback
T0055-02
Figure 32. Initial Sequence
Play, Stop, and Detach Sequence
When the host finishes or aborts the playback, the PCM2906B stops playing after the last audio data have
played, as shown in Figure 33.
VBUS (Pin 3)
Audio Data
Audio Data
Last Audio Data
D+/D–
SOF
SOF
SOF
SOF
SOF
VOUTL
VOUTR
Detach
1 ms
T0056-02
Figure 33. Play, Stop, and Detach Sequence
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Record Sequence
The PCM2906B starts audio capture into the internal memory after receiving the SET_INTERFACE command,
as shown in Figure 34.
Audio Data
SET_INTERFACE
IN Token
Audio Data
Audio Data
IN Token
IN Token
D+/D–
SOF
SOF
SOF
SOF
SOF
VINL
VINR
1 ms
T0259-01
Figure 34. Record Sequence
Suspend and Resume Sequence
The PCM2906B enters the suspend state after a constant idle state on the USB bus (approximately 5 ms), as
shown in Figure 35. While the PCM2906B enters the suspend state, the SSPND flag (pin 28) is asserted. The
PCM2906B wakes up immediately upon detecting a non-idle state on the USB.
Idle
D+/D–
SSPND
Active
5 ms
Suspend
Active
T0057-02
Figure 35. Suspend and Resume Sequence
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APPLICATION INFORMATION
TYPICAL CIRCUIT CONNECTION 1
Figure 36 illustrates a typical circuit connection for a simple application. The circuit illustrated is for information
only. The entire board design should be considered to meet the USB specification as a USB-compliant product.
1.5 kW ´ 3
1.5 kW
PCM2906B
22 W
D+
22 W
D–
1 D+
SSPND
28
2
D–
VDDI
27
3
VBUS
DGND
26
4
DGNDU
DOUT
25
5
HID0
DIN
24
6
HID1
VCCXI
23
7
HID2
AGNDX
22
8
SEL0
XTI
21
9
SEL1
XTO
20
10
VCCCI
VCCP2I
19
11
AGNDC
AGNDP
18
12
VINL
VCCP1I
17
13
VINR
VOUTL
16
14
VCOM
VOUTR
15
2.2 W
VBUS
1 mF
GND
IC1
IN OUT GND ADJ EN
5
3
4
1
2
C13
D1
C4
+
27 kW
C6
3.60 V–
3.85 V
+
12 MHz
C7
13 kW
+
C5
1 MW
C1
C9
C10
C3
C2
+
MUTE/
Power
Down
C8
+
C11
+
C12
LPF,
Amp
LPF,
Amp
S0264-02
NOTE: C1, C2: 10 µF
C3, C4, C7, C8, C13: 1 µF (These capacitors must be less than 2 µF.)
C5, C6: 10 pF to 33 pF (depending on crystal resonator)
C9, C10, C11, C12: The capacitance may vary depending on design.
IC1: REG103xA-A (TI) or equivalent. Analog performance may vary depending on IC1.
D1: Schottky barrier diode (VF ≤ 350 mV at 10 mA, IR ≤ 2 µA at 4 V)
Figure 36. Bus-Powered Configuration for High-Performance Application
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TYPICAL CIRCUIT CONNECTION 2
Figure 37 illustrates a typical circuit connection for a simple application. The circuit illustrated is for information
only. The entire board design should be considered to meet the USB specification as a USB-compliant product.
1.5 kW ´ 4
PCM2906B
22 W
D+
22 W
D–
1 D+
SSPND
28
2
D–
VDDI
27
3
VBUS
DGND
26
4
DGNDU
DOUT
25
5
HID0
DIN
24
6
HID1
VCCXI
23
7
HID2
AGNDX
22
8
SEL0
XTI
21
9
SEL1
XTO
20
10
VCCCI
VCCP2I
19
11
AGNDC
AGNDP
18
12
VINL
VCCP1I
17
13
VINR
VOUTL
16
14
VCOM
VOUTR
15
2.2 W
VBUS
1 mF
GND
C3
C4
C5
1 MW
C6
12 MHz
C1
+
C9
C10
+
+
C2
+
C7
MUTE/
Power
Down
C8
+
C11
+
C12
LPF,
Amp
LPF,
Amp
S0265-02
NOTE: C1, C2: 10 µF
C3, C4, C7, C8: 1 µF (These capacitors must be less than 2 µF.)
C5, C6: 10 pF to 33 pF (depending on crystal resonator)
C9, C10, C11, C12: The capacitance may vary depending on design.
In this case, the analog performance of the ADC may be degraded.
Figure 37. Bus-Powered Configuration
OPERATING ENVIRONMENT
For current information on the PCM2906B operating environment, see the Updated Operating Environments for
PCM270X, PCM290X Applications application report, SLAA374.
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PACKAGE OPTION ADDENDUM
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11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
PCM2906BDB
NRND
SSOP
DB
28
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-25 to 85
PCM2906B
PCM2906BDBR
NRND
SSOP
DB
28
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-25 to 85
PCM2906B
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Sep-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
PCM2906BDBR
Package Package Pins
Type Drawing
SSOP
DB
28
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2000
330.0
16.4
Pack Materials-Page 1
8.2
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
10.5
2.5
12.0
16.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Sep-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
PCM2906BDBR
SSOP
DB
28
2000
367.0
367.0
38.0
Pack Materials-Page 2
PACKAGE OUTLINE
DB0028A
SSOP - 2 mm max height
SCALE 1.500
SMALL OUTLINE PACKAGE
C
8.2
TYP
7.4
A
0.1 C
PIN 1 INDEX AREA
SEATING
PLANE
26X 0.65
28
1
2X
10.5
9.9
NOTE 3
8.45
14
15
28X
B
5.6
5.0
NOTE 4
SEE DETAIL A
(0.15) TYP
0.38
0.22
0.15
C A B
2 MAX
0.25
GAGE PLANE
0 -8
0.95
0.55
0.05 MIN
DETAIL A
A 15
TYPICAL
4214853/B 03/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-150.
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EXAMPLE BOARD LAYOUT
DB0028A
SSOP - 2 mm max height
SMALL OUTLINE PACKAGE
SYMM
28X (1.85)
(R0.05) TYP
1
28X (0.45)
28
26X (0.65)
SYMM
15
14
(7)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 10X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MAX
ALL AROUND
NON-SOLDER MASK
DEFINED
(PREFERRED)
0.07 MIN
ALL AROUND
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
15.000
4214853/B 03/2018
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
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EXAMPLE STENCIL DESIGN
DB0028A
SSOP - 2 mm max height
SMALL OUTLINE PACKAGE
28X (1.85)
SYMM
(R0.05) TYP
1
28X (0.45)
28
26X (0.65)
SYMM
14
15
(7)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 10X
4214853/B 03/2018
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
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