Texas Instruments | Stereo Audio CODEC w/USB Interface, Single-Ended Analog Input/Output & S/PDIF (Rev. C) | Datasheet | Texas Instruments Stereo Audio CODEC w/USB Interface, Single-Ended Analog Input/Output & S/PDIF (Rev. C) Datasheet

Texas Instruments Stereo Audio CODEC w/USB Interface, Single-Ended Analog Input/Output & S/PDIF (Rev. C) Datasheet
 PCM2901
PCM2903
SLES034C – MARCH 2002 – REVISED NOVEMBER 2007
STEREO AUDIO CODEC WITH USB INTERFACE,
SINGLE-ENDED ANALOG INPUT/OUTPUT AND S/PDIF
FEATURES
1
• PCM2901: Without S/PDIF
• PCM2903: With S/PDIF
• On-Chip USB Interface
– With Full-Speed Transceivers
– Fully Compliant With USB 1.1 Specification
– Certified by USB-IF
– Partially Programmable Descriptors (1)
– USB Adaptive Mode for Playback
– USB Asynchronous Mode for Record
– Self-Powered
• 16-Bit Delta-Sigma ADC and DAC
• Sampling Rates
– DAC: 32, 44.1, 48 kHz
– ADC: 8, 11.025, 16, 22.05, 32, 44.1, 48 kHz
• On-Chip Clock Generator With Single 12-MHz
Clock Source
• Single Power Supply: 3.3 V Typical
• Stereo ADC
– Analog Performance at VCCC = VCCP1 = VCCP2
= VCCX = VDD = 3.3 V
– THD+N = 0.01%
– SNR = 89 dB
– Dynamic Range = 89 dB
– Decimation Digital Filter
– Pass-Band Ripple = ±0.05 dB
– Stop-Band Attenuation = –65 dB
– Single-Ended Voltage Input
– Antialiasing Filter Included
– Digital LCF Included
234
(1)
The descriptor can be modified by changing a mask.
•
•
•
Stereo DAC
– Analog Performance at VCCC = VCCP1 = VCCP2
= VCCX = VDD = 3.3 V
– THD+N = 0.005%
– SNR = 96 dB
– Dynamic Range = 93 dB
– Oversampling Digital Filter
– Pass-Band Ripple = ±0.1 dB
– Stop-Band Attenuation = –43 dB
– Single-Ended Voltage Output
– Analog LPF Included
Multifunctions
– Human Interface Device (HID) Volume ±
Control and Mute Control
– Suspend Flag
Package: 28-Pin SSOP
APPLICATIONS
•
•
•
•
USB Audio Speaker
USB Headset
USB Monitor
USB Audio Interface Box
DESCRIPTION
The PCM2901/2903 is TI's single-chip USB stereo
audio codec with USB-compliant full-speed protocol
controller and S/PDIF (only PCM2903). The USB
protocol controller works with no software code, but
the USB descriptors can be modified in some areas
(for example, vendor ID/product ID). The
PCM2901/2903 employs SpAct™ architecture, TI's
unique system that recovers the audio clock from
USB packet data. On-chip analog PLLs with SpAct
enable playback and record with low clock jitter and
with independent playback and record sampling
rates.
1
2
3
4
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SpAct is a trademark of Texas Instruments.
System Two, Audio Precision are trademarks of Audio Precision, Inc.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2002–2007, Texas Instruments Incorporated
PCM2901
PCM2903
www.ti.com
SLES034C – MARCH 2002 – REVISED NOVEMBER 2007
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
PCM2901
(1)
PRODUCT
PACKAGE-LEAD
PACKAGE
DESIGNATOR
SPECIFIED
TEMPERATURE
RANGE
PCM2901E
SSOP-28
28DB
–25°C to 85°C
PACKAGE
MARKING
PCM2901E
ORDERING
NUMBER (1)
TRANSPORT
MEDIA
PCM2901E
Rails
PCM2903E/2K
Tape and reel
Models with a slash (/) are available only in tape and reel in the quantities indicated (e.g., /2K indicates 2000 devices per reel). Ordering
2000 pieces of PCM2901E/2K gets a single 2000-piece tape and reel.
PCM2903
(1)
PRODUCT
PACKAGE-LEAD
PACKAGE
DESIGNATOR
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
PCM2903E
SSOP-28
28DB
–25°C to 85°C
PCM2903E
ORDERING
NUMBER (1)
TRANSPORT
MEDIA
PCM2903E
Rails
PCM2903E/2K
Tape and reel
Models with a slash (/) are available only in tape and reel in the quantities indicated (e.g., /2K indicates 2000 devices per reel). Ordering
2000 pieces of PCM2903E/2K gets a single 2000-piece tape and reel.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
Supply voltage, VCCC, VCCP1, VCCP2, VCCX, VDD
PCM2901/PCM2903
UNIT
–0.3 to 4
V
Supply voltage differences, VCCC, VCCP1, VCCP2, VCCX, VDD
±0.1
V
Ground voltage differences, AGNDC, AGNDP, AGNDX, DGND, DGNDU
±0.1
V
SEL0, SEL1, TEST0 (DIN) (2)
–0.3 to 6.5
V
–0.3 to (VDD + 0.3) < 4
V
Digital input voltage
D+, D–, HID0, HID1, HID2, XTI, XTO, TEST1 (DOUT)
(2)
, SSPND
Analog input voltage VINL, VINR, VCOM, VOUTR, VOUTL
–0.3 to (VCCC + 0.3) < 4
V
±10
mA
Ambient temperature under bias
–40 to 125
°C
Storage temperature, Tstg
–55 to 150
°C
Junction temperature TJ
150
°C
Lead temperature (soldering)
260
°C, 5 s
Package temperature (IR reflow, peak)
250
°C
Input current (any pins except supplies)
(1)
(2)
2
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
( ): PCM2903
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Product Folder Link(s): PCM2901 PCM2903
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PCM2903
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SLES034C – MARCH 2002 – REVISED NOVEMBER 2007
ELECTRICAL CHARACTERISTICS
all specifications at TA = 25°C, VCCC = VCCP1 = VCCP2 = VCCX = VDD = 3.3 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DIGITAL INPUT/OUTPUT
Host interface
Apply USB Revision 1.1, full speed
Audio data format
USB isochronous data format
INPUT LOGIC
D+, D–
VIH
High-level input
voltage
XTI, HID0, HID1, and HID2
SEL0, SEL1
DIN (PCM2903)
D+, D–
VIL
Low-level input
voltage
2
VDD
0.7 VDD
VDD
2
5.25
0.7 VDD
5.25
VDD
0.8
XTI, HID0, HID1, and HID2
0.3 VDD
SEL0, SEL1
0.8
DIN (PCM2903)
IIH
IIL
High-level input
current
Low-level input
current
VDC
VDC
0.3 VDD
D+, D–, XTI, SEL0, SEL1
VIN = 3.3 V
±10
HID0, HID1, and HID2
VIN = 3.3 V
50
80
DIN (PCM2903)
VIN = 3.3 V
65
100
D+, D–, XTI, SEL0, SEL1
VIN = 0 V
±10
HID0, HID1, and HID2
VIN = 0 V
±10
DIN (PCM2903)
VIN = 0 V
±10
µA
µA
OUTPUT LOGIC
D+, D–
VOH
High-level output
voltage
2.8
DOUT (PCM2903)
IOH = –4 mA
2.8
SSPND
IOH = –2 mA
2.8
VDC
D+, D–
VOL
Low-level output
voltage
0.3
DOUT (PCM2903)
IOL = 4 mA
0.5
SSPND
IOL = 2 mA
0.5
VDC
CLOCK FREQUENCY
Input clock frequency, XTI
11.994
Copyright © 2002–2007, Texas Instruments Incorporated
Product Folder Link(s): PCM2901 PCM2903
12
12.006
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MHz
3
PCM2901
PCM2903
www.ti.com
SLES034C – MARCH 2002 – REVISED NOVEMBER 2007
ELECTRICAL CHARACTERISTICS
All specifications at TA = 25°C, VCCC = VCCP1 = VCCP2 = VCCX = VDD = 3.3 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ADC CHARACTERISTICS
Resolution
Audio data channel
8, 16
bits
1, 2
channel
Clock Frequency
fS
Sampling frequencies
8, 11.025, 16, 22.05, 32, 44.1, 48
kHz
DC Accuracy
Gain mismatch, channel-to-channel
±1
±5
% of FSR
Gain error
±2
±10
% of FSR
Bipolar zero error
±0
Dynamic Performance
THD+N
Total harmonic distortion plus noise
SNR
% of FSR
(1)
VIN = –0.5 dB
0.01%
VIN = –60 dB
5%
0.02%
Dynamic range
A-weighted
81
89
dB
Signal-to-noise ratio
A-weighted
81
89
dB
80
85
dB
Channel separation
Analog Input
Input voltage
0.6 VCCC
Center voltage
0.5 VCCC
Input impedance
Antialising filter frequency response
–3 dB
fIN = 20 kHz
Vp-p
V
30
kΩ
150
kHz
–0.08
dB
Digital Filter Performance
Pass band
0.454 fS
Stop band
0.563 fS
Hz
Pass-band ripple
±0.05
Stop-band attenuation
td
LCF frquency response
(1)
4
–65
Delay time
–3 dB
Hz
dB
dB
17.4/fS
s
0.078 fS
MHz
fIN = 1 kHz, using a System Two™ audio measurement system by Audio Precision™ in RMS mode with a 20-kHz LPF and 400-Hz HPF
in the calculation.
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PCM2903
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SLES034C – MARCH 2002 – REVISED NOVEMBER 2007
ELECTRICAL CHARACTERISTICS
all specifications at TA = 25°C, VCCC = VCCP1 = VCCP2 = VCCX = VDD = 3.3 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DAC CHARACTERISTICS
Resolution
Audio data channel
8, 16
bits
1, 2
channel
Clock Frequency
fS
Sampling frequencies
32, 44.1, 48
kHz
DC Accuracy
Gain mismatch channel-to-channel
±1
±5 % of FSR
Gain error
±2
±10 % of FSR
±2
% of FSR
Bipolar zero error
Dynamic Performance
THD+N
SNR
(1)
VOUT = 0 dB
Total harmonic distortion plus noise
0.005%
VOUT = –60 dB
0.016%
3%
Dynamic range
EIAJ, A-weighted
87
93
dB
Signal-to-noise ratio
EIAJ, A-weighted
90
96
dB
86
92
dB
Channel separation
Analog Output
VO
Output voltage
0.6 VCCC
Center voltage
0.5 VCCC
Load impedance
AC coupling
V
10
–3 dB
LPF frequency response
Vp-p
f = 20 kHz
kΩ
250
kHz
–0.03
dB
Digital Filter Performance
Pass band
0.445 fS
Stop band
0.555 fS
Hz
Pass-band ripple
±0.1
Stop-band attenuation
td
–43
Delay time
Hz
dB
dB
14.3/fS
s
POWER SUPPLY REQUIREMENTS
Voltage range (VDD, VCCC, VCCP1, VCCP2, VCCX)
ADC, DAC operation
Supply current
PD
3
Power dissipation
3.3
3.6
VDC
54
70
mA
Suspend mode (2)
210
ADC, DAC operation
178
Suspend mode (2)
0.69
µA
252
mW
TEMPERATURE RANGE
Operaton temperature
θJA
(1)
(2)
–25
Thermal resistance
85
100
°C
°C/W
fOUT = 1 kHz, using a System Two audio measuerment system by Audio Precision in RMS mode with a 20-kHz LPF and 400-Hz HPF.
Under USB suspend state
Copyright © 2002–2007, Texas Instruments Incorporated
Product Folder Link(s): PCM2901 PCM2903
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PCM2903
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SLES034C – MARCH 2002 – REVISED NOVEMBER 2007
PIN ASSIGNMENTS
PCM2901
(Top View)
D+
D–
VBUS
DGNDU
HID0
HID1
HID2
SEL0
SEL1
VCCC
AGNDC
VINL
VINR
VCOM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PCM2903
(Top View)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
SSPND
VDD
DGND
TEST1
TEST0
VCCX
D+
D–
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VBUS
AGNDX
XTI
XTO
VCCP2
DGNDU
HID0
HID1
HID2
SEL0
SEL1
VCCC
AGNDP
VCCP1
VOUTL
VOUTR
AGNDC
VINL
VINR
VCOM
28
27
26
25
24
23
22
21
20
19
18
17
16
15
SSPND
VDD
DGND
DOUT
DIN
VCCX
AGNDX
XTI
XTO
VCCP2
AGNDP
VCCP1
VOUTL
VOUTR
P0007-07
6
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PCM2903
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SLES034C – MARCH 2002 – REVISED NOVEMBER 2007
PCM2901 TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
I/O
DESCRIPTION
AGNDC
11
–
Analog ground for codec
AGNDP
18
–
Analog ground for PLL
AGNDX
22
–
Analog ground for oscillator
D–
2
I/O
USB differential input/output minus (1)
D+
1
I/O
USB differential input/output plus (1)
DGND
26
–
Digital ground
DGNDU
4
–
Digital ground for USB transceiver
HID0
5
I
HID key state input (mute), active-high (2)
HID1
6
I
HID key state input (volume up), active-high (2)
HID2
7
I
HID key state input (volume down), active-high (2)
SEL0
8
I
Must be set to high (3)
SEL1
9
I
Connected to the USB port of VBUS (3)
SSPND
28
O
Suspend flag, active-low (Low: suspend, High: operational)
TEST0
24
I
Test pin, must be connected to GND
TEST1
25
O
Test pin, must be left open
VBUS
3
–
Must be connected to VDD
VCCC
10
–
Analog power supply for codec (4)
VCCP1
17
–
Analog power supply for PLL (4)
VCCP2
19
–
Analog power supply for PLL (4)
VCCX
23
–
Analog power supply for oscillator (4)
VCOM
14
–
Common for ADC/DAC (VCCC/2)
(4)
(4)
VDD
27
–
Digital power supply
VINL
12
I
ADC analog input for L-channel
VINR
13
I
ADC analog input for R-channel
VOUTL
16
O
DAC analog output for L-channel
VOUTR
15
O
DAC analog output for R-channel
XTI
21
I
Crystal oscillator input (5)
XTO
20
O
Crystal oscillator output
(1)
(2)
(3)
(4)
(5)
LV-TTL level
3.3-V CMOS-level input with internal pulldown. This pin informs the PC of serviceable control signals such as mute, volume up, or
volume down, which have no direct connection with the internal DAC or ADC. See the Interface #3 and End-Points sections.
TTL Schmitt trigger, 5-V tolerant
Connect a decoupling capacitor to GND.
3.3-V CMO- level input
Copyright © 2002–2007, Texas Instruments Incorporated
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PCM2903
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SLES034C – MARCH 2002 – REVISED NOVEMBER 2007
PCM2903 TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
I/O
DESCRIPTION
AGNDC
11
–
Analog ground for codec
AGNDP
18
–
Analog ground for PLL
AGNDX
22
–
Analog ground for oscillator
D–
2
I/O
USB differential input/output minus (1)
D+
1
I/O
USB differential input/output plus (1)
DGND
26
–
Digital ground
DGNDU
4
–
Digital ground for USB transceiver
DIN
24
I
S/PDIF input
DOUT
25
O
S/PDIF output
HID0
5
I
HID key state input (mute), active-high (3)
HID1
6
I
HID key state input (volume up), active-high (3)
HID2
7
I
HID key state input (volume down), active-high (3)
SEL0
8
I
Must be set to high (4)
SEL1
9
I
Connected to the USB port of VBUS (4)
SSPND
28
O
Suspend flag, active-low (Low: suspend, High: operational)
VBUS
3
–
Must be connected to VDD
VCCC
10
–
Analog power supply for codec (5)
VCCP1
17
–
Analog power supply for PLL (5)
VCCP2
19
–
Analog power supply for PLL (5)
VCCX
23
–
Analog power supply for oscillator (5)
VCOM
14
–
Common for ADC/DAC (VCCC/2)
(2)
(5)
(5)
VDD
27
–
Digital power supply
VINL
12
I
ADC analog input for L-channel
VINR
13
I
ADC analog input for R-channel
VOUTL
16
O
DAC analog output for L-channel
VOUTR
15
O
DAC analog output for R-channel
XTI
21
I
Crystal oscillator input (6)
XTO
20
O
Crystal oscillator output
(1)
(2)
(3)
(4)
(5)
(6)
8
LV-TTL level
3.3-V CMOS-level input with internal pulldown, 5-V tolerant
3.3-V CMOS-level input with internal pulldown. This pin informs the PC of serviceable control signals such as mute, volume up, or
volume down, which have no direct connection with the internal DAC or ADC. See the Interface #3 and End-Points sections.
TTL Schmitt trigger, 5-V tolerant
Connect a decoupling capacitor to GND.
3.3-V CMOS-level input
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PCM2903
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SLES034C – MARCH 2002 – REVISED NOVEMBER 2007
PCM2901 FUNCTIONAL BLOCK DIAGRAM
VCCC
VCCP1
VCCP2
VCCX
VDD
AGNDC
AGNDP
AGNDX
DGND
DGNDU
Power
Manager
TEST0
SSPND
TEST1
VBUS
VINR
ISO-In
End-Point
Analog
PLL
VCOM
Selector
Analog
PLL
VOUTL
FIFO
DAC
VOUTR
XCVR
FIFO
ADC
USB SIE
VINL
D+
D–
Control
End-Point
SEL0
SEL1
ISO-Out
End-Point
HID0
HID1
HID2
HID
End-Point
USB
Protocol
Controller
PLL (´8)
XTI
12 MHz
96 MHz
Tracker
(SpAct)
XTO
B0238-02
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PCM2903
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SLES034C – MARCH 2002 – REVISED NOVEMBER 2007
PCM2903 FUNCTIONAL BLOCK DIAGRAM
VCCC
VCCP1
VCCP2
VCCX
VDD
Lock
DIN
AGNDC
AGNDP
AGNDX
DGND
Power
Manager
DGNDU
SSPND
S/PDIF Decoder
VBUS
VINR
ISO-In
End-Point
Analog
PLL
VCOM
Selector
Analog
PLL
VOUTL
FIFO
DAC
VOUTR
DOUT
D+
D–
Control
End-Point
SEL0
SEL1
ISO-Out
End-Point
HID
End-Point
S/PDIF Encoder
XCVR
FIFO
ADC
USB SIE
VINL
HID0
HID1
HID2
USB
Protocol
Controller
PLL (´8)
XTI
12 MHz
96 MHz
Tracker
(SpAct)
XTO
B0239-02
10
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SLES034C – MARCH 2002 – REVISED NOVEMBER 2007
PCM2901/2903 BLOCK DIAGRAM OF ANALOG FRONT-END (RIGHT CHANNEL)
4.7 mF
+
VINR
30 kW
–
13
–
(+)
+
+
(–)
Delta-Sigma
Modulator
VCOM
14
(VCCC/2)
+
10 mF
Reference
S0011-07
TYPICAL CHARACTERISTICS
All specifications at TA = 25°C, VDD = VCCC = VCCP1 = VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
ADC
TOTAL HARMONIC DISTORTION + NOISE at –0.5 dB
vs
FREE-AIR TEMPERATURE
DYNAMIC RANGE and SNR
vs
FREE-AIR TEMPERATURE
95
0.009
Dynamic Range and SNR − dB
THD+N − Total Harmonic Distortion + Noise − %
0.010
0.008
0.007
0.006
0.005
93
91
Dynamic Range
89
SNR
87
0.004
0.003
−50
−25
0
25
50
75
TA − Free-Air Temperature − °C
100
85
−50
−25
G001
Figure 1.
0
25
50
75
TA − Free-Air Temperature − °C
100
G002
Figure 2.
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SLES034C – MARCH 2002 – REVISED NOVEMBER 2007
TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VDD = VCCC = VCCP1 = VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
TOTAL HARMONIC DISTORTION + NOISE at –0.5 dB
vs
SUPPLY VOLTAGE
DYNAMIC RANGE and SNR
vs
SUPPLY VOLTAGE
95
0.009
Dynamic Range and SNR − dB
THD+N − Total Harmonic Distortion + Noise − %
0.010
0.008
0.007
0.006
0.005
91
Dynamic Range
89
SNR
87
0.004
0.003
2.8
3.0
3.2
3.4
3.6
85
2.8
3.8
VCC − Supply Voltage − V
3.0
3.4
3.6
Figure 3.
Figure 4.
TOTAL HARMONIC DISTORTION + NOISE at –0.5 dB
vs
SAMPLING FREQUENCY
DYNAMIC RANGE and SNR
vs
SAMPLING FREQUENCY
3.8
G004
95
Dynamic Range and SNR − dB
0.009
0.008
0.007
0.006
0.005
93
91
Dynamic Range
89
SNR
87
0.004
0.003
85
30
35
40
45
fS − Sampling Frequency − kHz
50
30
35
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40
45
fS − Sampling Frequency − kHz
G005
Figure 5.
12
3.2
VCC − Supply Voltage − V
G003
0.010
THD+N − Total Harmonic Distortion + Noise − %
93
50
G006
Figure 6.
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VDD = VCCC = VCCP1 = VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
DAC
TOTAL HARMONIC DISTORTION + NOISE at 0 dB
vs
FREE-AIR TEMPERATURE
DYNAMIC RANGE and SNR
vs
FREE-AIR TEMPERATURE
98
97
0.007
Dynamic Range and SNR − dB
THD+N − Total Harmonic Distortion + Noise − %
0.008
0.006
0.005
0.004
95
Dynamic Range
94
93
92
91
0.003
−50
−25
0
25
50
75
90
−50
100
−25
0
25
50
75
TA − Free-Air Temperature − °C
TA − Free-Air Temperature − °C
Figure 7.
Figure 8.
TOTAL HARMONIC DISTORTION + NOISE at 0 dB
vs
SUPPLY VOLTAGE
DYNAMIC RANGE and SNR
vs
SUPPLY VOLTAGE
100
G008
G007
98
0.008
97
0.007
Dynamic Range and SNR − dB
THD+N − Total Harmonic Distortion + Noise − %
SNR
96
0.006
0.005
0.004
SNR
96
95
Dynamic Range
94
93
92
91
0.003
3.0
3.1
3.2
3.3
3.4
3.5
VCC − Supply Voltage − V
3.6
90
3.0
3.1
G009
Figure 9.
3.2
3.3
3.4
3.5
VCC − Supply Voltage − V
3.6
G010
Figure 10.
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VDD = VCCC = VCCP1 = VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
TOTAL HARMONIC DISTORTION + NOISE at 0 dB
vs
SAMPLING FREQUENCY
DYNAMIC RANGE and SNR
vs
SAMPLING FREQUENCY
98
97
0.007
Dynamic Range and SNR − dB
THD+N − Total Harmonic Distortion + Noise − %
0.008
0.006
0.005
0.004
SNR
96
95
94
Dynamic Range
93
92
91
90
0.003
30
35
40
45
30
50
fS − Sampling Frequency − kHz
35
40
45
50
fS − Sampling Frequency − kHz
G011
Figure 11.
G012
Figure 12.
ADC OUTPUT SPECTRUM
OUTPUT SPECTRUM (–60 dB, N = 8192)
0
−20
−20
−40
−40
Amplitude − dB
Amplitude − dB
OUTPUT SPECTRUM (–0.5 dB, N = 8192)
0
−60
−80
−60
−80
−100
−100
−120
−120
−140
−140
0
5
10
15
20
0
5
f − Frequency − kHz
10
G013
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20
G014
Figure 13.
14
15
f − Frequency − kHz
Figure 14.
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VDD = VCCC = VCCP1 = VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
DAC OUTPUT SPECTRUM
OUTPUT SPECTRUM (–60 dB, N = 8192)
0
−20
−20
−40
−40
Amplitude − dB
Amplitude − dB
OUTPUT SPECTRUM (0 dB, N = 8192)
0
−60
−80
−60
−80
−100
−100
−120
−120
−140
−140
0
5
10
15
20
0
5
f − Frequency − kHz
10
15
20
f − Frequency − kHz
G015
G016
Figure 15.
Figure 16.
OPERATIONAL and SUSPEND SUPPLY CURRENT
vs
SUPPLY VOLTAGE
OPERATIONAL SUPPLY CURRENT
vs
SAMPLING FREQUENCY
1.6
80
70
1.4
70
60
1.2
Operational
50
1.0
40
0.8
30
0.6
20
0.4
Suspend
10
0.2
0
3.0
3.1
3.2
3.3
3.4
3.5
0.0
3.6
VDD, VCCC, VCCP1, VCCP2, VCCX − Supply Voltage − V
ICC − Operational Supply Current − mA
80
ICC − Suspend Supply Current − mA
ICC − Operational Supply Current − mA
SUPPLY CURRENT
60
50
ADC and DAC
40
30
20
10
0
30
G017
35
40
45
fS − Sampling Frequency − kHz
Figure 17.
50
G018
Figure 18.
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VDD = VCCC = VCCP1 = VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
ADC DIGITAL DECIMATION FILTER FREQUENCY RESPONSE
OVERALL CHARACTERISTICS
STOP-BAND ATTENUATION
0
0
−10
−20
−20
−40
Amplitude − dB
Amplitude − dB
−30
−60
−80
−100
−40
−50
−60
−70
−120
−80
−140
−90
−100
0.0
−160
0
8
16
24
32
Frequency [y fS]
0.2
1.0
G020
TRANSITION-BAND RESPONSE
0.2
0
0.0
−4
Amplitude − dB
Amplitude − dB
0.8
Figure 20.
PASS-BAND RIPPLE
−0.2
−0.4
−8
−12
−16
−0.6
0.1
0.2
0.3
Frequency [y fS]
0.4
0.5
−20
0.46
0.48
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Frequency [y fS]
G021
Figure 21.
16
0.6
Frequency [y fS]
G019
Figure 19.
−0.8
0.0
0.4
0.52
0.54
G022
Figure 22.
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VDD = VCCC = VCCP1 = VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
ADC DIGITAL HIGH-PASS FILTER FREQUENCY RESPONSE
STOP-BAND CHARACTERISTICS
PASS-BAND CHARACTERISTICS
0.0
0
−10
−0.2
−20
Amplitude − dB
Amplitude − dB
−30
−40
−50
−60
−0.4
−0.6
−70
−0.8
−80
−90
−100
0.0
−1.0
0.1
0.2
0.3
Frequency [y fS/1000]
0.4
0
1
2
3
Frequency [y fS/1000]
G023
Figure 23.
4
G024
Figure 24.
ADC ANALOG ANTIALIASING FILTER FREQUENCY RESPONSE
PASS-BAND CHARACTERISTICS
0.0
−10
−0.2
Amplitude − dB
Amplitude − dB
STOP-BAND CHARACTERISTICS
0
−20
−30
−0.4
−0.6
−0.8
−40
−50
1
10
100
1k
10k
−1.0
0.01
0.1
1
10
100
f − Frequency − kHz
f − Frequency − kHz
G026
G025
Figure 25.
Figure 26.
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VDD = VCCC = VCCP1 = VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
DAC DIGITAL INTERPOLATION FILTER FREQUENCY RESPONSE
STOP-BAND ATTENUATION
PASS-BAND RIPPLE
0
0.2
−10
−20
0.0
Amplitude − dB
Amplitude − dB
−30
−40
−50
−60
−0.2
−0.4
−70
−80
−0.6
−90
−100
0
1
2
3
−0.8
0.0
4
Frequency [y fS]
0.1
0.2
0.3
Frequency [y fS]
G027
Figure 27.
0.4
0.5
G028
Figure 28.
TRANSITION-BAND RESPONSE
0
−2
−4
Amplitude − dB
−6
−8
−10
−12
−14
−16
−18
−20
0.46 0.47 0.48
0.49 0.50 0.51
0.52 0.53 0.54
Frequency [y fS]
G029
Figure 29.
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VDD = VCCC = VCCP1 = VCCP2 = VCCx = 3.3 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless
otherwise noted.
DAC ANALOG FIR FILTER FREQUENCY RESPONSE
PASS-BAND CHARACTERISTICS
0
0.2
−10
0.0
Amplitude − dB
Amplitude − dB
STOP-BAND CHARACTERISTICS
−20
−30
−40
−0.2
−0.4
−0.6
−50
0
8
16
24
Frequency [y fS]
−0.8
0.0
32
0.1
0.2
0.3
0.4
Frequency [y fS]
G030
Figure 30.
0.5
G031
Figure 31.
DAC ANALOG LOW-PASS FILTER FREQUENCY RESPONSE
PASS-BAND CHARACTERISTICS
0
0.0
−10
−0.2
Amplitude − dB
Amplitude − dB
STOP-BAND CHARACTERISTICS
−20
−30
−0.4
−0.6
−0.8
−40
−50
1
10
100
1k
10k
−1.0
0.01
0.1
1
10
100
f − Frequency − kHz
f − Frequency − kHz
G033
G032
Figure 32.
Figure 33.
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DETAILED DESCRIPTION
USB INTERFACE
Control data and audio data are transferred to the PCM2901/2903 via D+ (pin 1) and D– (pin 2). All data to/from
the PCM2901/2903 is transferred at full speed. The device descriprtor contains the information described in
Table 1. The device descriptor can be modified on request; contact a Texas Instruments representative for
details.
Table 1. Device Descriptor
USB revision
1.1 compliant
Device class
0x00 (device-defined interface level)
Device subclass
0x00 (not specified)
Device protocol
0x00 (not specified)
Max packet size for end-point 0
8 bytes
Vendor ID
0x08BB (default value, can be modified)
Product ID
0x2901 / 0x2903 (default value, can be modified)
Device release number
1.0 (0x0100)
Number of configurations
1
Vendor strings
String #1 (see Table 3)
Product strings
String #2 (see Table 3)
Serial number
Not supported
The configuration descriptor contains the information described in Table 2. The configuration descriptor can be
modified on request; contact a Texas Instruments representative for details.
Table 2. Configuration Descriptor
Interface
Four interfaces
Power attribute
0xC0 (Self-powered, no remote wakeup)
Maximum power
0x00 (0 mA. Default value, can be modified)
The string descriptor contains the information described in Table 3. The string descriptor can be modified on
request; contact a Texas Instruments representative for details.
Table 3. String Descriptor
20
#0
0x0409
#1
Burr-Brown from TI (default value, can be modified)
#2
USB audio codec (default value, can be modified)
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DEVICE CONFIGURATON
Figure 34 illustrates the USB audio function topology. The PCM2901/2903 has four interfaces. Each interface is
constructed by alternative settings.
End-Point #0
Default End-Point
FU
Analog Out
End-Point #2
(IF #1)
IT
TID1
OT
TID2
Audio Streaming Interface
UID3
Analog In
End-Point #4
(IF #2)
IT
TID4
OT
TID5
Audio Streaming Interface
Standard Audio Control Interface (IF #0)
End-Point #5
(IF #3)
HID Interface
PCM2901/2903
M0024-04
Figure 34. USB Audio Function Topology
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Interface #0
Interface #0 is defined as the control interface. Alternative setting #0 is the only possible setting for interface #0.
Alternative setting #0 describes the standard audio control interface. A terminal constructs the audio control
interface. The PCM2901/2903 has the following five terminals.
• Input terminal (IT #1) for isochronous-out stream
• Output terminal (OT #2) for audio analog output
• Feature unit (FU #3) for DAC digital attenuator
• Input terminal (IT #4) for audio analog input
• Output terminal (OT #5) for isochronous-in stream
Input terminal #1 is defined as USB stream (terminal type 0x0101). Input terminal #1 can accept 2-channel audio
streams constructed by left and right channels. Output terminal #2 is defined as a speaker (terminal type
0x0301). Input terminal #4 is defined as microphone (terminal type 0x0201). Output terminal #5 is defined as a
USB stream (terminal type 0x0101). Output terminal #5 can generate 2-channel audio streams constructed by
left and right channels. Feature unit #3 supports the following sound control features.
• Volume control
• Mute control
The built-in digital volume controller can be manipulated by an audio class specific request from 0 dB to –64 dB
in 1-dB steps. Changes are made by incrementing or decrementing by one step (1 dB) for every 1/fS time interval
until the volume level has reached the requested value. Each channel can be set for different values. The master
volume control is not supported. A request to the master volume is stalled and ignored. The built-in digital mute
controller can be manipulated by audio class-specific request. A master mute control request is acceptable. A
request to an individual channel is stalled and ignored.
Interface #1
Interface #1 is defined as the audio streaming data-out interface. Interface #1 has the following seven alternative
settings. Alternative setting #0 is the zero-bandwidth setting.
ALTERNATIVE
SETTING
DATA FORMAT
00
22
TRANSFER
MODE
SAMPLING RATE
(kHz)
Zero bandwidth
01
16 bit
Stereo
2s complement (PCM)
Adaptive
32, 44.1, 48
02
16 bit
Mono
2s complement (PCM)
Adaptive
32, 44.1, 48
03
8 bit
Stereo
2s complement (PCM)
Adaptive
32, 44.1, 48
04
8 bit
Mono
2s complement (PCM)
Adaptive
32, 44.1, 48
05
8 bit
Stereo
Offset binary (PCM8)
Adaptive
32, 44.1, 48
06
8 bit
Mono
Offset binary (PCM8)
Adaptive
32, 44.1, 48
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Interface #2
Interface #2 is defined as the audio streaming data-in interface. Interface #2 has the following 19 alternative
settings. Alternative setting #0 is the zero-bandwidth setting. All other alternative settings are operational
settings.
ALTERNATIVE
SETTING
DATA FORMAT
00
TRANSFER MODE
SAMPLING RATE
(kHz)
48
Zero bandwidth
01
16 bit
Stereo
2s complement (PCM)
Asynchronous
02
16 bit
Mono
2s complement (PCM)
Asynchronous
48
03
16 bit
Stereo
2s complement (PCM)
Asynchronous
44.1
04
16 bit
Mono
2s complement (PCM)
Asynchronous
44.1
05
16 bit
Stereo
2s complement (PCM)
Asynchronous
32
06
16 bit
Mono
2s complement (PCM)
Asynchronous
32
07
16 bit
Stereo
2s complement (PCM)
Asynchronous
22.05
08
16 bit
Mono
2s complement (PCM)
Asynchronous
22.05
09
16 bit
Stereo
2s complement (PCM)
Asynchronous
16
0A
16 bit
Mono
2s complement (PCM)
Asynchronous
16
0B
8 bit
Stereo
2s complement (PCM)
Asynchronous
16
0C
8 bit
Mono
2s complement (PCM)
Asynchronous
16
0D
8 bit
Stereo
2s complement (PCM)
Asynchronous
8
0E
8 bit
Mono
2s complement (PCM)
Asynchronous
8
0F
16 bit
Stereo
2s complement (PCM)
Synchronous
11.025
10
16 bit
Mono
2s complement (PCM)
Synchronous
11.025
11
8 bit
Stereo
2s complement (PCM)
Synchronous
11.025
12
8 bit
Mono
2s complement (PCM)
Synchronous
11.025
Interface #3
Interface #3 is defined as the interrupt data-in interface. Alternative setting #0 is the only possible setting for
interface #3. Interface #3 constructs the HID consumer control device. Interface #3 reports the following three
key statuses.
• Mute (0xE209)
• Volume up (0xE909)
• Volume down (0xEA09)
End-Points
The PCM2901/2903 has the following four end-points.
• Control end-point (EP #0)
• Isochronous-out audio data stream end-point (EP #2)
• Isochronous-in audio data stream end-point (EP #4)
• HID end-point (EP #5)
The control end-point is a default end-point. The control end-point is used to control all functions of the
PCM2901/2903 by the standard USB request and USB audio-class-specific request from the host. The
isochronous-out audio data stream end-point is an audio sink end-point, which receives the PCM audio data. The
isochronous-out audio data stream end-point accepts the adaptive transfer mode. The isochronous-in audio data
stream end-point is an audio source end-point, which transmits the PCM audio data. The isochronous-in audio
data stream end-point uses asynchronous transfer mode. The HID end-point is an interrupt-in end-point. HID
end-point reports HID0, HID1, and HID2 pin status every 32 ms.
The human interface device (HID) pins are defined as consumer control devices. The HID function is designed
as an independent end-point from both isochronous-in and -out end-points. This means that the device affected
by the HID operation depends on the host software. Typically, the HID function affects the primary audio-out
device.
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Clock and Reset
The PCM2901/2903 requires a 12-MHz (±500 ppm) clock for the USB and audio function, which can be
generated by a built-in crystal oscillator with a 12-MHz crystal resonator or supplied by an external clock. The
12-MHz crystal resonator must be connected to XTI (pin 21) and XTO (pin 20) with one high (1-MΩ) resistor and
two small capacitors, the capacitance of which depends on the load capacitance of the crystal resonator. If the
external clock is used, the clock must be supplied to XTI, and XTO must be open.
The PCM2901/2903 has an internal power-on reset circuit, which works automatically when VDD (pin 27) exceeds
2.5 V typical (2.7 V to 2.2 V), and about 700 µs is required until internal reset release.)
Digital Audio Interface (PCM2903)
The PCM2903 employs both S/PDIF input and output. Isochronous-out data from the host is encoded to the
S/PDIF output and the DAC analog output. Input data is selected as either S/PDIF or ADC analog input. When
the device detects an S/PDIF input and successfully locks on the received data, the isochronous-in transfer data
source is automatically selected from S/PDIF itself; otherwise, the data source is selected to ADC analog input.
Supported Input Data (PCM2903)
The following data formats are accepted by the S/PDIF input and output. All other data formats are unable to use
S/PDIF.
• 48-kHz 16-bit stereo
• 44.1-kHz 16-bit stereo
• 32-kHz 16-bit stereo
Mismatch between input data format and host command may cause unexpected results except in the following
conditions.
• Record monaural format from stereo data input at the same data rate
• Record 8-bit format from 16-bit data input at the same data rate
A combination of the foregoing conditions is not accepted.
For playback, all possible data-rate source is converted to 16-bit stereo format at the same source data rate.
Channel Status Information (PCM2903)
The channel status information is fixed as consumer application, PCM mode, copyright, and digital/digital
converter. All other bits are fixed as 0s except for the sample frequency, which is set automatically according to
the data received through the USB.
Copyright Management (PCM2903)
Isochronous-in data is affected by the serial copy management system (SCMS). Where receiving digital audio
data that is indicated as original data in the control bit, input digital audio data transfers to the host. If the data is
indicated as first generation or higher, transferred data is selected to analog input.
Digital audio data output is always encoded as original with SCMS control.
The implementation of this feature is an option for the customer. Note that it is the user's responsibility whether
they implement this feature in their product or not.
INTERFACE SEQUENCE
Power On, Attach, and Playback Sequence
The PCM2901/2903 is ready for setup when the reset sequence has finished and the USB bus is attached. In
order to perform certain reset sequences defined in the USB specification, VDD, VCCC, VCCP1, VCCP2, and VCCX
must rise up with 10 ms / 3.3 V. After connection has been established by setup, the PCM2901/2903 is ready to
accept USB audio data. While waiting, the audio data (idle state) and analog output are set to bipolar zero (BPZ).
When receiving the audio data, the PCM2901/2903 stores the first audio packet, which contained 1-ms audio
data, into the internal storage buffer. The PCM2901/2903 starts playing the audio data when detecting the
following start of frame (SOF) packet.
24
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3.3 V (Typ)
VDD (Pin 27)
2.5 V (Typ)
0V
5 V = VBUS
(Typ)
SEL1 (Pin 9)
Bus Reset
st
1 Audio Data
Set Configuration
2
nd
Audio Data
Bus Idle
D+/D–
SOF
SOF
SOF
SSPND
BPZ
VOUTL
VOUTR
700 ms
Device Setup
1 ms
Internal Reset
Ready for Setup
Ready for Playback
Attach
(Connect to USB Bus)
T0055-03
Figure 35. Attach After Power On
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3.3 V (Typ)
VDD (Pin 27)
2.5 V (Typ)
0V
5 V = VBUS
(Typ)
SEL1 (Pin 9)
Bus Reset
st
1 Audio Data
Set Configuration
2
nd
Audio Data
Bus Idle
D+/D–
SOF
SOF
SOF
SSPND
BPZ
VOUTL
VOUTR
700 ms
Device Setup
1 ms
Internal Reset
Ready for Setup
Ready for Playback
T0273-01
Figure 36. Power-On Under Attach
Play, Stop, and Detach Sequence
When the host finishes or aborts the playback, the PCM2901/2903 stops playing after the last audio data has
played.
Record Sequence
The PCM2901/2903 starts the audio capture into the internal memory after receiving the SET_INTERFACE
command.
Suspend and Resume Sequence
The PCM2901/2903 enters the suspend state after it detects a constant idle state on the USB bus, approximately
5 ms. While the PCM2901/2903 enters the suspend state, the SSPND flag (pin 28) is asserted. The
PCM2901/2903 wakes up immediately after detecting a non-idle state on the USB bus.
26
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Product Folder Link(s): PCM2901 PCM2903
PCM2901
PCM2903
www.ti.com
SLES034C – MARCH 2002 – REVISED NOVEMBER 2007
5 V = VBUS
(Typ)
SEL1 (Pin 9)
Audio Data
Audio Data
Last Audio Data
D+/D–
SOF
SOF
SOF
SOF
SOF
VOUTL
VOUTR
Detach
1 ms
T0056-03
Figure 37. Play, Stop, and Detach
Audio Data
SET_INTERFACE
IN Token
Audio Data
IN Token
Audio Data
IN Token
D+/D–
SOF
SOF
SOF
SOF
SOF
VINL
VINR
1 ms
T0259-01
Figure 38. Record Sequence
Idle
D+/D–
SSPND
Active
Suspend
5 ms
Active
T0057-02
Figure 39. Suspend and Resume
Copyright © 2002–2007, Texas Instruments Incorporated
Product Folder Link(s): PCM2901 PCM2903
Submit Documentation Feedback
27
PCM2901
PCM2903
www.ti.com
SLES034C – MARCH 2002 – REVISED NOVEMBER 2007
PCM2901 TYPICAL CIRCUIT CONNECTION
Figure 40 illustrates a typical circuit connection for a simple application. The circuit illustrated is for information
only. The whole board design should be considered to meet the USB specification as a USB-compliant product.
VDD (3.3 V)
VCC (3.3 V)
1.5 kW ´ 3
IC1
PCM2901
1.5 kW
22 W
D+
1 D+
SSPND
28
2
D–
VDD
27
VBUS
3
VBUS
DGND
26
GND
4
DGNDU
TEST1 25
5
HID0
TEST0
24
6
HID1
VCCX
23
7
HID2
AGNDX
22
8
SEL0
XTI
21
9
SEL1
XTO
20
10
VCCC
VCCP2
19
11
AGNDC
AGNDP
18
12
VINL
VCCP1 17
13
VINR
VOUTL
16
14
VCOM
VOUTR
15
22 W
D–
C1
1 MW
C9
C10
C2
C3
C4
C5
1 MW
C6
12 MHz
C7
MUTE/
Power Down
C8
C11
C12
LPF,
Amp
LPF,
Amp
S0312-01
NOTE:
IC1 must be driven by VDD with a 5-V tolerant input.
C1, C2, C3, C4, C7, C8: 10 µF
C5, C6: 10 pF to 33 pF (depending on crystal resonator)
C9, C10, C11, C12: The capacitance may vary depending on design.
Figure 40. Self-Powered Configuration
28
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Copyright © 2002–2007, Texas Instruments Incorporated
Product Folder Link(s): PCM2901 PCM2903
PCM2901
PCM2903
www.ti.com
SLES034C – MARCH 2002 – REVISED NOVEMBER 2007
PCM2903 TYPICAL CIRCUIT CONNECTION
Figure 41 illustrates a typical circuit connection for a simple application. The circuit illustrated is for information
only. The whole board design should be considered to meet the USB specification as a USB-compliant product.
VDD (3.3 V)
VCC (3.3 V)
1.5 kW ´ 3
IC1
PCM2903
1.5 kW
22 W
D+
1 D+
SSPND
28
2
D–
VDD
27
VBUS
3
VBUS
DGND
26
GND
4
DGNDU
DOUT 25
5
HID0
DIN
24
6
HID1
VCCX
23
7
HID2
AGNDX
22
8
SEL0
XTI
21
9
SEL1
XTO
20
10
VCCC
VCCP2
19
11
AGNDC
AGNDP
18
12
VINL
VCCP1 17
13
VINR
VOUTL
16
14
VCOM
VOUTR
15
22 W
D–
C4
C5
1 MW
C6
12 MHz
C1
1 MW
C3
C9
C10
C2
C7
MUTE/
Power Down
C8
C11
C12
LPF,
Amp
LPF,
Amp
S0312-02
NOTE:
IC1 must be driven by VDD with a 5-V tolerant input.
C1, C2, C3, C4, C7, C8: 10 µF
C5, C6: 10 pF to 33 pF (depending on crystal resonator)
C9, C10, C11, C12: The capacitance may vary depending on design.
Figure 41. Self-Powered Configuration
Copyright © 2002–2007, Texas Instruments Incorporated
Product Folder Link(s): PCM2901 PCM2903
Submit Documentation Feedback
29
PCM2901
PCM2903
www.ti.com
SLES034C – MARCH 2002 – REVISED NOVEMBER 2007
APPENDIX
Operating Environment
For current information on the PCM2901/2903 operating environment, see the Updated Operating Environments
for PCM270X, PCM290X Applications application report, SLAA374.
30
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Product Folder Link(s): PCM2901 PCM2903
PCM2901
PCM2903
www.ti.com
SLES034C – MARCH 2002 – REVISED NOVEMBER 2007
REVISION HISTORY
Changes from Revision B (March 2002) to Revision C .................................................................................................. Page
•
Deleted operating environment information from data sheet and added reference to application report ........................... 30
Copyright © 2002–2007, Texas Instruments Incorporated
Product Folder Link(s): PCM2901 PCM2903
Submit Documentation Feedback
31
PACKAGE OPTION ADDENDUM
www.ti.com
24-Apr-2015
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
PCM2901E
ACTIVE
SSOP
DB
28
47
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
PCM2901E
PCM2901E/2K
ACTIVE
SSOP
DB
28
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
PCM2901E
PCM2901EG4
ACTIVE
SSOP
DB
28
47
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
PCM2901E
PCM2903E
NRND
SSOP
DB
28
47
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
PCM2903E
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
24-Apr-2015
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Jul-2011
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
PCM2901E/2K
Package Package Pins
Type Drawing
SSOP
DB
28
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2000
330.0
17.4
Pack Materials-Page 1
8.5
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
10.8
2.4
12.0
16.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Jul-2011
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
PCM2901E/2K
SSOP
DB
28
2000
336.6
336.6
28.6
Pack Materials-Page 2
PACKAGE OUTLINE
DB0028A
SSOP - 2 mm max height
SCALE 1.500
SMALL OUTLINE PACKAGE
C
8.2
TYP
7.4
A
0.1 C
PIN 1 INDEX AREA
SEATING
PLANE
26X 0.65
28
1
2X
10.5
9.9
NOTE 3
8.45
14
15
28X
B
5.6
5.0
NOTE 4
SEE DETAIL A
(0.15) TYP
0.38
0.22
0.15
C A B
2 MAX
0.25
GAGE PLANE
0 -8
0.95
0.55
0.05 MIN
DETAIL A
A 15
TYPICAL
4214853/B 03/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-150.
www.ti.com
EXAMPLE BOARD LAYOUT
DB0028A
SSOP - 2 mm max height
SMALL OUTLINE PACKAGE
SYMM
28X (1.85)
(R0.05) TYP
1
28X (0.45)
28
26X (0.65)
SYMM
15
14
(7)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 10X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MAX
ALL AROUND
NON-SOLDER MASK
DEFINED
(PREFERRED)
0.07 MIN
ALL AROUND
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
15.000
4214853/B 03/2018
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DB0028A
SSOP - 2 mm max height
SMALL OUTLINE PACKAGE
28X (1.85)
SYMM
(R0.05) TYP
1
28X (0.45)
28
26X (0.65)
SYMM
14
15
(7)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 10X
4214853/B 03/2018
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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