Texas Instruments | 2-W Stereo Audio Power Amplifier with Four Selectable Gain Settings (Rev. A) | Datasheet | Texas Instruments 2-W Stereo Audio Power Amplifier with Four Selectable Gain Settings (Rev. A) Datasheet

Texas Instruments 2-W Stereo Audio Power Amplifier with Four Selectable Gain Settings (Rev. A) Datasheet
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
FEATURES
D Internal Gain Control, Which Eliminates
D
D
D
D
DESCRIPTION
The TPA6017A2 is a stereo audio power amplifier in a
20-pin TSSOP thermally enhanced package capable of
delivering 2 W of continuous RMS power per channel
into 3-Ω loads. Internal gain control minimizes the
number of external components needed, simplifying the
design, and freeing up board space for other features.
External Gain-Setting Resistors
2-W/Ch Output Power Into 3-Ω Load From 5-V
Supply
Fully Differential Input
Low Supply Current . . . 6-mA Typical
Depop Circuitry
Amplifier gain is internally configured and controlled by
way of two terminals (GAIN0 and GAIN1). Gain settings
of 6 dB, 10 dB, 15.6 dB, and 21.6 dB (inverting) are
provided.
APPLICATIONS
D Notebook Computers, PDAs, and Other
Portable Audio Devices
CRIN−
Right 0.47 µF
17
Line
Input
Signal
ROUT+
RIN−
−
+
CRIN+
0.47 µF
7
+
−
ROUT− 14
RIN+
PVDD
2
GAIN0
3
Gain
GAIN1 Control
18
Power
Management
6,15
VDD
16
BYPASS
10
SHUT−
DOWN 19
GND
CLIN−
Left
0.47 µF
Line
5
Input
Signal
CLIN+
Left 0.47 µF
Line
9
Input
Signal
To
System
Control
LOUT+ 4
LIN−
−
+
CSR
0.1 µF
VDD
VDD
CSR
0.1 µF
CBYP
0.47 µF
1,11,
13,20
+
−
LOUT− 8
LIN+
Application Circuit
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
!" # $%&" !# '%()$!" *!"&+
*%$"# $ " #'&$$!"# '& ",& "&# &-!# #"%&"#
#"!*!* .!!"/+ *%$" '$&##0 *&# " &$&##!)/ $)%*&
"&#"0 !)) '!!&"&#+
Copyright  2001, Texas Instruments Incorporated
www.ti.com
1
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
AVAILABLE OPTIONS
PACKAGED DEVICE†
TA
TSSOP
(PWP)
−40°C to 85°C
TPA6017A2PWP
† The PWP package is available taped and reeled. To order a taped and reeled part, add the suffix R to the part
number (e.g., TPA6017A2PWPR). For the most current package and ordering information, see the Package
Option Addendum at the end of this document, or see the TI website at www.ti.com.
PWP PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
GND
GAIN0
GAIN1
LOUT+
LIN−
PVDD
RIN+
LOUT−
LIN+
BYPASS
20
19
18
17
16
15
14
13
12
11
GND
SHUTDOWN
ROUT+
RIN−
VDD
PVDD
ROUT−
GND
NC
GND
NC − No internal connection
Terminal Functions
TERMINAL
NAME
NO.
I/O
DESCRIPTION
BYPASS
10
—
GAIN0
2
I
Bit 0 of gain select
3
I
Bit 1 of gain select
GND
1, 11,
13, 20
—
LIN−
5
LIN+
9
I
Left channel positive differential input
LOUT−
8
O
Left channel negative output
LOUT+
4
O
Left channel positive output
No connection
GAIN1
NC
Tap to voltage divider for internal midsupply bias generator
Ground
Left channel negative differential input
12
—
PVDD
ROUT−
6, 15
I
Supply voltage terminal
14
O
Right channel negative output
ROUT+
18
O
Right channel positive output
RIN−
17
I
Right channel negative differential input
RIN+
7
I
Right channel positive differential input
SHUTDOWN
19
I
Places IC in shutdown mode when held low
VDD
16
I
Supply voltage terminal
2
www.ti.com
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
functional block diagram
RIN−
−
+
ROUT+
−
+
ROUT−
RIN+
Gain0
Gain1
Gain
Control
Depop
Circuitry
PVDD
Power
Management
VDD
BYPASS
SHUTDOWN
GND
LIN−
−
+
LOUT+
−
+
LOUT−
LIN+
www.ti.com
3
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VDD +0.3 V
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . internally limited (see Dissipation Rating Table)
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C
Operating junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Electrostatic discharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . HBM:2 kV typical, CDM:200 V typical
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATING TABLE
TA ≤ 25°C
2.7 W‡
PACKAGE
PWP
DERATING FACTOR
21.8 mW/°C
TA = 70°C
1.7 W
TA = 85°C
1.4 W
‡ See the Texas Instruments document, PowerPAD Thermally Enhanced Package Application Report
(literature number SLMA002), for more information on the PowerPAD package. The thermal data was
measured on a PCB layout based on the information in the section entitled Texas Instruments Recommended
Board for PowerPAD on page 33 of the before mentioned document.
recommended operating conditions
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Supply voltage, VDD
High-level input voltage, VIH
SHUTDOWN
Low-level input voltage, VIL
SHUTDOWN
MIN
MAX
4.5
5.5
2
Operating free-air temperature, TA
−40
UNIT
V
V
0.8
V
85
°C
electrical characteristics at specified free-air temperature, VDD = 5 V, TA = 25°C (unless otherwise
noted)
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁ
ÁÁÁ
ÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
PARAMETER
|VOO|
Output offset voltage (measured differentially)
PSRR
Power supply rejection ratio
TEST CONDITIONS
VI = 0, Av = −2 V/V
VDD = 4.5 V to 5.5 V
|IIH|
High-level input current
VDD = 5.5 V,
VI = VDD
|IIL|
Low-level input current
VDD = 5.5 V,
VI = 0 V
IDD
Supply current
IDD(SD) Supply current, shutdown mode
4
SHUTDOWN = 2 V
SHUTDOWN = 0.8 V
www.ti.com
MIN
TYP
MAX
25
77
UNIT
mV
dB
1
µA
1
µA
6
10
mA
150
300
µA
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
operating characteristics, VDD = 5 V, TA = 25°C, RL = 8 Ω, Gain = −2 V/V (unless otherwise noted)
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
PO
THD + N
Output power
Total harmonic distortion plus noise
THD = 1%, RL = 4 Ω
PO = 1 W,
BOM
Maximum output power bandwidth
THD = 5%
>15
kHz
Supply ripple rejection ratio
f = 1 kHz, CB = 0.47 µF
−68
dB
105
dB
16
µV RMS
−96
dBV
SNR
Signal-to-noise ratio
Vn
Noise output voltage
ZI
Input impedance
f = 1 kHz,
f = 20 Hz to 15 kHz
CB = 0.47 µF,
F, f = 20 Hz to 20 kHz, No filtering
1.9
W
0.75%
See Table 1
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
THD+N
Vn
SNR
vs Output power
1, 4−6, 9−11,
14−16,
vs Frequency
2, 3, 7, 8, 12,
13
Output noise voltage
vs Bandwidth
17
Supply ripple rejection ratio
vs Frequency
18
Crosstalk
vs Frequency
19
Shutdown attenuation
vs Frequency
20
Signal-to-noise ratio
vs Frequency
Total harmonic distortion plus noise
Closed loop response
PO
PD
Output power
Power dissipation
21
22−24
vs Load resistance
25
vs Output power
26
vs Ambient temperature
27
www.ti.com
5
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
10%
AV = 6 dB
f = 1 kHz
RL = 4 Ω
1%
RL = 8 Ω
RL = 3 Ω
0.1%
0.01%
0.5 0.75
1
1.25 1.5 1.75
2
PO = 1.75 W
RL = 3 Ω
THD+N −Total Harmonic Distortion + Noise
THD+N −Total Harmonic Distortion + Noise
10%
2.25 2.5 2.75
1%
0.1%
AV = 15.6 dB
0.01%
20
3
PO − Output Power − W
10%
RL = 3 Ω
AV = 6 dB
THD+N −Total Harmonic Distortion + Noise
THD+N −Total Harmonic Distortion + Noise
10k 20k
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
1%
PO = 1.0 W
PO = 0.5 W
0.1%
PO = 1.75 W
100
1k
10k 20k
f − Frequency − Hz
Figure 3
6
1k
Figure 2
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
0.01%
20
100
f − Frequency − Hz
Figure 1
10%
AV = 6 dB
AV = 21.6 dB
f = 15 kHz
1%
f = 1 kHz
0.1%
f = 20 Hz
RL = 3 Ω
AV = 6 dB
0.01%
0.01
0.1
1
PO − Output Power − W
Figure 4
www.ti.com
10
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
10%
THD+N −Total Harmonic Distortion + Noise
THD+N −Total Harmonic Distortion + Noise
10%
f = 15 kHz
1%
f = 1 kHz
f = 20 Hz
0.1%
RL = 3 Ω
AV = 15.6 dB
0.01%
0.01
0.1
1
PO − Output Power − W
f = 15 kHz
1%
f = 1 kHz
f = 20 Hz
0.1%
RL = 3 Ω
AV = 21.6 dB
0.01%
0.01
10
0.1
1
PO − Output Power − W
Figure 5
Figure 6
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
10%
PO = 1.75 W
RL = 3 Ω
1%
AV = 21.6 dB
AV = 6 dB
0.1%
AV = 15.6 dB
100
1k
RL = 4 Ω
AV = 6 dB
THD+N −Total Harmonic Distortion + Noise
THD+N −Total Harmonic Distortion + Noise
10%
0.01%
20
10
10k 20k
1%
PO = 1.5 W
0.1%
PO = 0.25 W
PO = 1.0 W
0.01%
20
f − Frequency − Hz
100
1k
10k 20k
f − Frequency − Hz
Figure 7
Figure 8
www.ti.com
7
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
10%
RL = 4 Ω
AV = 6 dB
THD+N −Total Harmonic Distortion + Noise
THD+N −Total Harmonic Distortion + Noise
10%
f = 15 kHz
1%
f = 1 kHz
0.1%
f = 20 Hz
0.01%
0.01
0.1
1
PO − Output Power − W
f = 15 kHz
1%
f = 1 kHz
0.1%
f = 20 Hz
RL = 4 Ω
AV = 15.6 dB
0.01%
0.01
10
0.1
1
PO − Output Power − W
Figure 9
Figure 10
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
10%
f = 15 kHz
1%
f = 1 kHz
f = 20 Hz
0.1%
RL = 4 Ω
AV = 21.6 dB
0.1
1
PO − Output Power − W
RL = 8 Ω
AV = 6 dB
THD+N −Total Harmonic Distortion + Noise
THD+N −Total Harmonic Distortion + Noise
10%
0.01%
0.01
10
1%
0.1%
PO = 0.25 W
PO = 1.0 W
0.01%
20
100
PO = 0.5 W
1k
f − Frequency − Hz
Figure 11
8
10
Figure 12
www.ti.com
10k 20k
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
10%
PO = 1 W
RL = 8 Ω
1%
AV = 21.6 dB
AV = 6 dB
0.1%
AV = 15.6 dB
0.01%
20
100
1k
RL = 8 Ω
AV = 6 dB
THD+N −Total Harmonic Distortion + Noise
THD+N −Total Harmonic Distortion + Noise
10%
f = 1 kHz
0.1%
f = 20 Hz
0.01%
0.01
10k 20k
f − Frequency − Hz
Figure 13
10%
RL = 8 Ω
AV = 15.6 dB
THD+N −Total Harmonic Distortion + Noise
THD+N −Total Harmonic Distortion + Noise
10
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
10%
f = 15 kHz
1%
f = 1 kHz
0.01%
0.01
0.1
1
PO − Output Power − W
Figure 14
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
0.1%
f = 15 kHz
1%
f = 20 Hz
0.1
1
PO − Output Power − W
10
f = 15 kHz
1%
f = 1 kHz
f = 20 Hz
0.1%
RL = 8 Ω
AV = 21.6 dB
0.01%
0.01
Figure 15
0.1
1
PO − Output Power − W
10
Figure 16
www.ti.com
9
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
OUTPUT NOISE VOLTAGE
vs
BANDWIDTH
SUPPLY RIPPLE REJECTION RATIO
vs
FREQUENCY
100
Supply Ripple Rejection Ratio − dB
90
V n − Output Noise Voltage − µ V
0
VDD = 5 V
RL = 4Ω
80
70
60
50
40
AV = 21.6 dB
30
AV = 15.6 dB
20
−20
RL = 8 Ω
CB = 0.47 µF,
AV = 6 dB
−40
−60
−80
−100
10
AV = 6 dB
0
10
100
1k
−120
20
10k
100
BW − Bandwidth − Hz
1k
f − Frequency − Hz
Figure 17
Figure 18
SHUTDOWN ATTENUATION
vs
FREQUENCY
CROSSTALK
vs
FREQUENCY
0
0
VI = 1 VRMS
PO = 1 W
RL = 8 Ω
Av = 6 dB
−20
Shutdown Attenuation − db
Crosstalk − dB
−20
−40
−60
−80
LEFT TO RIGHT
RIGHT TO LEFT
100
1k
10k 20k
−60
−80
−120
20
RL = 8 Ω, BTL
100
1k
f − Frequency − Hz
f − Frequency − Hz
Figure 19
10
−40
−100
−100
−120
20
10k 20k
Figure 20
www.ti.com
10k 20k
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
SIGNAL-TO-NOISE RATIO
vs
FREQUENCY
140
SNR − Signal-To-Noise Ratio − dB
130
PO = 1 W
RL = 8 Ω
120
AV = 15.6 dB
AV = 6 dB
110
100
90
AV = 21.6 dB
80
70
60
20
100
1k
10k 20k
f − Frequency − Hz
Figure 21
CLOSED LOOP RESPONSE
180°
10
7.5
Gain
90°
2.5
Phase
0
0°
Phase
Gain − dB
5
−2.5
−5
RL = 8 Ω
AV = 6 dB
−90°
−7.5
−10
10
−180°
100
1k
10k
100k
1M
f − Frequency − Hz
Figure 22
www.ti.com
11
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
CLOSED LOOP RESPONSE
180°
30
25
90°
20
Phase
10
0°
Phase
Gain − dB
Gain
15
5
0
RL = 8 Ω
AV = 15.6 dB
−90°
−5
−10
10
−180°
100
1k
10k
100k
1M
f − Frequency − Hz
Figure 23
CLOSED LOOP RESPONSE
180°
30
25
Gain
90°
15
Phase
10
0°
5
0
RL = 8 Ω
AV = 21.6 dB
−90°
−5
−10
10
−180°
100
1k
10k
f − Frequency − Hz
Figure 24
12
www.ti.com
100k
1M
Phase
Gain − dB
20
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
POWER DISSIPATION
vs
OUTPUT POWER
OUTPUT POWER
vs
LOAD RESISTANCE
1.8
3.5
AV = 6 dB
3Ω
1.6
PD − Power Dissipation − W
2.5
2
10% THD+N
1.5
1
1.4
1.2
4Ω
1
0.8
0.6
8Ω
0.4
f = 1 kHz
Each Channel
1% THD+N
0.5
0.2
0
0
0
0
8
48
16
24
32
40
RL − Load Resistance − Ω
56
64
0.5
1
1.5
PO − Output Power − W
Figure 25
2
2.5
Figure 26
POWER DISSIPATION
vs
AMBIENT TEMPERATURE
7
ΘJA4
6
PD − Power Dissipation − W
PO − Output Power − W
3
ΘJA1 = 45.9°C/W
ΘJA2 = 45.2°C/W
ΘJA3 = 31.2°C/W
ΘJA4 = 18.6°C/W
5
4
ΘJA3
3
ΘJA1,2
2
1
0
−40 −20
0
20 40 60 80 100 120 140 160
TA − Ambient Temperature − °C
Figure 27
www.ti.com
13
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
THERMAL INFORMATION
The thermally enhanced PWP package is based on the 20-pin TSSOP, but includes a thermal pad (see Figure 28)
to provide an effective thermal contact between the IC and the PWB.
Traditionally, surface-mount and power have been mutually exclusive terms. A variety of scaled-down TO-220-type
packages have leads formed as gull wings to make them applicable for surface-mount applications. These packages,
however, have only two shortcomings: they do not address the very low profile requirements (< 2 mm) of many of
today’s advanced systems, and they do not offer a terminal-count high enough to accommodate increasing
integration. On the other hand, traditional low-power surface-mount packages require power-dissipation derating that
severely limits the usable range of many high-performance analog circuits.
The PowerPAD package (thermally enhanced TSSOP) combines fine-pitch surface-mount technology with thermal
performance comparable to much larger power packages.
The PowerPAD package is designed to optimize the heat transfer to the PWB. Because of the very small size and
limited mass of a TSSOP package, thermal enhancement is achieved by improving the thermal conduction paths that
remove heat from the component. The thermal pad is formed using a patented lead-frame design and manufacturing
technique to provide a direct connection to the heat-generating IC. When this pad is soldered or otherwise thermally
coupled to an external heat dissipator, high power dissipation in the ultrathin, fine-pitch, surface-mount package can
be reliably achieved.
DIE
Side View (a)
Thermal
Pad
DIE
End View (b)
Bottom View (c)
Figure 28. Views of Thermally Enhanced PWP Package
14
www.ti.com
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
APPLICATION INFORMATION
CRIN−
Right 0.47 µF
Line
17
Input
Signal
RIN−
−
+
ROUT+
18
−
+
ROUT−
14
CRIN+
0.47 µF
7
2
3
RIN+
PVDD
GAIN0
GAIN1
Gain
Control
Depop
Circuitry
Power
Management
Left
Line
Input
Signal
CLIN−
0.47 µF
VDD
16
BYPASS
SHUT−
DOWN
10
GND
5
6,15
LIN−
See Note A
19
To
System
Control
−
+
LOUT+
4
−
+
LOUT−
8
CSR
0.1 µF
VDD
VDD
CSR
0.1 µF
CBYP
0.47 µF
1,11,
13,20
CLIN+
0.47 µF
9
NOTE A:
LIN+
A 0.1 µF ceramic capacitor should be placed as close as possible to the IC. For filtering lower frequency noise signals, a larger
electrolytic capacitor of 10 µF or greater should be placed near the audio power amplifier.
Figure 29. Typical TPA6017A2 Application Circuit Using Single-Ended Inputs
www.ti.com
15
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
APPLICATION INFORMATION
CRIN−
Right 0.47 µF
Negative
17
Differential
Input
Signal
CRIN+
Right 0.47 µF
Positive
7
Differential
Input
Signal
2
3
RIN−
−
+
ROUT+
18
−
+
ROUT−
14
RIN+
PVDD
GAIN0
GAIN1
Gain
Control
Depop
Circuitry
Power
Management
CLIN−
0.47 µF
Left
Negative
Differential
Input
Signal
CLIN+
Left 0.47 µF
Positive
9
Differential
Input
Signal
NOTE A:
VDD
16
BYPASS
SHUT−
DOWN
10
GND
5
6,15
LIN−
See Note A
19
To
System
Control
−
+
LOUT+
4
−
+
LOUT−
8
CSR
0.1 µF
VDD
CSR
0.1 µF
CBYP
0.47 µF
1,11,
13,20
LIN+
A 0.1 µF ceramic capacitor should be placed as close as possible to the IC. For filtering lower frequency noise signals, a larger
electrolytic capacitor of 10 µF or greater should be placed near the audio power amplifier.
Figure 30. Typical TPA6017A2 Application Circuit Using Differential Inputs
16
VDD
www.ti.com
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
APPLICATION INFORMATION
shutdown modes
The TPA6017A2 employs a shutdown mode of operation designed to reduce supply current, IDD, to the absolute
minimum level during periods of nonuse for battery-power conservation. The SHUTDOWN input terminal
should be held high during normal operation when the amplifier is in use. Pulling SHUTDOWN low causes the
outputs to mute and the amplifier to enter a low-current state, IDD = 150 µA. SHUTDOWN should never be left
unconnected because amplifier operation would be unpredictable.
gain setting via GAIN0 and GAIN1 inputs
The gain of the TPA6017A2 is set by two input terminals, GAIN0 and GAIN1.
Table 1. Gain Settings
AV(inv)
INPUT
IMPEDANCE
0
6 dB
90 kΩ
1
10 dB
70 kΩ
1
0
15.6 dB
45 kΩ
1
1
21.6 dB
25 kΩ
GAIN0
GAIN1
0
0
The gains listed in Table 1 are realized by changing the taps on the input resistors inside the amplifier. This
causes the input impedance, ZI, to be dependent on the gain setting. The actual gain settings are controlled
by ratios of resistors, so the actual gain distribution from part-to-part is quite good. However, the input
impedance will shift by 30% due to shifts in the actual resistance of the input impedance.
For design purposes, the input network (discussed in the next section) should be designed assuming an input
impedance of 10 kΩ, which is the absolute minimum input impedance of the TPA6017A2. At the higher gain
settings, the input impedance could increase to as high as 115 kΩ. The typical input impedance at each gain
setting is given in Table 1.
input capacitor, CI
In the typical application an input capacitor, CI, is required to allow the amplifier to bias the input signal to the
proper dc level for optimum operation. In this case, CI and the input impedance of the amplifier, ZI, form a
high-pass filter with the corner frequency determined in equation 1.
−3 dB
f c(highpass) +
(1)
1
2 p ZI CI
fc
www.ti.com
17
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
APPLICATION INFORMATION
input capacitor, CI (continued)
The value of CI is important to consider as it directly affects the bass (low frequency) performance of the circuit.
Consider the example where ZI is 10 kΩ, which is the absolute minimum input impedance of the TPA6017A2,
and the specification calls for a flat bass response down to 40 Hz. Equation 2 is reconfigured as equation 2.
1
C +
I
2p Z f c
I
(2)
In this example, CI is 0.40 µF, so one would likely choose a value in the range of 0.47 µF to 1 µF. A further
consideration for this capacitor is the leakage path from the input source through the input network (CI) and the
feedback network to the load. This leakage current creates a dc offset voltage at the input to the amplifier that
reduces useful headroom, especially in high-gain applications. For this reason a low-leakage tantalum or
ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor
should face the amplifier input in most applications, as the dc level there is held at VDD/2, which is likely higher
than the source dc level. It is important to confirm the capacitor polarity in the application.
power supply decoupling, CS
The TPA6017A2 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling
to ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also
prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is
achieved by using two capacitors of different types that target different types of noise on the power supply leads.
For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series- resistance
(ESR) ceramic capacitor, typically 0.1 µF placed as close as possible to the device VDD lead, works best. For
filtering lower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near
the audio power amplifier is recommended.
midrail bypass capacitor, CBYP
The midrail bypass capacitor CBYP, the most critical capacitor serves several important functions. During
start-up or recovery from shutdown mode, CBYP determines the rate at which the amplifier starts up. The second
function is to reduce noise produced by the power supply caused by coupling into the output drive signal. This
noise is from the midrail generation circuit internal to the amplifier, which appears as degraded PSRR and
THD+N.
Bypass capacitor, CBYP, values of 0.47 µF to 1 µF ceramic or tantalum low-ESR capacitors are recommended
for the best THD and noise performance.
using low-ESR capacitors
Low-ESR capacitors are recommended throughout this applications section. A real (as opposed to ideal)
capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this
resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this
resistance, the more the real capacitor behaves like an ideal capacitor.
18
www.ti.com
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
APPLICATION INFORMATION
bridged-tied load versus single-ended mode
Figure 31 shows a Class-AB audio power amplifier (APA) in a BTL configuration. The TPA6017A2 BTL amplifier
consists of two Class-AB amplifiers driving both ends of the load. There are several potential benefits to this
differential drive configuration, but initially consider power to the load. The differential drive to the speaker
means that as one side is slewing up, the other side is slewing down, and vice versa. This in effect doubles the
voltage swing on the load as compared to a ground referenced load. Plugging 2 × VO(PP) into the power
equation, where voltage is squared, yields 4× the output power from the same supply rail and load impedance
(see equation 3).
V
V (rms) +
V
Power +
O(PP)
2 Ǹ2
(3)
2
(rms)
R
L
VDD
VO(PP)
RL
2x VO(PP)
VDD
−VO(PP)
Figure 31. Bridge-Tied Load Configuration
In a typical computer sound channel operating at 5 V, bridging raises the power into an 8-Ω speaker from a
singled-ended (SE, ground reference) limit of 250 mW to 1 W. In sound power that is a 6-dB improvement —
which is loudness that can be heard. In addition to increased power there are frequency response concerns.
Consider the single-supply SE configuration shown in Figure 32. A coupling capacitor is required to block the
dc offset voltage from reaching the load. These capacitors can be quite large (approximately 33 µF to 1000 µF)
so they tend to be expensive, heavy, occupy valuable PCB area, and have the additional drawback of limiting
low-frequency performance of the system. This frequency limiting effect is due to the high pass filter network
created with the speaker impedance and the coupling capacitance and is calculated with equation 4.
fc +
1
2p R C
L C
(4)
www.ti.com
19
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
APPLICATION INFORMATION
bridged-tied load versus single-ended mode (continued)
For example, a 68-µF capacitor with an 8-Ω speaker would attenuate low frequencies below 293 Hz. The BTL
configuration cancels the dc offsets, which eliminates the need for the blocking capacitors. Low-frequency
performance is then limited only by the input network and speaker response. Cost and PCB space are also
minimized by eliminating the bulky coupling capacitor.
VDD
−3 dB
VO(PP)
CC
RL
VO(PP)
fc
Figure 32. Single-Ended Configuration and Frequency Response
Increasing power to the load does carry a penalty of increased internal power dissipation. The increased
dissipation is understandable considering that the BTL configuration produces 4× the output power of the SE
configuration. Internal dissipation versus output power is discussed further in the crest factor and thermal
considerations section.
BTL amplifier efficiency
Class-AB amplifiers are inefficient. The primary cause of these inefficiencies is voltage drop across the output
stage transistors. There are two components of the internal voltage drop. One is the headroom or dc voltage
drop that varies inversely to output power. The second component is due to the sinewave nature of the output.
The total voltage drop can be calculated by subtracting the RMS value of the output voltage from VDD. The
internal voltage drop, multiplied by the RMS value of the supply current, IDDrms, determines the internal power
dissipation of the amplifier.
An easy-to-use equation to calculate efficiency starts out as being equal to the ratio of power from the power
supply to the power delivered to the load. To accurately calculate the RMS and average values of power in the
load and in the amplifier, the current and voltage waveform shapes must first be understood (see Figure 33).
VO
IDD(avg)
V(LRMS)
Figure 33. Voltage and Current Waveforms for BTL Amplifiers
20
IDD
www.ti.com
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
APPLICATION INFORMATION
BTL amplifier efficiency (continued)
Although the voltages and currents for SE and BTL are sinusoidal in the load, currents from the supply are very
different between SE and BTL configurations. In an SE application, the current waveform is a half-wave rectified
shape, whereas in BTL it is a full-wave rectified waveform. This means RMS conversion factors are different.
Keep in mind that for most of the waveform, both the push and pull transistors are not on at the same time, which
supports the fact that each amplifier in the BTL device only draws current from the supply for half the waveform.
The following equations are the basis for calculating amplifier efficiency.
Efficiency of a BTL amplifier +
P
P
L
(5)
SUP
Where:
2
V rms 2
V
V
P + L
, and V
+ P , therefore, P + P
L
L
LRMS
Ǹ2
R
2R
L
L
1
and P SUP + V DD I DDavg and I DDavg + p
ŕ
p V
P sin(t) dt + 1
p
R
0
L
2V
P
P [cos(t)] p +
0
pR
R
L
L
V
Therefore,
V
DD P
SUP
pR
L
substituting PL and PSUP into equation 7,
+
P
2V
2
Efficiency of a BTL amplifier +
Where:
V
P
+
VP
2 RL
2 V DD V P
p RL
+
p VP
4 V DD
Ǹ2 PL RL
PL = Power devilered to load
PSUP = Power drawn from power supply
VLRMS = RMS voltage on BTL load
RL = Load resistance
VP = Peak voltage on BTL load
IDDavg = Average current drawn from the
power supply
VDD = Power supply voltage
ηBTL = Efficiency of a BTL amplifier
Therefore,
h BTL +
p
Ǹ2 PL RL
4V
(6)
DD
Table 2 employs equation 8 to calculate efficiencies for four different output power levels. Note that the efficiency
of the amplifier is quite low for lower power levels and rises sharply as power to the load is increased resulting
in a nearly flat internal power dissipation over the normal operating range. Note that the internal dissipation at
full output power is less than in the half power range. Calculating the efficiency for a specific system is the key
to proper power supply design. For a stereo 1-W audio system with 8-Ω loads and a 5-V supply, the maximum
draw on the power supply is almost 3.25 W.
www.ti.com
21
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
APPLICATION INFORMATION
BTL amplifier efficiency (continued)
Table 2. Efficiency vs Output Power in 5-V 8-Ω BTL Systems
Output Power
(W)
Efficiency
(%)
Peak Voltage
(V)
Internal Dissipation
(W)
0.25
31.4
2.00
0.55
0.50
44.4
2.83
0.62
1.00
62.8
0.59
1.25
70.2
4.00
4.47†
0.53
† High peak voltages cause the THD to increase.
A final point to remember about Class-AB amplifiers is how to manipulate the terms in the efficiency equation
to utmost advantage when possible. Note that in equation 6, VDD is in the denominator. This indicates that as
VDD goes down, efficiency goes up.
crest factor and thermal considerations
Class-AB power amplifiers dissipate a significant amount of heat in the package under normal operating
conditions. A typical music CD requires 12 dB to 15 dB of dynamic range, or headroom above the average power
output, to pass the loudest portions of the signal without distortion. In other words, music typically has a crest
factor between 12 dB and 15 dB. When determining the optimal ambient operating temperature, the internal
dissipated power at the average output power level must be used. From the TPA6017A2 data sheet, one can
see that when the TPA6017A2 is operating from a 5-V supply into a 3-Ω speaker 4-W peaks are available.
Converting watts to dB:
P
dB
+ 10 Log
PW
P
ref
+ 10Log 4 W + 6 dB
1W
(7)
Subtracting the headroom restriction to obtain the average listening level without distortion yields:
6 dB − 18 dB = −12 dB (18 dB crest factor)
6 dB − 15 dB = −9 dB (15 dB crest factor)
6 dB − 12 dB = −6 dB (12 dB crest factor)
6 dB − 9 dB = −3 dB (9 dB crest factor)
6 dB − 6 dB = 0 dB (6 dB crest factor)
6 dB − 3 dB = 3 dB (3 dB crest factor)
Converting dB back into watts:
P
W
+ 10 PdBń10
P
ref
+ 63 mW (18 dB crest factor)
(8)
+ 125 mW (15 dB crest factor)
+ 250 mW (12 dB crest factor)
+ 500 mW (9 dB crest factor)
+ 1000 mW (6 dB crest factor)
+ 2000 mW (3 dB crest factor)
22
www.ti.com
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
APPLICATION INFORMATION
crest factor and thermal considerations (continued)
This is valuable information to consider when attempting to estimate the heat dissipation requirements for the
amplifier system. Comparing the absolute worst case, which is 2 W of continuous power output with a 3 dB crest
factor, against 12 dB and 15 dB applications drastically affects maximum ambient temperature ratings for the
system. Using the power dissipation curves for a 5-V, 3-Ω system, the internal dissipation in the TPA6017A2
and maximum ambient temperatures is shown in Table 3.
Table 3. TPA6017A2 Power Rating, 5-V, 3-Ω, Stereo
PEAK OUTPUT POWER
(W)
AVERAGE OUTPUT POWER
POWER DISSIPATION
(W/Channel)
MAXIMUM AMBIENT
TEMPERATURE
4
2 W (3 dB)
1.7
4
1000 mW (6 dB)
1.6
6°C
4
500 mW (9 dB)
1.4
24°C
4
250 mW (12 dB)
1.1
51°C
4
125 mW (15 dB)
0.8
78°C
4
63 mW (18 dB)
0.6
96°C
−3°C
Table 4. TPA6017A2 Power Rating, 5-V, 8-Ω, Stereo
PEAK OUTPUT POWER
AVERAGE OUTPUT POWER
POWER DISSIPATION
(W/Channel)
MAXIMUM AMBIENT
TEMPERATURE
2.5 W
1250 mW (3 dB crest factor)
0.55
100°C
2.5 W
1000 mW (4 dB crest factor)
0.62
94°C
2.5 W
500 mW (7 dB crest factor)
0.59
97°C
2.5 W
250 mW (10 dB crest factor)
0.53
102°C
The maximum dissipated power, PD(max), is reached at a much lower output power level for an 8-Ω load than
for a 3-Ω load. As a result, this simple formula for calculating PD(max) may be used for an 8-Ω application:
P D(max) +
2V 2
DD
2
p RL
(9)
However, in the case of a 3-Ω load, the PD(max) occurs at a point well above the normal operating power level.
The amplifier may therefore be operated at a higher ambient temperature than required by the PD(max) formula
for a 3-Ω load.
The maximum ambient temperature depends on the heat sinking ability of the PCB system. The derating factor
for the PWP package is shown in the dissipation rating table. Converting this to ΘJA:
Θ
JA
+
1
1 + 45°CńW
+
0.022
Derating Factor
(10)
To calculate maximum ambient temperatures, first consider that the numbers from the dissipation graphs are
per channel so the dissipated power needs to be doubled for two channel operation. Given ΘJA, the maximum
allowable junction temperature, and the total internal dissipation, the maximum ambient temperature can be
calculated with the following equation. The maximum recommended junction temperature for the TPA6017A2
is 150°C. The internal dissipation figures are taken from Figure 26.
www.ti.com
23
SLOS386A − NOVEMBER 2001 − REVISED APRIL 2007
APPLICATION INFORMATION
crest factor and thermal considerations (continued)
T A Max + T J Max * Θ JA P D
+ 150 * 45 (0.6 2) + 96°C (18 dB crest factor)
(11)
NOTE:
Internal dissipation of 0.6 W is estimated for a 2-W system with 18 dB crest factor per channel.
Tables 3 and 4 show that for some applications no airflow is required to keep junction temperatures in the
specified range. The TPA6017A2 is designed with thermal protection that turns the device off when the junction
temperature surpasses 150°C to prevent damage to the IC. Tables 3 and 4 were calculated for maximum
listening volume without distortion. When the output level is reduced the numbers in the table change
significantly. Also, using 8-Ω speakers dramatically increases the thermal performance by increasing amplifier
efficiency.
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusions.
The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane. This pad is electrically
and thermally connected to the backside of the die and terminals 1, 12, 13, and 24. The dimensions of the thermal pad are
2.40 mm × 4.70 mm (maximum). The pad is centered on the bottom of the package.
E. Falls within JEDEC MO-153
24
www.ti.com
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPA6017A2PWP
ACTIVE
HTSSOP
PWP
20
70
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
TPA6017
TPA6017A2PWPR
ACTIVE
HTSSOP
PWP
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
TPA6017
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
TPA6017A2PWPR
Package Package Pins
Type Drawing
SPQ
HTSSOP
2000
PWP
20
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
330.0
16.4
Pack Materials-Page 1
6.95
B0
(mm)
K0
(mm)
P1
(mm)
7.1
1.6
8.0
W
Pin1
(mm) Quadrant
16.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPA6017A2PWPR
HTSSOP
PWP
20
2000
367.0
367.0
38.0
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its
semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers
should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
TI’s published terms of sale for semiconductor products (http://www.ti.com/sc/docs/stdterms.htm) apply to the sale of packaged integrated
circuit products that TI has qualified and released to market. Additional terms may apply to the use or sale of other types of TI products and
services.
Reproduction of significant portions of TI information in TI data sheets is permissible only if reproduction is without alteration and is
accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such reproduced
documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements
different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the
associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Buyers and others who are developing systems that incorporate TI products (collectively, “Designers”) understand and agree that Designers
remain responsible for using their independent analysis, evaluation and judgment in designing their applications and that Designers have
full and exclusive responsibility to assure the safety of Designers' applications and compliance of their applications (and of all TI products
used in or for Designers’ applications) with all applicable regulations, laws and other applicable requirements. Designer represents that, with
respect to their applications, Designer has all the necessary expertise to create and implement safeguards that (1) anticipate dangerous
consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that might cause harm and
take appropriate actions. Designer agrees that prior to using or distributing any applications that include TI products, Designer will
thoroughly test such applications and the functionality of such TI products as used in such applications.
TI’s provision of technical, application or other design advice, quality characterization, reliability data or other services or information,
including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to
assist designers who are developing applications that incorporate TI products; by downloading, accessing or using TI Resources in any
way, Designer (individually or, if Designer is acting on behalf of a company, Designer’s company) agrees to use any particular TI Resource
solely for this purpose and subject to the terms of this Notice.
TI’s provision of TI Resources does not expand or otherwise alter TI’s applicable published warranties or warranty disclaimers for TI
products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections,
enhancements, improvements and other changes to its TI Resources. TI has not conducted any testing other than that specifically
described in the published documentation for a particular TI Resource.
Designer is authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that
include the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE
TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY
RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or
endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
TI RESOURCES ARE PROVIDED “AS IS” AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR
REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TO
ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL
PROPERTY RIGHTS. TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY DESIGNER AGAINST ANY CLAIM,
INCLUDING BUT NOT LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF
PRODUCTS EVEN IF DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL,
DIRECT, SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN
CONNECTION WITH OR ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN
ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Unless TI has explicitly designated an individual product as meeting the requirements of a particular industry standard (e.g., ISO/TS 16949
and ISO 26262), TI is not responsible for any failure to meet such industry standard requirements.
Where TI specifically promotes products as facilitating functional safety or as compliant with industry functional safety standards, such
products are intended to help enable customers to design and create their own applications that meet applicable functional safety standards
and requirements. Using products in an application does not by itself establish any safety features in the application. Designers must
ensure compliance with safety-related requirements and standards applicable to their applications. Designer may not use any TI products in
life-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use.
Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life
support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, all
medical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S.
TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product).
Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications
and that proper product selection is at Designers’ own risk. Designers are solely responsible for compliance with all legal and regulatory
requirements in connection with such selection.
Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s noncompliance with the terms and provisions of this Notice.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2018, Texas Instruments Incorporated
Was this manual useful for you? yes no
Thank you for your participation!

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project

Related manuals

Download PDF

advertising