Texas Instruments | 2.8-W Stereo Fully Differential Audio Power Amplifier (Rev. B) | Datasheet | Texas Instruments 2.8-W Stereo Fully Differential Audio Power Amplifier (Rev. B) Datasheet

Texas Instruments 2.8-W Stereo Fully Differential Audio Power Amplifier (Rev. B) Datasheet
TPA6020A2
www.ti.com
SLOS458B – JULY 2005 – REVISED AUGUST 2005
2.8-W STEREO FULLY DIFFERENTIAL AUDIO POWER AMPLIFIER
FEATURES
APPLICATIONS
•
•
•
•
•
•
•
•
•
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Ideal for Notebook PCs
Fully Differential Architecture and High
PSRR (-80 dB) Provide Excellent RF
Rectification Immunity
2.8 W Into 3 Ω From a 5-V Supply at
THD = 10% (Typical)
Very Low Crosstalk:
– -100 dB Typical at 5 V, 3 Ω
2.5-V to 5.5-V Operating Range
Low Supply Current:
– 8 mA Typical at 5 V
– Shutdown Current: 80-nA Typical
Fast Startup (27 ms) With Minimal Pop
Internal Feedback Resistors Reduce
Component Count
Thermally Enhanced QFN Packaging
Notebook PCs
LCD TVs
DESCRIPTION
The TPA6020A2 is a 2.8-W stereo bridge-tied load
(BTL) amplifier designed to drive stereo speakers
with at least 3-Ω impedance. The device operates
from 2.5 V to 5.5 V, drawing only 8 mA of quiescent
supply current. The feedback resistors are internal,
allowing the gain to be set with only two input
resistors per channel. The amplifier's fully differential
architecture performs with -80 dB of power supply
rejection from 20 Hz to 2 kHz, improved RF rectification immunity, small PCB area, and a fast startup
time with minimal pop, making the TPA6020A2 ideal
for notebook PC applications.
APPLICATION CIRCUIT
19
RVDD
To Supply
40 kW
ROUT+ 1
100 kW
100 kW
2, 5, Thermal Pad
GND
15
C(RBYPASS)
(See note A)
C(LBYPASS)
11
40 kW
RI
13 LIN-
+ RI
12 LIN+
In From
DAC
_
18
17
16
RBYPASS
ROUT+
1
15
GND
2
14
RS/D
LIN-
ROUT-
3
13
LOUT+
4
12
LIN+
GND
5
11
LBYPASS
6
7
8
9
10
LOUT- 6
+
40 kW
A.
LOUT+ 4
19
NC
9
20
LS/D
Bias
Circuitry
NC
14
SHUTDOWN
RIN+
40 kW
RIN-
20-PIN QFN (RGW) PACKAGE
(TOP VIEW)
3
RVDD
ROUT+
NC
16 RIN+
_
LVDD
RI
NC
+
17 RIN-
LOUT-
In From
DAC
RI
LVDD
7
To Supply
C(LBYPASS) and C(RBYPASS) are optional.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005, Texas Instruments Incorporated
TPA6020A2
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SLOS458B – JULY 2005 – REVISED AUGUST 2005
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
PACKAGED DEVICES (1) (2)
(1)
(2)
TA
QFN
(RGW)
EVALUATION MODULES
-40°C to 85°C
TPA6020A2RGW
TPA6020A2EVM
The RGW is available taped and reeled. To order taped and reeled parts, add the suffix R to the part
number (TPA6020A2RGWR).
For the most current package and ordering information, see the Package Option Addendum at the end
of this document, or see the TI website at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted (1)
UNIT
VDD
Supply voltage
VI
Input voltage
-0.3 V to 6 V
-0.3 V to VDD + 0.3 V
Continuous total power dissipation
See Dissipation Rating Table
TA
Operating free-air temperature
-40°C to 85°C
TJ
Junction temperature
-40°C to 150°C
Tstg
Storage temperature
-65°C to 85°C
Lead temperature 1,6 mm (1/16 Inch) from case for 10 seconds
Electrostatic discharge
(1)
(2)
(3)
Human body model
(2)
Charged-device model
260°C
±2 kV
(all pins)
(3)
±500 V
(all pins)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
In accordance with JEDEC Standard 22, Test Method A114-B.
In accordance with JEDEC Standard 22, Test Method C101-A
PACKAGE DISSIPATION RATINGS
(1)
PACKAGE
TA 25°C
POWER RATING
DERATING
FACTOR (1)
TA= 70°C
POWER RATING
TA= 85°C
POWER RATING
RGW
2.99 W
23.98 mW/°C
1.92 W
1.56 W
Derating factor based on high-k board layout.
RECOMMENDED OPERATION CONDITIONS
MIN
VDD
Supply voltage
VIH
High-level input voltage
SHUTDOWN
VIL
Low-level input voltage
SHUTDOWN
TA
Operating free-air temperature
2
2.5
TYP
MAX
5.5
1.55
-40
UNIT
V
V
0.5
V
85
°C
TPA6020A2
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SLOS458B – JULY 2005 – REVISED AUGUST 2005
ELECTRICAL CHARACTERISTICS
TA = 25°C
PARAMETER
TEST CONDITIONS
VOS
Output offset voltage (measured
differentially)
VI = 0 V differential, Gain = 1 V/V, VDD = 5.5 V
PSRR
Power supply rejection ratio
VDD = 2.5 V to 5.5 V
VIC
Common-mode input range
VDD = 2.5 V to 5.5 V
CMRR
Common-mode rejection ratio
Low-output swing
High-output swing
MIN
TYP
-9
MAX
0.3
UNIT
9
-85
0.5
dB
VDD-0.8
VDD = 5.5 V,
VIC = 0.5 V to 4.7 V
-63
VDD = 2.5 V,
VIC = 0.5 V to 1.7 V
-63
RL = 3 Ω,
VIN+ = VDD,
VIN+ = 0 V,
VDD = 5.5 V
Gain = 1 V/V,
VIN- = 0 V or VDD = 3.6 V
VIN- = VDD
VDD = 2.5 V
0.55
RL = 3 Ω,
VIN+ = VDD,
VIN- = VDD
VDD = 5.5 V
Gain = 1 V/V,
VIN- = 0 V or VDD = 3.6 V
VIN+ = 0 V
VDD = 2.5 V
4.9
V
0.4
3.1
1.9
V
dB
0.42
0.34
mV
V
2.1
µA
| IIH |
High-level input current, shutdown
VDD = 5.5 V,
VI = 5.8 V
58
100
| IIL |
Low-level input current, shutdown
VDD = 5.5 V,
VI = -0.3 V
3
100
µA
IQ
Quiescent current
VDD = 2.5 V to 5.5 V, no load
8
9.8
mA
I(SD)
Supply current
V(SHUTDOWN) ≤ 0.5 V, VDD = 2.5 V to 5.5 V,
RL = 3 Ω
0.08
1
µA
Gain
RL = 3 Ω
Resistance from shutdown to GND
38 k
RI
40 k
RI
100
42 k
RI
V/V
kΩ
3
TPA6020A2
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SLOS458B – JULY 2005 – REVISED AUGUST 2005
OPERATING CHARACTERISTICS
TA = 25°C, Gain = 2 V/V
PARAMETER
TEST CONDITIONS
THD + N= 1%, f = 1 kHz, RL = 3 Ω
PO
Output power
THD + N= 1%, f = 1 kHz, RL = 4 Ω
THD + N= 1%, f = 1 kHz, RL = 8 Ω
MIN
THD+N
Total harmonic distortion plus
noise
f = 1 kHz, RL = 4 Ω
f = 1 kHz, RL = 8 Ω
kSVR
MAX
2.15
VDD = 3.6 V
1.08
VDD = 2.5 V
0.43
VDD = 5 V
1.94
VDD = 3.6 V
1.00
VDD = 2.5 V
0.41
VDD = 5 V
1.27
VDD = 3.6 V
0.65
VDD = 2.5 V
f = 1 kHz, RL = 3 Ω
TYP
VDD = 5 V
VDD = 5 V
0.09%
PO = 1 W
VDD = 3.6 V
0.20%
PO = 300 mW
VDD = 2.5 V
0.08%
PO = 1.8 W
VDD = 5 V
0.08%
PO = 0.7 W
VDD = 3.6 V
0.07%
PO = 300 mW
VDD = 2.5 V
0.12%
PO = 1 W
VDD = 5 V
0.05%
PO = 0.5 W
VDD = 3.6 V
0.06%
PO = 200 mW
VDD = 2.5 V
0.06%
VDD = 3.6 V, Inputs ac-grounded with
CI = 2 µF, V(RIPPLE) = 200 mVpp
f = 217 Hz
-80
f = 20 Hz to 20 kHz
-70
Crosstalk
VDD = 5 V, RL = 3 Ω, f = 20 Hz to 20 kHz, Po = 1 W
SNR
Signal-to-noise ratio
VDD = 5 V, PO = 2 W, RL = 3 Ω, Gain = 1 V/V
15
Output voltage noise
VDD = 3.6 V, f = 20 Hz to 20 kHz,
Gain = 1 V/V
Inputs ac grounded with CI = 0.22 µF
No weighting
Vn
A weighting
12
CMRR
Common-mode rejection ratio
VDD = 3.6 V, VIC = 200 mVpp
f = 217 Hz
ZI
Input impedance
Start-up time from shutdown
4
VDD = 3.6 V, CBYPASS = 0.1 µF
dB
-100
dB
104
dB
µVRMS
-65
38
VDD = 3.6 V, No CBYPASS
W
0.29
PO = 2 W
Supply ripple rejection ratio
UNIT
40
dB
42
kΩ
4
µs
27
ms
TPA6020A2
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SLOS458B – JULY 2005 – REVISED AUGUST 2005
Terminal Functions
TERMINAL
NAME
ROUT+
NO.
I/O
DESCRIPTION
1
O
Right channel positive BTL output
2,5
I
High current ground
ROUT-
3
O
Right channel negative BTL output
LOUT+
4
O
Left channel positive BTL output
LOUT-
6
O
Left channel negative BTL output
LVDD
7
I
Left channel power supply. Must be tied to RVDD for stereo operation.
GND
NC
8, 10, 18, 20
–
No internal connection.
LS/D
9
I
Left channel shutdown terminal (active low logic)
LBYPASS
11
–
Left channel mid-supply voltage. Adding a bypass capacitor improves PSRR
LIN+
12
I
Left channel positive differential input
LIN-
13
I
Left channel negative differential input
RS/D
14
–
Right channel shutdown terminal (active low logic)
RBYPASS
15
–
Right channel mid-supply voltage. Adding a bypass capacitor improves PSRR
RIN+
16
I
Right channel positive differential input
RIN-
17
I
Right channel negative differential input
RVDD
19
I
Power supply
Thermal Pad
–
–
Connect to ground. Thermal pad must be soldered down in all applications to properly secure
device on the PCB.
5
TPA6020A2
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SLOS458B – JULY 2005 – REVISED AUGUST 2005
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
vs Supply voltage
PO
Output power
PD
Power dissipation
THD+N
Total harmonic distortion + noise
KSVR
CMRR
1
vs Load resistance
2
vs Output power
3, 4
vs Output power
5, 6, 7
vs Frequency
8, 9, 10, 11, 12, 13
Crosstalk
vs Frequency
14
Supply voltage rejection ratio
vs Frequency
15, 16, 17, 18
GSM power supply rejection
vs Time
19
GSM power supply rejection
vs Frequency
20
vs Frequency
21
Common-mode rejection ratio
vs Common-mode input voltage
22
Closed-loop gain/phase
vs Frequency
23
Open-loop gain/phase
vs Frequency
24
Start-up time
vs Bypass capacitor
25
OUTPUT POWER
vs
SUPPLY VOLTAGE
OUTPUT POWER
vs
LOAD RESISTANCE
3
3
f = 1 kHz
Gain = 2 V/V
VDD = 5 V, THD+N = 10%
RL = 3 W, THD+N = 10%
2.5
2.5
VDD = 5 V, THD+N = 1%
PO - Output Power - W
PO - Output Power - W
RL = 4 W, THD+N = 10%
RL = 3 W, THD+N = 1%
2
RL = 4 W, THD+N = 1%
1.5
1
0.5
f = 1 kHz
Gain = 2 V/V
VDD = 3.6 V, THD+N = 10%
2
VDD = 3.6 V, THD+N = 1%
1.5
VDD = 2.5 V, THD+N = 10%
VDD = 2.5 V, THD+N = 1%
1
0.5
RL = 8 W, THD+N = 10%
RL = 8 W, THD+N = 1%
0
0
2.5
3
3.5
4
VDD - Supply Voltage - V
Figure 1.
6
4.5
5
3
8
13
18
23
RL - Load Resistance - W
Figure 2.
28
32
TPA6020A2
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SLOS458B – JULY 2005 – REVISED AUGUST 2005
POWER DISSIPATION
vs
OUTPUT POWER
POWER DISSIPATION
vs
OUTPUT POWER
2
3.5
VDD = 5 V
Stereo
3
3W
VDD = 3.6 V
Stereo
1.8
3W
PD - Power Dissipation - W
PD - Power Dissipation - W
1.6
2.5
4W
2
1.5
8W
1
1.4
1.2
4W
1
0.8
0.6
8W
0.4
0.5
0.2
0
0
0
0.5
1.5
1
2.5
2
3
0
0.2
PO - Output Power (Per Channel) - W
0.8
0.6
1
1.2
Figure 4.
TOTAL HARMONIC DISTORTION + NOISE
vs
OUTPUT POWER
TOTAL HARMONIC DISTORTION + NOISE
vs
OUTPUT POWER
3.6 V
1
0.1
0.01
0.01
0.1
5V
1
PO - Output Power - W
Figure 5.
2
3
THD+N - Total Harmonic Distortion + Noise - %
10
2.5 V
RL = 3 W
f = 1 kHz
Gain = 2 V/V
C(Bypass) = 0 to 1 mF
1.6
1.4
Figure 3.
10
THD+N - Total Harmonic Distortion + Noise - %
0.4
PO - Output Power (Per Channel) - W
RL = 4 W
f = 1 kHz
Gain = 2 V/V
C(Bypass) = 0 to 1 mF
1
3.6 V
2.5 V
5V
0.1
0.01
0.01
0.1
1
2
3
PO - Output Power - W
Figure 6.
7
TPA6020A2
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SLOS458B – JULY 2005 – REVISED AUGUST 2005
TOTAL HARMONIC DISTORTION + NOISE
vs
OUTPUT POWER
10
RL = 8 W
f = 1 kHz
Gain = 2 V/V
C(Bypass) = 0 to 1 mF
1
THD+N - Total Harmonic Distortion + Noise - %
THD+N - Total Harmonic Distortion + Noise - %
10
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
3.6 V
2.5 V
0.1
5V
0.01
0.01
0.1
1
2
3
VDD = 5 V
RL = 3 W
Gain = 2 V/V
CI = 0.22 mF
1
PO = 2 W
PO = 1 W
0.1
0.01
20
100
PO - Output Power - W
Figure 7.
Figure 8.
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
10
VDD = 5 V
RL = 4 W
Gain = 2 V/V
CI = 0.22 mF
1
PO = 1.6 W
PO = 1 W
0.1
0.01
20
100
1k
f - Frequency - Hz
Figure 9.
8
10 k 20 k
THD+N - Total Harmonic Distortion + Noise - %
THD+N - Total Harmonic Distortion + Noise - %
10
10 k 20 k
1k
f - Frequency - Hz
VDD = 5 V
RL = 8 W
Gain = 2 V/V
CI = 0.22 mF
1
PO = 1 W
0.1
0.01
20
PO = 0.5 W
100
1k
f - Frequency - Hz
Figure 10.
10 k 20 k
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SLOS458B – JULY 2005 – REVISED AUGUST 2005
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
THD+N - Total Harmonic Distortion + Noise - %
RL = 4 W
Gain = 2 V/V
CI = 0.22 mF
PO = 500 mW
1
PO = 800 mW
PO = 100 mW
0.1
0.01
20
10
THD+N - Total Harmonic Distortion + Noise - %
10
VDD = 3.6 V
100
1k
f - Frequency - Hz
10 k 20 k
VDD = 3.6 V
RL = 8 W
Gain = 2 V/V
CI = 0.22 mF
1
PO = 250 mW
PO = 100 mW
0.1
PO = 500 mW
0.01
20
100
1k
f - Frequency - Hz
Figure 11.
Figure 12.
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
CROSSTALK
vs
FREQUENCY
0
VDD = 2.5 V
RL = 4 W
Gain = 2 V/V
CI = 0.22 mF
10 k 20 k
VDD = 5 V
RL = 3 W
Gain = 2 V/V
-20
-40
PO = 250 mW
1
Crosstalk - dB
THD+N - Total Harmonic Distortion + Noise - %
10
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
PO = 100 mW
-60
-80
0.1
PO = 1 W
-100
-120
0.01
20
PO = 2 W
-140
100
1k
f - Frequency - Hz
Figure 13.
10 k 20 k
20
100
1k
f - Frequency - Hz
10 k 20 k
Figure 14.
9
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SLOS458B – JULY 2005 – REVISED AUGUST 2005
SUPPLY VOLTAGE REJECTION RATIO
vs
FREQUENCY
-10
-20
+0
RL = 4 Ω,,
C(BYPASS) = 0.47 µF,
Gain = 1 V/V,
CI = 2 µF,
Inputs ac Grounded
-30
-40
-50
-60
VDD = 3.6 V
VDD = 2.5 V
-70
-80
-90
VDD = 5 V
k SVR - Supply Voltage Rejection Ratio - dB
k SVR - Supply Voltage Rejection Ratio - dB
+0
SUPPLY VOLTAGE REJECTION RATIO
vs
FREQUENCY
-100
-10
-20
-30
-40
-50
50
100 200
500 1k
2k
5k
10k 20k
VDD = 2.5 V
-60
-80
VDD = 5 V
-90
20
50
-20
-30
5k
SUPPLY RIPPLE REJECTION RATIO
vs
FREQUENCY
SUPPLY VOLTAGE REJECTION RATIO
vs
FREQUENCY
+0
RL = 4 Ω,,
C(BYPASS) = 0.47 µF,
CI = 2 µF,
VDD = 2.5 V to 5 V
Inputs Floating
-50
-60
-70
-80
-90
-100
50
100 200
500 1k
f - Frequency - Hz
Figure 17.
10
2k
Figure 16.
-40
20
500 1k
Figure 15.
k SVR − Supply Voltage Rejection Ratio − dB
k SVR - Supply Voltage Rejection Ratio - dB
-10
100 200
10k 20k
f - Frequency - Hz
f - Frequency - Hz
+0
VDD = 3.6 V
-70
-100
20
RL = 4 Ω,,
C(BYPASS) = 0.47 µF,
Gain = 5 V/V,
CI = 2 µF,
Inputs ac Grounded
2k
5k
10k 20k
−10
−20
RL = 4 Ω,,
CI = 2 µF,
Gain = 1 V/V,
VDD = 3.6 V
−30
−40
−50
C(BYPASS) = 0.1 µF
−60
No C(BYPASS)
−70
−80
−90
−100
20
C(BYPASS) = 1 µF
C(BYPASS) = 0.47 µF
50
100 200
500 1k
2k
f − Frequency − Hz
Figure 18.
5k
10k 20k
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SLOS458B – JULY 2005 – REVISED AUGUST 2005
GSM POWER SUPPLY REJECTION
vs
FREQUENCY
0
VDD
RL = 8 W
CI = 2.2 mF
VOUT
C(BYPASS) = 0.47 mF
Ch1 100 mV/div
Ch4 10 mV/div
-10
VDD Shown in Figure 19,
-150
RL = 8 W, CI = 2.2 mF,
Inputs Grounded
-100
-120
-140
-160
C(BYPASS) = 0.47 mF
-180
2 ms/div
0
400
800
1200
f - Frequency - Hz
t - T ime - ms
1600
2000
Figure 19.
Figure 20.
COMMON MODE REJECTION RATIO
vs
FREQUENCY
COMMON-MODE REJECTION RATIO
vs
COMMON-MODE INPUT VOLTAGE
0
RL = 4 Ω,,
VIC = 200 mV Vp-p,
Gain = 1 V/V,
-20
-30
-40
VDD = 2.5 V
-50
-60
-70
VDD = 5 V
-80
-90
-100
20
-100
CMRR - Common Mode Rejection Ratio - dB
CMRR - Common-Mode Rejection Ratio - dB
+0
-50
VO - Output Voltage - dBV
Voltage - V
C1
Frequency
217 Hz
C1 - Duty
20%
C1 Pk-Pk
500 mV
50
100 200
500 1k
f - Frequency - Hz
Figure 21.
2k
5k
10k 20k
VDD - Supply Voltage - dBV
GSM POWER SUPPLY REJECTION
vs
TIME
RL = 4 W,
Gain = 1 V/V,
dc Change in VIC
-20
-40
VDD = 2.5 V
VDD = 3.6 V
-60
-80
VDD = 5 V
-100
-120
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
VIC - Common Mode Input Voltage - V
Figure 22.
11
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CLOSED-LOOP GAIN/PHASE
vs
FREQUENCY
OPEN-LOOP GAIN/PHASE
vs
FREQUENCY
Phase
30
20
100
150
90
30
-20
0
-30
-30
-40
-60
-50
-90
-60
VDD = 5 V
RL = 8 Ω
AV = 1
-70
-120
-150
-180
-80
1
10
100
1 k 10 k 100 k
f - Frequency - Hz
1M
10 M
120
90
60
Gain
50
Gain − dB
60
Gain
Phase - Degrees
0
150
70
90
-10
180
VDD = 5 V,
RL = 8 Ω
80
120
10
Gain - dB
180
40
30
30
0
20
−30
10
−90
−20
−120
−30
−150
−40
100
1k
10 k
100 k
f − Frequency − Hz
Figure 24.
START-UP TIME
vs
BYPASS CAPACITOR
300
Start-Up Time - ms
250
200
150
100
50
0.2
0.4
0.6
0.8
C(Bypass) - Bypass Capacitor - µF
Figure 25.
12
−60
Phase
0
−10
Figure 23.
0
0
60
Phase − Degrees
40
1
−180
1M
TPA6020A2
www.ti.com
SLOS458B – JULY 2005 – REVISED AUGUST 2005
APPLICATION INFORMATION
STEREO OPERATION
The TPA6020A2 is a stereo amplifier that can be
operated in either a mono or stereo configuration.
Each channel has independent shutdown control,
giving the user greater flexibility.
Bypass Capacitor Configuration
•
If Bypass capacitors are used, it is necessary to use
separate bypass capacitors for each bypass pin. (See
the section entitled Bypass Capacitor (CBYPASS) and
Start-Up Time)
VDD and Decoupling Capacitors
Each VDD pin must have a separate power supply
decoupling capacitor (see section entitled Decoupling
Capacitor (CS)). A single, bulk decoupling capacitor is
also recommended. Additionally, the left and right
channel VDD pins must be tied together on the PCB.
•
FULLY DIFFERENTIAL AMPLIFIER
The TPA6020A2 is a fully differential amplifier with
differential inputs and outputs. The fully differential
amplifier consists of a differential amplifier and a
common-mode amplifier. The differential amplifier
ensures that the amplifier outputs a differential voltage that is equal to the differential input times the
gain. The common-mode feedback ensures that the
common-mode voltage at the output is biased around
VDD/2 regardless of the common-mode voltage at the
input.
Advantages of Fully Differential Amplifiers
• Input coupling capacitors not required: A fully
differential amplifier with good CMRR, like the
TPA6020A2, allows the inputs to be biased at
voltage other than mid-supply. For example, if a
DAC has a lower mid-supply voltage than that of
the TPA6020A2, the common-mode feedback
circuit compensates, and the outputs are still
biased at the mid-supply point of the TPA6020A2.
The inputs of the TPA6020A2 can be biased from
0.5 V to VDD - 0.8 V. If the inputs are biased
outside of that range, input-coupling capacitors
are required.
Mid-supply bypass capacitor, C(BYPASS), not
required: The fully differential amplifier does not
require a bypass capacitor. Any shift in the
mid-supply voltage affects both positive and
negative channels equally, thus canceling at the
differential output. Removing the bypass capacitor slightly worsens power supply rejection ratio
(kSVR), but a slight decrease of kSVR may be
acceptable when an additional component can be
eliminated (see Figure 18).
Better RF-immunity: GSM handsets save power
by turning on and shutting off the RF transmitter
at a rate of 217 Hz. The transmitted signal is
picked up on input and output traces. The fully
differential amplifier cancels the signal much
better than the typical audio amplifier.
APPLICATION SCHEMATICS
Figure 26 through Figure 29 show application schematics for differential and single-ended inputs. Typical
values are shown in Table 1.
Table 1. Typical Component Values
COMPONENT
VALUE
RI
40 kΩ
C(BYPASS)
(1)
(1)
0.22 µF
CS
1 µF
CI
0.22 µF
C(BYPASS) is optional.
13
TPA6020A2
www.ti.com
SLOS458B – JULY 2005 – REVISED AUGUST 2005
19
To Supply
RVDD
40 kW
In From
DAC
+
RI
17 RIN-
RI
16 RIN+
_
ROUT+ 1
ROUT-
3
+
40 kW
14
SHUTDOWN
Bias
Circuitry
9
100 kW
100 kW
2, 5, Thermal Pad
GND
15
C(RBYPASS)
(See note A)
C(LBYPASS)
11
40 kW
RI
13 LIN-
+ RI
12 LIN+
In From
DAC
40 kW
A.
_
LOUT+ 4
LOUT- 6
+
7
LVDD
To Supply
C(LBYPASS) and C(RBYPASS) are optional.
Figure 26. Typical Differential Input Application Schematic
19
To Supply
19
RVDD
RVDD
40 kW
CI
RI
-
RI
+
CI
17 RIN-
_
ROUT-
16 RIN+
+
Bias
Circuitry
9
100 kW
CI
CI
A.
100 kW
3
Bias
Circuitry
100 kW
2, 5, Thermal Pad
GND
15
(See note A)
C(LBYPASS)
11
40 kW
RI
13 LIN12 LIN+
40 kW
_
CI
LOUT+ 4
LVDD
7
40 kW
RI
13 LIN-
RI
12 LIN+
IN
LOUT- 6
+
To Supply
CI
40 kW
_
LOUT+ 4
LOUT- 6
+
LVDD
7
To Supply
C(LBYPASS) and C(RBYPASS) are optional.
Figure 27. Differential Input Application
Schematic Optimized With Input Capacitors
14
ROUT-
9
2, 5, Thermal Pad
GND
ROUT+ 1
+
14
SHUTDOWN
11
RI
+
16 RIN+
C(RBYPASS)
(See note A)
C(LBYPASS)
-
RI
_
40 kW
15
C(RBYPASS)
17 RIN-
CI
14
100 kW
RI
IN
3
40 kW
SHUTDOWN
40 kW
CI
ROUT+ 1
To Supply
A.
C(LBYPASS) and C(RBYPASS) are optional.
Figure 28. Single-Ended Input Application
Schematic
TPA6020A2
www.ti.com
SLOS458B – JULY 2005 – REVISED AUGUST 2005
CF
CF
19
To Supply
RVDD
Ra
CI
-
40 kW
RI
17 RIN-
Ca
RI
Ra
+
_
ROUT-
16 RIN+
CI
ROUT+ 1
+
3
40 kW
Ca
SHUTDOWN
14
Bias
Circuitry
9
100 kW
100 kW
2, 5, Thermal Pad
GND
15
C(RBYPASS)
(See note A)
11
C(LBYPASS)
Ra
CI
Ca
+
Ra
40 kW
RI
13 LIN-
RI
12 LIN+
CI
_
LOUT+ 4
LOUT- 6
+
LVDD
40 kW
7
Ca
To Supply
CF
CF
A.
C(LBYPASS) and C(RBYPASS) are optional.
Figure 29. Differential Input Application
Schematic With Input Bandpass Filter
Bypass Capacitor (CBYPASS) and Start-Up Time
Selecting Components
Resistors (RI)
The input resistor (RI) can be selected to set the gain
of the amplifier according to Equation 1.
Gain = RF/RI
(1)
The internal feedback resistors (RF) are trimmed to
40 kΩ.
Matching input resistors are important to fully differential amplifier applications. Resistor matching has a
significant impact on CMRR and PSRR. If the input
resistor values are poorly matched, then the CMRR
and PSRR performance is diminished. Therefore,
1%-tolerance resistors or better are recommended to
optimize performance.
The internal voltage divider at the BYPASS pin of this
device sets a mid-supply voltage for internal references and sets the output common-mode voltage to
VDD/2. Adding a capacitor filters any noise into this
pin, increasing kSVR. C(BYPASS)also determines the rise
time of VO+ and VO- when the device exits shutdown.
The larger the capacitor, the slower the rise time.
Input Capacitor (CI)
The TPA6020A2 does not require input coupling
capacitors when driven by a differential input source
biased from 0.5 V to VDD - 0.8 V. Use 1% tolerance
or better gain-setting resistors if not using input-coupling capacitors.
15
TPA6020A2
www.ti.com
SLOS458B – JULY 2005 – REVISED AUGUST 2005
In the single-ended input application, an input capacitor, CI, is required to allow the amplifier to bias the
input signal to the proper dc level. In this case, CI and
RI form a high-pass filter with the corner frequency
defined in Equation 2.
1
fc 2 R C
I I
(2)
Step 1: Low-Pass Filter
1
2 R C
F F
where R is the internal 40 k resistor
F
1
f
c(LPF)
2 40 k C
F
f
c(LPF)
(4)
(5)
Therefore,
C
-3 dB
F
1
2 40 k f
c(LPF)
(6)
Substituting 10 kHz for fc(LPF) and solving for CF:
CF = 398 pF
Step 2: High-Pass Filter
1
2 R C
I I
where R is the input resistor
I
f
fc
The value of CI is an important consideration. It
directly affects the bass (low frequency) performance
of the circuit. Consider the example where RI is
10 kΩ and the specification calls for a flat bass
response down to 100 Hz. Equation 2 is reconfigured
as Equation 3.
1
C I
2 R f c
I
(3)
In this example, CI is 0.16 µF, so the likely choice
ranges from 0.22 µF to 0.47 µF. Ceramic capacitors
are preferred because they are the best choice in
preventing leakage current. When polarized capacitors are used, the positive side of the capacitor faces
the amplifier input in most applications. The input dc
level is held at VDD/2, typically higher than the source
dc level. It is important to confirm the capacitor
polarity in the application.
Band-Pass Filter (Ra, Ca, and Ca)
It may be desirable to have signal filtering beyond the
one-pole high-pass filter formed by the combination of
CI and RI. A low-pass filter may be added by placing
a capacitor (CF) between the inputs and outputs,
forming a band-pass filter.
An example of when this technique might be used
would be in an application where the desirable
pass-band range is between 100 Hz and 10 kHz, with
a gain of 4 V/V. The following equations illustrate how
the proper values of CF and CI can be determined.
c(HPF)
(7)
Because the application in this case requires a gain
of 4 V/V, RI must be set to 10 kΩ.
Substituting RI into Equation 6.
1
f
c(HPF)
2 10 k C
I
(8)
Therefore,
1
C I
2 10 k f
c(HPF)
(9)
Substituting 100 Hz for fc(HPF) and solving for CI:
CI = 0.16 µF
At this point, a first-order band-pass filter has been
created with the low-frequency cutoff set to 100 Hz
and the high-frequency cutoff set to 10 kHz.
The process can be taken a step further by creating a
second-order high-pass filter. This is accomplished by
placing a resistor (Ra) and capacitor (Ca) in the input
path. It is important to note that Ra must be at least
10 times smaller than RI; otherwise its value has a
noticeable effect on the gain, as Ra and RI are in
series.
Step 3: Additional Low-Pass Filter
Ra must be
Set Ra = 1 kΩ
f
c(LPF)
Therefore,
16
at
least
1
2 R a Ca
10X
smaller
than
RI,
(10)
TPA6020A2
www.ti.com
SLOS458B – JULY 2005 – REVISED AUGUST 2005
Ca 1
2 1kΩ f
c(LPF)
(11)
Substituting 10 kHz for fc(LPF) and solving for Ca:
Ca = 160 pF
Figure 30 is a bode plot for the band-pass filter in the
previous example. Figure 29 shows how to configure
the TPA6020A2 as a band-pass filter.
AV
benefits to this configuration is power to the load. The
differential drive to the speaker means that as one
side is slewing up, the other side is slewing down,
and vice versa. This in effect doubles the voltage
swing on the load as compared to a
ground-referenced load. Plugging 2X VO(PP) into the
power equation, where voltage is squared, yields 4X
the output power from the same supply rail and load
impedance Equation 12.
V
O(PP)
V (rms) 2 2
12 dB
9 dB
V
−20 dB/dec
+20 dB/dec
Power 2
(rms)
R
L
(12)
−40 dB/dec
VDD
fc(HPF) = 100 Hz
fc(LPF) = 10 kHz
f
Figure 30. Bode Plot
VO(PP)
Decoupling Capacitor (CS)
The TPA6020A2 is a high-performance CMOS audio
amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion
(THD) is as low as possible. Power-supply decoupling
also prevents oscillations for long lead lengths between the amplifier and the speaker. For higher
frequency transients, spikes, or digital hash on the
line, a good low equivalent-series-resistance (ESR)
ceramic capacitor, typically 0.1 µF to 1 µF, placed as
close as possible to the device VDD lead works best.
For filtering lower frequency noise signals, a 10-µF or
greater capacitor placed near the audio power amplifier also helps, but is not required in most applications
because of the high PSRR of this device.
USING LOW-ESR CAPACITORS
Low-ESR capacitors are recommended throughout
this applications section. A real (as opposed to ideal)
capacitor can be modeled simply as a resistor in
series with an ideal capacitor. The voltage drop
across this resistor minimizes the beneficial effects of
the capacitor in the circuit. The lower the equivalent
value of this resistance the more the real capacitor
behaves like an ideal capacitor.
DIFFERENTIAL OUTPUT VERSUS
SINGLE-ENDED OUTPUT
RL
2x VO(PP)
VDD
-VO(PP)
Figure 31. Differential Output Configuration
In a typical wireless handset operating at 3.6 V,
bridging raises the power into an 8-Ω speaker from a
singled-ended (SE, ground reference) limit of
200 mW to 800 mW. This is a 6-dB improvement in
sound power—loudness that can be heard. In addition to increased power, there are frequency-response
concerns.
Consider
the
single-supply SE configuration shown in Figure 32. A
coupling capacitor (CC) is required to block the
dc-offset voltage from the load. This capacitor can be
quite large (approximately 33 µF to 1000 µF) so it
tends to be expensive, heavy, occupy valuable PCB
area, and have the additional drawback of limiting
low-frequency performance. This frequency-limiting
effect is due to the high-pass filter network created
with the speaker impedance and the coupling capacitance. This is calculated with Equation 13.
Figure 31 shows a Class-AB audio power amplifier
(APA) in a fully differential configuration. The
TPA6020A2 amplifier has differential outputs driving
both ends of the load. One of several potential
17
TPA6020A2
www.ti.com
SLOS458B – JULY 2005 – REVISED AUGUST 2005
fc 1
2 R C
L C
(13)
For example, a 68-µF capacitor with an 8-Ω speaker
would attenuate low frequencies below 293 Hz. The
BTL configuration cancels the dc offsets, which eliminates the need for the blocking capacitors.
Low-frequency performance is then limited only by
the input network and speaker response. Cost and
PCB space are also minimized by eliminating the
bulky coupling capacitor.
VDD
output. The total voltage drop can be calculated by
subtracting the RMS value of the output voltage from
VDD. The internal voltage drop multiplied by the
average value of the supply current, IDD(avg), determines the internal power dissipation of the amplifier.
An easy-to-use equation to calculate efficiency starts
out as being equal to the ratio of power from the
power supply to the power delivered to the load. To
accurately calculate the RMS and average values of
power in the load and in the amplifier, the current and
voltage waveform shapes must first be understood
(see Figure 33).
VO(PP)
CC
RL
VO
VO(PP)
V(LRMS)
IDD
-3 dB
IDD(avg)
fc
Figure 32. Single-Ended Output and Frequency
Response
Increasing power to the load does carry a penalty of
increased internal power dissipation. The increased
dissipation is understandable considering that the
BTL configuration produces 4X the output power of
the SE configuration.
FULLY DIFFERENTIAL AMPLIFIER
EFFICIENCY AND THERMAL INFORMATION
Class-AB amplifiers are inefficient, primarily because
of voltage drop across the output-stage transistors.
The two components of this internal voltage drop are
the headroom or dc voltage drop that varies inversely
to output power, and the sine wave nature of the
18
Figure 33. Voltage and Current Waveforms for
BTL Amplifiers
Although the voltages and currents for SE and BTL
are sinusoidal in the load, currents from the supply
are different between SE and BTL configurations. In
an SE application the current waveform is a
half-wave rectified shape, whereas in BTL it is a
full-wave rectified waveform. This means RMS conversion factors are different. Keep in mind that for
most of the waveform both the push and pull transistors are not on at the same time, which supports the
fact that each amplifier in the BTL device only draws
current from the supply for half the waveform. The
following equations are the basis for calculating
amplifier efficiency.
TPA6020A2
www.ti.com
SLOS458B – JULY 2005 – REVISED AUGUST 2005
P
Efficiency of a BTL amplifier P
L
SUP
Where:
2
V rms 2
V
V
P L
, and V
P , therefore, P P
L
LRMS
L
2
R
2R
L
L
and P SUP V DD I DDavg and
I
avg 1
DD
2V
V
P
P sin(t) dt 1 P [cos(t)] 0
R
R
R
L
L
0
L
V
Therefore,
2V
P
SUP
V
DD P
R
L
substituting PL and PSUP into equation 6,
2
Efficiency of a BTL amplifier Where:
V
P
VP
2 RL
2 V DD V P
RL
VP
4 VDD
2 PL RL
PL = Power delivered to load
PSUP = Power drawn from power supply
VLRMS = RMS voltage on BTL load
RL = Load resistance
VP = Peak voltage on BTL load
IDDavg = Average current drawn from the power supply
VDD = Power supply voltage
ηBTL = Efficiency of a BTL amplifier
(14)
Therefore,
BTL 2 PL RL
4V
DD
(15)
Table 2. Efficiency and Maximum Ambient Temperature vs Output Power
Output Power
(W)
Efficiency
(%)
Internal Dissipation
(W)
Power From Supply
(W)
Max Ambient Temperature
(°C)
0.5
27.2
2.68
3.68
38
1
38.4
3.20
5.20
17
2
54.4
3.35
7.35
10
2.8
64.4
3.10
8.70
21
0.5
31.4
2.18
3.18
59
1
44.4
2.50
4.50
46
2
62.8
2.37
6.37
51
2.5
70.2
2.12
7.12
62
5-V, Stereo, 3-Ω Systems
5-V, Stereo, 4-Ω BTL Systems
5-V, Stereo, 8-Ω Systems
(1)
0.25
31.4
1.09
1.59
85 (1)
0.5
44.4
1.25
2.25
85 (1)
1
62.8
1.18
3.18
85 (1)
1.36
73.3
0.99
3.71
85 (1)
Package limited to 85°C ambient
19
TPA6020A2
www.ti.com
SLOS458B – JULY 2005 – REVISED AUGUST 2005
Table 2 employs Equation 15 to calculate efficiencies
for four different output power levels. Note that the
efficiency of the amplifier is quite low for lower power
levels and rises sharply as power to the load is
increased resulting in a nearly flat internal power
dissipation over the normal operating range. Note that
the internal dissipation at full output power is less
than in the half power range. Calculating the efficiency for a specific system is the key to proper
power supply design. For a 2.8-W audio system with
3-Ω loads and a 5-V supply, the maximum draw on
the power supply is almost 8.8 W.
A final point to remember about Class-AB amplifiers
is how to manipulate the terms in the efficiency
equation to the utmost advantage when possible.
Note that in Equation 15, VDD is in the denominator.
This indicates that as VDD goes down, efficiency goes
up.
A simple formula for calculating the maximum power
dissipated, PDmax, may be used for a stereo, differential output application:
4 VDD
PDmax =
2
2
p RL
(16)
PDmax for a 5-V, 4-Ω system is 2.53 W.
The maximum ambient temperature depends on the
heat sinking ability of the PCB system. The derating
factor for the 5 mm x 5 mm QFN package is shown in
the dissipation rating table. Converting this to θJA:
20
qJA =
1
1
o
= 41.7 C/W
=
0.2398
Derating Factor
(17)
Given θJA, the maximum allowable junction temperature, and the maximum internal dissipation, the maximum ambient temperature can be calculated with
Equation 18. The maximum recommended junction
temperature for the TPA6020A2 is 150°C.
TA Max = TJ Max - qJA PD Max
o
= 150 - 41.7(2.53) = 44.5 C/W
(18)
Equation 18 shows that the maximum ambient temperature is 44.5°C at maximum power dissipation
with a 5-V supply.
Table 2 shows that for most applications no airflow is
required to keep junction temperatures in the specified range. The TPA6020A2 is designed with thermal
protection that turns the device off when the junction
temperature surpasses 150°C to prevent damage to
the IC. In addition, using speakers with an impedance
higher than 4 Ω dramatically increases the thermal
performance by reducing the output current.
The TPA6020A2 is capable of driving impedances as
low as 3 Ω, but special layout techniques must be
considered in order to achieve optimal performance.
In a 5-V, 3-Ω stereo system, the maximum ambient
temperature is just 9.1°C . To increase the maximum
ambient temperature, θJA has to be reduced. This is
achieved by increasing the amount of copper on the
board. Using 3 oz. or 4 oz. copper, and/or additional
layers, increases the thermal performance of the
device.
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPA6020A2RGWR
ACTIVE
VQFN
RGW
20
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
TPA
6020A2
TPA6020A2RGWT
ACTIVE
VQFN
RGW
20
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
TPA
6020A2
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Mar-2018
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
5.25
1.1
8.0
12.0
Q2
TPA6020A2RGWR
VQFN
RGW
20
3000
330.0
12.4
TPA6020A2RGWR
VQFN
RGW
20
3000
330.0
12.4
5.3
5.3
1.5
8.0
12.0
Q2
TPA6020A2RGWT
VQFN
RGW
20
250
330.0
12.4
5.25
5.25
1.1
8.0
12.0
Q2
TPA6020A2RGWT
VQFN
RGW
20
250
180.0
12.4
5.3
5.3
1.5
8.0
12.0
Q2
Pack Materials-Page 1
5.25
B0
(mm)
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Mar-2018
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPA6020A2RGWR
VQFN
RGW
20
3000
338.0
355.0
50.0
TPA6020A2RGWR
VQFN
RGW
20
3000
367.0
367.0
35.0
TPA6020A2RGWT
VQFN
RGW
20
250
338.0
355.0
50.0
TPA6020A2RGWT
VQFN
RGW
20
250
210.0
185.0
35.0
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its
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Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life
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Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s noncompliance with the terms and provisions of this Notice.
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