Texas Instruments | 2-W Mono Audio Power Amplifier with Headphone Drive (Rev. D) | Datasheet | Texas Instruments 2-W Mono Audio Power Amplifier with Headphone Drive (Rev. D) Datasheet

Texas Instruments 2-W Mono Audio Power Amplifier with Headphone Drive (Rev. D) Datasheet
SLOS278D − JANUARY 2000 − REVISED NOVEMBER 2002
D Ideal for Notebook Computers, PDAs, and
D
D
D
D
D
D
D
D
D
D
D
Other Small Portable Audio Devices
2 W Into 4 Ω From 5-V Supply
0.6 W Into 4 Ω From 3-V Supply
Stereo Head Phone Drive
Mono (BTL) Signal Created by Summing
Left and Right Signals
Wide Power Supply Compatibility
3 V to 5 V
Meets PC99 Portable Specs (target)
Low Supply Current
− 4 mA Typical at 5 V
− 3.3 mA Typical at 3 V
Shutdown Control . . . 1 µA Typical
Shutdown Pin is TTL Compatible
−40°C to 85°C Operating Temperature
Range
Space-Saving, Thermally-Enhanced MSOP
Packaging
DGQ PACKAGE
(TOP VIEW)
FILT_CAP
SHUTDOWN
VDD
BYPASS
RIN
1
2
3
4
5
10
9
8
7
6
LO/MO−
LIN
GND
ST/MN
RO/MO+
description
The TPA0233 is a 2-W mono bridge-tied-load (BTL) amplifier designed to drive speakers with as low as 4-Ω
impedance. The mono signal is created by summing left and right inputs. The amplifier can be reconfigured on
the fly to drive two stereo single-ended (SE) signals into head phones. This makes the device ideal for use in
small notebook computers, PDAs, digital personal audio players, anyplace a mono speaker and stereo
headphones are required. From a 5-V supply, the TPA0233 deliver 2 W of power into a 4-Ω speaker.
The gain of the input stage is set by the user-selected input resistor and a 50-kΩ internal feedback resistor
(AV = − RF/ RI). The power stage is internally configured with a gain of −1.25 V/V in SE mode, and −2.5 V/V in
BTL mode. Thus, the overall gain of the amplifier is 62.5 kΩ/ RI in SE mode and 125 kΩ/ RI in BTL mode. The
input terminals are high-impedance CMOS inputs, and can be used as summing nodes.
The TPA0233 is available in the 10-pin thermally-enhanced MSOP package (DGQ) and operates over an
ambient temperature range of −40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2002, Texas Instruments Incorporated
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1
SLOS278D − JANUARY 2000 − REVISED NOVEMBER 2002
functional block diagram
CB
4
BYPASS
VDD
3
VDD
GND
8
1
FILT_CAP
VDD
BYPASS
1 µF
50 kΩ
1.25*R
100 kΩ
5
Right
Audio
Input
CI
RIN
M
U
X
R
−
−
+
CC
RO/MO+
6
+
RI
BYPASS
BYPASS
100 kΩ
50 kΩ
Stereo/Mono
Control
ST/MN
7
LO/MO−
10
50 kΩ
1.25*R
Left
Audio
Input
CI
RI
9
LIN
M
U
X
R
−
−
+
CC
+
1 kΩ
BYPASS
BYPASS
From
System Control
2
SHUTDOWN
Shutdown
and Depop
Circuitry
AVAILABLE OPTIONS
TA
PACKAGED DEVICES
MSOP†
(DGQ)
MSOP
SYMBOLIZATION
−40°C to 85°C
TPA0233DGQ
AEJ
† The DGQ package are available taped and reeled. To order a taped and reeled part, add the
suffix R to the part number (e.g., TPA0233DGQR).
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SLOS278D − JANUARY 2000 − REVISED NOVEMBER 2002
Terminal Functions
TERMINAL
NAME
NO.
I/O
DESCRIPTION
BYPASS
4
I
BYPASS is the tap to the voltage divider for internal mid-supply bias. This terminal should be connected
to a 0.1-µF to 1-µF capacitor.
FILT_CAP
1
I
Terminal is used to filter supply.
GND
8
LIN
9
I
Left-channel input terminal
LO/MO−
10
O
Left-output in SE mode and mono negative output in BTL mode.
RIN
5
I
Right-channel input terminal
RO/MO+
6
O
Right-output in SE mode and mono positive output in BTL mode
SHUTDOWN
2
I
SHUTDOWN places the entire device in shutdown mode when held low. TTL compatible input.
ST/MN
7
I
Selects between stereo and mono mode. When held high, the amplifier is in SE stereo mode, while held
low, the amplifier is in BTL mono mode.
VDD
3
I
VDD is the supply voltage terminal.
Ground terminal
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V
Input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VDD +0.3 V
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . internally limited (see Dissipation Rating Table)
Operating free-air temperature range, TA (see Table 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C
Operating junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
2.14 W‡
DERATING FACTOR
TA = 70°C
1.37 W
TA = 85°C
1.11 W
DGQ
17.1 mW/°C
‡ See the Texas Instruments document, PowerPAD Thermally Enhanced Package Application Report
(SLMA002), for more information on the PowerPAD package. The thermal data was measured on a PCB
layout based on the information in the section entitled Texas Instruments Recommended Board for PowerPAD
on page 33 of that document.
recommended operating conditions
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Supply voltage, VDD
High-level input voltage, VIH
ST/MN
VDD = 3 V
VDD = 5 V
SHUTDOWN
ST/MN
MIN
MAX
2.5
5.5
UNIT
V
2.7
4.5
V
2
VDD = 3 V
VDD = 5 V
1.65
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
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Low-level input voltage, VIL
2.75
SHUTDOWN
V
0.8
Operating free-air temperature, TA
−40
85
°C
PowerPAD is a trademark of Texas Instruments.
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SLOS278D − JANUARY 2000 − REVISED NOVEMBER 2002
electrical characteristics at specified free-air temperature, VDD = 3 V, TA = 25°C (unless otherwise
noted)
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
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ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
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ÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁ
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ÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁ
ÁÁÁ
ÁÁÁ
ÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
PARAMETER
TEST CONDITIONS
MIN
|VOO|
Output offset voltage (measured differentially)
SHUTDOWN = 2 V, ST/MN = 0, RL = 4 Ω
IDD
IDD(SD)
Supply current
VDD 2.5 V, SHUTDOWN = 2 V
SHUTDOWN = 0 V
|IIH|
High-level input current
|IIL|
Low-level input current
RF
Feedback resistor
Supply current, shutdown mode
SHUTDOWN, VDD = 3.3 V,
ST/MN, VDD = 3.3 V,
SHUTDOWN, VDD = 3.3 V,
ST/MN, VDD = 3.3 V,
TYP
MAX
mV
3.3
5
mA
1
10
µA
VI = 3.3 V
VI = 3.3 V
1
VI = 0 V
VI = 0 V
1
VDD = 2.5 V, RL = 4 Ω, SHUTDOWN = 2 V,
ST/MN = 1.375 V
1
1
47
UNIT
30
50
57
µA
A
µA
A
kΩ
operating characteristics, VDD = 3 V, TA = 25°C, RL = 4 Ω
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
PARAMETER
PO
Output power, See Note 1
THD + N
Total harmonic distortion plus noise
BOM
Maximum output power bandwidth
TEST CONDITIONS
THD = 1%,
BTL mode
THD = 0.1%,
SE mode,
PO = 500 mW,
Gain = 2,
THD = 2%
MIN
TYP
MAX
UNIT
660
RL = 32 Ω
f = 20 Hz to 20 kHz
mW
33
0.3%
20
kHz
NOTE 1: Output power is measured at the output terminals of the device at f = 1 kHz.
electrical characteristics at specified free-air temperature, VDD = 5 V, TA = 25°C (unless otherwise
noted)
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
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ÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁ
PARAMETER
TEST CONDITIONS
MIN
|VOO|
Output offset voltage (measured differentially)
SHUTDOWN = 2 V, ST/MN = 0, RL = 4 Ω
IDD
IDD(SD)
Supply current
SHUTDOWN = 2 V
Supply current, shutdown mode
SHUTDOWN = 0 V
|IIH|
High-level input current
|IIL|
Low-level input current
SHUTDOWN, VDD = 5.5 V,
ST/MN, VDD = 5.5 V,
SHUTDOWN, VDD = 5.5 V,
ST/MN, VDD = 5.5 V,
TYP
MAX
UNIT
30
mV
4
7
mA
1
10
µA
VI = 5.5 V
VI = 5.5 V
1
VI = 0 V
VI = 0 V
1
1
1
µA
A
µA
A
operating characteristics, VDD = 5 V, TA = 25°C, RL = 4 Ω
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
PARAMETER
PO
Output power, see Note 1
THD + N
Total harmonic distortion plus noise
BOM
Maximum output power bandwidth
TEST CONDITIONS
THD = 1%,
BTL mode
THD = 0.1%,
SE mode,
PO = 1 W,
Gain = 2.5,
RL = 32 Ω
f = 20 Hz to 20 kHz
THD = 2%
NOTE 1: Output power is measured at the output terminals of the device at f = 1 kHz.
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MIN
TYP
MAX
UNIT
2
W
92
mW
0.2%
20
kHz
SLOS278D − JANUARY 2000 − REVISED NOVEMBER 2002
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Supply ripple rejection ratio
vs Frequency
IDD
Supply current
vs Supply voltage
1, 2
3
vs Supply voltage
4, 5
PO
Output power
vs Load resistance
6, 7
THD+N
Total harmonic distortion plus noise
Vn
Output noise voltage
vs Frequency
8, 9, 10, 11
vs Output power
12, 13, 14, 15, 16, 17
vs Frequency
18, 19
Closed loop response
20, 21
Crosstalk
vs Frequency
22, 23
SUPPLY RIPPLE REJECTION RATIO
vs
FREQUENCY
SUPPLY RIPPLE REJECTION RATIO
vs
FREQUENCY
0
0
RL = 8 Ω
CB = 1 µF
Mode = Mono
−20
RL = 32 Ω
CB = 1 µF
Mode = Stereo
−10
Supply Ripple Rejection Ratio − dB
Supply Ripple Rejection Ratio − dB
−10
−30
−40
−50
−60
−70
−80
−90
−20
−30
−40
−50
−60
−70
−80
−90
−100
20
100
1k
10k 20k
−100
20
f − Frequency − Hz
100
1k
10k 20k
f − Frequency − Hz
Figure 1
Figure 2
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SLOS278D − JANUARY 2000 − REVISED NOVEMBER 2002
TYPICAL CHARACTERISTICS
OUTPUT POWER
vs
SUPPLY VOLTAGE
6
3.0
5
2.5
PO − Output Power − W
I DD − Supply Current − mA
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
TA = 25 °C
4
3
2
Bypass = VDD/2 VDC
VDD From Low-to-High Level
Mode = Stereo
RL = Open
1
0
2.5
3.0
3.5
4.0
4.5
VDD − Supply Voltage − V
5.0
THD+N = 1%
f = 1 kHz
Mode = Mono
AV = 8 dB
2.0
RL = 4 Ω
RL = 8 Ω
1.5
1.0
0.5
0.0
3.0
5.5
3.5
4.0
4.5
5.0
VDD − Supply Voltage − V
Figure 3
Figure 4
OUTPUT POWER
vs
LOAD RESISTANCE
OUTPUT POWER
vs
SUPPLY VOLTAGE
2.5
500
THD+N = 1%
f = 1 kHz
Mode = Stereo
AV = 2 dB
THD+N = 1%
f = 1 kHz
Mode = Mono
AV = 8 dB
2.0
PO − Output Power − W
PO − Output Power − mW
400
5.5
RL = 8 Ω
300
200
1.5
VDD = 5 V
1.0
RL = 32 Ω
0.5
100
VDD = 3 V
0
3.0
0.0
3.5
4.0
4.5
5.0
5.5
0
VDD − Supply Voltage − V
Figure 5
6
10
20
30
40
50
RL − Load Resistance − Ω
Figure 6
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60
SLOS278D − JANUARY 2000 − REVISED NOVEMBER 2002
TYPICAL CHARACTERISTICS
OUTPUT POWER
vs
LOAD RESISTANCE
700
THD+N = 1%
f = 1 kHz
Mode = Stereo
AV = 2 dB
PO − Output Power − mW
600
500
400
300
VDD = 5 V
200
100
VDD = 3 V
0
0
10
20
30
40
50
RL − Load Resistance − Ω
60
Figure 7
1
VDD = 3 V
PO = 250 mW
RL = 8 Ω
Mode = Mono
0.1
AV = 20 dB
AV = 8 dB
0.01
0.001
20
100
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
THD+N − Total Harmonic Distortion Plus Noise − %
THD+N − Total Harmonic Distortion Plus Noise − %
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
1k
10k 20k
1
VDD = 5 V
PO = 1 W
RL = 8 Ω
Mode = Mono
0.1
AV = 20 dB
0.01
AV = 8 dB
0.001
20
f − Frequency − Hz
100
1k
10k 20k
f − Frequency − Hz
Figure 8
Figure 9
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TYPICAL CHARACTERISTICS
1
VDD = 3 V
PO = 25 mW
RL = 32 Ω
Mode = Stereo
0.1
AV = 14 dB
0.01
AV = 2 dB
0.001
20
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
THD+N − Total Harmonic Distortion Plus Noise − %
THD+N − Total Harmonic Distortion Plus Noise − %
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
100
10k 20k
1k
1
VDD = 5 V
PO = 75 mW
RL = 32 Ω
Mode = Stereo
0.1
AV = 14 dB
0.01
AV = 2 dB
0.001
20
100
f − Frequency − Hz
Figure 10
20 kHz
15 kHz
1 kHz
0.1
20 Hz
0.01
0.01
0.1
PO − Output Power − W
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
THD+N − Total Harmonic Distortion Plus Noise − %
THD+N − Total Harmonic Distortion Plus Noise − %
VDD = 3 V
RL = 4 Ω
Mode = Mono
AV = 2.5 dB
1
1
10
VDD = 3 V
RL = 8 Ω
Mode = Mono
AV = 2.5 dB
1
20 kHz
15 kHz
0.1
1 kHz
20 Hz
0.01
0.01
Figure 12
8
10k 20k
Figure 11
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
10
1k
f − Frequency − Hz
0.1
PO − Output Power − W
Figure 13
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SLOS278D − JANUARY 2000 − REVISED NOVEMBER 2002
TYPICAL CHARACTERISTICS
10
VDD = 3 V
RL = 32 Ω
Mode = Stereo
AV = 1.25 dB
1
20 kHz
0.1
15 kHz
1 kHz
20 Hz
0.01
0.01
0.1
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
THD+N − Total Harmonic Distortion Plus Noise − %
THD+N − Total Harmonic Distortion Plus Noise − %
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
10
VDD = 5 V
RL = 4 Ω
Mode = Mono
AV = 2.5 dB
20 kHz
1
15 kHz
1 kHz
0.1
20 Hz
0.01
0.01
0.1
1
PO − Output Power − W
PO − Output Power − W
Figure 14
Figure 15
10
VDD = 5 V
RL = 8 Ω
Mode = Mono
AV = 2.5 dB
1
20 kHz
15 kHz
1 kHz
20 Hz
0.01
0.01
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
THD+N − Total Harmonic Distortion Plus Noise − %
THD+N − Total Harmonic Distortion Plus Noise − %
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
0.1
10
0.1
1
PO − Output Power − W
10
10
VDD = 5 V
RL = 32 Ω
Mode = Stereo
AV = 1.25 dB
1
0.1
20 kHz
15 kHz
20 Hz
0.01
0.01
Figure 16
1 kHz
0.1
PO − Output Power − W
1
Figure 17
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TYPICAL CHARACTERISTICS
OUTPUT NOISE VOLTAGE
vs
FREQUENCY
OUTPUT NOISE VOLTAGE
vs
FREQUENCY
1k
VDD = 5 V
RL = 8 Ω
Mode = Mono
AV = 2.5 dB
Vn − Output Noise Voltage − µV RMS
Vn − Output Noise Voltage − µV RMS
1k
100
10
VDD = 5 V
RL = 32 Ω
Mode = Stereo
AV = 2 dB
100
10
1
20
100
1k
f − Frequency − Hz
1
10k 20k
20
100
1k
f − Frequency − Hz
Figure 18
Figure 19
CLOSED LOOP RESPONSE
30
Gain − dB
10
135°
Gain
90°
0
45°
Phase
−10
0°
−20
−45°
−30
−90°
−40
−135°
−50
10
100
1k
10k
100k
f − Frequency − Hz
Figure 20
10
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
−180°
1M
Phase
20
180°
VDD = 5 V
RL = 4 Ω
Mode = Mono
AV = 8 dB
10k 20k
SLOS278D − JANUARY 2000 − REVISED NOVEMBER 2002
TYPICAL CHARACTERISTICS
CLOSED LOOP RESPONSE
30
20
10
180°
VDD = 5 V
RL = 32 Ω
Mode = Stereo
AV = 2 dB
135°
90°
0
45°
Phase
Phase
Gain − dB
Gain
−10
0°
−20
−45°
−30
−90°
−40
−135°
−50
10
100
1k
10k
100k
−180°
1M
f − Frequency − Hz
Figure 21
CROSSTALK
vs
FREQUENCY
CROSSTALK
vs
FREQUENCY
−50
−50
Left-to-Right
VDD = 5 V
RL = 32 Ω
PO = 75 mW
AV = 1.25 dB
−60
−60
−70
−70
Crosstalk − dB
Crosstalk − dB
Left-to-Right
VDD = 3 V
RL = 32 Ω
PO = 35 mW
AV = 1.25 dB
−80
−90
−100
−80
−90
−100
−110
20
100
1k
10k 20k
−110
20
f − Frequency − Hz
100
1k
10k 20k
f − Frequency − Hz
Figure 22
Figure 23
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APPLICATION INFORMATION
gain setting via input resistance
The gain of the input stage is set by the user-selected input resistor and a 50-kΩ internal feedback resistor.
However, the power stage is internally configured with a gain of −1.25 V/V in stereo mode, and −2.5 V/V in mono
mode. Thus, the feedback resistor (RF) is effectively 62.5 kΩ in stereo mode and 125 kΩ in mono mode.
Therefore, the overall gain can be calculated using equations (1) and (2) stereo.
A + –125 kW
V
R
I
(Mono)
A + –62.5 kW
V
R
I
(Stereo)
(1)
(2)
The −3 dB frequency can be calculated using equation 3.
ƒ –3 dB +
1
2p R C
I i
(3)
If the filter must be more accurate, the value of the capacitor should be increased while the value of the resistor
to ground should be decreased. In addition, the order of the filter could be increased.
input capacitor, Ci
In the typical application an input capacitor (Ci), is required to allow the amplifier to bias the input signal to the
proper dc level for optimum operation. In this case, Ci and the input resistance of the amplifier, RI, form a
high-pass filter with the corner frequency determined in equation 4.
−3 dB
f c(highpass) +
(4)
1
2 p RI Ci
fc
The value of Ci is important to consider as it directly affects the bass (low frequency) performance of the circuit.
Consider the example where RI is 10 kΩ and the specification calls for a flat bass response down to 40 Hz.
Equation 2 is reconfigured as equation 5.
1
C +
i
2p R f c
I
(5)
In this example, CI is 0.4 µF so one would likely choose a value in the range of 0.47 µF to 1 µF. A further
consideration for this capacitor is the leakage path from the input source through the input network (Ci) and the
feedback network to the load. This leakage current creates a dc offset voltage at the input to the amplifier that
reduces useful headroom, especially in high gain applications. For this reason a low-leakage tantalum or
ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor
should face the amplifier input in most applications as the dc level there is held at VDD/2, which is likely higher
than the source dc level. Note that it is important to confirm the capacitor polarity in the application.
12
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APPLICATION INFORMATION
power supply decoupling, C(S)
The TPA0233 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling
to ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also
prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is
achieved by using two capacitors of different types that target different types of noise on the power supply leads.
For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance
(ESR) ceramic capacitor, typically 0.1 µF placed as close as possible to the device VDD lead, works best. For
filtering lower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near
the audio power amplifier is recommended.
midrail bypass capacitor, C(BYP)
The midrail bypass capacitor (C(BYP)), is the most critical capacitor and serves several important functions.
During start-up or recovery from shutdown mode, C(BYP) determines the rate at which the amplifier starts up.
The second function is to reduce noise produced by the power supply caused by coupling into the output drive
signal. This noise is from the midrail generation circuit internal to the amplifier, which appears as degraded
PSRR and THD+N.
Bypass capacitor (C(BYP)), values of 0.47-µF to 1-µF ceramic or tantalum low-ESR capacitors are
recommended for the best THD and noise performance.
output coupling capacitor, C(C)
In the typical single-supply stereo configuration, an output coupling capacitor (C(C)) is required to block the dc
bias at the output of the amplifier, thus preventing dc currents in the load. As with the input coupling capacitor,
the output coupling capacitor and impedance of the load form a high-pass filter governed by equation 6.
−3 dB
f c(high) +
1
2 p R L C (C)
(6)
fc
The main disadvantage, from a performance standpoint, is the load impedances are typically small, which drives
the low-frequency corner higher, degrading the bass response. Large values of C(C) are required to pass low
frequencies into the load. Consider the example where a C(C) of 330 µF is chosen and loads vary from 3 Ω,
4 Ω, 8 Ω, 32 Ω, 10 kΩ, to 47 kΩ. Table 1 summarizes the frequency response characteristics of each
configuration.
Table 1. Common Load Impedances vs Low Frequency Output Characteristics in Stereo (SE) Mode
RL
C(C)
Lowest Frequency
3Ω
330 µF
161 Hz
4Ω
330 µF
120 Hz
8Ω
330 µF
60 Hz
32 Ω
330 µF
Ą15 Hz
10,000 Ω
330 µF
0.05 Hz
47,000 Ω
330 µF
0.01 Hz
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APPLICATION INFORMATION
output coupling capacitor, C(C) (continued)
As Table 1 indicates, most of the bass response is attenuated into a 4-Ω load, an 8-Ω load is adequate,
headphone response is good, and drive into line level inputs (a home stereo for example) is exceptional.
Furthermore, the total amount of ripple current that must flow through the capacitor must be considered when
choosing the component. As shown in the application circuit, one coupling capacitor must be in series with the
mono loudspeaker for proper operation of the stereo-mono switching circuit. For a 4-Ω load, this capacitor must
be able to handle about 700 mA of ripple current for a continuous output power of 2 W.
using low-ESR capacitors
Low-ESR capacitors are recommended throughout this applications section. A real (as opposed to ideal)
capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this
resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this
resistance the more the real capacitor behaves like an ideal capacitor.
bridged-tied load versus single-ended mode
Figure 24 shows a Class-AB audio power amplifier (APA) in a BTL configuration. The TPA0233 BTL amplifier
consists of two Class-AB amplifiers driving both ends of the load. There are several potential benefits to this
differential drive configuration, but initially consider power to the load. The differential drive to the speaker
means that as one side is slewing up, the other side is slewing down, and vice versa. This, in effect, doubles
the voltage swing on the load as compared to a ground referenced load. Plugging 2 × VO(PP) into the power
equation, where voltage is squared, yields 4× the output power from the same supply rail and load impedance.
See equation 7.
V
V
(RMS)
+
V
Power +
O(PP)
2 Ǹ2
(7)
2
(RMS)
R
L
VDD
VO(PP)
RL
2x VO(PP)
VDD
−VO(PP)
Figure 24. Bridge-Tied Load Configuration
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bridged-tied load versus single-ended mode (continued)
In a typical computer sound channel operating at 5 V, bridging raises the power into an 8-Ω speaker from a
singled-ended (SE, ground reference) limit of 250 mW to 1 W. In sound power, that is a 6-dB improvement—
which is loudness that can be heard. In addition to increased power, there are frequency response concerns.
Consider the single-supply SE configuration shown in Figure 25. A coupling capacitor is required to block the
dc offset voltage from reaching the load. These capacitors can be quite large (approximately 33 µF to 1000 µF)
so they tend to be expensive, heavy, occupy valuable PCB area, and have the additional drawback of limiting
low-frequency performance of the system. This frequency limiting effect is due to the high-pass filter network
created with the speaker impedance and the coupling capacitance and is calculated with equation 8.
fc +
1
2p R C
L (C)
(8)
For example, a 68-µF capacitor with an 8-Ω speaker would attenuate low frequencies below 293 Hz. The BTL
configuration cancels the dc offsets, which eliminates the need for the blocking capacitors. Low-frequency
performance is then limited only by the input network and speaker response. Cost and PCB space are also
minimized by eliminating the bulky coupling capacitor.
VDD
−3 dB
VO(PP)
C(C)
RL
VO(PP)
fc
Figure 25. Single-Ended Configuration and Frequency Response
Increasing power to the load does carry a penalty of increased internal power dissipation. The increased
dissipation is understandable considering that the BTL configuration produces 4× the output power of the SE
configuration. Internal dissipation versus output power is discussed further in the crest factor and thermal
considerations section.
single-ended (stereo) operation
In SE (stereo) mode (see Figure 24 and Figure 25), the load is driven from the primary amplifier output for each
channel (LO and RO, terminals 6 and 10).
The amplifier switches to single-ended operation when the ST/MN terminal is held high.
input operation
The input allows stereo inputs to be applied to the amplifier. When the ST/MN terminal is held high, the inputs
(LIN and RIN) drive the outputs as LO and RO in stereo mode. When the ST/MN terminal is held low, the inputs
are surrounded internally to create the mono BTL signal, driving the outputs as MO+ and MO−.
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APPLICATION INFORMATION
BTL amplifier efficiency
Class-AB amplifiers are inefficient. The primary cause of inefficiencies is the voltage drop across the output
stage transistors. There are two components of the internal voltage drop. One is the headroom or dc voltage
drop that varies inversely to output power. The second component is due to the sinewave nature of the output.
The total voltage drop can be calculated by subtracting the RMS value of the output voltage from VDD. The
internal voltage drop multiplied by the RMS value of the supply current, IDDrms, determines the internal power
dissipation of the amplifier.
An easy-to-use equation to calculate efficiency starts out as being equal to the ratio of power from the power
supply to the power delivered to the load. To accurately calculate the RMS and average values of power in the
load and in the amplifier, the current and voltage waveform shapes must first be understood. See Figure 26.
IDD
VO
IDD(avg)
V(LRMS)
Figure 26. Voltage and Current Waveforms for BTL Amplifiers
Although the voltages and currents for SE and BTL are sinusoidal in the load, currents from the supply are very
different between SE and BTL configurations. In an SE application the current waveform is a half-wave rectified
shape, whereas in BTL it is a full-wave rectified waveform. This means RMS conversion factors are different.
Keep in mind that for most of the waveform both the push and pull transistors are not on at the same time, which
supports the fact that each amplifier in the BTL device only draws current from the supply for half the waveform.
The following equations are the basis for calculating amplifier efficiency.
Efficiency of a BTL amplifier +
where
PL +
V LRMS
RL
2
PL
(9)
P SUP
2
V
V
, and V LRMS + P , therefore, P L + P
Ǹ2
2 RL
and P SUP + V DD I DDavg
1
I DDavg + p
and
ŕ
p
0
VP
1
sin(t) dt + p
RL
therefore,
P SUP +
2 V DD V P
p RL
substituting PL and PSUP into equation 9,
2
Efficiency of a BTL amplifier +
where
VP +
16
VP
2 RL
2 V DD V P
p RL
+
p VP
4 V DD
Ǹ2 P L RL
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VP
RL
[cos(t)]
p
2V P
+
0
p RL
SLOS278D − JANUARY 2000 − REVISED NOVEMBER 2002
APPLICATION INFORMATION
BTL amplifier efficiency (continued)
therefore,
h BTL +
p
Ǹ2 PL R L
(10)
4 V DD
PL = Power devilered to load
PSUP = Power drawn from power supply
VLRMS = RMS voltage on BTL load
RL = Load resistance
VP = Peak voltage on BTL load
IDDavg = Average current drawn from the power supply
VDD = Power supply voltage
ηBTL = Efficiency of a BTL amplifier
Table 2 employs equation 10 to calculate efficiencies for four different output power levels. Note that the
efficiency of the amplifier is quite low for lower power levels and rises sharply as power to the load is increased,
resulting in a nearly flat internal power dissipation over the normal operating range. Note that the internal
dissipation at full output power is less than in the half power range. Calculating the efficiency for a specific
system is the key to proper power supply design. For a stereo 1-W audio system with 8-Ω loads and a 5-V supply,
the maximum draw on the power supply is almost 3.25 W.
Table 2. Efficiency vs Output Power in 5-V, 8-Ω BTL Systems
Output Power
(W)
Efficiency
(%)
Peak Voltage
(V)
Internal Dissipation
(W)
0.25
31.4
2.00
0.55
0.50
44.4
2.83
0.62
1.00
62.8
0.59
1.25
70.2
4.00
4.47†
0.53
† High peak voltages cause the THD to increase.
A final point to remember about Class-AB amplifiers (either SE or BTL) is how to manipulate the terms in the
efficiency equation to utmost advantage when possible. Note that in equation 10, VDD is in the denominator.
This indicates that as VDD goes down, efficiency goes up.
crest factor and thermal considerations
Class-AB power amplifiers dissipate a significant amount of heat in the package under normal operating
conditions. A typical music CD requires 12 dB to 15 dB of dynamic range, or headroom above the average power
output, to pass the loudest portions of the signal without distortion. In other words, music typically has a crest
factor between 12 dB and 15 dB. When determining the optimal ambient operating temperature, the internal
dissipated power at the average output power level must be used. The TPA0233 data sheet shows that when
the TPA0233 is operating from a 5-V supply into a 4-Ω speaker, 4-W peaks are available. Converting watts to
dB:
P dB + 10Log
PW
P ref
+ 10 Log 4 W + 6 dB
1W
(11)
Subtracting the headroom restriction to obtain the average listening level without distortion yields
6 dB − 15 dB = −9 dB (15-dB crest factor)
6 dB − 12 dB = −6 dB (12-dB crest factor)
6 dB − 9 dB = −3 dB (9-dB crest factor)
6 dB − 6 dB = 0 dB (6-dB crest factor)
6 dB − 3 dB = 3 dB (3-dB crest factor)
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SLOS278D − JANUARY 2000 − REVISED NOVEMBER 2002
APPLICATION INFORMATION
crest factor and thermal considerations (continued)
Converting dB back into watts:
P W + 10 PdBń10
+
+
+
+
+
+
P ref
(12)
63 mW (18-dB crest factor)
125 mW (15-dB crest factor)
250 mW (9-dB crest factor)
500 mW (6-dB crest factor)
1000 mW (3-dB crest factor)
2000 mW (15-dB crest factor)
This is valuable information to consider when attempting to estimate the heat dissipation requirements for the
amplifier system. Comparing the absolute worst case, which is 2 W of continuous power output with a 3-dB crest
factor, against 12-dB and 15-dB applications drastically affects maximum ambient temperature ratings for the
system. Table 3 shows maximum ambient temperatures and TPA0233 internal power dissipation for various
output-power levels.
Table 3. TPA0233 Power Rating, 5-V, 3-Ω, Mono
PEAK OUTPUT POWER
(W)
AVERAGE OUTPUT POWER
POWER DISSIPATION
(W)
MAXIMUM AMBIENT
TEMPERATURE
4
2 W (3-dB crest factor)
1.7
4
1000 mW (6-dB crest factor)
1.6
6°C
4
500 mW (9-dB crest factor)
1.4
24°C
4
250 mW (12-dB crest factor)
1.1
51°C
4
125 mW (15-dB crest factor)
0.8
78°C
4
63 mW (18-dB crest factor)
0.6
96°C
−3°C
Table 4. TPA0233 Power Rating, 5-V, 8-Ω, Stereo
PEAK OUTPUT POWER
(W)
AVERAGE OUTPUT POWER
POWER DISSIPATION
(W)
MAXIMUM AMBIENT
TEMPERATURE
2.5
1250 mW (3-dB crest factor)
0.55
100°C
2.5
1000 mW (4-dB crest factor)
0.62
94°C
2.5
500 mW (7-dB crest factor)
0.59
97°C
2.5
250 mW (10-dB crest factor)
0.53
102°C
The maximum dissipated power (PDmax), is reached at a much lower output power level for an 8-Ω load than
for a 4-Ω load. As a result, this simple formula for calculating PDmax may be used for a 4-Ω application.
P Dmax +
2V 2
DD
(13)
p 2R L
However, in the case of a 4-Ω load, the PDmax occurs at a point well above the normal operating power level.
The amplifier may therefore be operated at a higher ambient temperature than required by the PDmax formula
for a 4-Ω load.
The maximum ambient temperature depends on the heat sinking ability of the PCB system. The derating factor
for the DGQ package is shown in the dissipation rating table. Converting this to ΘJA:
Θ JA +
18
1
1
+
+ 58.48°CńW
0.0171
Derating Factor
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APPLICATION INFORMATION
crest factor and thermal considerations (continued)
To calculate maximum ambient temperatures, first consider that the numbers from the dissipation graphs are
per channel so the dissipated power needs to be doubled for two channel operation. Given ΘJA, the maximum
allowable junction temperature, and the total internal dissipation, the maximum ambient temperature can be
calculated with the following equation. The maximum recommended junction temperature for the TPA0233 is
150°C. The internal dissipation figures are taken from the Power Dissipation vs Output Power graphs.
T A Max + T J Max * Θ JA P D + 150 * 58.48 (0.8
2) + 56°C (15-dB crest factor)
(15)
NOTE:
Internal dissipation of 0.8 W is estimated for a 2-W system with 15-dB crest factor per channel.
Tables 3 and 4 show that for some applications no airflow is required to keep junction temperatures in the
specified range. The TPA0233 is designed with thermal protection that turns the device off when the junction
temperature surpasses 150°C to prevent damage to the IC. Tables 3 and 4 were calculated for maximum
listening volume without distortion. When the output level is reduced the numbers in the table change
significantly. Also, using 8-Ω speakers dramatically increases the thermal performance by increasing amplifier
efficiency.
ST/MN (stereo/mono) operation
The ability of the TPA0233 to easily switch between mono BTL and stereo SE modes is one of its most important
cost saving features. This feature eliminates the requirement for an additional headphone amplifier in
applications where an internal speaker is driven in BTL mode but external stereo headphone or speakers must
be accommodated. When ST/MN is held high, the RIN and LIN inputs drive the output as Lo and Ro in stereo
SE mode. When ST/MN is held low, the inputs are summed internally and the output is driven as Mo+ and Mo−
in mono BTL mode. Control of the ST/MN input can be from a logic-level CMOS source or, more typically, from
a switch-controlled resistor divider network as shown in the functional block diagram.
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PACKAGE OPTION ADDENDUM
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PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPA0233DGQ
ACTIVE
HVSSOP
DGQ
10
80
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
AEJ
TPA0233DGQR
ACTIVE
HVSSOP
DGQ
10
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
AEJ
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
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6-Sep-2019
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Sep-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
TPA0233DGQR
Package Package Pins
Type Drawing
SPQ
HVSSOP
2500
DGQ
10
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
330.0
12.4
Pack Materials-Page 1
5.3
B0
(mm)
K0
(mm)
P1
(mm)
3.4
1.4
8.0
W
Pin1
(mm) Quadrant
12.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Sep-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPA0233DGQR
HVSSOP
DGQ
10
2500
358.0
335.0
35.0
Pack Materials-Page 2
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