Texas Instruments | CBT-C, CB3T, and CB3Q Signal-Switch Families | Application notes | Texas Instruments CBT-C, CB3T, and CB3Q Signal-Switch Families Application notes

Texas Instruments CBT-C, CB3T, and CB3Q Signal-Switch Families Application notes
Application Report
SCDA008 - July 2003
CBT-C, CB3T, and CB3Q Signal-Switch Families
Christopher Graves, Moshiul Haque, and Ernest Cox
Standard Linear & Logic
ABSTRACT
Signal-switch devices are used widely in applications requiring bus isolation, multiplexing,
demultiplexing, and voltage translation. Compared to other logic and linear product
alternatives, signal switches are the fastest and least power consuming. Texas Instruments
(TI) CBT-C, CB3Q, and CB3T signal-switch families have low on-state resistance, negligible
power consumption, and better undershoot protection, compared to the older switch families.
These qualities make CBT-C, CB3Q, and CB3T devices very good candidates for today’s
high-speed applications that require switches. This application report discusses some of the
critical characteristics, features, and applications of TI’s newest switches.
Contents
1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Semiconductor Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1 NMOS Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 PMOS Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Basic Signal-Switch Structures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 NMOS Series Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 NMOS/PMOS Parallel Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 NMOS Series Switch With the Charge Pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
Key Concerns in Digital-Switch Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.1 Undershoot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.2 ron . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.3 Cio (off) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.4 Cio (on) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.5 Ci (Control Input Capacitance) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.6 Leakage Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.7 Enable and Disable Delays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.8 Partial Power Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.9 Voltage Translation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5
Signal Switch Families From TI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5.1 CBT-C Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5.1.1 Characteristics of CBT-C Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.1.2 Application of CBT-C Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.2 CB3Q Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.2.1 Characteristics of the CB3Q Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.2.2 Application of the CB3Q Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.3 CB3T Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4
4
5
6
Trademarks are the property of their respective owners.
1
SCDA008
5.3.1
5.3.2
Characteristics of the CB3T Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Application of the CB3T Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6
Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
7
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Appendix A: Test-Measurement Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
A.1 Measurement Setup for ron . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
A.2 Measurement Setup for VO vs VI Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
A.3 Voltage-Time Waveform Measurement (Switch On) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
A.4 Voltage-Time Waveform Measurement (Switch Off) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
A.5 Output-Skew Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
A.6 Simulation Setup for Undershoot Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
A.7 Laboratory Setup for Attenuation Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
A.8 Laboratory Setup for Off Isolation Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
A.9 Laboratory Setup for Crosstalk Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
List of Figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
2
NMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
PMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
NMOS Series Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
ron vs VI Characteristic of an NMOS Series Switch (VCC = 5 V, IO = –15 mA) . . . . . . . . . 5
Basic Structure of an NMOS/PMOS Parallel Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
ron vs VI Characteristics of a Typical NMOS/PMOS Parallel Switch (VCC = 5 V) . . . . . . . 6
Basic Structure of an NMOS Series Switch With the Charge Pump . . . . . . . . . . . . . . . . . . 7
ron vs VI in an NMOS Series Switch With the Charge Pump (VCC = 3.6 V) . . . . . . . . . . . 7
Undershoot in NMOS Series-Switch Devices When Disabled . . . . . . . . . . . . . . . . . . . . . . . 8
Voltage Translation Using an NMOS Series Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Undershoot Protection in CBT-C When Enable Input (OE) Voltage Is High . . . . . . . . . . . 12
VO vs VI at VCC = 5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
ron vs VI at VCC = 5 V (IO = –15 mA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Undershoot in CBT16211C When Switch Is Off (VCC = 5 V) . . . . . . . . . . . . . . . . . . . . . . . 14
Example of Bus Isolation Using a CBT-C Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Simplified Schematic of a CB3Q Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
VO vs VI for the CB3Q3306A at VCC = 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
VO vs VI for the CB3Q3306A at VCC = 2.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
ron vs VI for the CB3Q3306A at VCC = 3.6 V (IO = –15 mA ) . . . . . . . . . . . . . . . . . . . . . . . 17
ron vs VI for the CB3Q3306A at VCC = 2.3 V (IO = –15 mA) . . . . . . . . . . . . . . . . . . . . . . . 18
Input and Output Voltage Waveforms for the CB3Q3306A at 420 MHz (VCC = 3.3 V) . 18
Output Skew at –40°C (VCC = 3.3 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Output Skew at 100°C (VCC = 3.3 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Attenuation and Off-Isolation for the CB3Q3306A at 3-pF Load (VCC = 3.3 V) . . . . . . . . 20
Attenuation and Off-Isolation for the CB3Q3306A at 50-pF Load (VCC = 3.3 V) . . . . . . 21
Crosstalk of the CB3Q3306A at 3-pF Load (VCC = 3.3 V) . . . . . . . . . . . . . . . . . . . . . . . . . 22
CBT-C, CB3T, and CB3Q Signal-Switch Families
SCDA008
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure A–1.
Figure A–2.
Figure A–3.
Figure A–4.
Figure A–5.
Figure A–6.
Figure A–7.
Figure A–8.
Figure A–9.
1
Multiplexing in a USB Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
CB3Q3257 in a USB Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Simplified Structure of the CB3T3306 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
VO vs VI in the CB3T3306 at IO = –1 µA (VCC = 2.3 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
VO vs VI in the CB3T3306 IO = –1 µA (VCC = 3.6 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
ron vs VI for the CB3T3306 at VCC = 2.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
ron vs VI for the CB3T3306 at VCC = 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Input and Output Voltage Waveforms at 200 MHz (VCC = 3.3 V) . . . . . . . . . . . . . . . . . . . 27
Data and Clock-Signal Data Transfer Using the CB3T3306 . . . . . . . . . . . . . . . . . . . . . . . . 28
ron Measurement Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
VO vs VI Measurement Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Voltage-Time Waveform Measurement (Switch On) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Voltage-Time Waveform Measurement (Switch Off) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Output-Skew Measurement Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
SPICE Simulation Setup for Undershoot Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Attenuation Measurement Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Off Isolation Measurement Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Adjacent-Channel Crosstalk Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Introduction
On-off switches are one of the most common control elements in electrical circuitry. This has
evolved over the years, from the manually operated circuit breaker of the early experiments to
the multiswitch integrated circuit of today. In every application, the function of the switch remains
the same: to isolate or connect two sections of an electrical circuit. Therefore, an ideal switch
should have zero resistance (short circuit) when on and infinite resistance (open circuit) when
off. However, in practical applications, a bus switch should have as low resistance as possible
when on, for bus connection, and as high resistance as possible when off, for bus isolation.
2
Semiconductor Switches
An insulated-gate field-effect transistor (IGFET) switch is a widely used electronic switch. A
metal-oxide semiconductor field-effect transistor (MOSFET) is one type of IGFET. Although the
term MOSFET is more commonly used, now most of the electronic switches do not use the
metal oxide as the gate. Instead, a more advanced process is being used to form the gate. TI
uses advanced poly-silicon gate-enhancement-mode transistor technology to fabricate
semiconductor switches, which gives more control of performance characteristics. Throughout
this application report the term MOSFET and the associated terms related to MOSFET are used
because they are more common in semiconductor literature. When sufficient bias voltage is
applied to the gate of a MOSFET, it creates a low-resistance path between its source and drain.
When the bias voltage is removed, the resistance of this path becomes very large. MOSFETs
can be of two types, n-channel MOSFET (NMOS) and p-channel MOSFET (PMOS).
CBT-C, CB3T, and CB3Q Signal-Switch Families
3
SCDA008
2.1
NMOS Switch
The symbol of an NMOS is shown in Figure 1. The source and the drain of an NMOS are
interchangeable. The terminal with the lowest voltage is considered to be the source. The
resistance between the drain and the source depends on the voltage difference between the
gate and the source (VGS). When there is sufficient voltage applied to the gate with respect to
the source, the switch becomes conductive, and a voltage signal applied to the drain passes
through this switch without distortion. The gate-to-source voltage at which the NMOS begins
conduction is known as the threshold voltage (VT). If the gate-to-source voltage becomes
significantly less than the threshold voltage of the NMOS (VT), the channel resistance increases
rapidly.
Drain
Source
(Source)
(Drain)
Gate
Figure 1. NMOS
2.2
PMOS Switch
A PMOS is similar to an NMOS (see Figure 2). However, to keep the source-to-drain resistance
low, the difference in the source-to-gate voltage (VSG) should be greater than the threshold
voltage. In a PMOS, the terminal with the lowest voltage is considered to be the drain.
Source
Drain
(Drain)
(Source)
Gate
Figure 2. PMOS
3
Basic Signal-Switch Structures
Signal switches in their simplest form are MOSFET structures, with the gate driven by a CMOS
inverter. Three types of structures are most common:
3.1
•
NMOS series switch
•
NMOS/PMOS parallel switch
•
NMOS series switch, with the charge pump
NMOS Series Switch
The most basic signal-switch structure is an NMOS pass transistor, with the gate driven by a
CMOS inverter. The simplified structure is shown in Figure 3.
4
CBT-C, CB3T, and CB3Q Signal-Switch Families
SCDA008
Drain
Source
(Source)
(Drain)
VI(VO)
VO(VI)
Gate
OE
Figure 3. NMOS Series Switch
When the output enable (OE) signal is low, the voltage at the gate is high, or equal to VCC. If the
voltage at the drain (VI) is less than VCC by the threshold voltage of the n-channel transistor, the
on-state resistance (ron) is low and the voltage at the source is equal to VI (VO = VI). If VI
approaches VCC, ron increases rapidly, the source voltage does not increase with the drain
voltage, and the output voltage remains at VCC – VT. A limitation of the NMOS series switch is
that it can pass signals only up to a threshold voltage below VCC. Figure 4 shows the general
shape of ron vs VI characteristic of a typical NMOS series switch.
120
100
r on – W
80
60
40
20
0
0
1
2
3
4
5
VI – V
Figure 4. ron vs VI Characteristic of an NMOS Series Switch (VCC = 5 V, IO = –15 mA)
3.2
NMOS/PMOS Parallel Switch
An NMOS/PMOS parallel switch consists of an n-channel pass transistor in parallel with a
p-channel pass transistor. Figure 5 shows the basic structure of an NMOS/PMOS parallel
switch. In an n-channel MOSFET, the source-to-drain resistance is low when the drain voltage is
less than VG – VT, where VG is the gate voltage. In a p-channel MOSFET, the source-to-drain
resistance is low when the source voltage is greater than VT + VG. With the parallel combination
of n-channel and p-channel pass transistors, the source-to-drain, or channel resistance, can be
lowered for the entire input voltage range from 0 V to VG. When OE is low, VG in NMOS/PMOS
parallel switch is VCC, and signals ranging from 0 V to VCC can be passed through this switch.
Figure 6 shows the general shape of the ron vs VI characteristics of a typical NMOS/PMOS
parallel switch, as well as the NMOS and PMOS characteristics. The shape of ron vs VI curve
may be different, depending on the structures of NMOS and PMOS. The disadvantage of the
NMOS/PMOS parallel switch is that the input and output capacitances increase due to the
additional source and drain area of the combined transistors.
CBT-C, CB3T, and CB3Q Signal-Switch Families
5
SCDA008
(Source)
Drain
(Drain)
Source
VO(VI)
VI(VO)
Gate
OE
Figure 5. Basic Structure of an NMOS/PMOS Parallel Switch
20
r on – W
NMOS
PMOS
15
10
5
NMOS/PMOS
0
0.2
1.2
2.2
3.2
4.2
5.2
VI – V
Figure 6. ron vs VI Characteristics of a Typical NMOS/PMOS Parallel Switch (VCC = 5 V)
3.3
NMOS Series Switch With the Charge Pump
Although, in an NMOS/PMOS parallel switch, source-to-drain resistance is lower than in an
NMOS series switch, the PMOS adds capacitance, which is undesirable for some applications.
To solve this problem, another type of switch structure is used that involves a charge-pump
circuit in the NMOS series switch. The charge-pump circuit generates a voltage at the gate of
the NMOS that is 2 V to 3 V higher than VCC. As a result, when the input reaches the VCC level,
the switch still is on and the output voltage is equal to the input voltage over the 0 V to VCC input
voltage range. The disadvantage of implementing a charge-pump circuit in the NMOS series
switch is the additional power consumption because of the charge-pump circuit. Figure 7 shows
a simple schematic of an NMOS series switch with the charge pump, and Figure 8 shows the ron
vs VI characteristic.
6
CBT-C, CB3T, and CB3Q Signal-Switch Families
SCDA008
Drain
Source
Gate voltage
VG > VCC
when OE is low.
ChargePump
Circuit
OE
Figure 7. Basic Structure of an NMOS Series Switch With the Charge Pump
r on – W
10
5
0
0
1
2
3
VI – V
Figure 8. ron vs VI in an NMOS Series Switch With the Charge Pump (VCC = 3.6 V)
4
Key Concerns in Digital-Switch Applications
4.1
Undershoot
Undershoot is a typical phenomenon in high-speed applications where impedance mismatches
cause excessive ringing in the system. This poses a serious problem to bus switches that are
turned off and attempt to isolate different buses. In this state, the gate voltage of the n-channel
pass transistors are at ground potential, but a negative voltage on either I/O port with a
magnitude greater than the NMOS VT will cause the switch to conduct and no longer isolate the
buses. Therefore, undershoots with a large magnitude and long duration result in data
corruption, if no undershoot protection circuitry is included in the signal-switch design. The
schematics in Figure 9 demonstrate the phenomenon of undershoots. For normal input voltages
ranging from 0 V to VCC, the switch is in the high-impedance state and the output bus is isolated
from the input bus. The undershoot produces a glitch at the isolated bus, as shown in
Figure 9.
CBT-C, CB3T, and CB3Q Signal-Switch Families
7
SCDA008
Output voltage pulse, VO
Voltage
3.5 V
0V
Time
Voltage
Gate-to-Source
Voltage, VGS < 0,
switch off
Input voltage pulse, VI
VCC
(Source)
Drain
0V
(Drain)
Source
7V
Output voltage stays at
3.5 V when input voltage
switches from 0 to VCC.
100 kW
Time
Gate
Voltage
VG = 0
100 kW
10 pF
OE
Voltage at
enable input is
high, i.e., VCC
Output voltage pulse, VO
Voltage
3.5 V
0V
Time
–1.8 V
Voltage
Input voltage pulse, VI,
with undershoot
Gate-to-Source Voltage, When
VI = –2 V, VGS = 2 V,
switch on
VCC
(Source)
Drain
0V
(Drain)
Source
7V
100 kW
Output voltage changes
from 3.5 V to
approximately –1.8 V
during the undershoot.
Time
–2 V
Gate
Voltage
VG = 0
100 kW
10 pF
OE
Voltage at
enable input is
high, i.e., VCC
Figure 9. Undershoot in NMOS Series-Switch Devices When Disabled
8
CBT-C, CB3T, and CB3Q Signal-Switch Families
SCDA008
There are two solutions to prevent the NMOS from turning on during the undershoot event while
disabled:
•
•
4.2
Capture or clamp the input undershoot energy. In this method, a clamp circuit is connected
to ground or VCC. This clamp circuit prevents the NMOS from turning on while an undershoot
event occurs.
–
Schottky Clamp. In this method, a Schottky diode is connected from the I/O port of the
switch to ground. When the voltage at the I/O port goes below ground, the diode is
forward biased and clamps the source or drain voltage, keeping the input and output
isolated. An example of this type of device is the CBTS bus switch provided by TI.
–
Active clamp to VCC. In this method, an active clamp circuit is connected to VCC, which
tries to counteract the undershoot voltage by pulling the input voltage to VCC. An
example of this type of device is the CBTK bus switch provided by TI.
Force the gate voltage of the NMOS to track the negative input voltage. TI’s new CBT-C
family uses this method to prevent undershoot. This method of protection is described later
in this application report.
ron
ron is the resistance of the switch when turned on. ron should be as low as possible to reduce
signal loss and to reduce propagation delay. Propagation delay of the switch depends on the RC
time constant, which is made up of the switch ron and the load capacitance. For applications in
transmission-line environments, ron should be less than, or equal to, the line impedance to
minimize unwanted signal reflections. For digital applications where the switch is connected to a
resistive load, the switch resistance and the load resistance form a voltage divider. Therefore, in
this case, ron should be as low as possible to maintain a valid input logic high (i.e., VIH) of the
downstream devices. ron not only should be small, but also should be flat across the input
voltage range to maintain a linear signal change from input to output. Signal distortion depends
on the flatness of the ron vs VI curve, that is, equal to 20log∆ron /RL, where RL is the load
resistance. So, to keep signal distortion minimum as the signal amplitude varies, ron should be
kept flat over the whole input signal range. In NMOS series switches, special gate voltage-boost
circuitry is needed to keep ron flat over the VCC range. In NMOS/PMOS parallel switches, ron is
fairly constant and may have multiple peak values within 0 V to VCC input voltage range. The
shape of the ron vs VI curve depends on the threshold voltages of NMOS and PMOS (see
Figure 6).
4.3
Cio(off)
Cio(off) for a through switch is the off-state capacitance of one channel, measured from either the
input or output of the switch. For a multiplexer or bus-exchange switch, Cio(off) may include
off-state capacitance for multiple channels. Cio(off) should be as small as possible to prevent
capacitive loading of the bus. Reducing Cio requires less drain and source area of the pass
transistors that otherwise would increase on-state resistance. So, there is a trade-off between
Cio(off) and ron.
CBT-C, CB3T, and CB3Q Signal-Switch Families
9
SCDA008
4.4
Cio(on)
This is the on-state capacitance of the switch, measured from either the input or output of the
switch. Usually Cio(on) is greater than twice the Cio(off) because it includes the capacitance on
both input and output of the switch, as well as the channel capacitance. Like Cio(off), Cio(on)
should be as small as possible to reduce capacitive loading of the bus. Reducing Cio(on) requires
less drain and source area of the pass transistors that otherwise would increase the on-state
resistance. So, like the Cio(off), there is a trade-off between Cio(on) and ron.
4.5
Ci (Control Input Capacitance)
When switching control input, a large control input capacitance will inject more charge to the
gate of the pass transistor. This will cause crosstalk and degrade performance of the switch.
4.6
Leakage Current
Leakage current during the high-impedance state should be very small. Leakage current, if high,
may load an isolated bus and corrupt the data.
4.7
Enable and Disable Delays
Enable and disable delays are measures of how quickly the switch can be turned on and off. Not
only should these delays be as small as possible for high-speed operation, but also the
difference of enable and disable delays should be as small as possible to reduce the current
flow between the off switch and on switch. This is significant in multiplexing and demultiplexing
operations where the difference, if large, can cause bus contention. For break-before-make
functions, disable time should be less than enable time and for make-before-break functions,
enable time should be less than disable time.
4.8
Partial Power Down
Today’s high-speed applications require that a device can be powered-down while still
connected to a live bus. This requires the switch to be in the high-impedance state while the
power is down. A special Ioff circuit is incorporated to ensure that the switch is in the
high-impedance state while the power is off. Ioff circuitry prevents damaging current backflow
through the device when it is powered down.
4.9
Voltage Translation
One popular application of the bus switch is voltage translation in a mixed-voltage environment.
A simple NMOS can pass a signal from 0 V to VCC – VT, where VT is the threshold voltage of the
NMOS. This characteristic can be used for down translation. Figure 10 shows an example of 5-V
to 3.3-V translation using an NMOS series switch, diode, and resistors.
10
CBT-C, CB3T, and CB3Q Signal-Switch Families
SCDA008
VCC = 5 V
Vdiode ≅ 0.7 V
R = 2.87 kW
OE
Voltage
Voltage
Input voltage pulse, VI
Output voltage pulse,
VO = VG – VT
3.3 V
5V
Gate Voltage
VG ≅ 4.3
Threshold Voltage
VT ≅ 1
0V
0V
Time
Time
Figure 10. Voltage Translation Using an NMOS Series Switch
For voltage-translation applications, the switch is required to translate efficiently over a wide
frequency range and is required to maintain the proper signal level. For example, when
translating from a 5-V TTL to a 3.3-V LVTTL signal, the switch is required to maintain the
required VOH (output high voltage) and VOL (output low voltage) of 3.3-V LVTTL signal. One
important consideration is that the bus switch can be used only for down translation, i.e., high to
low level. For low- to high-level translation, additional components (for example, pullup resistors)
are required.
5
Signal Switch Families from TI
TI offers a wide variety of signal switches suitable for many different types of applications. Some
of the signal-switch families are discussed in the following sections:
•
•
•
CBT-C: 5-V NMOS switches with –2-V undershoot protection
CB3Q: NMOS switches with a charge-pump circuit for low and flat ron
CB3T: Level-shifting NMOS bus switch
CBT-C and CB3Q devices can pass digital and analog signals.
5.1
CBT-C Family
The switches of this family are NMOS series switches. The operating VCC of this family is 5 V,
and switching for various standards (i.e., LVCMOS, LVTTL etc.) can be accomplished. This
family also has an undershoot protection circuit integrated in the bus switch. The undershoot
protection circuit prevents the n-channel pass transistor from turning on when the switch is off.
When undershoot occurs, this circuit senses the negative voltage at the input and biases the
gate of the n-channel pass transistor to that negative voltage. Since the gate and source voltage
are now at the same potential (<0 V), the switch remains off. Undershoot protection on one side
of the off switch can prevent up to –2 V undershoots on the other side of the switch. Static power
consumption of this family is negligible. Dynamic power consumption depends on the frequency
of the enable input of the device. Switching high and low at the enable input causes internal
CMOS inverters to switch between low and high; therefore, a higher frequency of the control
input signal results in higher dynamic power consumption. Undershoot protection in CBT-C is
shown in Figure 11.
CBT-C, CB3T, and CB3Q Signal-Switch Families
11
SCDA008
Output voltage pulse, VO
Voltage
3.5 V
0V
Time
Voltage
Gate-to-Source
Voltage, VGS < 0,
switch off
Input voltage pulse, VI
VCC
(Source)
Drain
0V
7V
100 kW
(Drain)
Source
Output voltage stays at
3.5 V when input voltage
switches from 0 to VCC.
Time
Undershoot
Protection
Circuit
Gate
Voltage
VG = 0
Undershoot
Protection
Circuit
100 kW
10 pF
OE
Voltage at
enable input is
high, i.e., VCC
Voltage
Output voltage pulse, VO
3.5 V
0V
Time
Voltage
Input voltage pulse, VI,
with undershoot
VCC
Gate-to-Source
Voltage, VGS < 0,
switch off
(Source)
Drain
0V
Time
–2 V
Undershoot
Protection
Circuit
OE
Voltage at
enable input is
high, i.e., VCC
100 kW
(Drain)
Source
Gate
Voltage
VG = –2 V,
When
VI = –2 V
7V
Undershoot
Protection
Circuit
100 kW
Output voltage stays
approximately at
3.5 V during the
undershoot.
10 pF
Figure 11. Undershoot Protection in CBT-C When Enable Input (OE) Voltage is High
5.1.1
Characteristics of the CBT-C Family
The following paragraphs discuss some of the critical performance characteristics of the
CBT16211C. The setup for measurements is given in Appendix A.
12
CBT-C, CB3T, and CB3Q Signal-Switch Families
SCDA008
5.1.1.1
VO vs VI
Figure 12 shows the output-voltage vs input-voltage characteristics of the CBT16211C at an
output load of 3 kΩ to ground. The output follows the input approximately until 3.5 V and
remains flat as the switch begins to turn off. Output voltage also depends on the output current.
If output current increases, the output voltage will become flat at a lower input voltage.
4
3.5
3
VO – V
2.5
2
1.5
1
0.5
0
0
1
2
3
4
5
VI – V
Figure 12. VO vs VI at VCC = 5 V
5.1.1.2
ron vs VI
Figure 13 shows the switch resistance (ron) when on, as a function of the input voltage. The
output current is –15 mA. The on-state resistance is low when the input voltage is below 3.5 V
and increases rapidly above 3.5 V. ron depends on the output current and increases rapidly at a
lower input voltage when the output current increases.
120
100
ron – W
80
60
40
20
0
0
1
2
3
4
5
VI – V
Figure 13. ron vs VI at VCC = 5 V (IO = –15 mA)
5.1.1.3
Undershoot Protection
Figure 14 shows the undershoot protection performance of the CBT16211C when the switch is
disabled. The output pin is connected to ground through a 100-kΩ resistor, a 10-pF capacitor,
and to 10 V through a 100-kΩ pullup resistor. The test load is similar to a high-impedance
application load. There is very little variation in output voltage caused by input-voltage
undershoot.
CBT-C, CB3T, and CB3Q Signal-Switch Families
13
SCDA008
6
5
Output
(switch off)
4
VO – V
3
2
1
Input
0
–1
–2
–3
0
10
20
30
40
50
Time – ns
Figure 14. Undershoot in CBT16211C When Switch Is Off (VCC = 5 V)
5.1.2
Application of CBT-C Family
5.1.2.1
Bus Isolation
CBT-C devices can be used for 5-V PCI bus isolation for hot-plug applications (see Figure 15).
PCI is an unterminated interface; therefore, undershoot may occur. CBT-C provides good
isolation when an undershoot event occurs.
14
CBT-C, CB3T, and CB3Q Signal-Switch Families
SCDA008
PCI Slot 1
PCI Slot 2
A1
A3
A1
2B1
2B2
A3
2B3
2B4
A5
2B5
2B6
A7
2B7
2B8
GND
VCC
A9
2B9
2B10
A11
2B11
2B12
A13
2B13
2B14
A15
2B15
2B16
NC
NC
1
56
2
55
3
54
4
53
5
52
6
51
7
50
8
49
9
48
10
47
11
46
12
45
13
44
14
43
15
42
16
41
17
40
18
39
19
38
20
37
21
36
22
35
23
34
24
33
25
32
26
31
27
30
28
29
1B1
1B2
A2
A2
1B3
1B4
A4
1B5 A4
1B6
A6
1B7
1B8
A8
GND
VCC
1B9
1B10
A10
1B11
1B12
A12
1B13
1B14
A14
1B15
1B16
A16
OE1
OE2
NC – No internal connection
Figure 15. Example of Bus Isolation Using a CBT-C Device
CBT-C, CB3T, and CB3Q Signal-Switch Families
15
SCDA008
5.2
CB3Q Family
The switches of this family are NMOS only, with a low and flat ron. The flat characteristics of ron
are accomplished by a charge-pump circuit that generates a voltage of approximately 7 V at the
gate of the n-channel pass transistor. As a result, 0-V to 5-V rail-to-rail switching can be
accomplished because the gate-to-source voltage is well above the threshold of the n-channel
transistor, and the switch is completely on over the whole 0-V to 5-V range. An internal oscillator
circuit is a part of the charge-pump circuit; therefore, static power consumption of this family is
higher than the CBT-C family. Dynamic power consumption depends on the frequency of the
enable input. In addition to the low and flat ron characteristics, this family has low input and
output capacitance, making them suitable for high-performance applications. The maximum
switching frequency for I/O signals depends on various factors, such as type of load, input-signal
magnitude, input-signal edge rates, type of package, etc. With a larger package, the inductance
and capacitance can form a resonant circuit that may cause phase and magnitude distortion.
With a large capacitive load, the RC time constant becomes higher and limits the frequency.
Figure 16 shows a simplified schematic of a CB3Q device.
(Source)
Drain
ChargePump
Circuit
(Drain)
Source
Gate voltage
VG = 7 V when
VCC = 3.3 and
enable input
voltage is low.
OE
Figure 16. Simplified Schematic of a CB3Q Device
5.2.1
Characteristics of the CB3Q Family
Following sections discuss some of the critical performance characteristics of the CB3Q3306A.
The measurements setup can be found in Appendix A.
5.2.1.1
VO vs VI
Figures 17 and 18 show the VO vs VI characteristics of the CB3Q3306A at different values of
VCC and at different temperatures. For VCC = 3.6 V, the output exactly follows the input from 0 V
to 5 V. Because of this characteristic, CB3Q devices can be used for switching analog and digital
signals, ranging from 0 V to 5 V. For VCC = 2.3 V, the gate voltage produced by the charge-pump
circuit is reduced to about 4 V. So, the output approximately follows the input from 0 V to 3.3 V
and becomes constant above 3.3 V.
16
CBT-C, CB3T, and CB3Q Signal-Switch Families
SCDA008
5
VO – V
4
3
2
1
0
0
1
2
3
4
5
VI – V
Figure 17. VO vs VI for the CB3Q3306A at VCC = 3.6 V, TA = 85°C
4
3.5
VO– V
3
2.5
2
1.5
1
0.5
0
0
1
2
3
4
5
VI – V
Figure 18. VO vs VI for the CB3Q3306A at VCC = 2.3 V, TA = 85°C
5.2.1.2
ron vs VI
The CB3Q3306A has low and flat ron characteristics. Figure 19 and Figure 20 show ron vs input
voltage characteristics at different values of VCC and at different temperatures. The output
current for ron vs VI characteristics is –15 mA, and this characteristic is dependent on output
current. For VCC = 3.6 V, ron is fairly constant from the 0-V to 5-V input-voltage range. For
VCC = 2.3 V, ron is flat over the range of 0 V to 2.5 V and increases rapidly above 2.5 V.
10
r on – W
85°C
25°C
–40°C
1
0
1
2
3
4
5
VI – V
Figure 19. ron vs VI for the CB3Q3306A at VCC = 3.6 V (IO = –15 mA)
CBT-C, CB3T, and CB3Q Signal-Switch Families
17
SCDA008
100
ron – Ω
85°C
–40°C
25°C
10
1
0
1
2
3
VI – V
Figure 20. ron vs VI for the CB3Q3306A at VCC = 2.3 V (IO = –15 mA)
5.2.1.3
Operation at High Frequency
Low input and output capacitance, low ron, and low feed-through capacitance makes the CB3Q
devices suitable for high-speed applications. Maximum frequency of operation depends on input
voltage range, type of load, edge rate, type of package, off-isolation, crosstalk requirement, etc.
At high frequencies, off-isolation and crosstalk also increase, which limits the maximum
frequency of operation. Figure 21 shows the input and output voltage waveforms at a frequency
of 420 MHz, with a 500-W and 3-pF load. From Figure 21, it is clear that the switch, when on,
allows high-frequency signals to pass without distortion. Also, the switch provides very good
isolation between the input and output when it is turned off or disabled.
3
Input
2.5
I/O – V
2
1.5
Output (switch on)
1
0.5
Output (switch off)
0
–0.5
0
5
Time – ns
10
Figure 21. Input and Output Voltage Waveforms for the CB3Q3306A at 420 MHz (VCC = 3.3 V)
18
CBT-C, CB3T, and CB3Q Signal-Switch Families
SCDA008
5.2.1.4
Output Skew
Output skew is a measure of the variation of ron over the channels in a multibit switch. This is
specifically significant when switching differential signals. For minimal signal distortion and noise
in differential signaling, the variation of ron should be as small as possible. Output skew at a
specific voltage can be determined by measuring the time difference of the output voltage at
various channels. Figure 22 and Figure 23 show the output voltage of the CB3Q3306A at
different channels. Output skew can be determined from this graph. For example, for –40°C at
2.5 V, the skew is approximately 30 ps, which is fairly constant from 2.2 V to 2.6 V. For 100°C,
the output skew is approximately 40 ps, which is fairly constant from 2.2 V to 2.6 V.
2.6
Output skew at 2.5 V
is approximately 30 ps
2.55
2.5
1B
2B
VO – V
2.45
2.4
2.35
2.3
2.25
2.2
–50
50
150
250
Time – ps
Figure 22. Output Skew at –40°C (VCC = 3.3 V)
2.6
Output skew at 2.5 V
is approximately 40 ps
2.55
2B
2.5
VO – V
2.45
2.4
1B
2.35
2.3
2.25
2.2
0
100
200
300
Time – ps
Figure 23. Output Skew at 100°C (VCC = 3.3 V)
CBT-C, CB3T, and CB3Q Signal-Switch Families
19
SCDA008
5.2.1.5
Frequency Response
Figure 24 and Figure 25 show the attenuation and off-isolation for the CB3Q3306A at different
loads as a function of frequency. The bandwidth depends on the type of load, and bandwidth
decreases as the load increases.
Attenuation
0 dB
Off-Isolation
Figure 24. Attenuation and Off-Isolation for the CB3Q3306A at 3-pF Load (VCC = 3.3 V)
20
CBT-C, CB3T, and CB3Q Signal-Switch Families
SCDA008
CH1
Cor
Attenuation
0 dB
Smo
Off-Isolation
Figure 25. Attenuation and Off-Isolation for the CB3Q3306A at 50-pF Load (VCC = 3.3 V)
CBT-C, CB3T, and CB3Q Signal-Switch Families
21
SCDA008
5.2.1.6
Adjacent Channel Crosstalk
For some applications, crosstalk is an important parameter. Figure 26 shows the crosstalk
between adjacent channels in the CB3Q3306A.
CH1
Cor
0 dB
Smo
Figure 26. Crosstalk of the CB3Q3306A at 3-pF Load (VCC = 3.3 V)
22
CBT-C, CB3T, and CB3Q Signal-Switch Families
SCDA008
5.2.2
Application of the CB3Q Family
5.2.2.1
Multiplexer in USB Applications
Figure 27 shows a USB 2.0 application in which a bus-switch device can be used. The first
switch in a notebook PC is used to isolate between a notebook PC and the docking station. The
switches on the docking station are used as a mutiplexer to provide two different paths for the
DATA+ and DATA– signals. If the operating system is Windows 95, the USB 2.0 hub is not
supported. Switches 1 and 2 are on, and the USB line is connected directly to Port 1. Figure 28
shows the use of a CB3Q3257 in this type of application.
Host Controller
DT+, DT–
Notebook PC
Docking Station
Switch 1
DT+, DT–
Switch 3
USB 2.0 Hub
Switch 4
Switch 2
Port 1
Port 2
Port 3
Port 4
Figure 27. Multiplexing in a USB Application
CBT-C, CB3T, and CB3Q Signal-Switch Families
23
SCDA008
Notebook PC
Port 4
CB3Q3306
DATA+
1A
1B
Host
Controller
DATA–
2A
2B
S
1B1
1B2
1A
2B1
2B2
2A
GND
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
OE
4B1
4B2
4A
3B1
3B2
3A
USB
2.0
Hub
Port 3
Port 2
CB3Q3257
CB3Q3257
FUNCTION TABLE
INPUTS
OE
S
FUNCTION
L
L
A port = B1 port
L
H
H
X
A port = B2 port
Disconnect
Port 1
Docking Station
Figure 28. CB3Q3257 in a USB Application
DATA+ signal path is shown as a dotted line and the DATA– signal is shown as a solid line. The
DATA+ signal goes to 1A. Depending on the select signal (S) levels, the output can be 1B1 or
1B2. When S is low, DATA+ from the host controller is connected to the port through the USB
2.0 hub (1A → 1B1 → USB 2.0 Hub → 3B1 → 3A → Port 1). When S is high, the DATA+ is
connected to port 1 directly (1A → 1B2 → 3B2 → 3A). Similarly, DATA– uses the 2A, 2B1, 2B2
and 4A, 4B1, 4B2 switches for connecting to port 1.
5.3
CB3T Family
CB3T is a voltage-translation bus-switch family. This family can operate with a power-supply
voltage range of 2.3 V to 3.6 V. When VCC = 3.3 V, the device can translate from a 5-V input to a
3.3-V output. In addition, when VCC = 2.3 V the device can translate from 5-V or 3.3-V inputs to
a 2.3-V output. The CB3T family can be used for voltage translation at moderately high
frequencies. Figure 29 shows the simplified structure of the CB3T3306.
24
CBT-C, CB3T, and CB3Q Signal-Switch Families
SCDA008
Drain
Source
Control Circuit
Gate
Control Circuit
Gate voltage is VCC + VT when the
switch is ON and VI > VCC + VT.
OE
Figure 29. Simplified Structure of the CB3T3306
When the switch is on, the voltage at the gate of the NMOS pass transistor in the CB3T3306 is
biased at VCC + VT, where VT is the threshold voltage of the NMOS. When input voltage starts to
rise from low to high, the output follows the input voltage. As the input voltage reaches about
one-half of VCC, the control circuit senses this voltage and pulls the output voltage close to the
VCC level and keeps the voltage constant as the input voltage increases. When the input
reaches VCC + VT, the output voltage again increases to VCC and remains nearly flat, as the
input voltage continues to rise. Input voltages at which these transitions occur depend on the
output current, power supply, temperature, and transistor characteristics. The level of output
high voltage (VOH) also depends on the output current.
5.3.1
Characteristics of the CB3T Family
The following paragraphs discuss some of the critical performance characteristics of the
CB3T3306. The measurements setup is given in Appendix A.
5.3.1.1
VO vs VI
Figures 30 and 31 show the output voltage vs input voltage (VO vs VI) characteristics of the
CB3T3306 for different values of VCC. The rapid increase in output voltage is due to the control
circuit sensing the output voltage and pulling it high, close to the VCC level. The slope of this
rapid rise in the curve depends on the output current being drawn from the switch.
4
VO – Output Voltage – V
TA = 25°C
3
2
1
0
0
1
2
3
4
5
6
VI – Input Voltage – V
Figure 30. VO vs VI in the CB3T3306 at IO = –1 µA (VCC = 2.3 V)
CBT-C, CB3T, and CB3Q Signal-Switch Families
25
SCDA008
4
VO – Output Voltage – V
TA = 25°C
3
2
1
0
0
1
2
4
3
5
6
VI – Input Voltage – V
Figure 31. VO vs VI in the CB3T3306 IO = –1 µA (VCC = 3.0 V)
5.3.1.2
ron vs VI
Figure 32 and Figure 33 shows the ron vs VI characteristics of the CB3T3306 at different VCC
voltages. ron increases rapidly when the input voltage crosses approximately one-half of VCC
and becomes flat above that voltage. The value of ron above that voltage depends greatly on the
output current. As the output current increases, ron decreases.
100000
IO = –0.1 mA
r on – W
10000
IO = –1 mA
1000
IO = –15 mA
100
10
1
0
1
2
3
4
5
VI – V
Figure 32. ron vs VI for the CB3T3306 at VCC = 2.3 V
100000
IO = –0.1 mA
r on – W
10000
1000
IO = –1 mA
100
IO = –15 mA
10
1
0
1
2
3
4
5
VI – V
Figure 33. ron vs VI for the CB3T3306 at VCC = 3.6 V
26
CBT-C, CB3T, and CB3Q Signal-Switch Families
SCDA008
5.3.1.3
Operation at High Frequency
CB3T devices can be used for voltage translation at moderately high frequencies. Figure 34
shows the operation of the CB3T3306 at 200 MHz. The load is 500 W and 3 pF to ground. Like
the CB3Q family, the maximum I/O switching frequency depends on various factors, such as
type of load, input signal magnitude, input signal edge rates, type of package, etc. With a larger
package, the inductance and capacitance can form a resonant circuit that may cause phase and
magnitude distortion. With a large capacitive load, the RC time constant becomes higher and
limits the practical operating frequency.
6
Input
5
Output
(switch on)
I/O – V
4
3
2
Output
(switch off)
1
0
–1
0
2
4
6
8
10
Time – ns
Figure 34. Input and Output Voltage Waveforms at 200 MHz (VCC = 3.3 V)
5.3.2
Application of the CB3T Family
5.3.2.1
Voltage Translation for an External Monitor Terminal in a Notebook PC
Figure 35 shows a typical application for the level-translation feature of the CB3T3306. The
CB3T3306 is used as a voltage translator between a monitor and a graphic controller. Data
transfer between these two systems is bidirectional, while the clock signal transfer is
unidirectional and flows only from graphic controller to monitor. Pullup resistors are used for
translating from low to high.
CBT-C, CB3T, and CB3Q Signal-Switch Families
27
SCDA008
3V
5-V VCC PC Power
3-V Signal
DATA
Graphic
Controller
RB501V
Schottky
Diode
1OE
VCC
1A
2OE
1B
2B
GND
2A
2.2 kW
Monitor
CLK
CLK
DATA
15-Pin Dsub
Connector
Figure 35. Data and Clock-Signal Data Transfer Using the CB3T3306
6
Conclusion
TI’s CBT-C and CB3Q signal switches can be used for various types of high-speed applications,
such as hot insertion for PCI interface, LAN signaling, I2C bus expansion, video switching, etc.
CB3T devices can be used for high-speed voltage translation in a mixed-voltage system. This
application report has discussed some of the application performance characteristics of TI’s
high-speed signal switches that are critical for the previously mentioned applications.
7
References
1. Selecting the Right Texas Instruments Signal Switch, John Perry and Chris Cockrill
2. 5-V to 3.3-V Translation With the SN74CBTD3384, Nalin Yogasundram
3. Texas Instruments Solution for Undershoot Protection for Bus Switches, Nadira Sultana and
Chris Graves.
28
CBT-C, CB3T, and CB3Q Signal-Switch Families
SCDA008
Appendix A
A.1
Test Measurement Circuits
Measurement Setup for ron
VCC
IO, dc current
source
VI, dc sweep
from 0 to VCC
A
VO
B
OE
50 W
GND
Figure A–1. ron Measurement Setup
A.2
Measurement Setup for VO vs VI Characteristics
VCC
VI, dc sweep
from 0 to VCC
A
B
VO
OE
3 kW
50 W
GND
Figure A–2. VO vs VI Measurement Setup
Appendix A—Test-Measurement Circuits
29
SCDA008
A.3
Voltage-Time Waveform Measurement (Switch On)
VCC
VI, Input voltage pulse
Oscilloscope
VCC
A
0
B
VO
OE
RL
CL
GND
50 W
Figure A–3. Voltage-Time Waveform Measurement (Switch On)
A.4
Voltage-Time Waveform Measurement (Switch Off)
VCC
VI, Input voltage pulse
VCC
A
0
B
VO
Oscilloscope
OE
RL
CL
GND
VCC
Figure A–4. Voltage-Time Waveform Measurement (Switch Off)
30
Appendix A—Test-Measurement Circuits
SCDA008
A.5
Output-Skew Measurement
VCC
VI, Input voltage pulse
VCC
1A
1B
Oscilloscope
0
2A
1OE
50 W
2B
2OE
RL
CL
RL
CL
50 W
GND
Figure A–5. Output-Skew Measurement Setup
A.6
Simulation Setup for Undershoot Measurement
Input voltage
monitor point
10 V
VI, Input voltage pulse
VCC
VCC
0
–2 V
100 kW
B
A
25 W
OE
VCC
Output voltage
monitor point
VO
100 kW
10 pF
GND
Figure A–6. SPICE Simulation Setup for Undershoot Measurement
Appendix A—Test-Measurement Circuits
31
SCDA008
A.7
Laboratory Setup for Attenuation Measurement
Network Analyzer
Port 1
Port 2
HP8753B Network Analyzer
Measurement Parameter: S21
VCC
1A
1B
2A
2B
CL
2OE
1OE
50 W
GND
VCC
Figure A–7. Attenuation Measurement Setup
A.8
Laboratory Setup for Off Isolation Measurement
Network Analyzer
Port 1
HP8753B Network Analyzer
Measurement Parameter: S21
VCC
1A
1B
2A
2B
1OE
Port 2
CL
2OE
GND
VCC
VCC
Figure A–8. Off Isolation Measurement Setup
32
Appendix A—Test-Measurement Circuits
SCDA008
A.9
Laboratory Setup for Crosstalk Measurement
Network Analyzer
Port 1
Port 2
HP8753B Network Analyzer
Measurement Parameter: S21
VCC
1A
1B
2A
2B
1OE
50 W
50 W
50 W
2OE
GND
CL
VCC
Figure A–9. Adjacent-Channel Crosstalk Measurement
Appendix A—Test-Measurement Circuits
33
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