Texas Instruments | TPA3251 Evaluation Module | User Guides | Texas Instruments TPA3251 Evaluation Module User guides

Texas Instruments TPA3251 Evaluation Module User guides
User's Guide
SLAU751 – November 2017
TPA3251 Evaluation Module
This user's guide describes the characteristics, operation, and use of the TPA3251 evaluation module
(EVM). A complete printed-circuit board (PCB) description, schematic diagram, and bill of materials are
also included.
Figure 1. TPA3251 Evaluation Module
1
2
3
4
Contents
Quick Start (BTL Mode) ..................................................................................................... 3
Setup By Mode ............................................................................................................... 5
Hardware Configuration ................................................................................................... 10
EVM Design Documents ................................................................................................. 14
1
TPA3251 Evaluation Module ............................................................................................... 1
2
EVM Board (Top Side) ...................................................................................................... 3
3
EVM Board (Bottom Side) .................................................................................................. 3
4
AIB Input: THD+N vs Frequency
5
5
AIB Input: THD+N vs Power
5
List of Figures
6
7
8
9
..........................................................................................
...............................................................................................
Molex™ Input: THD+N vs Frequency ....................................................................................
Molex Input: THD+N vs Power ............................................................................................
RCA Input: THD+N vs Frequency ........................................................................................
RCA Input: THD+N vs Power .............................................................................................
SLAU751 – November 2017
Submit Documentation Feedback
TPA3251 Evaluation Module
Copyright © 2017, Texas Instruments Incorporated
5
5
5
5
1
www.ti.com
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
.......................................................................................... 7
AIB Input: THD+N vs Power ............................................................................................... 7
Molex Input: THD+N vs Frequency ....................................................................................... 8
Molex Input: THD+N vs Power ............................................................................................ 8
RCA Input: THD+N vs Frequency ........................................................................................ 8
RCA Input: THD+N vs Power ............................................................................................. 8
AIB Input: THD+N vs Frequency .......................................................................................... 9
AIB Input: THD+N vs Power ............................................................................................... 9
Molex Input: THD+N vs Frequency ..................................................................................... 10
Molex Input: THD+N vs Power .......................................................................................... 10
RCA Input: THD+N vs Frequency ....................................................................................... 10
RCA Input THD+N vs Power ............................................................................................. 10
EVM Power Tree ........................................................................................................... 13
BTL LC Frequency Response ........................................................................................... 13
SE LC Frequency Response ............................................................................................. 13
TPA3251 EVM Top Composite Assembly .............................................................................. 14
TPA3251 EVM Bottom Composite Assembly .......................................................................... 15
TPA3251EVM Board Dimensions ........................................................................................ 16
TPA3251EVM Schematic 1 ............................................................................................... 17
TPA3251EVM Schematic 2 ............................................................................................... 18
TPA3251EVM Schematic 3 ............................................................................................... 18
AIB Input: THD+N vs Frequency
List of Tables
1
Jumper Configurations (BTL Mode) ....................................................................................... 4
2
Mode Selection Pins
3
4
5
6
7
8
9
10
........................................................................................................ 5
Jumper Configurations (2.1 BTL Mode) .................................................................................. 6
Jumper Configuration (PBTL Mode) ...................................................................................... 7
Jumper Configuration (SE Mode).......................................................................................... 9
Fault and Clip Overtemperature Status ................................................................................. 10
Frequency Adjust Master Mode Selection .............................................................................. 11
Overcurrent Protection Selection......................................................................................... 11
AIB Connector (J28) Pinout ............................................................................................... 12
TPA3251EVM Bill of Materials ........................................................................................... 19
Trademarks
PurePath is a trademark of Texas Instruments.
CoilCraft is a trademark of Coilcraft, Incorporated.
Molex is a trademark of Molex, LLC.
All other trademarks are the property of their respective owners.
2
TPA3251 Evaluation Module
SLAU751 – November 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
Quick Start (BTL Mode)
www.ti.com
1
Quick Start (BTL Mode)
This section describes the necessary hardware, connections, configuration, and steps to quick start the
EVM into bridge-tied load (BTL) mode with stereo audio playing out of two speakers.
1.1
Required Hardware
The EVM requires the following hardware:
• TPA3251EVM (AMPS030-001) power supply 18-V to 36-V DC, 15 A
• Two 2-Ω to 8-Ω, 100-W speakers or resistor loads
• Four speaker or banana cables
• RCA input cables
• Analog output audio source
1.2
Connections and Board Configuration
Figure 2 and Figure 3 show both sides of the EVM board.
Figure 2. EVM Board (Top Side)
Figure 3. EVM Board (Bottom Side)
The steps for making the connections are as follows:
1. Set S1 to the RESET position.
2. Set the power supply to 36 V (18-V to 38-V range) and current to 10 A (5-A to 14-A range).
3. Connect the power supply to the TPA3251EVM positive terminal to PVDD (J1-RED) and negative
terminal to GND (J1-BLACK).
4. Connect the positive side of the left channel load to the TPA3251EVM OUTA (J9-RED) terminal.
5. Connect the negative side of the left channel load to the TPA3251EVM OUTB (J9-BLACK) terminal.
6. Connect the positive side of the right channel load to the TPA3251EVM OUTC (J2-RED) terminal.
7. Connect the negative side of the right channel load to the TPA3251EVM OUTD (J2-BLACK) terminal.
8. Be careful not to mix up PVDD, OUTA, and OUTC because the colors are the same (RED).
9. Input configuration:
a. Single-ended (SE) inputs: Set J4 and J19 to SE and set J26, J27, J34, and J35 to RCA.
a. Connect the RCA male jack to the female RCA jack input A/AB (J3-RED).
b. Connect the RCA male jack to the female RCA jack input C/CD (J18-WHITE) .
b. Differential inputs: Set J4 and J19 to DIFF and set J26, J27, J34, and J35 to RCA
a. Connect the positive RCA male jack to the female RCA jack input A/AB (J3-RED) and connect
the negative RCA male jack to the female RCA jack input B (J14-BLACK).
SLAU751 – November 2017
Submit Documentation Feedback
TPA3251 Evaluation Module
Copyright © 2017, Texas Instruments Incorporated
3
Quick Start (BTL Mode)
www.ti.com
b. Connect the positive RCA male jack to the female RCA jack input C/CD (J18-RED) and
connect the negative RCA male jack to the female RCA jack input D (J15-BLACK).
c. Analog-Input Board (AIB) input: Set J26, J27, J34, and J35 to AIB.
10. Power up the power supply after correctly making all the connections. The 3.3-V and 12-V LEDs
(GREEN) then illuminate.
11. Set S1 to the NORMAL position.
12. The CLIP_OTW (ORANGE) and FAULT (RED) LEDs must be off if the audio source is off.
Table 1 lists the jumper configurations in BTL mode.
Table 1. Jumper Configurations (BTL Mode)
4
Jumper
Setting
J29
IN
Configuration for BTL
PVDD to 15-V BUCK
J32
IN
12-V LDO to 12-V TERM
J33
IN
3.3-V LDO to 3.3-V TERM
J36
IN
12-V LDO to GVDD
J16
3 to 4
MASTER MODE 600kHz
J22
IN
OUTA CAP SHUNT
J23
IN
OUTB CAP SHUNT
J24
IN
OUTC CAP SHUNT
J25
IN
OUTD CAP SHUNT
J5
2 to 3
M1-L
J6
2 to 3
M2-L
J7
OUT
PBTL SELECT INC
J8
OUT
PBTL SELECT IND
J4
1 to 2
INA/B SE INPUT
J19
1 to 2
INC/D SE INPUT
J26
1 to 2
INC-SEL RCA
J27
1 to 2
IND-SEL RCA
J34
1 to 2
INA-SEL RCA
J35
1 to 2
INB-SEL RCA
J21
OUT
C_START
TPA3251 Evaluation Module
SLAU751 – November 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
Setup By Mode
www.ti.com
2
Setup By Mode
The user can configure the TPA3251EVM for four different output operations. The 2.0 BTL configuration is
the default set up of the TPA3251EVM as described in Section 1.2. The remaining three configurations
are 2.1 BTL plus two SE outputs, 0.1 PBTL output, and 4.0 SE outputs.
Table 2. Mode Selection Pins
Mode Pins
2.1
Input Mode
Output Configuration
M2
M1
0
0
2N + 1
2 x BTL
0
1
2N-1N + 1
1 x BTL + 2 × SE
1
0
2N + 1
1 × PBTL
Description
Stereo BTL output configuration
2.1 BTL + SE mode
Parallel BTL configuration; connect INPUT_C
BTL Mode (Two-Speaker Output)
This mode is the same as described in Section 1.
2.1.1
Performance Data (BTL Mode)
All measurements are taken at an audio frequency = 1 kHz, PVDD_X = 36 V, RL = 4 Ω, fS = 600 kHz,
ROC = 22 kΩ, Output filter: L = 7 μH, C = 0.68 µF, with AES17 + AUX-0025 measurement filters.
10
10
1W
20 W
75 W
1
THD+N (%)
THD+N (%)
1
0.1
0.01
0.1
0.01
0.001
0.0001
20
200
2000
Frequency (Hz)
0.001
0.01
20000
0.1
D010
Figure 4. AIB Input: THD+N vs Frequency
1
Power (W)
10
100 200
D001
Figure 5. AIB Input: THD+N vs Power
10
10
1W
20 W
75 W
1
THD+N (%)
THD+N (%)
1
0.1
0.01
0.1
0.01
0.001
0.0001
20
200
2000
Frequency (Hz)
20000
0.001
0.01
D013
Figure 6. Molex™ Input: THD+N vs Frequency
0.1
1
Power (W)
10
100 200
D004
Figure 7. Molex Input: THD+N vs Power
SLAU751 – November 2017
Submit Documentation Feedback
TPA3251 Evaluation Module
Copyright © 2017, Texas Instruments Incorporated
5
Setup By Mode
www.ti.com
10
10
1W
20 W
75 W
1
THD+N (%)
THD+N (%)
1
0.1
0.01
0.1
0.01
0.001
0.001
0.01
0.0001
20
200
2000
Frequency (Hz)
20000
Figure 8. RCA Input: THD+N vs Frequency
2.2
0.1
D016
1
Power (W)
10
100 200
D007
Figure 9. RCA Input: THD+N vs Power
BTL MODE (Three-Speaker Output)
OUTC and OUTD are the SE output channels and OUTA and OUTB are the BTL channels for 2.1
operations. OUTC and OUTD can only be in DIFF input mode.
1. Set J6 to L and J5 to H.
2. Remove jumpers J24 and J25.
3. Connect the positive side of the left channel load to OUTC (J2- RED) terminal and the negative side of
the left channel load to the GND (J20) terminal.
4. Connect the positive side of the right channel load to OUTD (J2-BLACK) terminal and the negative
side of the right channel load to the GND (J20) terminal.
5. Connect the positive terminal to OUTA (J9-RED) and the negative terminal to OUTB (J9-BLACK).
6. Set the J19 jumper position to DIFF.
7. Input configuration:
a. SE inputs: Connect the RCA male jack to the female RCA jack input A/AB (J3-RED) and set the J4
jumper positions to SE. Set J26, J27, J34, and J35 to RCA.
b. Differential inputs: Connect the positive RCA male jack to the female RCA jack input A/AB ( J3RED) and connect the negative RCA male jack to the female RCA jack input B (J14-BLACK) and
set the J4 jumper positions to DIFF. Set J26, J27, J34, and J35 to RCA.
c. AIB inputs: Set J26, J27, J34, and J35 to AIB.
Table 3. Jumper Configurations (2.1 BTL Mode)
2.3
Jumper
Setting
Comment
J29
IN
PVDD to 15-V BUCK
J32
IN
12-V LDO to 12-V TERM
J33
IN
3.3-V LDO to 3.3-V TERM
J36
IN
12-V LDO to GVDD
J16
3 to 4
MASTER MODE 600kHz
J22
IN
OUTA CAP SHUNT
J23
IN
OUTB CAP SHUNT
J24
OUT
OUTC CAP SHUNT
J25
OUT
OUTD CAP SHUNT
J5
1 to 2
M1 – H
J6
2 to 3
M2 – L
J7
OUT
PBTL SELECT INC
PBTL Mode (One-Speaker Output)
This mode uses all four half bridges for a mono output, allowing for the maximum power output from the
device across one load.
6
TPA3251 Evaluation Module
SLAU751 – November 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
Setup By Mode
www.ti.com
2.3.1
Connections and Board Configuration
1. Set J6 to H and J5 to L.
2. Connect the positive side of the load to OUTA (J9-RED) and OUTC (J2-RED) terminals (OUTA and
OUTC shorted).
3. Connect the negative side of the load to OUTB (J9-BLACK) and OUTD (J2-BLACK) terminals (OUTB
and OUTD shorted).
4. Install PBTL jumpers J7 and J8 (pulls input C and input D to GND).
5. Input configuration:
a. SE inputs: Connect the RCA male jack to the female RCA jack input A/AB (J3-RED) and set the J4
jumper positions to SE. Set J26, J27, J34, and J35 to RCA.
b. Differential inputs: Connect the positive RCA male jack to the female RCA jack input A/AB (J3RED) and connect the negative RCA male jack to the female RCA jack input B (J14-BLACK). Set
the J4 jumper position to DIFF, and set J26, J27, J34, and J35 to RCA.
c. AIB input: Set J26, J27, J34, and J35 to AIB.
Table 4. Jumper Configuration (PBTL Mode)
(1)
2.3.2
Comment (1)
Jumper
Setting
J29
IN
PVDD to 15-V BUCK
J32
IN
12-V LDO to 12-V TERM
J33
IN
3.3-V LDO to 3.3-V TERM
J36
IN
12-V LDO to GVDD
J16
3 to 4
MASTER MODE 600kHz
J22
IN
OUTA CAP SHUNT
J23
IN
OUTB CAP SHUNT
J24
IN
OUTC CAP SHUNT
J25
IN
OUTD CAP SHUNT
J5
2 to 3
M1 – L
J6
1 to 2
M2 – H
J7
IN
PBTL SELECT INC – GND
J8
IN
PBTL SELECT IND – GND
J4
1 to 2
INA/B SE INPUT
J19
1 to 2
INC/D SE INPUT
J26
1 to 2
INC-SEL RCA
J27
1 to 2
IND-SEL RCA
J34
1 to 2
INA-SEL RCA
J35
1 to 2
INB-SEL RCA
J21
OUT
C_START
INA and INB are the inputs for PBTL, and INC and IND are grounded
for PBTL operation.
Performance Data (PBTL Mode)
All measurements are taken at an audio frequency = 1 kHz, PVDD_X = 36 V, RL = 4 Ω, fS = 600 kHz,
ROC = 22 kΩ, Output filter: L = 7μH, C = 0.68 µF, with AES17 + AUX-0025 measurement filters.
SLAU751 – November 2017
Submit Documentation Feedback
TPA3251 Evaluation Module
Copyright © 2017, Texas Instruments Incorporated
7
Setup By Mode
www.ti.com
10
10
1W
50 W
1
THD+N (%)
THD+N (%)
1
0.1
0.01
0.1
0.01
0.001
0.001
0.01
0.0001
20
200
2000
Frequency (Hz)
20000
0.1
D011
Figure 10. AIB Input: THD+N vs Frequency
1
Power (W)
10
100 200
D002
Figure 11. AIB Input: THD+N vs Power
10
10
1W
50 W
1
THD+N (%)
THD+N (%)
1
0.1
0.01
0.1
0.01
0.001
0.001
0.01
0.0001
20
200
2000
20000
Frequency (%)
0.1
D014
Figure 12. Molex Input: THD+N vs Frequency
1
Power (W)
10
100 200
D005
Figure 13. Molex Input: THD+N vs Power
10
10
1W
50 W
1
THD+N (%)
THD+N (%)
1
0.1
0.01
0.1
0.01
0.001
0.0001
20
200
2000
Frequency (Hz)
20000
Figure 14. RCA Input: THD+N vs Frequency
2.4
0.001
0.01
D017
0.1
1
Power (W)
10
100 200
D008
Figure 15. RCA Input: THD+N vs Power
SE Mode (Four-Speaker Output)
1. Set J6 to H and J5 to H.
2. Remove jumpers J22, J23, J24, and J25.
3. Connect the positive side of the load to the OUTA (J9-RED) terminal and the negative side of the load
to the GND (J11) terminal.
4. Connect the positive side of the load to the OUTB (J9-BLACK) terminal and the negative side of the
load to the GND (J11) terminal.
5. Connect the positive side of the load to the OUTC (J2-RED) terminal and the negative side of the load
to the GND (J20) terminal.
6. Connect the positive side of the load to the OUTD (J2-BLACK) terminal and the negative side of the
load to the GND (J20) terminal.
7. Set both J4 and J19 jumpers position to DIFF.
8. Input configuration:
a. Differential inputs: Set J26, J27, J34, and J35 to RCA.
i. Connect the male RCA jack to the female RCA jack input A/AB (J3-RED) for the OUTA
speaker.
8
TPA3251 Evaluation Module
SLAU751 – November 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
Setup By Mode
www.ti.com
ii. Connect the male RCA jack to the female RCA jack input B (J14-BLACK) for the OUTB
speaker.
iii. Connect the male RCA jack to the female RCA jack input C/CD (J18-WHITE) for the OUTC
speaker.
iv. Connect the male RCA jack to the female RCA jack input D (J15-BLUE) for the OUTD
speaker.
b. AIB input: Set J26, J27, J34, and J35 to AIB.
Table 5. Jumper Configuration (SE Mode)
Jumper
Setting
Comment
J29
IN
PVDD to 15-V BUCK
J32
IN
12-V LDO to 12-V TERM
J33
IN
3.3-V LDO to 3.3-V TERM
J36
IN
12-V LDO to GVDD
J16
3 to 4
MASTER MODE 600kHz
J22
OUT
OUTA CAP SHUNT
J23
OUT
OUTB CAP SHUNT
J24
OUT
OUTC CAP SHUNT
J25
OUT
OUTD CAP SHUNT
J5
1 to 2
M1 – H
J6
1 to 2
M2 – H
J7
OUT
PBTL SELECT INC
J8
OUT
PBTL SELECT IND
J4
2 to 3
INA/B DIFF INPUT
J19
2 to 3
INC/D DIFF INPUT
J26
1 to 2
INC-SEL RCA
J27
1 to 2
IND-SEL RCA
J34
1 to 2
INA-SEL RCA
J35
1 to 2
INB-SEL RCA
J21
IN
C_START
NOTE: The performance of the TPA3251EVM/TPA3251D2DDV is dependent on the power supply.
Design the power supply with margins that can deliver the required power. Some lowfrequency applications can require additional bulk capacitance. Replacing the bulk capacitors
on the TPA3251EVM with 3300 µF or more capacitance can be necessary depending on the
power supply used.
2.4.1
Performance Data (SE Mode)
All measurements are taken at audio frequency = 1 kHz, PVDD_X = 36 V, RL = 4 Ω, fS = 600 kHz, ROC
= 22 kΩ, Output filter: L = 7 μH, C = 0.68 µF, with AES17 + AUX-0025 measurement filters.
SLAU751 – November 2017
Submit Documentation Feedback
TPA3251 Evaluation Module
Copyright © 2017, Texas Instruments Incorporated
9
Hardware Configuration
www.ti.com
50
10
1W
10 W
30 W
10
1
THD+N (%)
THD+N (%)
1
0.1
0.1
0.01
0.01
0.001
0.01
0.001
20
200
2000
Frequency (Hz)
20000
0.1
D012
Figure 16. AIB Input: THD+N vs Frequency
1
Power (W)
10
100
D003
Figure 17. AIB Input: THD+N vs Power
50
10
1W
10 W
30 W
10
1
THD+N (%)
THD+N (%)
1
0.1
0.1
0.01
0.01
0.001
0.01
0.001
20
200
2000
Frequency (Hz)
20000
0.1
D015
Figure 18. Molex Input: THD+N vs Frequency
1
Power (W)
10
100
D006
Figure 19. Molex Input: THD+N vs Power
50
10
1W
10 W
30 W
10
1
THD+N (%)
THD+N (%)
1
0.1
0.1
0.01
0.01
0.001
20
200
2000
Frequency (Hz)
20000
0.001
0.01
D018
Figure 20. RCA Input: THD+N vs Frequency
3
Hardware Configuration
3.1
Indicator Overview (OTW_CLIP and FAULT)
0.1
1
Power (W)
10
100
D009
Figure 21. RCA Input THD+N vs Power
The TPA3251EVM is equipped with LED indicators that illuminate when the FAULT or CLIP_OTW pin (or
both) goes low. See Table 6 and TPA3251 175-W Stereo, 350-W Mono PurePath™ Ultra-HD AnalogInput Class-D Amplifier for more details on which events trigger the pins to go low.
Table 6. Fault and Clip Overtemperature Status
FAULT
10
OTW_CLIP
Description
0
0
Overtemperature (OTE), overload (OLP), or undervoltage (UVP) junction temperature higher than
125°C (overtemperature warning)
0
0
OLP or UVP; junction temperature higher than 125°C (overtemperature warning)
0
1
OLP or UVP; junction temperature lower than 125°C
1
0
Junction temperature higher than 125°C (overtemperature warning)
1
1
Junction temperature lower than 125°C and no OLP or UVP faults (normal operation)
TPA3251 Evaluation Module
SLAU751 – November 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
Hardware Configuration
www.ti.com
3.2
PWM Frequency Adjust
The TPA3251EVM offers a hardware-trimmed oscillator frequency by through the external control of the
FREQ_ADJ pin. Use the frequency adjust to reduce interference problems while using a radio receiver
tuned within the AM band and change the switching frequency from nominal values to lower values (see
Table 7). Choose these values such that the nominal- and the lower-value switching frequencies together
result in the fewest cases of interference throughout the AM band. Select the oscillator frequency based
on the value of the FREQ_ADJ resistor connected to GND in master mode.
Table 7. Frequency Adjust Master Mode Selection
Mode
Switching Frequency
Resistor to GND
Pin Configuration
MASTER MODE 600 kHz
600 kHz
10 kΩ
3 to 4
MASTER MODE 500 kHz
500 kHz
20 kΩ
5 to 6
MASTER MODE 450 kHz
450 kHz
30 kΩ
7 to 8
For slave-mode operation, turn off the oscillator by pulling the FREQ_ADJ pin to 3.3 V. This action
configures the OSC_I/O pins as inputs, which are to be slaved from an external differential clock. In a
master and slave system, interchannel delay is automatically set up between the switching phases of the
audio channels, which can be illustrated by no idle channels switching at the same time. This setup does
not influence the audio output; rather, only the switch timing to minimize noise coupling between audio
channels through the power supply. In turn, this process optimizes audio performance and results in better
operating conditions for the power supply. The interchannel delay is setup for a slave device depending on
the polarity of the OSC_I/O connection, such that slave mode 1 is selected by connecting OSC_I/O of the
master device in phase with OSC_I/O of the slave device (+ to + and – to –), while slave mode 2 is
selected by connecting the OSC_I/Os out of phase (+ to – and – to +).
3.3
TPA3251EVM Overcurrent Adjust
The TPA3251EVM offers the ability for the user to change the current limit by changing R13 as well as
having two different protection modes, Cycle by Cycle Current Control (CB3C) and Latching Shutdown
(Latched OC). For CB3C operations, the resistance must be a value of 22 kΩ to 30 kΩ. For Latched OC
operations, the resistance must be a value of 47 kΩ to 64 kΩ. By default, the resistor R13 is 22 kΩ.
Table 8 shows a few resistance values and their corresponding OC threshold and OC protection mode.
Table 8. Overcurrent Protection Selection
3.4
OC_ADJ Resistor
Value
Protection Mode
OC Threshold
22 kΩ
CB3C
16.3 A
24 kΩ
CB3C
15.1 A
27 kΩ
CB3C
13.5 A
30 kΩ
CB3C
12.3 A
47 kΩ
Latched OC
16.3 A
51 kΩ
Latched OC
15.1 A
56 kΩ
Latched OC
13.5 A
64 kΩ
Latched OC
12.3 A
TPA3251EVM Single-Ended and Differential Inputs
The TPA3251EVM supports both differential and SE inputs. For SE inputs, set either the J4 or J19 jumper
(or both) to the SE position so that the TPA3251EVM uses the NE5532 operational amplifier (op amp) to
convert the SE input signal to differential to properly drive the differential inputs of the TPA3251 device.
Use input RCA jack J3 to provide INA and INB inputs. Use RCA jack J18 to provide INC and IND inputs
with SE inputs. For differential input operation, set either the J4 or J19 jumpers (or both) to the DIFF
position. The TPA3251EVM uses the NE5532 to buffer the differential input signal to the differential inputs
of the TPA3251 device. Use input RCA jack J3 to provide INA, RCA jack J14 to provide INB, RCA jack
J18 to provide INC, and RCA jack J15 to provide IND with differential inputs.
SLAU751 – November 2017
Submit Documentation Feedback
TPA3251 Evaluation Module
Copyright © 2017, Texas Instruments Incorporated
11
Hardware Configuration
www.ti.com
NOTE: The SE input settings on the TPA3251EVM must only be used for channels with output
configuration BTL or PBTL, not SE. For SE output configuration, the user must set either
jumper J4 or J19 (or both) for that channel to the DIFF position so that the input signal INx is
mapped directly to OUTx.
3.5
Input Connectors
The TPA3251EVM supports three different input connectors. J3, J14, J15, and J18 are RCA connectors;
J10 and J12 are Molex connectors; and J28 is the AIB connector with J30 being the AIB alignment
connection. Table 9 shows the AIB pinout in detail.
Table 9. AIB Connector (J28) Pinout
12
Pin
No.
Function
Audio EVM Input
or Output
1
Amp Out A
Speaker-level output from audio class-D EVM (SE or one side of BTL)
O
2
Amp Out B
Speaker-level output from audio class-D EVM (SE or one side of BTL)
O
O
Description
3
PVDD
PVDD voltage supply from audio Class-D EVM (variable voltage depending
on Class-D EVM use)
4
GND
Ground reference between audio plug-in module and audio class-D EVM
5
NC
6
NC
7
3.3 V
3.3-V supply from EVM; used for powering audio plug-in module
O
8
3.3 V
3.3-V supply from EVM; used for powering audio plug-in module
O
9
12 V
12-V supply from EVM; used for powering audio plug-in module
O
10
EN and Reset
Assert enable and reset control for audio class-D EVM (active low)
I
11
Analog IN_A
Analog audio input A (analog in EVM), Master I2S bus (digital in EVM)
I
12
NC
13
Analog IN_B
Analog audio input B (analog in EVM), bit clock I2S bus (digital in EVM)
I
14
CLIP_OTW
Clipping detection, overtemperature warning, or both from audio class-D EVM
(active low)
O
15
Analog IN_C
Analog audio input C (analog in EVM), frame clock I2S bus (digital in EVM)
I
Fault detection from audio Class-D EVM (active low)
O
Analog audio Input D (analog in EVM), data in I2S bus (digital in EVM)
I
16
FAULT
17
Analog IN_D
18
NC
19
NC
20
NC
21
GND
Ground reference between audio plug-in module and audio class-D EVM
22
GND
Ground reference between audio plug-in module and audio class-D EVM
23
NC
24
NC
25
NC
26
NC
27
Amp Out C
Speaker-level output from audio class-D EVM (SE or one side of BTL)
O
28
Amp Out D
Speaker-level output from audio class-D EVM (SE or one side of BTL)
O
TPA3251 Evaluation Module
SLAU751 – November 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
Hardware Configuration
www.ti.com
3.6
EVM Power Tree
The EVM power section is self-contained with all the necessary onboard voltages generated from the
main PVDD (J1) power input. The PVDD is reduced to 15 V and then used to generate the remaining
required board voltages of 12 V, 5 V, and 3.3 V. Low-dropout linear regulators (LDOs) generate supplies
going to the TPA3221 device itself to reduce the chance of extra added noise. LEDs are provided on the
5-V and 3.3-V supplies so that the user can verify that the EVM is powered (see Figure 22).
12 V
15 V
PVDD
J29
LM5010ASD
J31
LM2940IMP-12
J32
TLV117-33IDCY
J36
J33
3.3 V
GVDD
Figure 22. EVM Power Tree
3.7
LC Filter Overview
Included near the output of the TPA3251 device are four output LC filters. These output filters filter the
pulse-width modulation (PWM) output, leaving only the audio content at high power, which is fed to the
speakers. The board uses a CoilCraft™ 7-µH inductor and a 0.68-µF film capacitor to form this LC filter.
Using the equations listed in LC Filter Design Application Report , the low-pass filter cutoff is calculated as
follows in Equation 1:
Fcut
off
1
1
2S L u C
2S 7 PH u .68 PF
Figure 23. BTL LC Frequency Response
3.8
72.9 kHz
(1)
Figure 24. SE LC Frequency Response
Post-Filter Feedback (PFFB)
The TPA3251EVM has the footprints available to implement post filter feedback to improve the audio
performance of the TPA3251 amplifier. For more details on benefits and implementation, see TPA324x
and TPA325x Post-Filter Feedback .
SLAU751 – November 2017
Submit Documentation Feedback
TPA3251 Evaluation Module
Copyright © 2017, Texas Instruments Incorporated
13
Hardware Configuration
3.9
www.ti.com
Reset Circuit
The TPA3251EVM includes RESET supervision so that the TPA3251 device remains in reset until all the
power rails are up and stable. The RESET supervisor also ensures that the device is put into reset if one
of the power rails experiences a brownout. This circuit combined with the RESET switch (S1) help ensure
that the TPA3251 can be placed in reset easily as needed or automatically if there is a power supply
issue.
3.10 Op Amp versus Direct Drive
The op amps are used to change a single-ended input into a differential input. By default, the gain of the
op amps are set for unity gain; however, this can be modified to increase or decrease the gain through the
op amps. One way to bypass the op amps for a more direct connection is using the AIB.
4
EVM Design Documents
This section contains the TPA3251EVM board layout, schematics, and bill of materials (BOM).
4.1
TPA3251EVM Board Layouts
Figure 25 and Figure 26 illustrate the EVM board layouts.
Figure 25. TPA3251 EVM Top Composite Assembly
14
TPA3251 Evaluation Module
SLAU751 – November 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
EVM Design Documents
www.ti.com
Figure 26. TPA3251 EVM Bottom Composite Assembly
SLAU751 – November 2017
Submit Documentation Feedback
TPA3251 Evaluation Module
Copyright © 2017, Texas Instruments Incorporated
15
EVM Design Documents
4.2
www.ti.com
TPA3251EVM Board Layouts
Figure 27 shows the EVM board dimensions.
Figure 27. TPA3251EVM Board Dimensions
16
TPA3251 Evaluation Module
SLAU751 – November 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
EVM Design Documents
www.ti.com
4.3
TPA3251 EVM Schematics
Figure 28 through Figure 30 illustrate the TPA3251EVM schematics.
1
2
3
J34 INA-SEL
C20
1
INA/AB
2
3
INPUT SE A
SE AB
DIFF A+
C18
22pF
10.0k
10µF
IN-A_RCA
R8
10.0k
100k
AGND1
U5A
2
ROUTED
GROUND
1
VMID
R42
3
NE5532ADR
INB
LEFT-
2
3
R11
2.00k
DNP
DNP
10µF
C73
22pF
DNP
DNP
OUTA
From DUT
R14
2.00k
DNP
DNP
IN-B_RCA
7
10µF
C74
22pF
DNP
DNP
C37
DNP 220pF
DNP
5
GND
R59
SE
0
R12
0
OUTB
R49
DNP18.0k
DNP
4
J4
1
2
3
To DUT
INA
R47
DNP18.0k
DNP
GND
NE5532ADR
GND
C71
R43
INA-SEL
J35 INB-SEL
U5B
6
VMID
4
10.0k
INB-RCA
1
0
C26
DNP 220pF
DNP
10.0k
8
<-
J14
R4
R41
J10
1
2
3
RCA INPUT
0
22pF
+12V-OA
AGND1
R52
C23
8
LEFT+
R9
C17
R7
INA-RCA
1
2
3
J3
RCA INPUT
C28
INB-SEL
INB
To DUT
10µF
DIFF
IN A/B
100k
INPUT SE B
DIFF A-
SPKB-OUT R63
0 DNP
DNP
SPKA-OUT R64
0 DNP
DNP
AGND1
INA-AIB
INB-AIB
PBTL
SELECT
J28
SPKB-OUT
RESET
FROM DUT
R53
RESET-SW
3.3V
1.00k
PVDD
SPKA-OUT
1
0
3 R67
DNP
5 DNP
3.3V
+12V
7
9
11 INA-AIB
13 INB-AIB
15 INC-AIB
17 IND-AIB
19
R46
10.0k
21
23
25
GND
SPKC-OUT
27
2
4
6
8
10
12
14
16
18
20
22
24
26
28
RST-AIB
CLIP_OTW
FAULT
SPKD-OUT
AIB
ALIGNMENT
HEADER
J30
J7
1
2
NT1
Net-Tie
GND
AUDIO
INC
AGND1
INTERFACE
GND
NT2
BOARD
J8
1
2
Net-Tie
AGND2
GND
IND
GND
GND
GND
0 DNP
SPKC-OUT R65
DNP
0 DNP
SPKD-OUT R66
DNP
1
2
3
J26 INC-SEL
RIGHT+
C62
J18
1
INC/CD
2
3
RCA INPUT
INC-RCA
10µF
R20
INC-AIB
IN-C_RCA
C57
22pF
10.0k
C55
R60
0
R36
0
INC-SEL
R21
10.0k
R45
100k
INPUT SE C
SE CD
DIFF C+
R18
2.00k
DNP
DNP
1
J27 IND-SEL
3
R22
2.00k
DNP
DNP
NE5532ADR
C76
DNP
DNP 22pF
C61
R51
DNP 220pF
DNP18.0k
DNP
DNP
4
C65
1
2
3
GND
22pF
J19
IND
IND-RCA
10µF
R48
100k
INPUT SE D
DIFF C-
GND
1
2
3
IND-AIB
R62
SE
R25
DIFF
10.0k
IN C/D
0
R44
0
OUTD
C63
IND-SEL
IND
To DUT
10µF
8
C66
2
3
OUTC
From DUT
U6A
2
VMID
1
22pF
DNP
DNP
GND
1
2
3
AGND2
J15
C75
To DUT
10µF
8
J12
RIGHT-
R50
DNP18.0k
DNP
+12V-OA
AGND2
RCA INPUT
INC
C45
DNP 220pF
DNP
R27
10.0k
U6B
6
7
VMID
IN-D_RCA
5
4
NE5532ADR
AGND2
Copyright © 2017, Texas Instruments Incorporated
Figure 28. TPA3251EVM Schematic 1
SLAU751 – November 2017
Submit Documentation Feedback
TPA3251 Evaluation Module
Copyright © 2017, Texas Instruments Incorporated
17
EVM Design Documents
www.ti.com
+12V GVDD
GVDD
PVDD
TP4
R3
M1 INPUT MODE
M2
C31
2200µF
C14
0.1uF
OUTPUT
DESCRIPTION
2N + 1
2xBTL
STEREO BTL OUTPUT, A D MODE
0
1
2N/1N + 1
1xBTL + 2xSE
2.1 BTL + SE MODE, AD MODE
1
0
2N + 1
1xPBTL
PARALLEL BTL OUTPUT, A D MODE
R6
1
1
1N + 1
4xSE
SINGLE ENDED OUTPUT, A D MODE
3.3
GND
GND
GVDD
TP8
GND
R1
GND
C47
1µF
GND
GVDD-AB
DNP
TP15
VDD
DNP
TP16
GVDD-CD
DNP
TP17
GVDD_CD
0
C69
0.1uF
GND
GND
INPUT_B
INA
DNP
TP20
INB
DNP
TP21
INC
DNP
TP22
IND
DNP
TP23
100
C30
100pF
FROM
ANALOG
FRONT END
PVDD-CD
C46
2200µF
GVDD
C19
100pF
INB
C40
1µF
C41
1µF
GND
3.3V
R19
INPUT_C
100
J5
M1
PVDD_AB
PVDD_AB
PVDD_AB
31
30
29
PVDD_CD
PVDD_CD
PVDD_CD
1
GVDD_AB
VDD
2
GVDD_CD
DVDD
DNP
TP18
AVDD
DNP
TP19
INPUT_A
22
11
14
BST_B
43
40
39
OUT_A
OUT_B
35
OUT_B
32
OUT_C
OUT_D
OUT_D
28
27
OUT_D
BST_C
24
GVDD_CD
OUT_C
AVDD
INPUT_A
INPUT_B
6
INPUT_B
INPUT_C
16
INPUT_C
INPUT_D
OC-ADJ
DNP
TP24
R13
17
INPUT_D
C85
DNP 1µF
DNP
M1
GND
M1
M2
TP13
RESET
3
4
GND
18
L3
IND
IN = SE
3.3V
1
2
3
J6
INPUT_D
CLIP OTW
VBG
FAULT
C_START
1
2
J21
15
C50
0.47µF
100
10
9
C49
0.01µF
J11
8
C64
100pF
GND
GND
GND
GND
GND
GND
GND
GND
FREQ_ADJ
GND
J17
MODE
SELECTION
GND
GND
OC_IOP
4
3
2
1
OSCILLATOR
SYNC
INTERFACE
C42
OC
OUT_C
1500µF
TP11
J2
C44
DNP 1000pF
DNP
C43
0.68µF
C68
0.1µF
C86
DNP 1µF
DNP
42
41
34
33
26
25
13
12
GND
GND
Hi Current Shunt
GND
J25
L5
C56
OD
OUT_D
GND
TP14
HEATSINK
1500µF
TP1
DNP FREQ_ADJ
TP26
TP12
C60
DNP 1000pF
DNP
C59
0.68µF
FAULT
OUTD
OUTD
7uH 6.5A
MA5173
OC_IOM
GND
OUTC
OUTC
7uH 6.5A
MA5173
DNP VBG
TP27
FAULT
TPA3251D2DDVR
GND
GNDAB
Black
GND
CLIP_OTW
VBG
21
20
19
GND
J24
GND
OC_IOP
OC_IOM
TP10
C36
DNP 1000pF
DNP
Hi Current Shunt
C52
0.033µF
C54
0.033µF
23
RESET
C_START
OUTB
OUTB
1500µF
C35
0.68µF
PWMD
TP9
OC_ADJ
OUT = BTL
M2
C34
OB
7uH 6.5A
MA5173
TP6
GND
R23
GND
GND
M1
M2
J9
Hi Current Shunt
L4
C58
100pF
RESET
GND
OUT_B
PWMC
TP7
BST_D
TP3
C25
DNP 1000pF
DNP
J23
PWMB
TP5
DVDD
1500µF
C24
0.68µF
PWMA
TP2
OUTA
OUTA
7uH 6.5A
MA5173
C27
0.033µF
C29
0.033µF
44
OUT_A
OUT_A
VDD
5
7
BST_A
OA
22.0k
DNP
TP25
1
2
3
38
37
36
GVDD_AB
GND
C21
OUT_A
U4
C48
1µF
GND
INC
Hi Current Shunt
GND
L2
VDD
INPUT_A
100
GND
PVDD
C22
0.1uF
R10
C33
1µF
J22
0
R5
C32
1µF
J36
+12V
0
INA
PVDD-AB
GVDD_AB
0
MODE PIN SELECTION
CLIP_OTW
J20
GND
GND
GNDCD
Black
GND
3.3V
R15
10.0k
R16
20.0k
R17
30.0k
2
4
6
8
1
3
5
7
SLAVE MODE
MASTER MODE
MASTER MODE AM1
MASTER MODE AM2
FAULT
RESET-SW
GND
TO
ANALOG
FRONT END
J13
FREQUENCY
ADJUST
GND
TO
AIB
CONNECTOR
CLIP_OTW
J16
OUTA
OUTB
OUTC
OUTD
DNP
DNP
R30
FAULT
C77
1µF
DNP
DNP
R54
C78
1µF
DNP
DNP
R55
C79
1µF
DNP
DNP
R56
C80
1µF
DNP
DNP
R57
DNP
3.30
DNP
DNP
3.30
DNP
DNP
3.30
DNP
DNP
3.30
DNP
0
PVDD
GND
GVDD
R61
100k
R32
8.87k
C82
3.3V
3.3V
+12V
C83
1µF
VDD-RST
4
VDD
RESET
3
R24
47k
RESET
GND
C84
1µF
5
R26
3.30k
5
MR
C67
0.1uF
4
GND
GND
R29
R28
47k
1.00k
R35
FAULT
S1
6
+12V
R31
U7
0.1uF
1
2
Q2
D4
Red
FAULT
100
1.00k
Q1
D2
Orange
OTW
100
MONITORS
TPS3802K33DCKR
3
CLIP_OTW
R33
GND
1
GND
GND
RESET
GND
GND
GND
GND
GND
RESET-SW
GND
GND
Copyright © 2017, Texas Instruments Incorporated
Figure 29. TPA3251EVM Schematic 2
PVDD
PVDD
U1
D3
3A
J1
C39
47µF
50V
C3
1µF
50V
C4
2.2µF
50V
C11
0.01µF
50V
10
C2
0.1µF
50V
R2
8
182k
RON/SD
7
GND
SS
5
C12
4700pF
RANGE 18V-36V
2
D1
1A
3
C7
5600pF
R39
4.99k
Hi Current Shunt
11
DAP
R40
1.00k
LM5010ASD/NOPB
GND
1.5A
6
FB
SGND
+15V
J31
15V-VR
1
SW
ISEN
RTN
4
GND
C13
GND L1
0.1uF
C1
100µH
0.047µF
9
VCC
BST
J29
PVDD-IN
GND
VIN
GND
GND
GND
+15V
+12V
+12V
U2
1
4
C6
4.7µF
C8
0.47µF
IN
OUT
TAB
GND
3
GND
+12V
U3
3
R58
D6
Green
2
1.50k
12V
C5
47µF
LM2940IMP-12/NOPB
GND
GND
12V-VR
C9
0.1uF
GND
GND
J32
12V
3.3V
GND
GND
R34
D5
Green
3.3V
360
3.3V
IN
OUTPUT
OUTPUT
C38
10µF
GND
2
4
GND
3.3V-VR
C10
100µF
1
TLV1117-33IDCY
GND
GND
+12V
J33
3.3V
GND
+12V-OA
L6
+12V-OA
VMID
R37
10uH
0.8A
10.0k
C81
10µF
C16
10µF
C15
0.1uF
C53
10µF
R38
10.0k
C51
0.1uF
NT3
GND
GND
GND
GND
C91
10µF
C70
10µF
C72
0.1uF
C89
10µF
C90
0.1uF
Net-Tie
GND
GND
GND
GND
GND
GND
Figure 30. TPA3251EVM Schematic 3
18
TPA3251 Evaluation Module
SLAU751 – November 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
EVM Design Documents
www.ti.com
4.4
TPA3251EVM Bill of Materials
Table 10 lists the TPA3251EVM BOM.
Table 10. TPA3251EVM Bill of Materials
Designator
Quantity
Value
!PCB1
1
C1
1
0.047uF
C2, C9, C13, C15, C51,
C68, C72, C90
8
0.1uF
C3
1
1uF
C4
1
C5
C6
Description
Package Reference
Printed Circuit Board
Part Number
Manufacturer
AMPS030
Any
CAP, CERM, 0.047 µF, 25 V, +/- 10%,
X7R, 0402
0402
GRM155R71E473KA88
D
MuRata
CAP, CERM, 0.1 µF, 50 V, +/- 10%,
X7R, 0603
0603
C0603C104K5RACTU
Kemet
CAP, CERM, 1 µF, 50 V, +/- 10%, X7R,
0603
0603
UMK107AB7105KA-T
Taiyo Yuden
2.2uF
CAP, CERM, 2.2 µF, 50 V, +/- 10%,
X7R, 0805
0805
C2012X7R1H225K125A
C
TDK
1
47uF
CAP, AL, 47 µF, 16 V, +/- 20%, 0.36
ohm, SMD
SMT Radial D
EEE-FK1C470P
Panasonic
1
4.7uF
CAP, CERM, 4.7 µF, 25 V, +/- 10%,
X7R, 1206
1206
GRM31CR71E475KA88
L
MuRata
0603
GRM188R71H562KA01
D
MuRata
C7
1
5600pF
CAP, CERM, 5600 pF, 50 V, +/- 10%,
X7R, 0603
C8, C50
2
0.47uF
CAP, CERM, 0.47 µF, 25 V, +/- 10%,
X7R, 0603
0603
GRM188R71E474KA12
D
MuRata
SMT Radial C
EEE-FK0J101UR
Panasonic
C10
1
100uF
CAP, AL, 100 µF, 6.3 V, +/- 20%, 0.7
ohm, SMD
C11
1
0.01uF
CAP, CERM, 0.01 µF, 50 V, +/- 10%,
X7R, 0603
0603
C0603C103K5RACTU
Kemet
CAP, CERM, 4700 pF, 50 V, +/- 10%,
X7R, 0603
0603
C0603X472K5RACTU
Kemet
C12
1
4700pF
C14, C22, C67, C69,
C82
5
0.1uF
CAP, CERM, 0.1uF, 50V, +/-10%, X7R,
0603
0603
C0603C104K5RACTU
Kemet
C16, C53, C70, C81,
C89, C91
6
10uF
CAP, CERM, 10 µF, 16 V, +/- 10%,
X5R, 0805
0805
EMK212BJ106KG-T
Taiyo Yuden
C17, C28, C55, C63
4
10uF
CAP, CERM, 10 µF, 16 V, +/- 10%,
X7R, 1206
1206
GRM31CR71C106KAC
7L
MuRata
C18, C23, C57, C65
4
22pF
CAP, CERM, 22 pF, 50 V, +/- 5%,
C0G/NP0, 0603
0603
GRM1885C1H220JA01
D
MuRata
0603
GRM1885C1H101JA01
D
MuRata
C19, C30, C58, C64
4
100pF
CAP, CERM, 100 pF, 50 V, +/- 5%,
C0G/NP0, 0603
C20, C38, C62, C66,
C71
5
10uF
CAP, AL, 10 µF, 16 V, +/- 20%, 1.35
ohm, SMD
SMT Radial B
EEE-FK1C100R
Panasonic
Dia 18mm
EEU-FC1J152
Panasonic
C21, C34, C42, C56
4
1500uF
CAP, AL, 1500 µF, 63 V, +/- 20%, 0.03
ohm, AEC-Q200 Grade 2, TH
C24, C35, C43, C59
4
0.68uF
CAP, Film, 0.68 µF, 250 V, +/- 5%, TH
18x9x17.5mm
B32652A3684J
EPCOS Inc
0.033uF
CAP, CERM, 0.033 µF, 50 V, +/- 10%,
X7R, 0603
0603
GRM188R71H333KA61
D
MuRata
CAP, AL, 2200 µF, 50 V, +/- 20%,
0.023 ohm, TH
Dia 18mm
EEU-FC1H222
Panasonic
C27, C29, C52, C54
4
C31, C46
2
2200uF
C32, C33, C47, C48,
C83, C84
6
1uF
CAP, CERM, 1 µF, 50 V, +/- 10%, X7R,
1206
1206
GRM31MR71H105KA88
L
MuRata
SMT Radial E
EEE-FK1H470P
Panasonic
0603
GRM188R71C105KA12
D
MuRata
CAP, CERM, 0.01 µF, 50 V, +/- 10%,
X7R, 0603
0603
GRM188R71H103KA01
D
MuRata
Diode, Schottky, 100 V, 1 A, SMA
SMA
B1100-13-F
Diodes Inc.
LED, Orange, SMD
LED_0805
LTST-C170KFKT
Lite-On
C39
1
47uF
CAP, AL, 47 µF, 50 V, +/- 20%, 0.68
ohm, SMD
C40, C41
2
1uF
CAP, CERM, 1 µF, 16 V, +/- 10%, X7R,
0603
C49
1
0.01uF
D1
1
100V
D2
1
Orange
D3
1
100V
Diode, Schottky, 100 V, 3 A, SMA
SMA
SK310A-TP
Micro Commercial
Components
D4
1
Red
LED, Red, SMD
Red 0805 LED
LTST-C170KRKT
Lite-On
D5, D6
2
Green
LED, Green, SMD
LED_0805
LTST-C171GKT
Lite-On
Machine Screw, 4-40,
1/4 inch
H1, H2, H3, H4, H5
5
MACHINE SCREW PAN PHILLIPS 440
PMSSS 440 0025 PH
B&F Fastener Supply
H6, H7
2
MACHINE SCREW PAN PHILLIPS M3
M3 Screw
RM3X8MM 2701
APM HEXSEAL
2204
Keystone
ATS-TI1OP-519-C1-R3
Advanced Thermal
Solutions
H8, H9, H10, H11, H12
5
HEX STANDOFF 4-40 ALUMINUM 3/4"
HEX STANDOFF 4-40
ALUMINUM 3/4"
HEATSINK
1
Heat Sink, Vertical
Heatsink
SLAU751 – November 2017
Submit Documentation Feedback
TPA3251 Evaluation Module
Copyright © 2017, Texas Instruments Incorporated
19
EVM Design Documents
www.ti.com
Table 10. TPA3251EVM Bill of Materials (continued)
Description
Package Reference
J1, J2, J9
Designator
3
Dual Binding Posts with Base, 2x1, TH
Dual Binding Posts with
Base, 2x1, TH
6883
Pomona Electronics
J3
1
RCA Jack, Vertical, Red, TH
RCA JACK, RED
RCJ-022
CUI Inc.
J4, J19, J26, J27, J34,
J35
6
Header, 100mil, 3x1, Gold, TH
PBC03SAAN
PBC03SAAN
Sullins Connector
Solutions
J5, J6
2
Header, 100mil, 3x1, Gold, TH
PBC03SAAN
PBC03SAAN
Sullins Connector
Solutions
J7, J8, J21, J29, J30,
J32, J33, J36
8
Header, 100mil, 2x1, Gold, TH
Sullins 100mil, 1x2, 230
mil above insulator
PBC02SAAN
Sullins Connector
Solutions
J10, J12
2
Header, 2.54 mm, 3x1, TH
Header, 2.54mm, 3x1,
TH
22-11-2032
Molex
J11, J20
2
Binding Post, BLACK, TH
11.4x27.2mm
7007
Keystone
RCA Jack, Vertical, Black, TH
RCA Jack, Vertical,
Black, TH
RCJ-021
CUI Inc.
RCJ-025
CUI Inc.
J14
Quantity
Value
1x3
1
Part Number
Manufacturer
J15
1
RCA Jack, Vertical, Blue, TH
RCA Jack, Vertical,
Blue, TH
J16
1
Header, 100mil, 4x2, Tin, TH
Header, 4x2, 100mil, Tin
PEC04DAAN
Sullins Connector
Solutions
J17
1
Header (friction lock), 100mil, 4x1,
Gold, TH
Header 4x1 keyed
0022112042
Molex
J18
1
RCA Jack, Vertical, White, TH
RCA JACK, WHITE
RCJ-023
CUI Inc.
J22, J23, J24, J25, J31
5
JUMPER TIN SMD
6.85x0.97x2.51 mm
S1911-46R
Harwin
J28
1
Receptacle, 100mil, 14x2, Gold, TH
14x2 Receptacle
SSW-114-01-G-D
Samtec
L1
1
100uH
Inductor, Shielded Drum Core, Ferrite,
100 µH, 1.5 A, 0.165 ohm, SMD
SMD
7447714101
Wurth Elektronik
L2, L3, L4, L5
4
7uH
Inductor, Toroid, Powdered Iron, 7 µH,
6.5 A, 0.0215 ohm, TH
28.6x12.3mm
MA5173-AE
Coilcraft
2-Pin SMD, Body 4 x 4
mm, Height 1.2 mm
NRS4012T100MDGJV
Taiyo Yuden
L6
1
10uH
Inductor, Wirewound, 10 µH, 0.8 A,
0.204 ohm, SMD
Q1, Q2
2
60V
MOSFET, N-CH, 60 V, 0.17 A, SOT-23
SOT-23
2N7002-7-F
Diodes Inc.
R1, R3, R30
3
0
RES, 0, 5%, 0.1 W, 0603
0603
CRCW06030000Z0EA
Vishay-Dale
R2
1
182k
RES, 182 k, 1%, 0.125 W, 0805
0805
ERJ-6ENF1823V
Panasonic
R4, R12, R36, R44
4
0
RES, 0, 5%, 0.125 W, 0805
0805
ERJ-6GEY0R00V
Panasonic
R5, R10, R19, R23,
R33, R35
6
100
RES, 100, 1%, 0.1 W, 0603
0603
CRCW0603100RFKEA
Vishay-Dale
R6
1
3.3
RES, 3.3, 5%, 0.1 W, 0603
0603
CRCW06033R30JNEA
Vishay-Dale
R7, R8, R20, R21, R25,
R27, R37, R38, R41,
R42
10
10.0k
RES, 10.0 k, 0.1%, 0.1 W, 0603
0603
RT0603BRD0710KL
Yageo America
R9, R43, R45, R48, R61
5
100k
RES, 100 k, 1%, 0.063 W, 0402
0402
CRCW0402100KFKED
Vishay-Dale
R13
1
22.0k
RES, 22.0 k, 1%, 0.1 W, 0603
0603
RC0603FR-0722KL
Yageo America
R15
1
10.0k
RES, 10.0 k, 1%, 0.1 W, 0603
0603
CRCW060310K0FKEA
Vishay-Dale
R16
1
20.0k
RES, 20.0 k, 1%, 0.1 W, 0603
0603
RC0603FR-0720KL
Yageo America
R17
1
30.0k
RES, 30.0 k, 1%, 0.1 W, 0603
0603
RC0603FR-0730KL
Yageo America
R24, R28
2
47k
RES, 47 k, 5%, 0.1 W, 0603
0603
RC0603JR-0747KL
Yageo America
R26
1
3.30k
RES, 3.30 k, 1%, 0.1 W, 0603
0603
RC0603FR-073K3L
Yageo America
R29, R31
2
1.00k
RES, 1.00 k, 1%, 0.1 W, 0603
0603
CRCW06031K00FKEA
Vishay-Dale
R32
1
8.87k
RES, 8.87 k, 1%, 0.1 W, 0603
0603
CRCW06038K87FKEA
Vishay-Dale
R34
1
360
RES, 360, 5%, 0.063 W, 0402
0402
CRCW0402360RJNED
Vishay-Dale
R39
1
4.99k
RES, 4.99 k, 1%, 0.063 W, 0402
0402
CRCW04024K99FKED
Vishay-Dale
R40
1
1.00k
RES, 1.00 k, 1%, 0.063 W, 0402
0402
CRCW04021K00FKED
Vishay-Dale
R46
1
10.0k
RES, 10.0 k, 1%, 0.063 W, 0402
0402
CRCW040210K0FKED
Vishay-Dale
R52, R59, R60, R62
4
0
RES, 0, 5%, 0.25 W, 1206
1206
CRCW12060000Z0EA
Vishay-Dale
R53
1
1.00k
RES, 1.00 k, 1%, 0.1 W, 0402
0402
ERJ-2RKF1001X
Panasonic
R58
1
1.50k
RES, 1.50 k, 1%, 0.063 W, 0402
0402
CRCW04021K50FKED
Vishay-Dale
S1
1
Switch, SPDT, On-On, 2 Pos, TH
Switch, 7x4.5mm
200USP1T1A1M2RE
E-Switch
SH1, SH2, SH3, SH4,
SH5, SH6, SH7, SH8,
SH9, SH10, SH11,
SH12, SH13, SH14,
SH15, SH16, SH17,
SH18
18
Shunt, 100mil, Gold plated, Black
Shunt
969102-0000-DA
3M
20
1x2
TPA3251 Evaluation Module
SLAU751 – November 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
EVM Design Documents
www.ti.com
Table 10. TPA3251EVM Bill of Materials (continued)
Quantity
Value
TP1, TP2, TP3, TP4,
TP5, TP6, TP7, TP8,
TP9, TP10, TP11,
TP12, TP13, TP14
Designator
14
Grey
U1
U2
Description
Package Reference
Part Number
Manufacturer
Test Point, Multipurpose, Grey, TH
Grey Multipurpose
Testpoint
5128
Keystone
1
High Voltage 1A Step Down Switching
Regulator, 10-pin LLP, Pb-Free
SDC10A
LM5010ASD/NOPB
Texas Instruments
1
1A Low Dropout Regulator, 4-pin SOT223, Pb-Free
MP04A
LM2940IMP-12/NOPB
Texas Instruments
U3
1
FIXED LOW-DROPOUT VOLTAGE
REGULATOR, DCY0004A
DCY0004A
TLV1117-33IDCY
Texas Instruments
U4
1
175W Stereo / 350W Mono
PurePath(TM) Ultra-HD, Analog-In
Class-D Amplifier, DDV0044D (TSSOP44)
DDV0044D
TPA3251D2DDVR
Texas Instruments
U5, U6
2
Dual Low-Noise Operational Amplifier,
10 to 30 V, 0 to 70 degC, 8-pin SOIC
(D0008A), Green (RoHS & no Sb/Br)
D0008A
NE5532ADR
Texas Instruments
U7
1
ULTRA-SMALL SUPPLY VOLTAGE
SUPERVISORS, DCK0005A
DCK0005A
TPS3802K33DCKR
Texas Instruments
C25, C36, C44, C60
0
1000pF
CAP, CERM, 1000 pF, 50 V, +/- 5%,
C0G/NP0, 1206
1206
GRM3195C1H102JA01
D
MuRata
0603
GRM1885C1H221JA01
D
MuRata
C26, C37, C45, C61
0
220pF
CAP, CERM, 220 pF, 50 V,+/- 5%,
C0G/NP0, 0603
C73, C74, C75, C76
0
22pF
CAP, CERM, 22 pF, 50 V, +/- 5%,
C0G/NP0, 0603
0603
GRM1885C1H220JA01
D
MuRata
C77, C78, C79, C80
0
1uF
CAP, CERM, 1 µF, 50 V, +/- 10%, X7R,
1206
1206
GRM31MR71H105KA88
L
MuRata
C85, C86
0
1uF
CAP, CERM, 1 µF, 100 V, +/- 10%,
X7R, 1206
1206
GRM31CR72A105KA01
L
MuRata
FID1, FID2, FID3, FID4,
FID5, FID6
0
Fiducial mark. There is nothing to buy
or mount.
Fiducial
N/A
N/A
Header, 100mil, 2x1, Gold, TH
Sullins 100mil, 1x2, 230
mil above insulator
PBC02SAAN
Sullins Connector
Solutions
J13
0
R11, R14, R18, R22
0
2.00k
RES, 2.00 k, 1%, 0.1 W, 0603
0603
CRCW06032K00FKEA
Vishay-Dale
R47, R49, R50, R51
0
18.0k
RES, 18.0 k, 1%, 0.1 W, 0603
0603
RC0603FR-0718KL
Yageo America
R54, R55, R56, R57
0
3.30
RES, 3.30, 1%, 0.25 W, 1206
1206
ERJ-8RQF3R3V
Panasonic
R63, R64, R65, R66
0
0
RES, 0, 5%, 0.1 W, 0603
0603
CRCW06030000Z0EA
Vishay-Dale
R67
0
0
RES, 0, 5%, 0.125 W, 0805
0805
ERJ-6GEY0R00V
Panasonic
SLAU751 – November 2017
Submit Documentation Feedback
TPA3251 Evaluation Module
Copyright © 2017, Texas Instruments Incorporated
21
IMPORTANT NOTICE FOR TI DESIGN INFORMATION AND RESOURCES
Texas Instruments Incorporated (‘TI”) technical, application or other design advice, services or information, including, but not limited to,
reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are
developing applications that incorporate TI products; by downloading, accessing or using any particular TI Resource in any way, you
(individually or, if you are acting on behalf of a company, your company) agree to use it solely for this purpose and subject to the terms of
this Notice.
TI’s provision of TI Resources does not expand or otherwise alter TI’s applicable published warranties or warranty disclaimers for TI
products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections,
enhancements, improvements and other changes to its TI Resources.
You understand and agree that you remain responsible for using your independent analysis, evaluation and judgment in designing your
applications and that you have full and exclusive responsibility to assure the safety of your applications and compliance of your applications
(and of all TI products used in or for your applications) with all applicable regulations, laws and other applicable requirements. You
represent that, with respect to your applications, you have all the necessary expertise to create and implement safeguards that (1)
anticipate dangerous consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that
might cause harm and take appropriate actions. You agree that prior to using or distributing any applications that include TI products, you
will thoroughly test such applications and the functionality of such TI products as used in such applications. TI has not conducted any
testing other than that specifically described in the published documentation for a particular TI Resource.
You are authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that include
the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE TO
ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY
RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or
endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
TI RESOURCES ARE PROVIDED “AS IS” AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR
REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING TI RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TO
ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL
PROPERTY RIGHTS.
TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY YOU AGAINST ANY CLAIM, INCLUDING BUT NOT
LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF PRODUCTS EVEN IF
DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL, DIRECT, SPECIAL,
COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN CONNECTION WITH OR
ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES.
You agree to fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of your noncompliance with the terms and provisions of this Notice.
This Notice applies to TI Resources. Additional terms apply to the use and purchase of certain types of materials, TI products and services.
These include; without limitation, TI’s standard terms for semiconductor products http://www.ti.com/sc/docs/stdterms.htm), evaluation
modules, and samples (http://www.ti.com/sc/docs/sampterms.htm).
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2017, Texas Instruments Incorporated
Was this manual useful for you? yes no
Thank you for your participation!

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project

Download PDF

advertising