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Texas Instruments TPA3244 Evaluation Module User guides
User's Guide
SLVUAT5 – November 2016
TPA3244 Evaluation Module
This user’s guide describes the operation of the evaluation module (TPA3244EVM, rev. B) for the
TPA3244 40-W Continuous/100-W Peak Stereo PurePath™ Ultra-HD Analog Input Power Stage. The
user’s guide also provides design information, which includes schematic, BOM, and PCB layout. For
questions and support, go to the E2E forums (e2e.ti.com).
The main contents of this document are:
• Hardware descriptions and implementation
• Design information
Related documents:
• TPA3244 data sheet (SLASEC6)
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2
3
4
5
Contents
Hardware Overview.......................................................................................................... 3
1.1
TPA3244EVM Features ............................................................................................ 3
1.2
TPA3244EVM Frequency Adjust ................................................................................. 4
1.3
TPA3244EVM Single-Ended and Differential Input ............................................................ 4
1.4
TPA3244EVM Clip Overtemperature and Fault Indicators .................................................... 5
1.5
TPA3244EVM LC Filter ............................................................................................ 5
TPA3244EVM Setup ........................................................................................................ 7
2.1
TPA3244EVM Setup ............................................................................................... 7
2.2
Hardware Requirements ........................................................................................... 7
2.3
Hardware Default Setup BTL (2.0) ............................................................................... 8
Using the TPA3244EVM in Different Output Configurations ......................................................... 10
3.1
BTL Plus Two SE (2.1) Operation .............................................................................. 10
3.2
PBTL (0.1) Output Operation .................................................................................... 12
3.3
Single-Ended (SE) Output (4.0) Operation .................................................................... 13
Optional Inductors .......................................................................................................... 14
Board Layouts, Bill of Materials, and Schematic ....................................................................... 15
5.1
TPA3244EVM Board Layouts ................................................................................... 15
5.2
TPA3244EVM Board Dimension ................................................................................ 17
5.3
Bill of Materials .................................................................................................... 18
5.4
TPA3244EVM Schematic ........................................................................................ 21
List of Figures
1
TPA3244EVM ................................................................................................................ 3
2
Type-2 Filter for BD or AD Modulation .................................................................................... 5
3
TPA3244EVM LC Filter Cutoff Frequency
4
5
6
7
8
9
10
............................................................................... 6
TPA3244EVM Connections ................................................................................................ 7
TPA3245EVM THD + N vs Output Power 30 V, BTL 4 Ω, 600 kHz ................................................ 14
TPA3244EVM Top Composite Assembly ............................................................................... 15
TPA3244EVM Bottom Composite Assembly ........................................................................... 16
TPA3244EVM Board Dimension ......................................................................................... 17
TPA3244EVM Schematic 1 ............................................................................................... 21
TPA3244EVM Schematic 2 ............................................................................................... 22
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TPA3244EVM Schematic 3 ............................................................................................... 23
List of Tables
1
Frequency Adjust Master Mode Selection ................................................................................ 4
2
Fault and Clip Overtemperature Status ................................................................................... 5
3
Stereo BTL Default Jumper States ........................................................................................ 8
4
Mode Selection Pins ....................................................................................................... 10
5
SE + 1 BTL Default Jumper States ...................................................................................... 10
6
PBTL Default Jumper States
7
SE 4.0 Default Jumper States ............................................................................................ 13
8
Bill of Materials
.............................................................................................
.............................................................................................................
12
18
Trademarks
PurePath is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
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Hardware Overview
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1
Hardware Overview
The TPA3244EVM PurePath™ Ultra-HD evaluation module demonstrates the TPA3244DDW integrated
circuit from Texas Instruments. The TPA3244DDW is a high-performance, high-power, class-D amplifier
that enables true premium sound quality with high-efficiency class-D technology. It features an advance
integrated feedback design and high-speed gate driver error correction (PurePath Ultra-HD), which
enables ultra-low distortion across the audio band and superior audio quality. This EVM supports two BTL
(stereo 2.0) output channels, one PBTL (mono 0.1) output channel, one BTL plus two SE (2.1) output
channels, and four SE (4.0) output channel configurations. The NE5532 is a high-performance audio op
amp designed to allow TPA3244DDW operation with differential or single-ended input signals to the EVM
with differential inputs yielding the optimal performance. The TPA3244EVM is a complete 2-VRMS analog
input 2 × 40-W continuous/2 × 100-W peak stereo high-power amplifier ready for evaluation and excellent
listening experience.
Figure 1. TPA3244EVM
1.1
TPA3244EVM Features
The TPA3244EVM has following features:
• Stereo PurePath Ultra-HD evaluation module
• Self-contained protection system (short circuit, clip, and thermal)
• Standard 4-VRMS differential input or 2-V single-ended line input
• BTL, PBTL, and SE output configuration support
• Frequency adjust and oscillator sync interface
• Single supply voltage range 14–31.5 V
• Double-sided, plated-through, 2-oz Cu, 2-layer PCB layout
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Hardware Overview
1.2
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TPA3244EVM Frequency Adjust
The TPA3244EVM offers hardware trimmed oscillator frequency by external control of the FREQ_ADJ pin.
The Frequency adjust can be used to reduce interference problems while using a radio receiver tuned
within the AM band, the switching frequency can be changed from nominal to lower values. These values
should be chosen such that the nominal and the lower value switching frequencies together results in the
fewest cases of interference throughout the AM band. The oscillator frequency can be selected by the
value of the FREQ_ADJ resistor connected to GND in master mode according to Table 1.
Table 1. Frequency Adjust Master Mode Selection
Master Mode
Resistor to GND
PWM Frequency
Nominal
10 kΩ
600 kHz
AM1
20 kΩ
500 kHz
AM2
30 kΩ
450 kHz
For slave-mode operation, turn off the oscillator by pulling the FREQ_ADJ pin to DVDD. This configures
the OSC_I/O pins as inputs to be slaved from an external differential clock. In a master/slave system interchannel delay is automatically set up between the switching phases of the audio channels, which can be
illustrated by no idle channels switching at the same time. This will not influence the audio output, but only
the switch timing to minimize noise coupling between audio channels through the power supply. This will
optimize audio performance and result in better operating conditions for the power supply. The interchannel delay will be set up for a slave device depending on the polarity of the OSC_I/O connection such
that slave mode 1 is selected by connecting the OSC_I/O of the master device with the OSC_I/O of the
slave device with the same polarity (+ to + and – to –), while slave mode 2 is selected by connecting the
OSC_I/O's with the inverse polarity (+ to – and – to +).
1.3
TPA3244EVM Single-Ended and Differential Input
The TPA3244EVM supports both differential and single-ended inputs. For single-ended inputs, J4 or J19
jumpers are set to the SE position, so that the TPA3244EVM uses the NE5532 to convert the singleended input signal to differential to properly drive the differential inputs of the TPA3244. The input RCA
jack, J3, is used to provide INA inputs and RCA jack J14 is used to provide INB inputs. RCA jack J18 is
used to provide INC inputs and RCA jack J15 is used to provide IND inputs with differential inputs.
For differential input operation, J4 or J19 jumpers are set to the DIFF position, and the TPA3244EVM uses
the NE5532 to buffer the differential input signal to the differential inputs of the TPA3244. The input RCA
jack, J3, is used to provide INA, RCA jack J14 provides INB, RCA jack J18 provides INC, and RCA jack
J15 provides IND with differential inputs.
NOTE: 1. Single-ended input settings on the TPA3244EVM should only be used for channels with
output configuration BTL or PBTL, not SE. However, for best performance, a differential input
should be used when in BTL or PBTL modes.wever, for best performance, a differential inpu
2. For SE output configuration J4 or J19 jumpers for that channel must be set to the DIFF
position, so the input signal INx is mapped directly to OUTx.
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1.4
TPA3244EVM Clip Overtemperature and Fault Indicators
The TPA3244EVM is equipped with LED indicators that illuminate when the FAULT or CLIP_OTW pin
goes low. See Table 2 and the TPA3244 data sheet (SLASEC6) for more details.
Table 2. Fault and Clip Overtemperature Status
1.5
FAULT
CLIP_OTW
Description
0
0
Overtemperature (OTE) or overload (OLP) or undervoltage (UVP). Junction temperature higher
than 125°C (overtemperature warning).
0
0
Overload (OLP) or undervoltage (UVP). Junction temperature higher than 125°C (overtemperature
warning).
0
1
Overload (OLP) or undervoltage (UVP). Junction temperature lower than 125°C.
1
0
Junction temperature higher than 125°C (overtemperature warning)
1
1
Junction temperature lower than 125°C and no OLP or UVP faults (normal operation)
TPA3244EVM LC Filter
The TPA3244EVM is equipped 10-µH inductors and 1-µF capacitors for the output LC filter. These
components are setup as a Type-2 filter shown in Figure 2, since this allows the support of both BTL and
SE output configurations required for the EVM.
LBTL
Vout+
Cg
+
Vout
RBTL
_
Vout Cg
LBTL
Figure 2. Type-2 Filter for BD or AD Modulation
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This filter has the following frequency response under the loading conditions listed in Figure 3.
Figure 3. TPA3244EVM LC Filter Cutoff Frequency
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TPA3244EVM Setup
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TPA3244EVM Setup
This section describes the TPA3244EVM hardware setup and connection.
2.1
TPA3244EVM Setup
Figure 4 illustrates the TPA3244EVM connections.
Figure 4. TPA3244EVM Connections
2.2
Hardware Requirements
The following hardware is required for this EVM:
• TPA3244EVM
• Power supply 5–14 A/14–31.5 VDC
• Two 2–8 Ω (approximately 200 W) speaker and resistor loads
• Four speaker/banana cables
• RCA input cables
• Analog output audio source
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TPA3244EVM Setup
2.3
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Hardware Default Setup BTL (2.0)
BTL (2.0) default hardware setup is as follows:
• Remove the EVM from the ESD bag.
• Check that jumpers are in their default state as shown in Figure 1 and Table 3 for stereo BTL
operation:
Table 3. Stereo BTL Default Jumper States
•
•
•
•
•
•
•
•
•
•
•
8
Jumper
Setting
J29
IN
Comment
PVDD to 15-V Buck
J31
IN
12-V LDO to 12-V terminal
J32
IN
3.3-V LDO to 3.3-V terminal
J33
IN
3.3-V LDO to 3.3-V terminal
J21
OUT
CSTART SE
J16
3 to 4
Master mode
J5
2 to 3
M1 – BTL
J6
2 to 3
M2 – BTL
J22
IN
OUTA capacitor shunt
J23
IN
OUTB capacitor shunt
J24
IN
OUTC capacitor shunt
J25
IN
OUTD capacitor shunt
J26
2 to 3
INC select
J27
2 to 3
IND select
J7
OUT
PBTL select INC
J8
OUT
PBTL select IND
J10
OUT
INC/D DIFF input
J12
OUT
INC/D DIFF input
J4
1 to 2
INA/B SE input
J19
1 to 2
INC/D SE input
Set S1 to the RESET position.
Set power supply to 30 V (14- to 31.5-V range) and current to 10 A (5- to 14-A range). Do not power
up until all connections are completed.
Connect power supply to TPA3244EVM positive terminal to PVDD (RED) and negative terminal to
GND (BLACK).
Connect left channel speaker/power resistor load (4–8 Ω) to TPA3244EVM positive output terminal to
OUTA (RED) and AP analog input channel A positive terminal.
Connect left channel speaker/power resistor load (4–8 Ω) to TPA3244EVM negative output terminal to
OUTB (BLACK) and AP analog input channel A negative terminal.
Connect right channel speaker/power resistor load (4–8 Ω) to TPA3244EVM positive output terminal to
OUTC (RED) and AP analog input channel B positive terminal.
Connect right channel speaker/power resistor load (4–8 Ω) to TPA3244EVM negative output terminal
to OUTD (BLACK) and AP analog input channel B negative terminal.
Be careful not to mix up PVDD and OUTA and OUTB terminals, since the colors are the same (RED).
For single-ended stereo inputs, connect AP channel A XLR to RCA male jacks to female RCA jacks
input A/AB (RED) and AP channel B XLR to RCA male jacks to female RCA jacks input C/CD (WHITE)
and set J4 and J19 jumper positions to SE.
For differential stereo inputs, connect the positive RCA male jacks to female RCA jack input A/AB
(RED) and input C/CD (WHITE) and connect negative RCA male jacks to female RCA jacks input B
(BLUE) and input D (BLACK) and set J4 and J19 jumper positions to DIFF.
Power up the power supply once all the connections are made correctly and the 3.3-V and 12-V LEDs
(GREEN) illuminate.
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•
•
Set S1 to the NORMAL position.
CLIP_OTWz (ORANGE) and FAULTz (RED) LEDs should be off, if the audio source is off.
NOTE: J3/J10 and J18/J15 can be used for differential inputs to INA/INB and INC/IND, respectively.
Using a smart phone, tablet, or PC with headphone to RCA cable, audio streaming via headphone jack
can begin once the EVM is powered up correctly with jumpers in their default state. Start the media player
of your choice and enjoy the enhanced audio performance the TPA3244 provides as a quick check of the
setup.
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Using the TPA3244EVM in Different Output Configurations
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Using the TPA3244EVM in Different Output Configurations
The TPA3244EVM can be configured for four different output operations. The 2.0 BTL configuration is the
default setup of the TPA3244EVM described in Section 2.3. The remaining three configurations are 2.1
BTL plus two single-ended (SE) outputs, 0.1 PBTL output, and 4.0 single-ended (SE) outputs.
Table 4. Mode Selection Pins
Mode Pins
3.1
Input Mode
Output Configuration Description
M2
M1
0
0
2N + 1
2 × BTL
0
1
2N/1N + 1
1 × BTL + 2 × SE
1
0
2N + 1
1 × PBTL
1
1
1N + 1
4 × SE
Stereo BTL output configuration
2.1 BTL + SE mode. Channel AB: BTL, channel C + D: SE
Paralleled BTL configuration. Connect INPUT_C and INPUT_D to
GND.
Single-ended output configuration
BTL Plus Two SE (2.1) Operation
Configure the EVM as follows for 2 SE + 1 BTL operation:
Table 5. SE + 1 BTL Default Jumper States
•
•
•
•
•
•
10
Jumper
Setting
Comment
J29
IN
PVDD to 15-V Buck3
J31
IN
12-V LDO to 12-V terminal
J32
IN
3.3-V LDO to 3.3-V terminal
J33
IN
3.3-V LDO to 3.3-V terminal
J21
IN
CSTART SE
J16
3 to 4
Master mode
J5
1 to 2
M1 – 2XSE + BTL
J6
2 to 3
M2 - 2XSE + BTL
J22
IN
OUTA capacitor shunt
J23
IN
OUTB capacitor shunt
J24
OUT
OUTC capacitor shunt
J25
OUT
OUTD capacitor shunt
J26
2 to 3
INC select
J27
2 to 3
IND select
J7
OUT
PBTL select INC
J8
OUT
PBTL select IND
J10
OUT
INC/D DIFF input
J12
OUT
INC/D DIFF input
J4
1 to 2
INA/B SE input
J19
1 to 2
INC/D SE input
Set J6 to L and J5 to H.
Connect left (stereo) speaker/power resistor load (2–4 Ω) positive terminal to OUTC and remove
jumper J24.
Connect right (stereo) speaker/power resistor load (2–4 Ω) positive terminal to OUTD and remove
jumper J25.
Connect subwoofer (mono) speaker/power resistor load (4–8 Ω) positive terminal to OUTA and
negative terminal to OUTB.
Set J19 jumper position to DIFF.
Connect left (stereo) channel input to female RCA jack input C/CD (WHITE) for OUTC speaker.
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•
•
•
Connect right (stereo) channel input to female RCA jack input D (BLACK) for OUTD speaker.
For single-ended subwoofer (mono) input, connect RCA male jack to female RCA jack input A/AB
(RED) and set J4 jumper positions to SE.
For differential subwoofer (mono) inputs, connect positive RCA male jack to female RCA jack input
A/AB (RED) and connect negative RCA male jack to female RCA jack input B (YELLOW) and set J4
jumper positions to DIFF.
NOTE: OUTC and OUTD are the single-ended output channels and OUTA and OUTB are the BTL
channel for 2.1 operations.
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PBTL (0.1) Output Operation
Configure the EVM as follows for PBTL operations:
Table 6. PBTL Default Jumper States
•
•
•
•
•
•
Jumper
Setting
J29
IN
Comment
PVDD to 15-V Buck
J31
IN
12-V LDO to 12-V terminal
J32
IN
3.3-V LDO to 3.3-V terminal
J33
IN
3.3-V LDO to 3.3-V terminal
J21
OUT
CSTART SE
J16
3 to 4
Master mode
J5
2 to 3
M1 – PBTL
J6
1 to 2
M2 – PBTL
J22
IN
OUTA capacitor shunt
J23
IN
OUTB capacitor shunt
J24
IN
OUTC capacitor shunt
J25
IN
OUTD capacitor shunt
J26
2 to 3
INC select
J27
2 to 3
IND select
J7
2 to 3
PBTL select INC – GND
J8
2 to 3
PBTL select IND – GND
J10
OUT
INC/D DIFF input
J12
OUT
INC/D DIFF input
J4
1 to 2
INA/B SE input
J19
1 to 2
INC/D SE input
Set J6 to H and J5 to L.
Connect speaker/power resistor (2–4 Ω) positive terminal to OUTA and OUTC (OUT A and C shorted).
Connect speaker/power resistor (2–4 Ω) negative terminal to OUTB and OUTD (OUT B and D
shorted).
Install PBTL jumpers J7 and J8 (pulls input C and input D to GND).
For single-ended mono input, connect RCA male jack to female RCA jack input A/AB (RED) and set
J4 jumper positions to SE.
For differential mono inputs, connect positive RCA male jack to female RCA jack input A/AB (RED)
and connect negative RCA male jack to female RCA jack input B (YELLOW) and set J4 jumper
position to DIFF.
NOTE: INA and INB are the inputs for PBTL and INC and IND are grounded for PBTL operation.
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3.3
Single-Ended (SE) Output (4.0) Operation
Configure the EVM as follows for 4 single-ended operations:
Table 7. SE 4.0 Default Jumper States
•
•
•
•
•
•
•
•
•
•
Jumper
Setting
J29
IN
Comment
PVDD to 15-V Buck
J31
IN
12-V LDO to 12-V terminal
J32
IN
3.3-V LDO to 3.3-V terminal
J33
IN
3.3-V LDO to 3.3-V terminal
J21
IN
CSTART SE
J16
3 to 4
Master mode
J5
1 to 2
M1 – 4XSE
J6
1 to 2
M2 – 4XSE
J22
OUT
OUTA capacitor shunt
J23
OUT
OUTB capacitor shunt
J24
OUT
OUTC capacitor shunt
J25
OUT
OUTD capacitor shunt
J26
2 to 3
INC select
J27
2 to 3
IND select
J7
OUT
PBTL select INC
J8
OUT
PBTL select IND
J10
OUT
INC/D DIFF input
J12
OUT
INC/D DIFF input
J4
2 to 3
INA/B DIFF input
J19
2 to 3
INC/D DIFF input
Set J6 to H and J5 to H.
Connect speaker/power resistor (2–4 Ω) positive terminal to OUTA and Ground. Remove jumper J22.
Connect speaker/power resistor (2–4 Ω) positive terminal to OUTB and Ground. Remove jumper J23.
Connect speaker/power resistor (2–4 Ω) positive terminal to OUTC and Ground. Remove jumper J24.
Connect speaker/power resistor (2–4 Ω) positive terminal to OUTD and Ground. Remove jumper J25.
Set both J4 and J19 jumper positions to DIFF.
Connect input to female RCA jack input A/AB (RED) for OUTA speaker.
Connect input to female RCA jack input B (YELLOW) for OUTB speaker.
Connect input to female RCA jack input C/CD (WHITE) for OUTC speaker.
Connect input to female RCA jack input D (BLACK) for OUTD speaker.
NOTE: The performance of the TPA3244EVM/TPA3244 is dependent on the power supply. Design
the power supply with margins that can deliver the needed power. In low-frequency
applications, additional bulk capacitance may be needed. Replacing the bulk capacitors on
the TPA3244EVM with more capacitance may be necessary, depending on the power supply
used.
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Optional Inductors
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Optional Inductors
The TPA3244EVM includes component pads for optional output inductors L8 and L9. These pads fit
Coilcraft inductors UA8013-AL (7 µH) and UA8014-AL (10 µH). These dual-core inductors provide
extremely high performance in a small footprint to help shrink the solution size and cost. If using L8 and
L9, make sure to de-solder L2, L3, L4, and L5 first.
The plot in Figure 5 shows THD + N vs. output power for the TPA3245EVM (Pad-Up version of the
TPA3244) using the standard toroid inductors and the Coilcraft UA8013-AL (7 µH) and UA8014-AL (10
µH).
10
MA5172-AE 10 PH
UA8013-AL 7 PH Dual Inductor
UA8014-AL 10 PH Dual Inductor
THD + N (%)
1
0.1
0.01
0.001
0.01
0.1
1
10
100
Watts
200
D001
Figure 5. TPA3245EVM THD + N vs Output Power 30 V, BTL 4 Ω, 600 kHz
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Board Layouts, Bill of Materials, and Schematic
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Board Layouts, Bill of Materials, and Schematic
5.1
TPA3244EVM Board Layouts
Figure 6 and Figure 7 illustrate the board layouts for the EVM.
Figure 6. TPA3244EVM Top Composite Assembly
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Board Layouts, Bill of Materials, and Schematic
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Figure 7. TPA3244EVM Bottom Composite Assembly
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5.2
TPA3244EVM Board Dimension
Figure 8 illustrates the TPA3244EVM board dimensions 160 mm × 120 mm (image represented here is
not actual size).
Figure 8. TPA3244EVM Board Dimension
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Board Layouts, Bill of Materials, and Schematic
5.3
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Bill of Materials
Table 8 displays the BOM for this EVM.
Table 8. Bill of Materials
Designator
Qty
Value
!PCB1
1
C1
1
0.047uF
C2, C9, C13, C14,
C15, C22, C51, C67,
C68, C69, C72, C82,
C90
13
0.1uF
C3, C83, C84
3
1uF
C4
1
2.2uF
C5
1
C6
Description
Package Reference
Printed Circuit Board
Part Number
Manufacturer
AAP071
Any
CAP, CERM, 0.047 µF, 25 V, +/- 10%, X7R, 0402
0402
GRM155R71E473KA88D
Murata
CAP, CERM, 0.1 µF, 50 V, +/- 10%, X7R, 0603
0603
C0603C104K5RACTU
Kemet
CAP, CERM, 1 µF, 50 V, +/- 10%, X7R, 0603
0603
UMK107AB7105KA-T
Taiyo Yuden
CAP, CERM, 2.2 µF, 50 V, +/- 10%, X7R, 0805
0805
C2012X7R1H225K125AC
TDK
47uF
CAP, AL, 47 µF, 16 V, +/- 20%, 0.36 ohm, SMD
SMT Radial D
EEE-FK1C470P
Panasonic
1
4.7uF
CAP, CERM, 4.7 µF, 25 V, +/- 10%, X7R, 1206
1206
GRM31CR71E475KA88L
Murata
C7
1
5600pF
CAP, CERM, 5600 pF, 50 V, +/- 10%, X7R, 0603
0603
GRM188R71H562KA01D
Murata
C8, C50
2
0.47uF
CAP, CERM, 0.47 µF, 25 V, +/- 10%, X7R, 0603
0603
GRM188R71E474KA12D
Murata
C10
1
100uF
CAP, AL, 100 µF, 6.3 V, +/- 20%, 0.7 ohm, SMD
SMT Radial C
EEE-FK0J101UR
Panasonic
C11, C26, C37, C45,
C61
5
0.01uF
CAP, CERM, 0.01 µF, 50 V, +/- 10%, X7R, 0603
0603
C0603C103K5RACTU
Kemet
C12
1
4700pF
CAP, CERM, 4700 pF, 50 V, +/- 10%, X7R, 0603
0603
C0603X472K5RACTU
Kemet
C16, C53, C70, C81,
C89, C91
6
10uF
CAP, CERM, 10 µF, 16 V, +/- 10%, X5R, 0805
0805
EMK212BJ106KG-T
Taiyo Yuden
C17, C28, C55, C63
4
10uF
CAP, CERM, 10 µF, 16 V, +/- 10%, X7R, 1206
1206
GRM31CR71C106KAC7L
Murata
C18, C23, C57, C65
4
22pF
CAP, CERM, 22 pF, 50 V, +/- 5%, C0G/NP0, 0603
0603
GRM1885C1H220JA01D
Murata
C19, C30, C58, C64
4
100pF
CAP, CERM, 100 pF, 50 V, +/- 5%, C0G/NP0, 0603
0603
GRM1885C1H101JA01D
Murata
C20, C38, C62, C66,
C71
5
10uF
CAP, AL, 10 µF, 16 V, +/- 20%, 1.35 ohm, SMD
SMT Radial B
EEE-FK1C100R
Panasonic
C21, C34, C42, C56
4
1500uF
CAP, AL, 1500 µF, 63 V, +/- 20%, 0.03 ohm, AEC-Q200 Grade 2, TH
Dia 18mm
EEU-FC1J152
Panasonic
C24, C35, C43, C59
4
1uF
CAP, Film, 1 µF, 250 V, +/- 5%, TH
18x9.5x17.5mm
PHE426HB7100JR06
Kemet
C25, C36, C44, C60
4
1000pF
CAP, CERM, 1000 pF, 50 V, +/- 1%, C0G/NP0, 0603
0603
GRM1885C1H102FA01J
Murata
C27, C29, C52, C54
4
0.033uF
CAP, CERM, 0.033 µF, 25 V, +/- 10%, X7R, 0603
0603
GRM188R71E333KA01D
Murata
C31, C46
2
2200uF
CAP, AL, 2200 µF, 50 V, +/- 20%, 0.023 ohm, AEC-Q200 Grade 2, TH
Dia 18mm
EEU-FC1H222
Panasonic
C32, C33, C47, C48
4
1uF
CAP, CERM, 1 µF, 50 V, +/- 10%, X7R, 1206
1206
GRM31MR71H105KA88L
Murata
C39
1
47uF
CAP, AL, 47 µF, 50 V, +/- 20%, 0.68 ohm, SMD
SMT Radial E
EEE-FK1H470P
Panasonic
C40, C41
2
1uF
CAP, CERM, 1 µF, 16 V, +/- 10%, X7R, 0603
0603
GRM188R71C105KA12D
Murata
C49
1
0.047uF
CAP, CERM, 0.047 µF, 50 V, +/- 10%, X7R, 0603
0603
GRM188R71H473KA61D
Murata
D1
1
100V
Diode, Schottky, 100 V, 1 A, SMA
SMA
B1100-13-F
Diodes Inc.
D2
1
Orange
LED, Orange, SMD
LED_0805
LTST-C170KFKT
Lite-On
D3
1
100V
Diode, Schottky, 100 V, 3 A, SMA
SMA
SK310A-TP
Micro Commercial Components
D4
1
Red
LED, Red, SMD
Red 0805 LED
LTST-C170KRKT
Lite-On
D5, D6
2
Green
LED, Green, SMD
LED_0805
LTST-C171GKT
Lite-On
H1, H2, H3, H4, H5
5
MACHINE SCREW PAN PHILLIPS M3
M3 Screw
RM3X8MM 2701
APM HEXSEAL
H6, H7, H8, H9, H10
5
Standoff, Hex,25mm Length, M3, Aluminum
Standoff M3
24438
Keystone
18
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Table 8. Bill of Materials (continued)
Designator
Description
Package Reference
Part Number
Manufacturer
J1, J2, J9
Qty
3
Value
Dual Binding Posts with Base, 2x1, TH
Dual Binding Posts with Base,
2x1, TH
6883
Pomona Electronics
J3
1
RCA Jack, Vertical, Red, TH
RCA JACK, RED
RCJ-022
CUI Inc.
J4, J5, J6, J19, J26,
J27
6
Header, 100mil, 3x1, Gold, TH
PBC03SAAN
PBC03SAAN
Sullins Connector Solutions
J7, J8, J21, J29,
J30, J32, J33
7
Header, 100mil, 2x1, Gold, TH
Sullins 100mil, 1x2, 230 mil
above insulator
PBC02SAAN
Sullins Connector Solutions
J10, J12
2
Header, 2.54 mm, 3x1, TH
Header, 2.54mm, 3x1, TH
22-11-2032
Molex
J11, J20
2
Binding Post, BLACK, TH
11.4x27.2mm
7007
Keystone
J14
1
RCA Jack, Vertical, Black, TH
RCA Jack, Vertical, Black, TH
RCJ-021
CUI Inc.
J15
1
RCA Jack, Vertical, Blue, TH
RCA Jack, Vertical, Blue, TH
RCJ-025
CUI Inc.
J16
1
Header, 100mil, 4x2, Tin, TH
Header, 4x2, 100mil, Tin
PEC04DAAN
Sullins Connector Solutions
J17
1
Header (friction lock), 100mil, 4x1, Gold, TH
Header 4x1 keyed
0022112042
Molex
J18
1
RCA Jack, Vertical, White, TH
RCA JACK, WHITE
RCJ-023
CUI Inc.
J22, J23, J24, J25,
J31
5
JUMPER TIN SMD
6.85x0.97x2.51 mm
S1911-46R
Harwin
J28
1
Receptacle, 100mil, 14x2, Gold, TH
14x2 Receptacle
SSW-114-01-G-D
Samtec
L1
1
100uH
Inductor, Shielded Drum Core, Ferrite, 100 µH, 1.5 A, 0.165 ohm, SMD
SMD
7447714101
Wurth Elektronik
L2, L3, L4, L5
4
10uH
Inductor, Toroid, Powdered Iron, 10 µH, 6.1 A, 0.026 ohm, TH
28.6x12.3mm
MA5172-AE
Coilcraft
L6
1
10uH
Inductor, Wirewound, 10 µH, 0.8 A, 0.204 ohm, SMD
2-Pin SMD, Body 4 x 4 mm,
Height 1.2 mm
NRS4012T100MDGJV
Taiyo Yuden
L7
1
10uH
Inductor, Wirewound, 10 µH, 0.08 A, 0.36 ohm, SMD
0603
GLFR1608T100M-LR
TDK
Q1, Q2
2
60V
MOSFET, N-CH, 60 V, 0.17 A, SOT-23
SOT-23
2N7002-7-F
Diodes Inc.
R1, R3, R4, R12,
R30, R44, R46
7
0
RES, 0, 5%, 0.1 W, 0603
0603
CRCW06030000Z0EA
Vishay-Dale
R2
1
182k
RES, 182 k, 1%, 0.125 W, 0805
0805
ERJ-6ENF1823V
Panasonic
R5, R10, R19, R23,
R33, R35
6
100
RES, 100, 1%, 0.1 W, 0603
0603
CRCW0603100RFKEA
Vishay-Dale
R6
1
100k
RES, 100 k, 1%, 0.1 W, 0603
0603
CRCW0603100KFKEA
Vishay-Dale
R7, R8, R20, R21,
R25, R27, R37, R38,
R41, R42
10
10.0k
RES, 10.0 k, 0.1%, 0.1 W, 0603
0603
RT0603BRD0710KL
Yageo America
R9, R43, R45, R48
4
100k
RES, 100 k, 1%, 0.063 W, 0402
0402
CRCW0402100KFKED
Vishay-Dale
R11, R14, R18, R22
4
3.3
RES, 3.3, 5%, 0.1 W, 0603
0603
CRCW06033R30JNEA
Vishay-Dale
R13
1
22.0k
RES, 22.0 k, 1%, 0.1 W, 0603
0603
RC0603FR-0722KL
Yageo America
R15
1
30.0k
RES, 30.0 k, 1%, 0.1 W, 0603
0603
RC0603FR-0730KL
Yageo America
R16
1
20.0k
RES, 20.0 k, 1%, 0.1 W, 0603
0603
RC0603FR-0720KL
Yageo America
R17, R36, R52
3
10.0k
RES, 10.0 k, 1%, 0.1 W, 0603
0603
CRCW060310K0FKEA
Vishay-Dale
R24, R28
2
47k
RES, 47 k, 5%, 0.1 W, 0603
0603
RC0603JR-0747KL
Yageo America
R26
1
3.30k
RES, 3.30 k, 1%, 0.1 W, 0603
0603
RC0603FR-073K3L
Yageo America
R29, R31
2
1.00k
RES, 1.00 k, 1%, 0.1 W, 0603
0603
CRCW06031K00FKEA
Vishay-Dale
R32
1
9.10k
RES, 9.10 k, 1%, 0.1 W, 0603
0603
RC0603FR-079K1L
Yageo America
R34
1
360
RES, 360, 5%, 0.063 W, 0402
0402
CRCW0402360RJNED
Vishay-Dale
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Board Layouts, Bill of Materials, and Schematic
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Table 8. Bill of Materials (continued)
Designator
Qty
Value
Description
Package Reference
Part Number
Manufacturer
R39
1
4.99k
RES, 4.99 k, 1%, 0.063 W, 0402
0402
CRCW04024K99FKED
Vishay-Dale
R40
1
1.00k
RES, 1.00 k, 1%, 0.063 W, 0402
0402
CRCW04021K00FKED
Vishay-Dale
R57
1
1.00k
RES, 1.00 k, 1%, 0.1 W, 0402
0402
ERJ-2RKF1001X
Panasonic
R58
1
1.50k
RES, 1.50 k, 1%, 0.063 W, 0402
0402
CRCW04021K50FKED
Vishay-Dale
S1
1
Switch, SPDT, On-On, 2 Pos, TH
Switch, 7x4.5mm
200USP1T1A1M2RE
E-Switch
SH1, SH2, SH3,
SH4, SH5, SH6,
SH7, SH8, SH9,
SH10, SH11, SH12,
SH13
13
Shunt, 100mil, Gold plated, Black
Shunt
969102-0000-DA
3M
U1
1
High Voltage 1A Step Down Switching Regulator, 10-pin LLP, Pb-Free
SDC10A
LM5010ASD/NOPB
Texas Instruments
U2
1
1A Low Dropout Regulator, 4-pin SOT-223, Pb-Free
MP04A
LM2940IMP-12/NOPB
Texas Instruments
U3
1
FIXED LOW-DROPOUT VOLTAGE REGULATOR, DCY0004A
DCY0004A
TLV1117-33IDCY
Texas Instruments
U4
1
40-W Stereo, 100-W peak PurePath™ Ultra-HD Pad Down Class-D Amplifier, DDW0044D
DDW0044D
TPA3244DDWR
Texas Instruments
U5, U6
2
Dual Low-Noise Operational Amplifier, 10 to 30 V, 0 to 70 degC, 8-pin SOIC (D0008A),
Green (RoHS & no Sb/Br)
D0008A
NE5532ADR
Texas Instruments
U7
1
ULTRA-SMALL SUPPLY VOLTAGE SUPERVISORS, DCK0005A
DCK0005A
TPS3802K33DCKR
Texas Instruments
C73, C74, C75, C76
0
22pF
CAP, CERM, 22 pF, 50 V, +/- 5%, C0G/NP0, 0603
0603
GRM1885C1H220JA01D
Murata
C77, C78, C79, C80
0
1uF
CAP, CERM, 1 µF, 50 V, +/- 10%, X7R, 1206
1206
GRM31MR71H105KA88L
Murata
C85, C86, C87, C88
0
1000pF
CAP, CERM, 1000 pF, 50 V, +/- 1%, C0G/NP0, 0603
0603
GRM1885C1H102FA01J
Murata
FID1, FID2, FID3,
FID4, FID5, FID6
0
Fiducial mark. There is nothing to buy or mount.
N/A
N/A
N/A
J13
0
Header, 100mil, 2x1, Gold, TH
Sullins 100mil, 1x2, 230 mil
above insulator
PBC02SAAN
Sullins Connector Solutions
L8, L9
0
5uH
Coupled inductor, 5 µH, 16.6 A, 0.006 ohm, SMD
15.5x14mm
RA7231-ALB
Coilcraft
R47, R49, R50, R51
0
18.0k
RES, 18.0 k, 1%, 0.1 W, 0603
0603
RC0603FR-0718KL
Yageo America
R53, R54, R55, R56
0
2.7
RES, 2.7, 5%, 3 W, SM_3, 10.5x5x5.5mm
SM_3, 10.5x5x5.5mm
SMW32R7JT
TE Connectivity
R59, R60, R61, R62
0
10.0
RES, 10.0, 1%, 0.1 W, 0603
0603
CRCW060310R0FKEA
Vishay-Dale
R63, R64, R65, R66
0
0
RES, 0, 5%, 0.1 W, 0603
0603
CRCW06030000Z0EA
Vishay-Dale
R67
0
0
RES, 0, 5%, 0.125 W, 0805
0805
ERJ-6GEY0R00V
Panasonic
TP1, TP2, TP3, TP4,
TP5, TP6, TP7, TP8,
TP9, TP10, TP11,
TP12, TP13, TP14
0
Test Point, Multipurpose, Grey, TH
Grey Multipurpose Testpoint
5128
Keystone
TP15,
TP18,
TP21,
TP24,
TP27,
0
Testpoint
Test Point, 0.45mm hole size
TP_H0.45P0.75
Texas Instruments
20
TP16,
TP19,
TP22,
TP25,
TP28
TP17,
TP20,
TP23,
TP26,
1x2
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5.4
TPA3244EVM Schematic
The schematics for TPA3244EVM are illustrated in Figure 9 through Figure 11.
C18
C20
LEFT+
INA-RCA
R9
INPUT SE A
SE AB
DIFF A+
GND
<- ROUTED GROUND
INB
LEFT-
2
3
18.0k
DNP
OUTA
22pF
DNP
DNP
From DUT
<- ROUTED GROUND
VMID
R42
U5A
2
1
R12
7
5
VMID
NE5532ADR
100k
C74
U5B
6
10.0k
3
R43
INPUT SE B
DIFF A-
DNP
10.0k
NE5532ADR
4
RCA INPUT
C73
R41
INB-RCA
1
R47
22pF
+12V-OA
1
2
3
GND
J14
R8
10.0k
10.0k
10µF
J10
100k
8
2
3
10µF
C23
R7
R49
0
22pF
DNP
DNP
DNP
OUTB
18.0k
DNP
C28
4
1
INA/AB
RCA INPUT
INB
GND
To DUT
INA
0
8
J3
C17
R4
22pF
To DUT
10µF
<- ROUTED GROUND
J4
GND
1
2
3
C71
SE
DIFF
10µF
SPKB-OUT
SPKA-OUT
SPKB-OUT
RESET
FROM DUT
R57
RESET-SW
3.3V
1.00k
RST-AIB
CLIP_OTW
FAULT
SPKD-OUT
J7
R36
10.0k
INA-EXT
INB-EXT
INA-EXT
INB-EXT
SPKA-OUT
PVDD
1
0
3 R67
DNP
5 DNP
3.3V
+12V
7
9
11
13
15
17
19
21
23
25
SPKC-OUT
27
2
4
6
8
10
12
14
16
18
20
22
24
26
28
R63
0 DNP
DNP
R64
0 DNP
DNP
INC
PBTL
SELECT
AUDIO
AIB
ALIGNMENT
HEADER
INTERFACE
J30
BOARD
GND
J8
R52
SPKC-OUT
SPKD-OUT
GND
R65
0 DNP
DNP
R66
0 DNP
DNP
10.0k
IND
INC-EXT
IND-EXT
INC-EXT
IND-EXT
GND
J28
GND
J26
INC SEL
GND
INA
INC
R20
INC
C65
R50
18.0k
DNP
DNP
C75
22pF
DNP
DNP
OUTC
+12V-OA
From DUT
INC/CD
2
3
VMID
U6A
2
10.0k
1
R45
100k
INPUT SE C
SE CD
DIFF C+
GND
J12
3
NE5532ADR
1
2
3
R27
GND
1
IND
2
3
RIGHT-
J27
IND SEL
7
5
NE5532ADR
VMID
<- ROUTED GROUND
R46
INB
0
IND
1
2
3
C76
DNP
22pF
DNP
OUTD
18.0k
DNP
C63
IND
To DUT
10µF
J19
GND
1
2
3
C66
J15
RCA INPUT
R51
U6B
6
10.0k
<- ROUTED GROUND
DNP
R25
INC-RCA
8
1
4
J18
4
RIGHT+
8
22pF
RCA INPUT
To DUT
10µF
0
R21
10.0k
10.0k
10µF
C55
R44
C57
22pF
C62
1
2
3
IND-RCA
SE
DIFF
10µF
R48
100k
INPUT SE D
DIFF C-
+12V
+12V-OA
L6
+12V-OA
VMID
R37
GND
<- ROUTED GROUND
10uH
0.8A
10.0k
C81
10µF
GND
C16
10µF
GND
C15
0.1uF
GND
C53
10µF
GND
C51
0.1uF
R38
10.0k
C91
10µF
C70
10µF
C72
0.1uF
C89
10µF
C90
0.1uF
GND
GND
GND
GND
GND
GND
GND
<- ROUTED GROUND TO AGND ON DUT (Pins 10/11)
Copyright © 2016, Texas Instruments Incorporated
Figure 9. TPA3244EVM Schematic 1
SLVUAT5 – November 2016
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Board Layouts, Bill of Materials, and Schematic
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Hi Current Shunt
+12V
PVDD
R3
0
C31
2200µF
50V
C14
0.1uF
C33
1µF
50V
L2
GND
DNP
TP8
DNP PVDD-CD
C85
DNP 1000pF
DNP
C30
100pF
GND
FROM ANALOG MUX
GND
GND
R19
DNP
GVDD_CD
0
INPUT_C
INC
DNP
C69
0.1uF
100
DNP
GVDD-AB
DNP
TP15
VDD
DNP
TP16
GVDD-CD
DNP
TP17
C58
100pF
GND
GND
DNP
R23
INPUT_D
IND
DNP
100
DNP
C64
100pF
DNP
GND
INA
DNP
TP20
INB
DNP
TP21
INC
DNP
TP22
IND
DNP
TP23
M1
J5
36
37
38
1µF
C41
1µF
22
VDD
21
GVDD_CD
DVDD
DNP DNP
TP18
AVDD
DNP DNP
TP19
12
INPUT_A
18
GND
1
9
BST_B
GND
GND
IN = SE
3.3V
M2
CSTART
C50
0.47µF
C49
0.047µF
M2
OUT_A
OUT_A
GND
GND
INPUT_A
INPUT_D
20
19
5
8
13
14
GND
OUT_B
C86
DNP 1000pF
DNP
OUT_C
40
39
BST_C
43
C52
0.033µF
44
C54
0.033µF
BST_D
CLIP_OTW
VBG
FAULT
CLIP_OTW
VBG
2
3
4
FAULT
0
2N + 1
2xBTL
STEREO BTL OUTPUT, AD MODE
0
1
2N/1N + 1
1xBTL + 2xSE
2.1 BTL + SE MODE, AD MODE
1
0
2N + 1
1xPBTL
PARALLEL BTL OUTPUT, AD MODE
1
1
1N + 1
4xSE
SINGLE ENDED OUTPUT, AD MODE
R14
3.3
GND
J11
GNDAB
J24
GND
GND
GND
DNP OUTD
TP9 DNP
L4
DNP TP11
OUTC DNP
C42
OC
OUTC
J2
10µH
DNP
DNP VBG
TP27
1500µF
63V
C43
1µF
250V
R61
DNP10.0
DNP
OC_ADJ
M1
M2
C37
0.01µF
50V
Hi Current Shunt
OUT_D
OUT_D
OUT_D
C36
1000pF
50V
GND
C44
1000pF
50V
C45
0.01µF
50V
C87
DNP 1000pF
DNP
L9
DNP
5µH
DNP
GND
R18
3.3
GND
Hi Current Shunt
RESET
GND
GND
GND
GND
GND
GND
GND
GND
PowerPAD
C_START
OSC_IOP
OSC_IOM
FREQ_ADJ
C68
0.1µF
42
41
34
33
26
25
11
10
45
J25
GND
GND
L5
GND
DNP
TP12
OUTD DNP
C56
OUT_D
OD
OUTD
10µH
TPA3244DDWR
1500µF
63V
C59
1µF
250V
R62
DNP10.0
DNP
GND
TP14
DNP FAULTz
DNP
TP6
DNP
DNP
C88
DNP 1000pF
DNP
C60
1000pF
50V
GND
C61
0.01µF
50V
J20
GNDCD
TP1
DNP CLIP_OTWz
GND
GND
R22
3.3
GND
R53
2.7
DNP
3W-4211
DNP
C77
1µF
DNP
GND
GND
DNP
DNP
GND
0
GND
R54
2.7
DNP
3W-4211
3.3V
R17
10.0k
R16
20.0k
TO
CONTROLLER
GND
2
4
6
8
1
3
5
7
SLAVE MODE
MASTER MODE
MASTER MODE AM1
MASTER MODE AM2
DNP
GND
TO DAUGHTERCARD
R55
2.7
DNP
3W-4211
CLIP_OTW
C79
1µF
DNP
OUTA
DNP
DNP
FAULT
30.0k
TO
ANALOG
MUX
C78
1µF
DNP
DNP
J16
R15
RESET-SW
35
TP10
OUTB DNP
OUTB
1500µF
63V
C35
1µF
250V
R60
DNP10.0
DNP
GND
4
3
2
1
DESCRIPTION
OUT_C
OB
10µH
DNP OUTA
TP2 DNP
OUT_C
DNP FREQ_ADJ
TP26
M1 INPUT MODE OUTPUT
32
OUT_B
OUT_A
28
27
DNP OUTB
TP5 DNP
J17
MODE PIN SELECTION
GND
DNP
C34
DNP OUTC
TP7 DNP
INPUT_C
M1
M2
J23
GND
OUT_B
DVDD
INPUT_B
15
MODE
SELECTION
0.033µF
GVDD_CD
6
DNP
C_START
OSCILLATOR
SYNC
INTERFACE
0.033µF
C29
AVDD
7
J21
OUT = BTL
C27
24
22.0k
DNP
TP28
DNP
R11
3.3
GND
L3
VDD
17
RESET
TP13
RESETz DNP
J6
23
GVDD_AB
INPUT_B
16
BST_A
PVDD_CD
PVDD_CD
PVDD_CD
INPUT_C
INPUT_D
OC-ADJ
DNP DNP
TP24
R13
M2
DNP
TP25
DNP
M1
C40
GVDD_AB
PVDD_AB
PVDD_AB
PVDD_AB
M1
M2
J9
C26
0.01µF
50V
Hi Current Shunt
1
R1
GND
3
29
30
31
GND
+12V
GND
L8
DNP
5µH
DNP
U4
C48
1µF
50V
4
INPUT_B
C47
1µF
50V
C25
1000pF
50V
2
C46
2200µF
50V
C22
0.1uF
100
1
2
3
OUTA
1500µF
63V
3
10µH
GND
R10
GND
1
GND
PVDD
L7
4
+12V
VDD
3.3V
OA
C24
1µF
250V
R59
DNP10.0
DNP
2
GND
C19
100pF
1
2
3
DNP TP3
OUTA DNP
C21
OUT_A
INPUT_A
100
INB
C32
1µF
50V
10µH
R5
INA
J22
DNP
TP4
DNP PVDD-AB
GVDD_AB
OUTB
GND
FREQUENCY
ADJUST
OUTC
R56
2.7
DNP
3W-4211
C80
1µF
DNP
OUTD
DNP
DNP
GND
PVDD
+15V
RESET CONTROL
R6
100k
4
VDD
5
6
5
RESET-SW
3
C84
1µF
50V
RESET
R26
3.30k
MR
GND
GND
R24
47k
RESET
3
R30
1
2
C82
+12V
R31
DNP
RESET-SW
S1
3.3V
+12V
DNP
U7
C83
1µF
50V
4
3.3V
J13
R32
9.10k
FAULT
0
FAULT
R29
R28
47k
1.00k
R35
100
0.1uF
C67
0.1uF
1
CLIP_OTW
1.00k
R33
D2
OTW
Orange
Q1
100
MONITORS
TPS3802K33DCKR
GND
GND
GND
GND
GND
GND
RESET
GND
D4
FAULT
Red
Q2
GND
GND
GND
GND
Copyright © 2016, Texas Instruments Incorporated
Figure 10. TPA3244EVM Schematic 2
22
TPA3244 Evaluation Module
SLVUAT5 – November 2016
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Board Layouts, Bill of Materials, and Schematic
www.ti.com
PVDD
PVDD
PVDD MAX = 31.5V
J1
U1
D3
3A
2
1
C39
47µF
50V
C3
1µF
50V
C4
2.2µF
50V
C11
0.01µF
50V
10
C2
0.1µF
50V
8
182k
GND
7
5
C12
4700pF
4
GND
RON/SD
SS
2
D1
1A
3
ISEN
SGND
1.5A
C7
5600pF
R39
4.99k
Hi Current Shunt
6
FB
11
DAP
R40
1.00k
LM5010ASD/NOPB
GND
+15V
J31
15V-VR
1
SW
RTN
C13
GND L1
0.1uF
C1
0.047µF
100µH
9
VCC
BST
R2
J29
PVDD-IN
GND
VIN
GND
GND
GND
+15V
+12V
+12V
U2
1
4
C6
4.7µF
C8
0.47µF
IN
OUT
TAB
GND
2
GND
GND
+12V
IN
C38
10µF
J32
12V
GND
1.50k
GND
3.3V
GND
D5
Green
3.3V
3.3V
OUTPUT
OUTPUT
R58
C9
0.1uF
GND
U3
3
12V
C5
47µF
LM2940IMP-12/NOPB
GND
GND
D6
Green
3
R34
360
GND
2
4
C10
100µF
1
TLV1117-33IDCY
GND
GND
J33
3.3V
GND
Copyright © 2016, Texas Instruments Incorporated
Figure 11. TPA3244EVM Schematic 3
SLVUAT5 – November 2016
Submit Documentation Feedback
TPA3244 Evaluation Module
Copyright © 2016, Texas Instruments Incorporated
23
STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES
1.
Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or
documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein.
Acceptance of the EVM is expressly subject to the following terms and conditions.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2
Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software
License Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment
by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any
way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or
instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as
mandated by government requirements. TI does not test all parameters of each EVM.
2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM,
or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the
warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to
repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall
be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
3
Regulatory Notices:
3.1 United States
3.1.1
Notice applicable to EVMs not FCC-Approved:
This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit
to determine whether to incorporate such items in a finished product and software developers to write software applications for
use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless
all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause
harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is
designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of
an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2
For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
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FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•
•
•
•
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1
For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1
Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2
Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified
by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required by Radio Law of
Japan to follow the instructions below with respect to EVMs:
1.
2.
3.
Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
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【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて
いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの
措置を取っていただく必要がありますのでご注意ください。
1.
2.
3.
電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
実験局の免許を取得後ご使用いただく。
技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ
ンスツルメンツ株式会社
東京都新宿区西新宿6丁目24番1号
西新宿三井ビル
3.3.3
Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ
い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
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4
EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1
User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2
EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.
5.
Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.
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6.
Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE
DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER
WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY
THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND
CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY
OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD
PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY
INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF
THE EVM.
7.
USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION
SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY
OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
8.
Limitations on Damages and Liability:
8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE,
INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE
TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED
TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS
OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS,
LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL
BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION
ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM
PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER
THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE
OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND
CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT.
9.
Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s)
will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in
a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable
order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s),
excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas,
without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to
these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas.
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief
in any United States or foreign court.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2015, Texas Instruments Incorporated
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IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
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TI is not responsible or liable for any such statements.
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anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
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requirements. Nonetheless, such components are subject to these terms.
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Products
Applications
Audio
www.ti.com/audio
Automotive and Transportation
www.ti.com/automotive
Amplifiers
amplifier.ti.com
Communications and Telecom
www.ti.com/communications
Data Converters
dataconverter.ti.com
Computers and Peripherals
www.ti.com/computers
DLP® Products
www.dlp.com
Consumer Electronics
www.ti.com/consumer-apps
DSP
dsp.ti.com
Energy and Lighting
www.ti.com/energy
Clocks and Timers
www.ti.com/clocks
Industrial
www.ti.com/industrial
Interface
interface.ti.com
Medical
www.ti.com/medical
Logic
logic.ti.com
Security
www.ti.com/security
Power Mgmt
power.ti.com
Space, Avionics and Defense
www.ti.com/space-avionics-defense
Microcontrollers
microcontroller.ti.com
Video and Imaging
www.ti.com/video
RFID
www.ti-rfid.com
OMAP Applications Processors
www.ti.com/omap
TI E2E Community
e2e.ti.com
Wireless Connectivity
www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2016, Texas Instruments Incorporated
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