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Texas Instruments DRV612 EVM User guides
User's Guide
SLOU307 – January 2011
DRV612EVM
This user’s guide describes the operation of the DRV612 evaluation module. This document provides
design information including a schematic, bill of materials, and printed circuit board (PCB) layout drawings.
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Contents
Overview .....................................................................................................................
1.1
DRV612EVM Features ............................................................................................
Quick Setup ..................................................................................................................
2.1
Electrostatic Discharge Notice ...................................................................................
2.2
Unpacking the EVM ................................................................................................
2.3
Power Supply Setup ...............................................................................................
Component Selection .......................................................................................................
3.1
Charge Pump .......................................................................................................
3.2
Power-Supply Decoupling Capacitors ...........................................................................
Layout Recommendations .................................................................................................
4.1
PGND and GND Connections ....................................................................................
Design Documentation .....................................................................................................
5.1
Schematic and PCB Layout ......................................................................................
5.2
Parts List ............................................................................................................
5.3
PCB Specification ..................................................................................................
5.4
PCB Layers .........................................................................................................
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3
4
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5
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6
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8
8
List of Figures
1
DRV612EVM - Top View ................................................................................................... 2
2
DRV612EVM - Bottom View ............................................................................................... 2
3
DRV612EVM Functional Block Diagram ................................................................................. 3
4
Power-Up/-Down Sequence
5
6
..............................................................................................
DRV612EVM Schematic: DRV612 ......................................................................................
DRV612EVM PCB Layout .................................................................................................
5
6
7
List of Tables
1
Key Parameters ............................................................................................................. 4
2
Recommended Supply Voltage
3
Bill of Materials .............................................................................................................. 7
4
PCB Specification ........................................................................................................... 8
..........................................................................................
4
DirectPath is a trademark of Texas Instruments.
Blu-ray Disc is a trademark of Blu-ray Disc.
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Figure 1. DRV612EVM - Top View
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Figure 2. DRV612EVM - Bottom View
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Overview
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1
Overview
The DRV612EVM customer evaluation module (EVM) demonstrates the capabilities and operation of the
DRV612 integrated circuit from Texas Instruments.
The DRV612 is a 2-VRMS pop-free stereo line driver designed to allow removal of the output dc-blocking
capacitors and combined with the internal programmable gain resistors reduce component count and
overall cost. The device is ideal for single-supply electronics where size and cost are critical design
parameters.
Designed using TI’s patented DirectPath™ technology, the DRV612 is capable of driving 2 VRMS into a
600Ω load. The device has fixed-gain single-ended inputs with a gain select pin. Line outputs have ±8kV
HBM ESD protection enabling and a simple ESD protection circuit. The DRV612 has built-in active mode
control with more than 80 dB attenuation for pop-free mute on/off control.
The DRV612 does not require a power supply greater than 3.3V to generate its 5.6Vpp output, nor does it
require a split rail power supply. The DRV612 integrates its own charge pump to generate a negative
supply rail that provides a clean, pop-free ground biased 2Vrms output.
The DRV612 is available in a 14-pin TSSOP package.
This EVM is configured with RCA stereo connectors for analog input and stereo output; The power supply
is connected via a two-pin, 2.54-mm header.
This evaluation board is designed for testing applications such as set-top boxes, LCD/PDP TVs, Blu-ray
Disc™ DVD players, DVD mini-component systems, home theater-in-a-box (HTIB) systems, or
soundcards.
NOTE: This documnet presents EVM specificatins, audio performance measurements graphs, and
design documentation that includes complete circuit descriptions, schematic diagrams, a
parts list, and PCB layout design. Gerber (layout) files are availabe from the TI web site at
http://www.ti.com.
Throughout this document, the abbreviation EVM and the term evaluation module are synonymous with
the DRV612EVM.
1.1
DRV612EVM Features
The DRV612EVM has these features:
• Two-channel evaluation module (double-sided, plated-through PCB layout)
• 2-VRMS stereo line output
• Single-ended analog inputs
• No output capacitor required
• Mute button
Figure 3 illustrates the functional diagram for the EVM. Table 1 summarizes the key parameters.
+3.3V
ROUT
RIN
DRV612
LOUT
LIN
MUTE
Figure 3. DRV612EVM Functional Block Diagram
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Quick Setup
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Table 1. Key Parameters
2
Key Parameters
Specification/Unit
Supply Voltage
3.3 V
Number of channels
Two
Load Impedance
600 Ω
Output Voltage
2 Vrms
Dynamic Range
105 dB
Quick Setup
This section describes the DRV612EVM board with regards to the power supply and system interfaces. It
provides information about handling and unpacking the DRV612EVM, absolute operating conditions, and a
description of the factory default configurations.
The following subsections provide a step-by-step guide to configuring the DRV612EVM for device
evaluation.
2.1
Electrostatic Discharge Notice
CAUTION
Many of the components on the DRV612EVM are susceptible to damage by
electrostatic discharge (ESD). Customers are advised to observe proper ESD
handling precautions when unpacking and handling the EVM, including the use
of a grounded wrist strap at an approved ESD workstation. Failure to observe
proper ESD handling procedures may result in damage to EVM components.
2.2
Unpacking the EVM
Upon opening the DRV612EVM package, ensure that the following items are included:
• One DRV612EVM evaluation board, including:
– One DRV612PW device
If either item is missing, please contact the Texas Instruments Product Information Center nearest you to
inquire about a replacement.
2.3
Power Supply Setup
A single power supply is required to power up the EVM. The power supply is connected to the EVM board
using a two-pin, 2.54-mm header (J1). Table 2 lists the recommended supply voltage.
Table 2. Recommended Supply Voltage
Description
Voltage Limitations
Current Requirement
Cable
Power supply
3.3 V
0.10 A
—
CAUTION
Applying voltages above the limitations given in Table 2 may cause permanent
damage to your hardware.
4
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Component Selection
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2.3.1
Pop-Free Power Up
Pop-free power up is ensured by keeping the MUTE low during power supply ramp up and down. The pins
should be kept low until the input AC-coupling capacitors are fully charged before asserting the MUTE pin
high, this way proper pre-charge of the ac-coupling is performed and pop-less power-up is achieved.
Figure 4 illustrates the preferred sequence.
Supply
Supply ramp
MUTE
Time for ac - coupling
capacitors to charge
Figure 4. Power-Up/-Down Sequence
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Component Selection
3.1
Charge Pump
The charge pump flying capacitor, C6, serves to transfer charge during the generation of the negative
supply voltage. The PVSS capacitor must be at least equal to the charge pump capacitor in order to allow
a maximum charge transfer. Low equivalent series resistance (ESR) capacitors are an ideal selection, with
a typical value of 1 mF. Capacitor values less than 1 mF can be used, but the maximum output can be
reduced. It is therefore recommended to validate the design with thorough testing.
3.2
Power-Supply Decoupling Capacitors
The DRV612 is a DirectPath™ line driver amplifier that requires adequate power-supply decoupling to
ensure that noise and total harmonic distortion (THD) are low. A good low ESR ceramic capacitor, C5 (1
mF typical), placed as close as possible to the device PvDD leads is the best option. Placing this
decoupling capacitor close to the DRV612 device is important for amplifier performance. For filtering
lower-frequency noise signals, a 10-mF or greater capacitor placed near the audio amplifier may also help,
but is not required in most applications because of the high PSRR of the DRV612.
The charge pump circuit does apply ripple current on the PVDD line, and an LC or RC filter may be needed
if noise-sensitive audio devices share the PVDD supply.
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Layout Recommendations
4.1
PGND and GND Connections
The PGND and GND pins of the DRV612 must be routed separately back to the decoupling capacitor in
order to facilitate proper device operation.
On the DRV612EVM, a star ground routing pattern is used; the star point is located directly below the
DRV612 device itself.
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5
GND
RCA (Red)
1
GND
100K
0603
RIN
DRV612EVM
© 2011, Texas Instruments Incorporated
2
C2
2.2ufd/50V
VSA
C3
2.2ufd/50V
VSA
U1
TSSOP14-PW
GND
S1
GND
100pfd/50V
0603
C4
10K
0603
R4
+3.3V
Orange
1
14
-IN_R
49.9K 1/8W
0805
R5
DRV612PW
GND
DUAL FOOTPRINT PADS
SMD-VSA ELECTROLYTIC / CERAMIC 1206
LIN-IN_L
GND
100K
0603
R3
MUTE LINE DRIVER
LIN
RCA (Left)
3
1
GND
330
0603
R1
2
13
4
11
OUT_L
GND
3
12
GND
OUT_R
GND
C5
5
10
1.0ufd/16V
0603
7
8
GND
1.0ufd/16V
0603
C7
6
9
R6
R7
33.0
0603
CN
CP
33.0
0603
LOUT
1.0ufd/16V
0603
C6
ROUT
C8
1000pfd/50V
0603
C9
1000pfd/50V
0603
GND
GND
GND
1
1
3
2
2
3
LOUT
RCA(Black)
RCA (Red)
ROUT
LINE
OUT
Schematic and PCB Layout
3
2
R2
10ufd/10V
0805
C1
+3.3V
5.1
RIN
2
Green
0805
LED1
Design Documentation
LINE DRIVER IN
J1
1
+3.3V
+
6
+3.3V
5
+
POWER SUPPLY IN
Design Documentation
www.ti.com
Figure 5. DRV612EVM Schematic: DRV612
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Figure 6. DRV612EVM PCB Layout
5.2
Parts List
The bill of materials (BOM) for the DRV612EVM is listed in Table 3.
Table 3. Bill of Materials
Qty
Part
Reference
Description
Manufacturer
Mfr Part No
1
U1
DIRECTPATH 2V LINE DRIVER/ FIXED GAIN 14-pin HTSSOP PW
ROHS
TEXAS INSTRUMENTS
DRV612PW
1
LED1
LED, GREEN 2.0V SMD0805 ROHS
LUMEX OPTO
SML-LXT0805GW-TR
2
C8, C9
CAP SMD0603 CERM 1000PFD 50V 5% COG ROHS
TDK CORP.
C1608C0G1H102J
1
C4
CAP SMD0603 CERM 100PFD 50V 5% COG ROHS
MURATA
GRM1885C1H101JA01D
2
C2, C3
CAP ALUM-ELECT SMD-VSA 2.2UFD 50V 20% ROHS
PANASONIC
EEE-1HS2R2SR
3
C5, C6, C7
CAP SMD0603 CERM 1.0UFD 16V 10% X7R ROHS
TDK
C1608X7R1C105K
1
C1
CAP SMD0805 CERM 10UFD 10V10% X7R ROHS
MURATA
GRM21BR71A106KE51L
2
R6, R7
RESISTOR SMD0603 33.0 OHMS 1% 1/10W ROHS
PANASONIC
ERJ-3EKF33R0
1
R1
RESISTOR SMD0603 330 OHMS 5% 1/10W ROHS
PANASONIC
ERJ-3GEYJ331V
1
R4
RESISTOR SMD0603 10K 5% 1/10W ROHS
PANASONIC
ERJ-3GEYJ103V
1
R5
RESISTOR SMD0805 49.9K OHMS 1% 1/8W THICK FILM ROHS
VISHAY
CRCW080549K9FKEA
2
R2, R3
RESISTOR SMD0603 100K OHM 5% THICK FILM 1/10W ROHS
PANASONIC
CRCW06031K02FKTA-ND
1
J1
HEADER THRU MALE 2 PIN 100LS GOLD ROHS
SULLINS
PBC02SAAN
2
LIN, LOUT
JACK, RCA 3-PIN PCB-RA BLACK ROHS
SWITCHCRAFT
PJRAN1X1U01X
2
RIN, ROUT
JACK, RCA 3-PIN PCB-RA RED ROHS
SWITCHCRAFT
PJRAN1X1U03X
1
MUTE
PC TESTPOINT, ORANGE, ROHS
KEYSTONE ELECTRONICS
5003
1
S1
SWITCH, MOM, 160G SMT 4X3MM ROHS
E-SWITCH
TL1015AF160QG
4
NA
STANDOFF,4-40,0.5INx3/16IN,ALUM RND F-F
KEYSTONE ELECTRONICS
2027
4
NA
4-40 SCREW, STEEL 0.250 IN
BUILDING FASTENERS
PMS 440 0025 PH
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Design Documentation
5.3
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PCB Specification
Table 4 summarizes the specifications for the evaluation board PCB.
Table 4. PCB Specification
Board Identification
5.4
A852-PCB-001 (2.00)
Board type
Double-sided plated-through board
Laminate type
FR4
Laminate thickness
1,0 mm
Copper thickness
35 µm (including plating exterior layers)
Copper plating of holes
>25 µm
Minimum hole diameter
0.3 mm
Silkscreen, component side
White; remove silkscreen from solder and pre-tinned areas
Silkscreen, component side
None
Soldermask, component side
Green
Soldermask, solder side
Green
Protective coating
Solder coating and chemical silver on free copper
Electrical test
PCB must be electrically tested
Manufactured to
PERFAG 2E (http://www.perfag.dk)
Aperture table
PERFAG 10A (http://www.perfag.dk)
Board dimensions
60 mm × 90 mm
PCB Layers
Gerber files are available for download at the DRV612EVM product folder page on the TI web site.
Component placement and board layout are illustrated in Figure 6.
NOTE: Board layouts are not to scale. These figures are intended to show how the board is laid
out; they are not intended to be used for manufacturing DRV612EVM PCBs.
8
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Evaluation Board/Kit Important Notice
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION
PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the
product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are
not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations,
including product safety and environmental measures typically found in end products that incorporate such semiconductor
components or circuit boards. This evaluation board/kit does not fall within the scope of the European Union directives regarding
electromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC, CE or UL, and therefore may not meet the
technical requirements of these directives or other related directives.
Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30
days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY
SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING
ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all
claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to
take any and all appropriate precautions with regard to electrostatic discharge.
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TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.
TI assumes no liability for applications assistance, customer product design, software performance, or infringement of
patents or services described herein.
Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling the
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environmental and/or safety programs, please contact the TI application engineer or visit www.ti.com/esh.
No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or
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FCC Warning
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION
PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. It generates, uses, and
can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15
of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this
equipment in other environments may cause interference with radio communications, in which case the user at his own expense
will be required to take whatever measures may be required to correct this interference.
EVM Warnings and Restrictions
It is important to operate this EVM within the input voltage range of 0 V to 3 V and the output voltage range of 0 V to 3.3 V .
Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are
questions concerning the input range, please contact a TI field representative prior to connecting the input power.
Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the
EVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load
specification, please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than 60°C. The EVM is designed to
operate properly with certain components above 40°C as long as the input and output ranges are maintained. These components
include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of
devices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near
these devices during operation, please be aware that these devices may be very warm to the touch.
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